RF7242
3V W-CDMA BAND 2 LINEAR PA MODULE
Package Style: Module, 10-Pin, 3mmx3mmx1.0mm
VBAT
10 VCC
1
Features
AMP
HSDPA /HSUPA /HSPA+/LTE
Low Voltage Positive Bias
Supply (3.0V to 4.2V)
+28.5dBm Linear Output
Power (+27.5dBm HSDPA
and HSPA+)
High Efficiency Operation
47% at POUT =+28.5dBm
Low Quiescent Current in Low
Power Mode: 5mA when
using DC/Dc converter
Internal Voltage Regulator
Eliminates the Need for External Reference Voltage (VREF)
3-Mode Power States with
Digital Control Interface
Optimized for DC/DC Converter Operation
Integrated Power Coupler
Integrated Blocking and Collector Decoupling Capacitors
Applications
WCDMA/HSDPA/HSPA+/LTE
Wireless Handsets and Data
Cards
Dual-Mode UMTS Wireless
Handsets
RF IN
2
VMODE1
3
VMODE0
4
VEN
5
9 RF OUT
Bias Control
& PA/VMODE
Enable
8
CPL IN
7
GND
6 CPL OUT
Functional Block Diagram
Product Description
The RF7242 is a high-power, high-efficiency, linear power amplifier
designed for use as the final RF amplifier in 3V, 50 W-CDMA mobile cellular equipment and spread-spectrum systems. This PA is developed for
UMTS Band 2 which operates in the 1850MHz to 1910MHz frequency
band. The RF7242 has two digital control pins to select one of three power
modes to optimize performance and current drain at lower power levels.
The part also has an integrated directional coupler which eliminates the
need for an external discrete coupler at the output. The RF7242 meets
the spectral linearity requirements of High Speed Downlink Packet Access
(HSDPA), High Speed Uplink Packet Access (HSUPA), and Long Term Evolution (LTE) data transmission and is assembled in a 10-pin, 3mmx3mm
module.
Ordering Information
RF7242
RF7242PCBA-410
3V W-CDMA Band 2 Linear PA Module
Fully Assembled Evaluation Board
Optimum Technology Matching® Applied
GaAs HBT
GaAs MESFET
InGaP HBT
SiGe BiCMOS
Si BiCMOS
SiGe HBT
GaAs pHEMT
Si CMOS
Si BJT
GaN HEMT
RF MEMS
LDMOS
RF MICRO DEVICES®, RFMD®, Optimum Technology Matching®, Enabling Wireless Connectivity™, PowerStar®, POLARIS™ TOTAL RADIO™ and UltimateBlue™ are trademarks of RFMD, LLC. BLUETOOTH is a trademark owned by Bluetooth SIG, Inc., U.S.A. and licensed for use by RFMD. All other trade names, trademarks and registered trademarks are the property of their respective owners. ©2006, RF Micro Devices, Inc.
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RF7242
Absolute Maximum Ratings
Parameter
Rating
Unit
Supply Voltage in Standby Mode
6.0
V
Supply Voltage in Idle Mode
6.0
V
Supply Voltage in Operating Mode,
50 Load
6.0
V
Supply Voltage, VBAT
6.0
V
Control Voltage, VMODE0, VMODE1
3.5
V
Control Voltage, VEN
3.5
V
Caution! ESD sensitive device.
Exceeding any one or a combination of the Absolute Maximum Rating conditions may
cause permanent damage to the device. Extended application of Absolute Maximum
Rating conditions to the device may reduce device reliability. Specified typical performance or functional operation of the device under Absolute Maximum Rating conditions is not implied.
RoHS status based on EUDirective2002/95/EC (at time of this document revision).
RF - Input Power
+10
dBm
RF - Output Power
+30
dBm
Output Load VSWR (Ruggedness)
10:1
Operating Ambient Temperature
-30 to +110
°C
Storage Temperature
-55 to +150
°C
The information in this publication is believed to be accurate and reliable. However, no
responsibility is assumed by RF Micro Devices, Inc. ("RFMD") for its use, nor for any
infringement of patents, or other rights of third parties, resulting from its use. No
license is granted by implication or otherwise under any patent or patent rights of
RFMD. RFMD reserves the right to change component circuitry, recommended application circuitry and specifications at any time without prior notice.
Specification
Min.
Typ.
Max.
Unit
Operating Frequency Range
1850
1910
MHz
VBAT
+3.0
+3.4
+4.2
V
VCC
+0.51
+3.4
+4.2
V
VEN
0
0.5
V
PA disabled.
3.0
V
PA enabled.
0.5
V
Logic “low”.
3.0
V
Logic “high”.
Parameter
Condition
Recommended Operating
Conditions
1.5
VMODE0, VMODE1
1.8
0
1.5
1.8
POUT
Maximum Linear Output
(HPM)
28.52,3
dBm
High Power Mode (HPM)
VCC =3.4V
Maximum Linear Output
(HPM)
28.54
dBm
High Power Mode (HPM)
VCC =3.7V
Maximum Linear Output
(MPM)
19.03
dBm
Medium Power Mode (MPM)
VCC =1.48V
Maximum Linear Output
(LPM)
10.03
dBm
Low Power Mode (LPM)
VCC =0.84V
Ambient Temperature
-30
+25
+85
°C
Notes:
1. VCC down to 0.5V may be used for backed-off power when using DC/DC converter to conserve battery current.
2. For operation at VCC =3.0V, derate POUT by 1.0dB.
3. POUT is specified for 3GPP (Rel99) modulation. For HSPA+ operation, derate POUT by 1.0dB:
HSPA+ Configuration: 3GPP Rel7 Subtest 1.
4. POUT is specified for 3GPP (HSDPA Sub-test 2 and HSUPA Sub-test 1) modulation.
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DS110803
RF7242
Specification
Min.
Typ.
Max.
Parameter
Unit
Condition
T=+25C, VBAT =+3.4V, VEN =+1.8V, 50 system, WCDMA Rel 99 Modulation unless otherwise specified.
Electrical Specifications
Gain
Gain Linearity
ACLR - 5MHz Offset
ACLR - 10MHz Offset
PAE
Current Drain
Quiescent Current
28
dB
HPM, POUT =28.5dBm, VCC=3.4V
26
dB
MPM, POUT 19.0dBm, VCC=1.48V
20
dB
LPM, POUT 10.0dBm, VCC=0.84V
±0.7
dB
HPM, 19.0dBmPOUT 28.5dBm
-38
dBc
HPM, POUT =28.5dBm, VCC=3.4V
-40
dBc
-40
dBc
HPM, POUT 28.25dBm, VCC=3.4V
MPM, POUT =19.0dBm, VCC=1.48V
-40
dBc
LPM, POUT =10.0dBm, VCC=0.84V
-52
dBc
HPM, POUT =28.5dBm, VCC=3.4V
-60
dBc
MPM, POUT =19.0dBm, VCC=1.48V
-60
dBc
LPM, POUT = 10.0dBm, VCC=0.84V
47
%
HPM, POUT =28.5dBm, VCC=3.4V
37
%
MPM, POUT =19.0dBm, VCC=1.48V
22
%
LPM, POUT =10.0dBm, VCC=0.84V
443
mA
HPM, POUT =28.5dBm, VCC=3.4V
145
mA
MPM, POUT =19.0dBm, VCC=1.48V
54
mA
LPM, POUT =10.0dBm, VCC=0.84V
54
mA
HPM, DC only
45
mA
MPM, DC only
LPM, DC only
20
mA
Enable Current
0.1
mA
Source or sink current. VEN =1.8V.
Mode Current (IMODE0, IMODE1)
0.1
mA
Source or sink current. VMODE0, VMODE1 =1.8V.
Leakage Current
5.0
A
DC only. VCC =VBAT =4.2V, VEN =VMODE0 =VMODE1 =0.5V.
Noise Power in Receive Band
-138
dBm/Hz
All power modes, measured at duplex offset frequency
(FTX+80MHz). Rx: 1930MHz to 1990MHz,
POUT 28.5dBm
Input Impedance
15.0
1.5:1
VSWR
No ext. matching, POUT 28.5dBm, all modes.
Harmonic, 2FO
-17
dBm
POUT 28.5dBm, all power modes.
Harmonic, 3FO
-25
dBm
POUT 28.5dBm, all power modes.
dBc
All spurious, POUT 28.5dBm, all conditions, load
VSWR6:1, all phase angles.
Spurious Output Level
-70
Insertion Phase Shift
±10
°
Phase shift at 19dBm when switching from HPM to
MPM and MPM to LPM at 10dBm.
DC Enable Time
10
S
DC only. Time from VEN =high to stable idle current (90%
of steady state value).
RF Rise/Fall Time
6
S
POUT 28.5dBm, all modes. 90% of target, DC settled
prior to RF.
Coupling Factor
-20
dB
POUT 28.5dBm, all modes.
Coupling Accuracy - Temp/Voltage
±0.5
dB
POUT 28.5dBm, all modes. -30°CT85°C, VCC as
required, referenced to 25°C, 3.4V conditions.
Coupling Accuracy - VSWR
±0.25
dB
POUT 28.5dBm, all modes, load VSWR=2:1, ±0.25dB
accuracy corresponds to 20dB directivity.
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RF7242
Pin
1
2
3
4
5
6
7
8
Function
VBAT
RF IN
VMODE1
VMODE0
VEN
CPL_OUT
GND
CPL_IN
9
10
RF OUT
VCC
Pkg
Base
GND
Description
Supply voltage for bias circuitry.
RF input internally matched to 50 and DC blocked.
Digital control input for power mode selection (see Operating Modes truth table).
Digital control input for power mode selection (see Operating Modes truth table).
Digital control input for PA enable and disable (see Operating Modes truth table).
Coupler output.
This pin must be grounded.
Coupler input used for cascading couplers in series. Terminate this pin with a 50 resistor if not connected to
another coupler.
RF output internally matched to 50and DC blocked.
Supply voltage for the first and second stage amplifier which can be connected to battery supply or output of
DC-DC converter.
Ground connection. The package backside should be soldered to a topside ground pad connecting to the PCB
ground plane with multiple ground vias. The pad should have a low thermal resistance and low electrical impedance to the ground plane.
VEN
VMODE0 VMODE1
Low
Low
Low
3.0V to 4.2V
0.5V to 4.2V
Power down mode
Low
X
X
3.0V to 4.2V
0.5V to 4.2V
Standby Mode
High
Low
Low
3.0V to 4.2V
0.5V to 4.2V
High power mode
High
High
Low
3.0V to 4.2V
0.5V to 4.2V
Medium power mode
High
High
High
3.0V to 4.2V
0.5V to 4.2V
Low power mode
4 of 7
VBAT
VCC
Conditions/Comments
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
DS110803
RF7242
Look Up Table for VCC Optimization
POUT
HPM VCC
28.25
3.4
28
3.3
27
3.05
26
2.81
25
2.51
24
2.3
23
2.11
MPM VCC
22
1.92
21
1.75
20
1.59
19
1.46
18
1.34
1.37
17
1.24
1.27
16
1.15
1.17
15
1.07
1.08
LPM VCC
1.48
14
1
1.01
13
0.94
0.94
12
0.89
0.89
11
0.84
0.85
0.88
10
0.8
0.81
0.84
9
0.76
0.77
0.8
8
0.72
0.73
0.76
7
0.69
0.7
0.72
6
0.66
0.67
0.68
5
0.64
0.64
0.65
4
0.62
0.62
0.63
3
0.6
0.6
0.61
2
0.58
0.58
0.59
1
0.56
0.56
0.57
0
0.54
0.54
0.55
Package Drawing
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support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
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RF7242
Preliminary Application Schematic
VBAT
VCC
10
1
C5
4.7uF
J1
RF IN
AMP
3
VMODE1
4
VMODE0
VEN
9
2
5
Bias Control
& PA/VMODE
Enable
C6
4.7uF
J2
RF OUT
8
R21
50
7
6
J3
CPL OUT
NOTES:
1. The 50 resistor will be removed if pin 8 is connected to another coupler.
PCB Design Requirements
PCB Surface Finish
The PCB surface finish used for RFMD's qualification process is electroless nickel, immersion gold. Typical thickness is 3inch
to 8inch gold over 180inch nickel.
PCB Land Pattern Recommendation
PCB land patterns for RFMD components are based on IPC-7351 standards and RFMD empirical data. The pad pattern shown
has been developed and tested for optimized assembly at RFMD. The PCB land pattern has been developed to accommodate
lead and package tolerances. Since surface mount processes vary from company to company, careful process development is
recommended.
PCB Metal Land Pattern
PCB Metal Land Pattern (Top View)
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DS110803
RF7242
PCB Solder Mask Pattern
Liquid Photo-Imageable (LPI) solder mask is recommended. The solder mask footprint will match what is shown for the PCB
metal land pattern with a 2mil to 3mil expansion to accommodate solder mask registration clearance around all pads. The
center-grounding pad shall also have a solder mask clearance. Expansion of the pads to create solder mask clearance can be
provided in the master data or requested from the PCB fabrication supplier.
PCB Solder Mask Pattern
Thermal Pad and Via Design
The PCB land pattern has been designed with a thermal pad that matches the die paddle size on the bottom of the device.
Thermal vias are required in the PCB layout to effectively conduct heat away from the package. The via pattern has been
designed to address thermal, power dissipation and electrical requirements of the device as well as accommodating routing
strategies.
The via pattern used for the RFMD qualification is based on thru-hole vias with 0.203mm to 0.330mm finished hole size on a
0.5mm to 1.2mm grid pattern with 0.025mm plating on via walls. If micro vias are used in a design, it is suggested that the
quantity of vias be increased by a 4:1 ratio to achieve similar results.
DS110803
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
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