®
R7521
PWM Controller for Half-Bridge Converters
General Description
Features
The R7521 is a with PWM controller with supervisor
function inside. The controller can be applied on half-bridge
converter or push-pull converter, which needs two
interleaved gate drivers with 180 degree phase shift. Four
multiple outputs can be monitored by R7521 and there is
a "Power Good" signal to acknowledge the following
system. The controller also has remote control pin and
fully protection of each output, such as output over voltage,
under voltage and over power protection. The DET pin is
applied to detect AC line condition. R7521 incorporates
over power protection. R7521 also contains FC pin to
control Fan's speed by PT voltage variation. The integrated
control circuit of R7521 provides complete functions and
saves the Fan control external circuit of ATX power.
z
Two PWM Driver Outputs for Push-Pull and HalfBridge Converters
z
Built-In Supervisor Saves Cost and Components
Voltage Mode PWM Controller
Output Over Voltage and Under Voltage Protections
of Each Output
Remote ON/OFF
Power Good Indicator with Adaptive Time
Sequence
Input Under Voltage Detector and Warning
Over Power Protection
Adjustable Soft-Start
For ATX Power Application
Fun Speed Control
z
z
z
z
z
z
z
z
z
Simplified Application Circuit
+
+12V
+
-12V
V12
DET
FAN1
-
+5V
+
FC
INV
SS
+
V33
+5VSB
-
+
RT
R7521
COMP
+12V
FAN2
V5
+12V
+
+12V -12V
GND
OPP
PSON
PT
VDD
C1
PG
C2
Transfer to Primary
Driver
TL431
+5V
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
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December 2012
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is a registered trademark of Richtek Technology Corporation.
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1
R7521
Ordering Information
Pin Configurations
R7521
Package Type
N: DIP-16
S: SOP-16
Lead Plating System
G : Green (Halogen Free and Pb Free)
Note :
Richtek products are :
`
(TOP VIEW)
RT
FC
V12
V33
V5
PT
DET
VDD
SS
INV
COMP
PSON
PG
GND
C1
C2
16
RoHS compliant and compatible with the current require-
2
15
3
14
4
13
5
12
6
11
7
10
8
9
SOP-16
ments of IPC/JEDEC J-STD-020.
`
Suitable for use in SnPb or Pb-free soldering processes.
RT
16
SS
FC
2
15
INV
Marking Information
V12
3
14
COMP
R7521GS
V33
4
13
PSON
V5
5
12
PG
PT
6
11
GND
DET
7
10
C1
VDD
8
9
C2
R7521GS : Product Number
R7521
GSYMDNN
YMDNN : Date Code
R7521GN
RichPower
R7521
GNYMDNN
R7521GN : Product Number
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YMDNN : Date Code
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R7521
Functional Pin Description
Pin No.
Pin Name
Pin Function
SOP-16
DIP-16
1
1
RT
2
2
FC
Reference Current Setting. Connected to an external resistor to set the
internal reference current.
Fan Control I/O.
3
3
V12
12V Output Sense Pin.
4
4
V33
3.3V Output Sense Pin.
5
5
V5
5V Output Sense Pin.
6
6
PT
Over Power Sense Pin.
7
7
DET
VAC Input Detector Input.
8
8
VDD
Bias of Controller. Source from 5V standby power.
9
9
C2
PWM Driver Output 2.
10
10
C1
PWM Driver Output 1.
11
11
GND
Ground.
12
12
PG
Power Good Signal Output (open collector type.).
13
13
PSON
Remote On/Off Control with 24ms De_bounce Time.
14
14
COMP
Error Amplifier Output.
15
15
INV
Negative Input of error amplifier.
16
16
SS
Soft-Start. SS is as the non-inverting input of error amplifier.
Function Block Diagram
V33
V5
V12
PG
RT
FC
UVS
Fan
Control
PG
Logic
UVP
OFF
254ms Delay
VBIAS
PT
OVP
UVAC
S/H
DET
1.9V
VDD
Enable
Logic
-
+
VDD
VDD
3.2V
-
C1
Driver
8µA
1.4V
+
PSON
D
Q
clk
QN
P
C
6ms
Delay
+
PT
VDD
POR
-
24ms
De_bounce
2ms
Delay
S
2.5V
+
+
-
Q
C2
R QN
+
-
Reset
OSC
SS INV
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December 2012
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DMAX
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R7521
Operation
The R7521 is a PWM controller with supervisor functions.
The PWM signal C1 and C2 drive primary-side switching
power transistor by transformer, and the supervisor
monitors each output. The R7521 provides fruitful protection
functions that protect system from damage. Each output
is protected by OVP, UVP, and OPP. The functions
description as follow :
Output Over-Voltage Protection
The R7521 has an output Over-Voltage Protection (OVP)
function, which monitors the 3.3V, 5V and 12V output
voltages, to prevent power system and loads from damages
during one or more output OV condition(s). The OVP starts
monitoring the voltages on V33, V5 and V12 at the end of
the PSONB de-bounce time. When an Over-Voltage (OV)
condition appears at one of the monitored pins for more
than the 0.6ms (typical) deglitch time, the PG voltage goes
low to indicate one of the output voltages is out of
regulation. Meanwhile the R7521 disables PWM output
and protects the power supply system. The OVP condition
is latched until PSON is toggled from low to high or VDD
restarts.
Output Under-Voltage Protection
The R7521 provides under voltage protection for the 3.3V,
5V and 12V outputs. The UVP continuously monitors the
voltage on V33, V5 and V12. When an Under Voltage (UV)
protection condition appears at either one of the monitored
pins for more than 2ms (typical) deglitch time, the PG
voltage goes low to indicate one of the output voltages is
out of regulation. Meanwhile, the R7521 disables the PWM
output and protects the power supply system. The UVP
condition is latched until PSON is toggled from low to
high or VDD restarts.
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Output Over-Power Protection
The R7521 has an output over-power protection (OPP)
function, which monitors total output power. The PT pin of
R7521 senses primary-side switching current by current
transformer (CT). When over power or output short
condition appears, the OPP exceeds the trigger voltage
(1.9V) for 6ms (typical), the R7521 disables PWM output
and protects the power supply system. In addition, the
PT can monitor −12V output voltage, and the OPP
condition is latched until PSON is toggled from low to
high or VDD restarts.
PG Outputs
In general, the PG voltage pulled high by an external resistor
connected to the 5V output, indicates the status of the
outputs. The PG keeps at low state when VDD voltage <
UVLO threshold, PSON = H, PGI voltage < 1.2V or one of
the faults, including UVP, OVP and OPP, occurs.
PSON De-bounce
The R7521 provides a remote ON/OFF control input pin
(PSON) for PC power supply applications. A built-in 24ms
(typical) de-bounce circuit performs rising and falling edge
noise de-bounce functions to identify valid PSON input
signals. The PSON also has a TTL logic-compliant input
voltage threshold and a hysteresis design against input
noise.
Soft-Start
The SS offers an internal 8μA (typical) constant current.
Connect a capacitor between the SS and GND pins to set
the soft-start time. Therefore, the soft-start time is tSS =
8μ x CSS. During soft-start period, the UVP and OPP
protection is disabled to prevent wrong UVP, OPP
protection.
is a registered trademark of Richtek Technology Corporation.
R7521-00
December 2012
R7521
Absolute Maximum Ratings
z
z
z
z
z
z
z
z
(Note 1)
Supply Input Voltage, VDD --------------------------------------------------------------------------------------------IDD ---------------------------------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C
SOP-16 --------------------------------------------------------------------------------------------------------------------DIP-16 ----------------------------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2)
SOP-16, θJA --------------------------------------------------------------------------------------------------------------DIP-16, θJA ----------------------------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) -----------------------------------------------------------------------------Junction Temperature ---------------------------------------------------------------------------------------------------Storage Temperature Range ------------------------------------------------------------------------------------------ESD Susceptibility (Note 3)
HBM (Human Body Model) --------------------------------------------------------------------------------------------MM (Machine Model) ----------------------------------------------------------------------------------------------------
Recommended Operating Conditions
z
z
z
z
5V
30mA
0.92W
1.68W
108.6°C/W
59.6°C/W
260°C
150°C
−65°C to 150°C
2kV
200V
(Note 4)
Supply Input Voltage, VDD --------------------------------------------------------------------------------------------- 4V to 6V
Frequency ------------------------------------------------------------------------------------------------------------------ 60kHz
Junction Temperature Range ------------------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range ------------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VDD = 5V, RT = 62kΩ, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
POR Section
DC Supply Voltage
VDD
4
--
6
V
On Threshold Voltage
VTH_ON
--
3.65
--
V
Off Threshold Voltage
VTH_OFF
--
3.4
--
V
Operating Supply Current
IDD_OP
VDD = 5V, VCOMP = 2.5V
--
--
10
mA
Normal PWM Frequency
fOSC
RT = 62kΩ
55
60
65
kHz
Maximum Duty Cycle
DCYMAX
Both for C1 and C2
--
46
--
%
Frequency Variation Versus VDD
Deviation
fDV
VDD = 5V
--
--
2
%
Frequency Variation Versus
Temperature Deviation
fDT
TA = −20°C to 85°C
--
--
5
%
Ramp of Oscillator
VP
--
2
--
V
Zero Duty Offset
VOFFSET
--
0.5
--
V
RT Reference Voltage
VREF_RT
0.98
1
1.02
V
Oscillator Section
fOSC = 35kHz to 70kHz
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R7521
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Protection Section
OVP of 3.3V Output
VOVP_V33
3.9
4.1
4.3
V
OVP of 5V Output
VOVP_V5
5.8
6.1
6.5
V
OVP of 12V Output
VOVP_V12
--
2.5
--
V
UVP of 3.3V Output
VUVP_V33
2
2.6
2.8
V
UVP of 5V Output
VUVP_V5
3
3.6
3.9
V
UVP of 12V Output
VUVP_V12
--
1.25
--
V
UVS of 3.3V Output
VUVS_V33
2.5
2.8
3
V
UVS of 5V Output
VUVS_V5
4
4.3
4.5
V
UVS of 12V Output
VUVS_V12
--
1.75
--
V
Time Delay of OVP
T OVP
0.37
0.6
1.35
ms
Time Delay of UVP
T UVP
1.2
2
4.2
ms
Time Delay of UVS
T UVS
0.9
1.4
2.2
ms
Over Power Protection
VPT
1.7
1.9
2.1
V
PT Delay
--
6
--
ms
PT Cycle Limit
2.9
3.2
3.5
V
(Note 5)
(Note 5)
(Note 5)
Power Good Section
Power Good Time Delay
TPG
--
254
--
ms
DET Voltage Sense for PG
VDET
0.45
0.5
0.55
V
PG Output Saturation Level
VOL
IPG = 5mA
--
--
5
V
PG Leakage Current
ILK
VPG = 5V
--
--
1
µA
Error Amplifier Section
Reference Voltage
VREF2
2.45
2.5
2.55
V
Open Loop Gain
AVOL
50
60
--
dB
Unit Gain Bandwidth
BW
0.3
1
--
MHz
Power Supply Rejection Ratio
PSRR
50
--
--
dB
PSON Threshold Voltage
VTH
1
1.4
2
V
PSON Sourcing Current
IPSON
--
--
0.5
mA
PSON De_bounce Time
T DEB
ON
--
24
--
OFF
--
8
--
Delay Time Between PSON = 1
and PG = 0
TPSOFF
(m.o + D-FF)
1.5
2
4
ms
6.7
8
9.3
µA
Remote On/Off Section
ms
Soft-Start Section
SS Charging Current
ISS
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R7521
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Fan Control Section
Sourcing Current of FC
IFC
6
--
--
mA
Voltage Range of FC
VFC
0.2
--
4
V
PWM Output Section
Rising Time
TR
VDD = 5V, C L = 1.8nF
--
20
55
ns
Falling Time
TF
VDD = 5V, C L = 1.8nF
--
15
50
ns
RDS_ON of Top and Bottom Leg
R DS_ON
VDD = 5V
--
--
4.4
Ω
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. The V12 pin must to use divider resistor. Propose setting the ratio is 1/6.
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R7521
Typical Application Circuit
HV
DET
+
150 2W
470µF/16V
+
510 1/4W
470µF/16V
27 3W
104/50V 4.7 1/4W
+5V
+
6Ts
T1
ERL-35-14PIN
1N4148
470µF/16V
15 1/4W
SBL3045P
3Ts
2907
104/50V 4.7 1/4W
1Ts
PR1004
+12V -12V
1K
103/50V
91K
10 2W
+
100
2K
2K
1N4148
30
222/50V
8550
1N4148
TL431
1.5k 1%
1N4148
T2
EEL-16 (N=1:4)
+
4.7
SBL3045P
100
1N4148
MP1320
2200µF/10V
2907
1N4148
1N4148
50Ts
2200µF/10V
10N40
C1
+3.3V
T4
3.3
1N4148
10R
1N4148
1N4148
3Ts
4.7k
2.2µF
C2
104/ 4.7
50V 1/4W
50Ts
-12V
470µF/10V
10N40
14Ts
+
3.3
PR1004
470µF/10V
7N241
102/1kV 47/5W
10R
820k 1/4W
NTC
103/50V
7N241
+
820k 1/4W
7Ts
225J/250V
V40100P
+12V
+
>
1N4148
7Ts
SWITCH
+
N
4.7nF
275V
4.7nF
275V
820µF/220V
VAC
LF1
EE-25
560k 1/4W
0.33µF/275V
>
250V/7A
820µF/220V
14Ts
L
PT
100K
HV
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+3.3V
+5V
PT
101/50V
V33
V5
PT
PSON
103/50V
3.6k
47k
104/50V
47k
PSON
PG
PG
GND
DET
C1
C1
VDD
C2
C2
+5V
5C6
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R7521-00
December 2012
153/50V
INV
COMP
5VSB_F 33
222/50V
68k
SS
22.1k
10k
22.1k
333/50V
RT
V12
51k
5C1
10k
50k
-
FC
+12V
2.7k
2.49k 1%
2N2222
1K
33
62k
104/
50V 4.7k
TL431
+3.3V +5V +12V
-
1k
DET
1k
FAN1
FAN2
+
2.51k 1%
T3
EEL-19
PC817C
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8
+12V +
R7521
+
560
1000µF/10V
10R
103/50V 1N4007
R7912
+
RT
10µF/50V
GND1
COMP
GND2
100k
DRAIN1
DRAIN2
CS
1.6
VDD
+
+5VSB
1000µF/10V
750k
1N4007
750k
103/50V
+5VSB_F
150k
102k/1kV
R7521
Typical Operating Characteristics
Frequency vs. Temperature
FB & FBS vs. Temperature
80
2.5
FB
FBS
Frequency (Hz).
Voltage (V)
2.49
2.48
2.47
60
40
20
2.46
0
2.45
-30
-15
0
15
30
45
60
75
90
105 120
Temperature (°C)
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December 2012
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-30
-15
0
15
30
45
60
75
90
105 120
Temperature (°C)
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R7521
Application Information
Fan Control
In order to effectively utilize the fan to disperse heat and
reduce acoustic noise, the R7521 provides FC pin to
control Fan's speed. Figure 1 shows the relationship
between FC voltage and load in ATX 300W power supply
application.
Beside, the R7521 has fine over power protection. As
Figure 3, total power limit is constant, and won't follow
Vin variation. Set the ratio of OPP resistive divider to decide
the total limit.
Total Power Limit vs. VIN
160%
FC vs. Load
150%
Total Power (%)
1.6
1.4
FC Voltage
1.2
1
0.8
0.6
140%
130%
120%
110%
The Total Power Limit is constant.
0.4
100%
180Vac
0.2
230Vac
The FC Initial Voltage is 0.543V
0
25%
50%
75%
100%
265Vac
VIN
Figure 3. Over Power Limit and VIN Relation Curve
Load
Figure 1. FC Voltage Variation
VAC Detecting Protection
Over Power Protection
DET is connected to secondary winding through a resistive
divider for VAC input detecting. When VAC fails, the voltage
When ATX power is over power or in output short condition,
the R7521 will shut down the controller. As shown in Figure
2, if the over power condition appears, PT voltage exceeds
the trigger voltage (1.9V) and exists for 6ms (typical), the
PWM output will be latched.
of DET is lower than 0.5V, and PG signal will be pulled low
to indicate VAC power-down. Set the ratio of resistive
divider to decide the DET weight. The bypass capacitor is
used to filter the switching noise.
+
+
+12V
R1
DET
+
R2
DET
-
C
0.5V
R7521
Figure 4. VAC Detecting Circuit
Figure 2. Over Power Protection
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R7521
Thermal Considerations
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent. For
SOP-16 package, the thermal resistance, θJA, is 108.6°C/
2.0
Maximum Power Dissipation (W)1
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
Four-Layer PCB
1.6
DIP-16
1.2
0.8
SOP-16
0.4
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 5. Derating Curve of Maximum Power Dissipation
W on a standard JEDEC 51-7 four-layer thermal test board.
For DIP-16 package, the thermal resistance, θJA, is 59.6°C/
W on a standard JEDEC 51-7 four-layer thermal test board.
The maximum power dissipation at TA = 25°C can be
calculated by the following formula :
PD(MAX) = (125°C − 25°C) / (108.6°C/W) = 0.92W for
SOP-16 package
PD(MAX) = (125°C − 25°C) / (59.6°C/W) = 1.68W for
DIP-16 package
The maximum power dissipation depends on the operating
ambient temperature for fixed T J(MAX) and thermal
resistance, θJA. The derating curve in Figure 5 allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
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R7521
Outline Dimension
H
A
M
B
J
F
C
I
D
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
9.804
10.008
0.386
0.394
B
3.810
3.988
0.150
0.157
C
1.346
1.753
0.053
0.069
D
0.330
0.508
0.013
0.020
F
1.194
1.346
0.047
0.053
H
0.178
0.254
0.007
0.010
I
0.102
0.254
0.004
0.010
J
5.791
6.198
0.228
0.244
M
0.406
1.270
0.016
0.050
16–Lead SOP Plastic Package
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R7521
Dimensions In Millimeters
Symbol
Dimensions In Inches
Min
Max
Min
Max
A
3.700
4.320
0.146
0.170
A1
0.381
0.710
0.015
0.028
A2
3.200
3.600
0.126
0.142
b
0.360
0.560
0.014
0.022
b1
1.143
1.778
0.045
0.070
D
18.800
19.300
0.740
0.760
E
6.200
6.600
0.244
0.260
E1
7.620
8.255
0.300
0.325
e
L
2.540
3.000
0.100
3.600
0.118
0.142
16-Lead DIP Plastic Package
Richtek Technology Corporation
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
R7521-00
December 2012
Downloaded from Arrow.com.
www.richtek.com
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