RT2859ALGQW

RT2859ALGQW

  • 厂商:

    RICHTEK(台湾立锜)

  • 封装:

    WFQFN16

  • 描述:

    降压型 3A 4.5V~18V

  • 数据手册
  • 价格&库存
RT2859ALGQW 数据手册
RT2859A/B 3A, 18V, 650kHz, ACOT® Synchronous Step-Down Converter 1 General Description 2 Features The RT2859A/B are high-performance 650kHz 3A ⚫ Fast Transient Response step-down regulators with internal power switches and ⚫ Steady 650kHz Switching Frequency at all Load Current (RT2859B) synchronous rectifiers. They feature quick transient response using their Advanced Constant On-Time ⚫ Discontinuous Operating Mode at Light Load (RT2859A) (ACOT® ) control architecture that provides stable operation with small ceramic output capacitors and ⚫ 3A Output Current without complicated external compensation, among ⚫ Advanced Constant On-Time (ACOT® Control other benefits. The input voltage range is from 4.5V to ⚫ Optimized for Ceramic Output Capacitors 18V and the output is adjustable from 0.765V to 7V. ⚫ 4.5V to 18V Input Voltage Range The proprietary ACOT® control improves upon other ⚫ Internal 70m Switch and 70m Synchronous fast-response constant on-time Rectifier architectures, achieving nearly constant switching frequency over line, load, and output voltage ranges. Since there is no ⚫ 0.765V to 7V Adjustable Output Voltage ⚫ Externally-Adjustable, Pre-Biased Compatible Soft-Start internal clock, response to transients is nearly instantaneous and inductor current can ramp quickly to maintain output regulation without large bulk output capacitance. The RT2859A/B are stable with and optimized for ceramic output capacitors. With internal 70m switches and 70m synchronous rectifiers, the RT2859A/B display excellent efficiency and good behavior across a range of applications, especially for low output voltages and low duty cycles. Cycle-by-cycle current limit, input under-voltage lockout, externally-adjustable soft-start, output underand over-voltage protection, and thermal shutdown provide safe and smooth operation in all operating conditions. The RT2859A and RT2859B are each available in the WQFN-16L 3x3 package, with exposed thermal pads. ⚫ Cycle-by-Cycle Current Limit ⚫ Optional Output Discharge Function ⚫ Output Over- and Under-voltage Shut Down ⚫ Latched (RT2859ALGQW/RT2859BLGQW Only) ⚫ With Hiccup Mode (RT2859AHGQW/RT2859BHGQW Only) ⚫ Input Under-Voltage Lockout ⚫ Thermal Shutdown 3 Applications ⚫ Industrial and Commercial Low Power Systems ⚫ Computer Peripherals ⚫ LCD Monitors and TVs ⚫ Green Electronics/Appliances ⚫ Point of Load Regulation for High-Performance DSPs, FPGAs, and ASICs The RT2859B switches continuously even at light loads to avoid low-frequency interference while the RT2859A features a power-saving discontinuous operating mode at light loads. The recommended junction temperature range is −40C to 125C and ambient temperature range is −40C to 85C. Copyright © 2024 Richtek Technology Corporation. All rights reserved. DS2859A/B-08 March 2024 is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT2859A/B 4 Simplified Application Circuit VIN RT2859A/B VIN SW VCC Power Good VREG5 Input Signal PGOOD VOUT BOOT VS FB EN SS VREG5 GND PGND 5 Ordering Information RT2859A/B 6 Marking Information RT2859AHGQW Package Type QW : WQFN-16L 3x3 (W-Type) Lead Plating System G : Richtek Green Policy Compliant 48= : Product Code YMDNN : Date Code 48=YM DNN H : Hiccup Mode OVP & UVP L : Latched OVP & UVP A : PSM B : PWM Note: Richtek products are Richtek Green Policy compliant RT2859ALGQW 45= : Product Code YMDNN : Date Code 45=YM DNN and compatible with the current require ments of IPC/JEDEC J-STD-020 RT2859BHGQW 3Z=YM DNN 3Z= : Product Code YMDNN : Date Code RT2859BLGQW 3Y=YM DNN Copyright © 2024 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 3Y= : Product Code YMDNN : Date Code is a registered trademark of Richtek Technology Corporation. DS2859A/B-08 March 2024 RT2859A/B Table of Contents 1 General Description --------------------------------- 1 15.11 PGOOD Comparator ---------------------- 17 2 Features ------------------------------------------------- 1 15.12 External Bootstrap Capacitor ------------ 17 3 Applications ------------------------------------------- 1 15.13 Over-Temperature Protection ----------- 17 4 Simplified Application Circuit -------------------- 2 15.14 Output Discharge Control ---------------- 17 5 Ordering Information ------------------------------- 2 15.15 OVP/UVP Protection ---------------------- 17 6 Marking Information -------------------------------- 2 7 Pin Configuration ------------------------------------ 4 16.1 Soft-Start (SS) ------------------------------ 18 8 Functional Pin Description ----------------------- 4 16.2 Enable Operation (EN) -------------------- 18 9 Functional Block Diagram ------------------------ 6 16.3 Output Voltage Setting -------------------- 19 10 Absolute Maximum Ratings ---------------------- 7 16.4 Under-Voltage Lockout Protection ----- 19 11 Recommended Operating Conditions -------- 7 16.5 External BOOT Bootstrap Diode ------- 19 12 Electrical Characteristics ------------------------- 8 16.6 External BOOT Capacitor 13 Typical Application Circuit ---------------------- 10 14 Typical Operating Characteristics -------------11 16.7 VREG5 Capacitor Selection ------------- 20 15 16 Application Information -------------------------- 18 Series Resistance -------------------------- 20 Detailed Description ------------------------------ 14 16.8 Thermal Considerations ------------------ 20 15.1 Constant On-Time (COT) Control ------ 14 16.9 Layout Considerations -------------------- 22 15.2 ACOT Control Architecture ------------- 14 16.10 Layout Considerations -------------------- 22 15.3 ACOT One-Shot Operation ------------- 15 17 Outline Dimension --------------------------------- 24 15.4 Discontinuous Operating Mode 18 Footprint Information ----------------------------- 25 (RT2859A Only) ---------------------------- 15 19 Packing Information ------------------------------- 26 ® ® 15.5 Current Limit -------------------------------- 15 19.1 Tape and Reel Data ----------------------- 26 15.6 Hiccup Mode -------------------------------- 16 19.2 Tape and Reel Packing ------------------- 27 15.7 Latch-Off Mode ----------------------------- 16 19.3 Packing Material Anti-ESD Property --- 28 15.8 Input Under-Voltage Lockout ------------ 16 15.9 Shut-Down, Start-Up and Enable (EN) 16 20 Datasheet Revision History --------------------- 29 15.10 Soft-Start (SS) ------------------------------ 16 Copyright © 2024 Richtek Technology Corporation. All rights reserved. DS2859A/B-08 March 2024 is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT2859A/B 7 Pin Configuration VS VCC VIN VIN (TOP VIEW) 16 15 14 13 FB VREG5 SS GND 1 12 2 11 GND 3 10 17 4 9 6 7 8 PGOOD EN PGND PGND 5 BOOT SW SW SW WQFN-16L 3x3 8 Functional Pin Description Pin No. Pin Name Pin Function 1 FB Feedback voltage input. Connect FB to the midpoint of the external feedback resistive divider to sense the output voltage. Place the resistive divider within 5mm from the FB pin. The IC regulates VFB at 0.765V (typical). 2 VREG5 Internal regulator output. Connect a 1F capacitor to GND to stabilize output voltage. 3 SS Soft-start control. Connect an external capacitor between this pin and GND to set the soft-start time. 4 GND Ground. 5 PGOOD Open-drain power-good output. PGOOD connects to VREG5 through a pullup resistor 6 EN Enable control input. A logic-high enables the converter; a logic-low forces the IC into shutdown mode reducing the supply current to less than 10A. PGND Power ground. PGND connects to the Source of the internal N-channel MOSFET synchronous rectifier and to other power ground nodes of the IC. The exposed pad and the 2 PGND pins should be well soldered to the input and output capacitors and to a large PCB area for good power dissipation. SW Switch node. SW is the Source of the internal N-channel MOSFET switch and the Drain of the internal N-channel MOSFET synchronous rectifier. Connect SW to the inductor with a wide short PCB trace and minimize its area to reduce EMI. BOOT Bootstrap supply for high-side gate driver. Connect a 0.1F capacitor between BOOT and SW to power the internal gate driver. 13, 14 VIN Power input. The input voltage range is from 4.5V to 18V. Must bypass with a suitably large (10F x 2) ceramic capacitors at this pin. 15 VCC Internal linear regulator supply input. VCC supplies power for the internal linear regulator that powers the IC. Connect VIN to the input voltage and bypass to ground with a 0.1F ceramic capacitor. 16 VS Output voltage sense input. 7, 8, 17 (Exposed pad) 9, 10, 11 12 Copyright © 2024 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 is a registered trademark of Richtek Technology Corporation. DS2859A/B-08 March 2024 RT2859A/B Copyright © 2024 Richtek Technology Corporation. All rights reserved. DS2859A/B-08 March 2024 is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT2859A/B 9 Functional Block Diagram VCC VREG5 EN POR & Reg VBIAS BOOT Min. Off-Time VREG5 VIN VREF OC Control Driver SW UV & OV PGND SW VREG5 2µA SS VIN FB VS ZC Ripple Gen. FB + + Comparator FB 0.9 x VREF Comparator + PGOOD On-Time Copyright © 2024 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 GND is a registered trademark of Richtek Technology Corporation. DS2859A/B-08 March 2024 RT2859A/B 10 Absolute Maximum Ratings (Note 1) ⚫ Supply Voltage, VIN, VCC ----------------------------------------------------------------------------------- −0.3V to 20V ⚫ Switch Voltage, SW ------------------------------------------------------------------------------------------ −0.3V to (VIN + 0.3V) < 10ns ------------------------------------------------------------------------------------------------------------ −5V to 25V ⚫ BOOT to SW ---------------------------------------------------------------------------------------------------- −0.3V to 6V ⚫ VREG5 to VIN or VCC --------------------------------------------------------------------------------------- −17V to 0.3V ⚫ EN, VS Pin ------------------------------------------------------------------------------------------------------ −0.3V to 20V ⚫ Other Pins ------------------------------------------------------------------------------------------------------- −0.3V to 6V ⚫ Power Dissipation, PD @ TA = 25C WQFN-16L 3x3------------------------------------------------------------------------------------------------- 2.1W ⚫ Power Dissipation, PD @ TA = 25C ⚫ Package Thermal Resistance (Note 2) WQFN-16L 3x3, JA------------------------------------------------------------------------------------------- 47.4C/W WQFN-16L 3x3, JC ------------------------------------------------------------------------------------------ 7.5C/W ⚫ Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------ 260C ⚫ Junction Temperature ---------------------------------------------------------------------------------------- 150C ⚫ Storage Temperature Range ------------------------------------------------------------------------------- −65C to 150C 11 Recommended Operating Conditions (Note 3) ⚫ Supply Input Voltage, VIN ----------------------------------------------------------------------------------- 4.5V to 18V ⚫ Junction Temperature Range ------------------------------------------------------------------------------- −40C to 125C ⚫ Ambient Temperature Range ------------------------------------------------------------------------------- −40C to 85C Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. JA is measured at TA = 25C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. JC is measured at the exposed pad of the package. Note 3. The device is not guaranteed to function outside its operating conditions. Copyright © 2024 Richtek Technology Corporation. All rights reserved. DS2859A/B-08 March 2024 is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 RT2859A/B 12 Electrical Characteristics (VIN =12V, TA = −40C to 85C unless otherwise noted. Parameter Symbol Test Conditions Min Typ Max Unit Supply Current Shutdown Current ISHDN TA = 25C, VEN = 0V -- 1 10 A Quiescent Current IQ TA = 25C, VEN = 5V, VFB = 0.8V -- 1 1.3 mA Logic-High 1.5 -- 18 Logic-Low -- -- 0.4 Logic Threshold EN Input Voltage V VFB Voltage and Discharge Resistance TA = 25C 0.757 TA = −40C to 85C 0.755 -- 0.775 VFB = 0.8V, TA = 25C -- 0.01 0.1 A RDIS VEN = 0V, VS = 0.5V -- 50 100  VREG5 TA = 25C, 6V  VIN  18V, 0 < IVREG5  5mA 4.8 5.1 5.4 V Feedback Threshold Voltage VFB Feedback Input Current IFB VOUT Discharge Resistance 0.765 0.773 V VREG5 Output VREG5 Output Voltage Line Regulation 6V  VIN  18V, IVREG5 = 5mA -- -- 20 mV Load Regulation 0  IVREG5  5mA -- -- 100 mV IVREG5 VIN = 6V, VREG5 = 4V, TA = 25C -- 70 -- mA High-Side RDS(ON)_H TA = 25C (VBOOT − VSW) = 5.5V -- 70 -- Low-Side RDS(ON)_L TA = 25C -- 70 -- 4 5 6 -- 150 -- -- 20 -- Output Current RDS(ON) Switch On Resistance m Current Limit Current Limit ILIM A Thermal Shutdown Thermal Shutdown Threshold TSD Thermal Shutdown TSD Hysteresis On-Time Timer Control Shutdown temperature On-Time tON VIN = 12V, VOUT = 1.05V -- 135 -- ns Minimum Off-Time tOFF(MIN) VFB = 0.7V, TA = 25C -- 260 310 ns VSS = 0V 1.4 2 2.6 A VSS = 0.5V (Latch Mode) 0.1 0.2 -- mA -- 0.5 -- A 3.6 3.85 4.1 0.13 0.35 0.47 VFB rising 85 90 95 VFB falling -- 85 -- C Soft-Start SS Charge Current SS Discharge Current VSS = 0.5V (Hiccup Mode) UVLO UVLO Threshold Wake up VREG5 Hysteresis V Power Good PGOOD Threshold Copyright © 2024 Richtek Technology Corporation. All rights reserved. www.richtek.com 8 % is a registered trademark of Richtek Technology Corporation. DS2859A/B-08 March 2024 RT2859A/B Parameter Symbol Min Typ Max Unit 2.5 5 -- mA 114 120 126 % OVP Prop Delay -- 5 -- s UVP Trip Threshold 65 70 75 UVP Hysteresis -- 10 -- UVP Prop Delay -- 250 -- s -- ms PGOOD Sink Current Test Conditions PGOOD = 0.5V Output Under-Voltage and Over-Voltage Protection OVP Trip Threshold OVP detect % UVP Enable Delay tUVPEN Relative to soft-start time Copyright © 2024 Richtek Technology Corporation. All rights reserved. DS2859A/B-08 March 2024 -- tSS x 1.7 is a registered trademark of Richtek Technology Corporation. www.richtek.com 9 RT2859A/B 13 Typical Application Circuit RT2859A/B VIN 13, 14 C1 10μF x 2 C2 0.1μF 15 VIN VCC Output Signal VREG5 SW BOOT VS R3 100k 5 PGOOD 9, 10, 11 L1 1.4μH VOUT 1.05V/3A C6 0.1μF 12 CFF 16 C5 3.3nF COUT 22μF x 2 FB 1 6 EN Input Signal R1 8.25k R2 22.1k VREG5 2 VREG5 C4 3 SS 1μF GND PGND 4 7, 8, 17 (Exposed Pad) Table 1. Suggested Component Values (VIN = 12V) VOUT (V) R1 (k) R2 (k) CFF (pF) L1 (H) COUT (F) 1 6.81 22.1 -- 1 22 to 68 1.05 8.25 22.1 -- 1 22 to 68 1.2 12.7 22.1 -- 1 22 to 68 1.8 30.1 22.1 5 to 22 1.5 22 to 68 2.5 49.9 22.1 5 to 22 2.2 22 to 68 3.3 73.2 22.1 5 to 22 2.2 22 to 68 5 124 22.1 5 to 22 3.3 22 to 68 7 180 22.1 5 to 22 3.3 22 to 68 Note : Considering the effective capacitance de-rated with biased voltage level and size, the effective capacitance of COUT should be above 22F at targeted output level for stable and normal operation. Copyright © 2024 Richtek Technology Corporation. All rights reserved. www.richtek.com 10 is a registered trademark of Richtek Technology Corporation. DS2859A/B-08 March 2024 RT2859A/B 14 Typical Operating Characteristics Copyright © 2024 Richtek Technology Corporation. All rights reserved. DS2859A/B-08 March 2024 is a registered trademark of Richtek Technology Corporation. www.richtek.com 11 RT2859A/B Copyright © 2024 Richtek Technology Corporation. All rights reserved. www.richtek.com 12 is a registered trademark of Richtek Technology Corporation. DS2859A/B-08 March 2024 RT2859A/B Copyright © 2024 Richtek Technology Corporation. All rights reserved. DS2859A/B-08 March 2024 is a registered trademark of Richtek Technology Corporation. www.richtek.com 13 RT2859A/B 15 Detailed Description The RT2859A/B are high-performance 650kHz 3A step-down regulators with internal power switches and synchronous rectifiers. They feature an Advanced Constant On-Time (ACOT® control architecture that provides stable operation with ceramic output capacitors without complicated external compensation, among other benefits. The input voltage range is from 4.5V to 18V and the output is adjustable from 0.765V to 7V. The proprietary ACOT® control scheme improves upon other constant on-time architectures, achieving nearly constant switching frequency over line, load, and output voltage ranges. The RT2859A/B are optimized for ceramic output capacitors. Since there is no internal clock, response to transients is nearly instantaneous and inductor current can ramp quickly to maintain output regulation without large bulk output capacitance. 15.1 Constant On-Time (COT) Control The heart of any COT architecture is the on-time one-shot. Each on-time is a pre-determined “fixed” period that is triggered by a feedback comparator. This robust arrangement has high noise immunity and is ideal for low duty cycle applications. After the on-time one-shot period, there is a minimum off-time period before any further regulation decisions can be considered. This arrangement avoids the need to make any decisions during the noisy time periods just after switching events, when the switching node (SW) rises or falls. Because there is no fixed clock, the high-side switch can turn on almost immediately after load transients and further switching pulses can ramp the inductor current higher to meet load requirements with minimal delays. Traditional current mode or voltage mode control schemes typically must monitor the feedback voltage, current signals (also for current limit), and internal ramps and compensation signals, to determine when to turn off the high-side switch and turn on the synchronous rectifier. Weighing these small signals in a switching environment is difficult to do just after switching large currents, making those architectures problematic at low duty cycles and in less than ideal board layouts. Because no switching decisions are made during noisy time periods, COT architectures are preferable in low duty cycle and noisy applications. However, traditional COT control schemes suffer from some disadvantages that preclude their use in many cases. Many applications require a known switching frequency range to avoid interference with other sensitive circuitry. True constant on-time control, where the on-time is actually fixed, exhibits variable switching frequency. In a step-down converter, the duty factor is proportional to the output voltage and inversely proportional to the input voltage. Therefore, if the on-time is fixed, the off-time (and therefore the frequency) must change in response to changes in input or output voltage. Modern pseudo-fixed frequency COT architectures greatly improve COT by making the one-shot on-time proportional to VOUT and inversely proportional to VIN. In this way, an on-time is chosen as approximately what it would be for an ideal fixed-frequency PWM in similar input/output voltage conditions. The result is a big improvement but the switching frequency still varies considerably over line and load due to losses in the switches and inductor and other parasitic effects. Another problem with many COT architectures is their dependence on adequate ESR in the output capacitor, making it difficult to use highly-desirable, small, low-cost, but low-ESR ceramic capacitors. Most COT architectures use AC current information from the output capacitor, generated by the inductor current passing through the ESR, to function in a way like a current mode control system. With ceramic capacitors, the inductor current information is too small to keep the control loop stable, like a current mode system with no current information. 15.2 ACOT® Control Architecture Making the on-time proportional to VOUT and inversely proportional to VIN is not sufficient to achieve good constantfrequency behavior for several reasons. First, voltage drops across the MOSFET switches and inductor cause the Copyright © 2024 Richtek Technology Corporation. All rights reserved. www.richtek.com 14 is a registered trademark of Richtek Technology Corporation. DS2859A/B-08 March 2024 RT2859A/B effective input voltage to be less than the measured input voltage and the effective output voltage to be greater than the measured output voltage. As the load changes, the switch voltage drops change causing a switching frequency variation with load current. Also, at light loads if the inductor current goes negative, the switch deadtime between the synchronous rectifier turn-off and the high-side switch turn-on allows the switching node to rise to the input voltage. This increases the effective on-time and causes the switching frequency to drop noticeably. One way to reduce these effects is to measure the actual switching frequency and compare it to the desired range. This has the added benefit eliminating the need to sense the actual output voltage, potentially saving one pin connection. ACOT® uses this method, measuring the actual switching frequency (at SW) and modifying the ontime with a feedback loop to keep the average switching frequency in the desired range. To achieve good stability with low-ESR ceramic capacitors, ACOT® uses a virtual inductor current ramp generated inside the IC. This internal ramp signal replaces the ESR ramp normally provided by the output capacitor's ESR. The ramp signal and other internal compensations are optimized for low-ESR ceramic output capacitors. 15.3 ACOT® One-Shot Operation The RT2859A/B control algorithm is simple to understand. The feedback voltage, with the virtual inductor current ramp added, is compared to the reference voltage. When the combined signal is less than the reference the ontime one-shot is triggered, as long as the minimum off-time one-shot is clear and the measured inductor current (through the synchronous rectifier) is below the current limit. The on-time one-shot turns on the high-side switch and the inductor current ramps up linearly. After the on-time, the high-side switch is turned off and the synchronous rectifier is turned on and the inductor current ramps down linearly. At the same time, the minimum off-time oneshot is triggered to prevent another immediate on-time during the noisy switching time and allow the feedback voltage and current sense signals to settle. The minimum off-time is kept short (260ns typical) so that rapidlyrepeated on-times can raise the inductor current quickly when needed. 15.4 Discontinuous Operating Mode (RT2859A Only) After soft-start, the RT2859B operates in fixed frequency mode to minimize interference and noise problems. The RT2859A uses variable-frequency discontinuous switching at light loads to improve efficiency. During discontinuous switching, the on-time is immediately increased to add “hysteresis” to discourage the IC from switching back to continuous switching unless the load increases substantially. The IC returns to continuous switching as soon as an on-time is generated before the inductor current reaches zero. The on-time is reduced back to the length needed for 650kHz switching and encouraging the circuit to remain in continuous conduction, preventing repetitive mode transitions between continuous switching and discontinuous switching. 15.5 Current Limit The RT2859A/B current limit is cycle-by-cycle measuring the inductor current through the synchronous rectifier during the off-time while the inductor current ramps down. The current is determined by measuring the voltage between Source and Drain of the synchronous rectifier, adding temperature compensation for greater accuracy. If the current exceeds the current limit (ILIM) once minimum off-time end, the on-time one-shot is inhibited until the inductor current ramps down below the current limit with an additional wide hysteresis band (IHYS) of about 0.6A to 1A. This arrangement prevents the average output current from greatly exceeding the guaranteed current limit value, as typically occurs with other valley-type current limits. If the output current exceeds the available inductor current (controlled by the current limit mechanism), the output voltage will drop. If it drops below the output undervoltage protection level (see next section) the IC will stop switching to avoid excessive heat. The RT2859B also includes a negative current limit to protect the IC against sinking excessive current and possibly Copyright © 2024 Richtek Technology Corporation. All rights reserved. DS2859A/B-08 March 2024 is a registered trademark of Richtek Technology Corporation. www.richtek.com 15 RT2859A/B damaging the IC. If the voltage across the synchronous rectifier indicates the negative current is too high, the synchronous rectifier turns off until after the next high-side on-time. The RT2859A does not sink current and therefore does not need a negative current limit. 15.6 Hiccup Mode The RT2859AHGQW/ RT2859BHGQW, use hiccup mode OVP and UVP. When the protection function is triggered, the IC will shut down for a period of time and then attempt to recover automatically. Hiccup mode allows the circuit to operate safely with low input current and power dissipation, and then resume normal operation as soon as the overload or short circuit is removed. During hiccup mode, the shutdown time is determined by the capacitor at SS. A 0.5A current source discharges VSS from its starting voltage (normally VREG5). The IC remains shut down until VSS reaches 0.2V, about 38ms for a 3.9nF capacitor. At that point the IC begins to charge the SS capacitor at 2A, and a normal start-up occurs. If the fault remains, OVP and UVP protection will be enabled when V SS reaches 2.2V (typical). The IC will then shut down and discharge the SS capacitor from the 2.2V level, taking about 16ms for a 3.9nF SS capacitor. 15.7 Latch-Off Mode The RT2859ALGQW/ RT2859BLGQW, uses latch-off mode OVP and UVP. When the protection function is triggered, the IC will shut down. The IC stops switching, leaving both switches open, and is latched off. To restart operation, toggle EN or power the IC off and then on again. 15.8 Input Under-Voltage Lockout In addition to the enable function, the RT2859A/B feature an under-voltage lockout (UVLO) function that monitors the internal linear regulator output (VREG5). To prevent operation without fully-enhanced internal MOSFET switches, this function inhibits switching when VREG5 drops below the UVLO-falling threshold. The IC resumes switching when VREG5 exceeds the UVLO-rising threshold. 15.9 Shut-Down, Start-Up and Enable (EN) The enable input (EN) has a logic-low level of 0.4V. When VEN is below this level the IC enters shutdown mode and supply current drops to less than 10A. When VEN exceeds its logic-high level of 2V the IC is fully operational. EN is a high voltage input that can be safely connected to VIN (up to 18V) for automatic start-up. 15.10 Soft-Start (SS) The RT2859A/B soft-start uses an external pin (SS) to clamp the output voltage and allow it to slowly rise. After VEN is high and VREG5 exceeds its UVLO threshold, the IC begins to source 2A from the SS pin. An external capacitor at SS is used to adjust the soft-start timing. The available capacitance range is from 2.7nF to 220nF. Do not leave SS unconnected. During start-up, while the SS capacitor charges, the RT2859A/B operates in discontinuous mode with very small pulses. This prevents negative inductor currents and keeps the circuit from sinking current. Therefore, the output voltage may be pre-biased to some positive level before start-up. Once the VSS ramp charges enough to raise the internal reference above the feedback voltage, switching will begin and the output voltage will smoothly rise from the pre-biased level to its regulated level. After VSS rises above about 2.2V output over-and under-voltage protections are enabled and the RT2859B begins continuous-switching operation. An internal linear regulator (VREG5) produces a 5.1V supply from VIN that powers the internal gate drivers, PWM logic, reference, analog circuitry, and other blocks. If VIN is 6V or greater, VREG5 is guaranteed to provide significant power for external loads. Copyright © 2024 Richtek Technology Corporation. All rights reserved. www.richtek.com 16 is a registered trademark of Richtek Technology Corporation. DS2859A/B-08 March 2024 RT2859A/B 15.11 PGOOD Comparator The PGOOD pin is an VREG5 power-good indication which is connected to PVCC through a pull-up resistor. After VREG5 raises up, the PGOOD is actively held low and only allowed to transition high after soft-start is over. If VFB rises above a power-good threshold VTH_PGH (typically 90% of the target value), the PGOOD pin will be in high impedance and VPGOOD will be held high. When VFB drops under a VFB falling threshold VTH_PGL (typically 85% of the target value) or exceeds OVP threshold VOVP (typically 120% of the target value), the PGOOD pin will be pulled low. Note that, PGOOD pin is not recommended to connect to external voltage source because PGOOD is unable to pull low with VVREG5 lower than 1.5V. Once being started-up, if any protection is triggered (UVP, OVP and OTP) or EN is from high to low, PGOOD will be pulled to GND. 15.12 External Bootstrap Capacitor Connect a 0.1F low ESR ceramic capacitor between BOOT and SW. This bootstrap capacitor provides the gate driver supply voltage for the high side N-channel MOSFET switch. 15.13 Over-Temperature Protection The RT2859A/B includes an over-temperature protection (OTP) circuitry to prevent overheating due to excessive power dissipation. The OTP will shut down switching operation when the junction temperature exceeds 150C. Once the junction temperature cools down by approximately 20C the IC will resume normal operation with a complete soft-start. For continuous operation, provide adequate cooling so that the junction temperature does not exceed 150C. 15.14 Output Discharge Control When EN pin is low, the RT2859A/B will discharge the output with an internal 50 MOSFET connected between VOUT to GND pin. 15.15 OVP/UVP Protection The RT2859A/B detects over- and under-voltage conditions by monitoring the feedback voltage on FB pin. The two functions are enabled after approximately 1.7 times the soft-start time. When the feedback voltage becomes higher than 120% of the target voltage, the OVP comparator will go high to turn off both internal high-side and lowside MOSFETs for hiccup version, and the latched version is turn off the high-side MOSFET but turn on the lowside MOSFET to sink the over-voltage source current on output terminal to avoid the damage risk of connected device, the current limit function will shut down after the OVP function is triggered, it derestrict the maximum sinking current value from output terminal through the low- side MOSFET. When the feedback voltage is lower than 70% of the target voltage for 250s, the UVP comparator will go high to turn off both internal high-side and low-side MOSFETs. Copyright © 2024 Richtek Technology Corporation. All rights reserved. DS2859A/B-08 March 2024 is a registered trademark of Richtek Technology Corporation. www.richtek.com 17 RT2859A/B 16 Application Information Richtek’s component specification does not include the following information in the Application Information section. Thereby no warranty is given regarding its validity and accuracy. Customers should take responsibility to verify their own designs and reserve suitable design margin to ensure the functional suitability of their components and systems. 16.1 Soft-Start (SS) The RT2859A/B soft-start uses an external capacitor at SS to adjust the soft-start timing according to the following equation : tSS (ms) = CSS (nF)  0.765V ISS (μA) The soft-start timing is the output voltage rising time from 0V to settled level and can be programmed by the external capacitor between the SS and GND pins. The available capacitance range is from 2.7nF to 220nF. If a 3.9nF capacitor is used, the typical soft-start will be 1.5ms. Do not leave SS unconnected. 16.2 Enable Operation (EN) For automatic start-up the high-voltage EN pin can be connected to VIN, either directly or through a 100k resistor. Its large hysteresis band makes EN useful for simple delay and timing circuits. EN can be externally pulled to V IN by adding a resistor-capacitor delay (REN and CEN in Figure 1). Calculate the delay time using EN's internal threshold where switching operation begins (1.2V, typical). An external MOSFET can be added to implement digital control of EN when no system voltage above 2V is available (Figure 2). In this case, a 100k pull-up resistor, REN, is connected between VIN and the EN pin. MOSFET Q1 will be under logic control to pull down the EN pin. To prevent enabling circuit when VIN is smaller than the VOUT target value or some other desired voltage level, a resistive voltage divider can be placed between the input voltage and ground and connected to EN to create an additional input under-voltage lockout threshold (Figure 3). EN VIN REN EN RT2859A/B CEN GND Figure 1. External Timing Control VIN Enable REN 100k EN Q1 RT2859A/B GND Figure 2. Digital Enable Control Circuit Copyright © 2024 Richtek Technology Corporation. All rights reserved. www.richtek.com 18 is a registered trademark of Richtek Technology Corporation. DS2859A/B-08 March 2024 RT2859A/B REN1 VIN EN REN2 RT2859A/B GND Figure 3. Resistor Divider for Lockout Threshold Setting 16.3 Output Voltage Setting Set the desired output voltage using a resistive divider from the output to ground with the midpoint connected to FB. The output voltage is set according to the following equation : VOUT = 0.765  (1+ R1 ) R2 VOUT R1 FB RT2859A/B R2 GND Figure 4. Output Voltage Setting Place the FB resistors within 5mm of the FB pin. Choose R2 between 10k and 100k to minimize power consumption without excessive noise pick-up and calculate R1 as follows : R1 = R2  (VOUT − 0.765V) 0.765V For output voltage accuracy, use divider resistors with 1% or better tolerance. 16.4 Under-Voltage Lockout Protection The RT2859A/B feature an under-voltage lock-out (UVLO) function that monitors the internal linear regulator output (VREG5) and prevents operation if VVREG5 is too low. In some multiple input voltage applications, it may be desirable to use a power input that is too low to allow VVREG5 to exceed the UVLO threshold. 16.5 External BOOT Bootstrap Diode When the input voltage is lower than 5.5V it is recommended to add an external bootstrap diode between VIN (or VINR) and the BOOT pin to improve enhancement of the internal MOSFET switch and improve efficiency. The bootstrap diode can be a low cost one such as 1N4148 or BAT54. 5V BOOT RT2859A/B 0.1μF SW Figure 5. External Bootstrap Diode Copyright © 2024 Richtek Technology Corporation. All rights reserved. DS2859A/B-08 March 2024 is a registered trademark of Richtek Technology Corporation. www.richtek.com 19 RT2859A/B 16.6 External BOOT Capacitor Series Resistance The internal power MOSFET switch gate driver is optimized to turn the switch on fast enough for low power loss and good efficiency, but also slow enough to reduce EMI. Switch turn-on is when most EMI occurs since VSW rises rapidly. During switch turn-off, SW is discharged relatively slowly by the inductor current during the dead-time between high-side and low-side switch on-times. In some cases it is desirable to reduce EMI further, at the expense of some additional power dissipation. The switch turn-on can be slowed by placing a small (
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RT2859ALGQW
  •  国内价格 香港价格
  • 1500+12.085131500+1.56748

库存:23

RT2859ALGQW
  •  国内价格 香港价格
  • 1+21.335151+2.76724
  • 10+15.8355610+2.05393
  • 25+14.4571525+1.87514
  • 100+12.94311100+1.67877
  • 250+12.22200250+1.58524
  • 500+11.78694500+1.52881

库存:23