RT4803A
2.5MHz, Synchronous Boost Regulator
General Description
Features
The RT4803A allows systems to take advantage of
new battery chemistries that can supply significant
energy when the battery voltage is lower than the
required voltage for system power ICs. By combining
built-in power transistors, synchronous rectification,
and low supply current; this IC provides a compact
solution for systems using advanced Li-Ion battery
chemistries.
The RT4803A is available in the WL-CSP-16B
1.67x1.67 (BSC) package.
Applications
VOUT = 3.4V at VSEL = H
VOUT = 3.15V at VSEL = L
Maximum Continuous Load Current : 2A at VIN >
2.65V Boosting VOUT to 3.35V
Up to 95% Efficiency
nBYP (L) : Forced Bypass Mode
The RT4803A is a boost regulator designed to provide
a minimum output voltage from a single-cell Li-Ion
battery, even when the battery voltage is below system
minimum. In boost mode, output voltage regulation is
guaranteed to a maximum load current of 2000mA.
Quiescent current in shutdown mode is less than 1A,
which maximizes battery life. The regulator transitions
smoothly between bypass and normal boost mode. The
device can be forced into bypass mode to reduce
quiescent current.
Input Voltage Range : 1.8V to 5V
Programmable Output Voltage from 2.85V to
4.4V with 50mV/Step
Default Boost Output Voltage Setting :
nBYP (H) : Auto Bypass Operation when VIN >
Target VOUT
Internal Synchronous Rectifier
Over-Current Protection
Under-Voltage Protection
Over-Voltage Protection
Over-Temperature Protection
Ultra Low Operating Quiescent Current
Discharge Function Trigger at GPIO Manual Pull
Low
Available in a WL-CSP-16B 1.67x1.67 (BSC)
Package
Single-Cell Li-Ion, LiFePO4 Smart-Phones or Tablet
2.5G/3G/4G Mini-Module Data Cards
Simplified Application Circuit
RT4803A
VIN
VIN
CIN
VOUT
VOUT
L1
COUT
LX
VSEL
MCU
To pull high voltage
EN
nBYP
SDA
Rpull high
GPIO
SCL
AGND
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DS4803A-06
September
2019
PGND
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1
RT4803A
Ordering Information
Pin Configuration
RT4803A
Package Type
WSC : WL-CSP-16B 1.67x1.67 (BSC)
Note :
(TOP VIEW)
A1
A2
A3
A4
EN
GPIO
VIN
VIN
B2
B3
B4
B1
VSEL
Richtek products are :
C1
RoHS compliant and compatible with the current
requirements of IPC/JEDEC J-STD-020.
Suitable for use in SnPb or Pb-free soldering processes.
SCL VOUT VOUT
C2
nBYP SDA
D1
D2
C3
C4
LX
LX
D3
D4
AGND PGND PGND PGND
WL-CSP-16B 1.67x1.67 (BSC)
Marking Information
38 : Product Code
W : Date Code
38W
Functional Pin Description
Pin No.
Pin Name
A1
EN
A2
GPIO
A3, A4
I/O
Pin Function
I
Chip enable input pin. High level voltage enables the device while low level
voltage turns the device off. This pin must be terminated.
I/O
General purpose input/output. (Detail illustrate as operation section)
VIN
I
Power supply input.
B1
VSEL
I
Output voltage selection pin. Default boost output voltage setting VOUT =
3.4V at VSEL = H and VOUT = 3.15V at VSEL = L. This pin must be
terminated.
B2
SCL
I
Serial interface clock. (Pull down if I2C is non-used).
B3, B4
VOUT
O
Boost output voltage pin. PCB trace length from BSTVOUT to the output
filter capacitor should be as short and wide as possible.
C1
nBYP
I
This pin can be used to activate forced bypass mode. When this pin is
LOW, the bypass switches are turned on into forced bypass mode. Detail
mode define as Table 1 discussion.
C2
SDA
I/O
Serial interface date line. (Pull down if I2C is non-used)
LX
I/O
This pin is the connection between two build-in switches in the chip, which
should be connected to the external inductor. The inductor should be
connected to this pin with the shortest path.
C3, C4
D1
AGND
--
Analog ground. This is the signal ground reference for the IC.
D2, D3, D4
PGND
--
Power ground should be connected to this pin with the shortest path for
power transmission to reduce parasitic component effect.
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RT4803A
Functional Block Diagram
VIN
Current
Sense
Q3_BYP_MOS
OSC
SCL
SDA
nBYP
VSEL
EN
GPIO
Digital
VREF
+
+
-
-
PWM
Logic
Power
MOS
Control
Stage
VMIN
Control
VOUT
Q1_UG
VMAX
Control
LX
Q2_LG
PSM
Control
ZCD
Discharge
AGND
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2019
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RT4803A
Operation
The RT4803A combined built-in power transistors, synchronous rectification, and low supply current, it provides a
compact solution for system using advanced Li-Ion battery chemistries.
In boost mode, output voltage regulation is guaranteed to maximum load current of 2000mA. Quiescent current in
Shutdown mode is less than 1A, which maximizes battery life.
Under-Voltage Lockout
EN and nBYP
The under-voltage lockout circuit prevents the device
from operating incorrectly at low input voltages. It
prevents the converter from turning on the power
switches under undefined conditions. VIN voltage must
be greater than UVLO rising threshold to enable the
converter. During operation, if VIN voltage drops below
It is used to select mode. As the Table 1 shown, there
are four device states. When both EN and nBYP pull
low. It enters forced bypass mode with low quiescent
mode (4A). When the EN pull low and nBYP pull high,
it is shutdown mode and quiescent current is less than
1uA. It works in forced bypass without low quiescent
UVLO falling threshold, the converter is disabled until
the supply exceeds the UVLO rising threshold. The
mode, if the EN pulled high and nBYP pulled low. When
EN and nBYP both pull high, the RT4803A is boost and
RT4803A automatically restarts if the input voltage
recovers to the input voltage UVLO high level.
auto bypass mode. There should be a delay time (>
60s) from EN pull high to nBYP pull high to guarantee
normal operation.
Table 1
EN Input
nBYP Input
0
0
0
1
Shutdown mode
The device is shutdown. The device shutdown current is
approximately about 1A (max).
1
0
Forced bypass
without low
quiescent mode
The device is active in forced bypass without low quiescent
mode.
The device supply current is approximately about 15A (typ.).
1
Boost and auto
bypass mode
The device includes boost and auto bypass mode depend on VIN
larger than VOUT or not.
The device supply current is approximately about 35A (typ.)
with auto bypass mode / 55A (typ.) with boost mode.
1
Mode Define
Forced bypass with The device in forced bypass with low quiescent mode featuring a
low quiescent mode low quiescent current down to about 4A (typ.).
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Device State
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RT4803A
Enable (nBYP = High Status)
Forced Bypass Mode
The device can be enabled or disabled by the EN pin.
nBYP = L MOSFET Q3, turn on MOSFET Q1 and Q2
When the EN pin is higher than the threshold of
logic-high, the device starts operating follow Figure 2
operation diagram and Table 2 condition. In shutdown
mode, the converter stops switching, internal control
circuitry is turned off. The output voltage reduce by
component consumption (Cap ESR...) that state have
turn off input voltage will pass through it to the output
terminal directly. If the RT4803A into forced bypass
mode MOSFET Q3 current limit is 4000mA (typ.) as
shown in Figure 1.
VOUT
not discharge function. Discharge function only trigger
with GPIO pull low status (Reg.0x01[3] setting 0).
Q3_BYP_MOS
Soft-Start State
During soft-start state, if
VOUT reach to 95%
VOUT_Target. The RT4803A will into boost operation.
Q1_UG
VIN
LX
Otherwise count over 512s then the RT4803A will into
fault state.
Q2_LG
Boost / Auto Bypass Mode
nBYP = H There are two normal operation modes, one
is the boost mode, and the other one is auto bypass
mode. In the boost mode, it provides the power to load
by internal synchronous switches after the soft-start
state. In the auto bypass mode, input voltage will pass
through it to the output terminal directly. That can
provide max current capacity with RT4803A. Detail
description as below :
Boost Mode (Auto PFM/PWM Control Method)
In order to save power and improve efficiency at low
loads, the Boost operate in PFM (Pulse Frequency
Modulation) as the inductor drops into DCM
(Discontinuous Current Mode). The switching
frequency is proportional to loading to reach output
voltage regulation. When load increases and
inductor current becomes continuous again, the
PGND
Figure 1. Boost Converter with Bypass Mode
LIN State
When VIN > UVLO and EN low to High, output
capacitor begins to be charged with linear startup until
VIN - VOUT smaller than 300mV (typ.). Linear startup
include LIN1 and LIN2 states. LIN1 pre-charge current
is 1000mA (typ.) with 800s duration and IC goes into
LIN2 pre-charge with 2000mA (typ.) keeping 1600s
duration if VIN - VOUT is still larger than 300mV (typ.).
If VIN - VOUT smaller than 300mV, the RT4803A will into
soft start operation after Linear startup (LIN1/2) states.
Otherwise the RT4803A will into fault operation.
Boost automatically goes back to PWM (Pulse Width
Modulation) fixed frequency mode.
Auto Bypass Mode
That control loop will auto transfer to auto bypass
mode, if VIN increase higher than VOUT. MOSFET
Q3 will turn on and MOSFET Q1 and Q2 turn off
synchronous. If the RT4803A into auto bypass mode
MOSFET Q3 current limit is 4000mA (typ.) as shown
in Figure 1.
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RT4803A
VIN Ready
EN L to H
LIN 1
Pre-charge Current
1000mA (Typ.)
Yes
VIN - 300mV ≤
VOUT
NO
LIN1 Time out >
800µs
NO
Yes
LIN 2
Pre-charge Current
2000mA (Typ.)
Yes
Soft-start
VIN - 300mV ≤
VOUT
NO
NO
VOUT > 0.95 x
NO
VOUT_Target
Yes
Soft-start Time
Out > 512µs
LIN2 Time Out >
1600µs
Yes
NO
Yes
Boost Mode
Fault State
Shutdown Count 1ms
Figure 2. The RT4803A State Chart
Table 2
Mode
Description
LIN
(Include LIN1/LIN2 states)
Linear startup 1
Soft-Start
Boost soft-start
Boost
Boost mode
Linear startup 2
Condition
VIN - 300mV ≥ VOUT
0.95 x VOUT_Target > VOUT ≥ VIN - 300mV
VOUT_Target ≥ 0.95 x VOUT_Target
If VIN increase higher than VOUT
Auto Bypass
Auto bypass mode
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VIN ≥ VOUT
Control loop auto transfer between auto
bypass mode and boost mode.
is a registered trademark of Richtek Technology Corporation.
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2019
RT4803A
VOUT
VOUT_Target
0.95 x VOUT_Target
VIN
VIN - 300mV
Control loop auto transfer between bypass
mode and boost mode
Auto bypass mode
Boost mode
Linear Startup
Soft-Start
(LIN1&LIN2 pre-charge state)
Figure 3. VOUT Mode Transition Diagram with EN L to H and VIN Variation (nBYP = H; IO = 0A)
In shut down mode, it is released right away when
VSEL
GPIO goes high.
In order to maintain a target minimum output voltage
under worse application condition (ex : full load
GPIO
transient), the output voltage set point can be
dynamically increased by asserting the VSEL input.
The functionality also helps to mitigate undershoot
during line transient of worse case.
Discharge
(a). In Shut down Mode (EN = 0, nBYP = 1)
The RT4803A VSEL = L output voltage default setting
is 3.15V that can be programmed by Reg.0x02[4:0].
VSEL = H output voltage default setting is 3.4V that
can be programmed by Reg.0x03[4:0].
GPIO
GPIO
Discharge
GPIO is arranged to be either a mode selection or
nRST/nFAULT function. It be controlled by Reg.0x01[3].
GPIO port configuration bit.
2ms
(b). In Other Modes
Reg.0x01[3] setting 0 :
GPIO supports manual reset input (nRST) and
interrupt generation output (nFAULT).
Figure 4. Discharge Function Diagram
Reg.0x01[3] setting 1 :
Fault output (open drain interrupt) : GPIO will pull low
if the fault occurred
It is an input of device mode selection.
Manual reset input : If GPIO manual toggle the
RT4803A will restart as Figure 3 state chart.
MODE_CTRL[1:0] in Register 0x01[1:0] set 2’b00,
and GPIOCFG in Register 0x01[3] set 1’b1. GPIO
pin must be configured as the mode selection input.
As the following figures shown, the RT4803A
features the discharge function depends on
Reg.0x01[3] setting 0. The function is released when
GPIO goes high 2ms later in every modes but shut
down mode.
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2019
GPIO pin set Low : Auto PFM/PWM operation
GPIO pin set High : Forced PWM control operation
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RT4803A
Current Limit
The RT4803A employs a valley-current limit detection
scheme to sense inductor current during the off-time.
When the loading current is increased such that the
loading is above the valley current limit threshold, the
off-time is increased until the current is decreased to
valley-current threshold. Next on-time begins after
current is decreased to valley-current threshold.
On-time is decided by (VOUT - VIN) / VOUT ratio. The
output voltage decreases when further loading current
increase. As the following figure shown, the current
limit function is implemented by the scheme.
IIN (DC)
Valley Current Limit
fSW
Inductor Current
DIL
DIL =
IIN (DC)
VIN
D
L
fSW
Figure 5. Inductor Currents in Current Limit Operation
OTP
UVP
The converter has an over-temperature protection.
When the junction temperature is higher than the
thermal shutdown rising threshold, the system will be
latched and the output voltage will no longer be
regulated until the junction temperature drops under
the falling threshold.
Avoid large power dissipation to damage IC at
abnormal operation or state. UVP protection has been
employed to prevent this state. If VOUT abnormal drop
smaller than 80% VOUT, IC goes into shutdown at fault
signal trigger. After fault state count 1ms, IC will
recovery operation until abnormal state remove.
OVP
Fault State
The device does not operate with VIN over the
over-voltage protection (OVP) level (5.7V). There is a
Fault state will trigger as below conditions :
1. Linear startup fail
typical 100mV hysteresis implemented to avoid
unstable on/off behavior. Input voltage increase higher
2. Soft-start fail
than 5.7V, IC will shut down until voltage level reduce
smaller than 5.6V, that device will recovery normal
4. OTP
operation. OVP protection can avoid IC operate at
abnormal input power and prevent to damage device.
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3. UVP
If fault state occur, IC will goes into shut down with 1ms.
After 1ms count complete, IC will restart. The state
chart of the RT4803A is shown in Figure 2.
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2019
RT4803A
Protection
The RT4803A features some protections, such as OCP, OVP, UVLO, OTP and UVP. As the table shown, it is
described the protection actions.
Protection Type
Threshold Refer to
Electrical Spec.
Protection Method
Shut Down
Delay Time
Reset Method
OCP
IL > 4A
Turn on UG
Without
shutdown
behavior
IL < 4A
OVP
VIN > 5.7V
Turn off UG, LG,
BYP_MOS
No delay
VIN < 5.6V
UVLO
VIN < 1.6V (max)
Turn off UG, LG,
BYP_MOS
No delay
VIN > 1.8V (max)
OTP
TEMP > 160°C
Turn off UG, LG,
BYP_MOS
No delay
OTP Hysteresis = 20°C
UVP
VOUT < 0.8 x VOUT_Target
Turn off UG,LG,
BYP_MOS
2ms
VOUT > 0.8 x VOUT_Target
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2019
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RT4803A
Absolute Maximum Ratings
(Note 1)
EN, GPIO, VIN, VSEL, SCL, VOUT, nBYP, SDA, LX ----------------------------------------------- 0.2V to 6V
LX ( 100mV, PWM
2
--
2
%
Minimum On Time
TON
--
80
--
ns
Maximum Duty Cycle
DMAX
40
--
--
%
Switching Frequency
f SW
VIN = 2.65V, VOUT = 3.5V,
ILOAD = 1000mA
2
2.5
3
MHz
Boost Valley Current Limit
ICL
VIN = 2.9V
3.5
4
4.5
A
LIN1 Pre-Charge Current
ILIN1
700
1000
1300
mA
LIN2 Pre-Charge Current
ILIN2
1400
2000
2600
mA
Auto/Forced Bypass Current
Limit
IBPCL
VIN = 3.2V
3
4
10
A
N-Channel Boost Switch
RDS(ON) (UG)
RDSN
VIN = 3.2V, VOUT = 3.5V
--
60
95
m
P-Channel Boost Switch
RDS(ON) (LG)
RDSP
VIN = 3.2V, VOUT = 3.5V
--
40
80
m
N-Channel Bypass Switch
RDS(ON) (BYP_MOS)
RDSP_BYP
VIN = 3.2V, VOUT = 3.5V
--
40
60
m
Hot Die Trigger Threshold
THD
Boost mode
--
100
--
o
VIN = 3V, VOUT = 3.5V,
ILOAD > 1000mA
C
--
90
--
o
Over-Temperature Protection TOTP
--
160
--
o
Over-Temperature Protection
TOTP_HYS
Hysteresis
--
20
--
o
FAULT Restart Time
--
1
--
ms
Min
Typ
Max
Unit
Hot Die Release Threshold
THDR
Boost mode
TRST
C
C
C
I2C Characteristics
Parameter
Symbol
Test Conditions
SCL, SDA High-Level Input
Threshold Voltage
VIH_I2C
1.2
--
--
V
SCL, SDA Low-Level Input
Threshold Voltage
VIL_I2C
--
--
0.4
V
SDA Digital Output Low
VOL_I2C
--
--
0.4
V
Standard-mode
--
--
100
Fast-mode
--
--
400
Fast-mode Plus
--
--
1000
High-speed mode Cb = 400pF
--
--
1.7
High-speed mode Cb = 100pF
--
--
3.4
SCL Clock Frequency
f CLK
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2019
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MHz
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RT4803A
Parameter
Symbol
Bus Free Time between Stop
tBUF
and Start Condition
(Repeated) Start Hold Time
(Repeated) Start Setup Time
tHD;STA
tSU;STA
Test Conditions
Min
Typ
Max
Standard-mode
4.7
--
--
Fast-mode
1.3
--
--
Fast-mode Plus
0.5
--
--
Standard-mode
4
--
--
Fast-mode
0.6
--
--
Fast-mode Plus
0.26
--
--
High-speed mode Cb = 400pF
160
--
--
High-speed mode Cb = 100pF
160
--
--
Standard-mode
4.7
--
--
Fast-mode
0.6
--
--
Fast-mode Plus
0.26
--
--
High-speed mode Cb = 400 pF
160
--
--
High-speed mode Cb = 100 pF
160
--
--
4
--
--
Fast-mode
0.6
--
--
Fast-mode Plus
0.26
--
--
High-speed mode Cb = 400pF
160
--
--
High-speed mode Cb = 100pF
160
--
--
Standard-mode
0.1
--
--
Fast-mode
0.1
--
--
Fast-mode Plus
0.1
--
--
High-speed mode Cb = 400pF
0.1
--
150
High-speed mode Cb = 100pF
0.1
--
70
Standard-mode
--
--
3.45
Fast-mode
--
--
0.9
Fast-mode Plus
--
--
0.45
Standard-mode
250
--
--
Fast-mode
100
--
--
Fast-mode Plus
50
--
--
High-speed mode Cb = 400pF
10
--
--
High-speed mode Cb = 100pF
10
--
--
Standard-mode
4.7
--
--
Fast-mode
1.3
--
--
Fast-mode Plus
0.5
--
--
High-speed mode Cb = 400pF
320
--
--
High-speed mode Cb = 100pF
160
--
--
Standard-mode
STOP Condition Setup Time
SDA Data Hold Time
tSU;STO
tHD;DAT
SDA Valid Acknowledge Time tVD;ACK
SDA Setup Time
SCL Clock Low Time
tSU;DAT
tLOW
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Unit
s
s
s
ns
s
ns
ns
s
ns
s
ns
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2019
RT4803A
Parameter
Symbol
Test Conditions
Min
Typ
Max
4
--
--
Fast-mode
0.6
--
--
Fast-mode Plus
0.26
--
--
High-speed mode Cb = 400pF
120
--
--
High-speed mode Cb = 100pF
60
--
--
Standard-mode
SCL Clock High Time
tHIGH
Unit
s
ns
Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These
are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect
device reliability.
Note 2. JA is measured at TA = 25C on a high effective thermal conductivity four-layer test board per JEDEC 51-7.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. VOUT can not connect external power source at any operation state.
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2019
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RT4803A
Typical Application Circuit
RT4803A
VIN
1.8V to 5V
A3, A4
CIN
10μF
L1
VOUT
VIN
B3, B4
C3, C4 LX
0.47μH
B1
To pull high voltage
MCU
RSCL
VOUT
COUT
22μF x 3
RSDA
VSEL
A1 EN
C1
nBYP
C2
SDA
B2
SCL
To pull high voltage
Rpull high
GPIO
A2
AGND PGND
D1
D2, D3, D4
BOM of Test Board
Reference
Part Number
Description
Package
Manufacturer
CIN
GRM188R61A106KE69
10F/10V/X5R
0603
Murata
COUT
GRM188R61A226ME15D
22F/10V/X5R
0603
Murata
L1
DFE252012F-R47M=P2
0.47H
2520
Murata
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is a registered trademark of Richtek Technology Corporation.
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2019
RT4803A
Typical Operating Characteristics
Efficiency vs. Load Current
Efficiency vs. Load Current
100
100
95
98
85
VIN = 3.8V
80
VIN = 3.4V
Efficiency (%)
Efficiency (%)
90
VIN = 3V
75
VIN = 2.5V
95
93
VIN = 3.8V
90
VIN = 3.4V
70
VIN = 3V
88
65
VIN = 2.5V
VOUT = 3.15V
VOUT = 3.15V
85
60
0.001
0.01
0.1
1
0.0
10
0.4
0.8
1.2
1.6
2.0
Load Current (A)
Load Current (A)
Efficiency vs. Load Current
Efficiency vs. Load Current
100
100
95
98
Efficiency (%)
Efficiency (%)
90
85
VIN = 3.8V
80
VIN = 3V
75
VIN = 2.5V
95
93
VIN = 3.8V
90
VIN = 3V
70
VIN = 2.5V
88
65
VOUT = 3.4V
VOUT = 3.4V
60
0.001
85
0.01
0.1
1
0.0
10
0.4
0.8
1.2
1.6
2.0
Load Current (A)
Load Current (A)
Output Voltage vs. Output Current
Output Voltage vs. Output Current
3.255
3.255
3.205
VIN = 2.5V
VIN = 2.7V
3.155
VIN = 2.9V
3.105
Output Voltage (V)
Output Voltage (V)
VOUT = 3.15V
3.205
3.155
VIN = 2.5V
VIN = 2.7V
3.105
VIN = 2.9V
VOUT = 3.15V
3.055
3.055
0.0
0.0
0.1
1.0
Output Current (A)
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10.0
1.5
2.0
2.5
3.0
3.5
Output Current (A)
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RT4803A
Output Voltage vs. Output Current
Output Voltage vs. Output Current
3.500
3.500
VOUT = 3.4V
Output Voltage (V)
Output Voltage(V)
VIN = 2.9V
3.450
VIN = 2.5V
3.400
VIN = 2.7V
VIN = 3.1V
3.350
3.450
3.400
VIN = 2.5V
VIN = 2.7V
3.350
VIN = 2.9V
VIN = 3.1V
VOUT = 3.4V
3.300
3.300
0.0
0.0
0.1
1.0
10.0
1.5
2.0
Output Current (A)
3.0
3.5
Output Current(A)
Output Voltage vs. Input Voltage
Output Voltage vs. Input Voltage
5.0
5.0
4.8
4.8
IOUT = 0.1A
IOUT = 0.001A
4.4
IOUT = 1A
4.2
IOUT = 0.1A
4.6
Output Voltage (V)
4.6
Output Voltage (V)
2.5
IOUT = 1.5A
4.0
3.8
3.6
IOUT = 0.001A
4.4
IOUT = 1A
4.2
IOUT = 1.5A
4.0
3.8
3.6
3.4
3.4
3.2
3.2
VOUT = 3.15V
VOUT = 3.4V
3.0
3.0
2.5
3.0
3.5
4.0
4.5
Input Voltage (V)
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5.0
2.5
3.0
3.5
4.0
4.5
5.0
Input Voltage (V)
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RT4803A
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RT4803A
Application Information
Boost Output Current Capacity
Input Capacitor Selection
The RT4803A device features a valley inductor
current limit and max duty cycle limit scheme. In boost
mode, the current limit threshold can be set via an I2C
register. The RT4803A devices have a default fixed
current limit threshold. See the register table for
detailed information. Although current limit can be
programmable, but output current capacity also
limited by max duty cycle design. So the maximum
continuous output current (IOUTMAX), as below
choose step :
Steady state and transient response operation
performance also depend on input voltage stability or
not. The RT4803A at least a 10F input capacitor is
recommended to prevent input voltage instability with
application operation. And that suggest placed as
close as possible to the VIN and GND pins of the IC is
recommended.
First application duty cycle must smaller than max
duty cycle.
1-
VIN
= Duty < 40% ( max duty cycle limit)
VOUT
If application condition duty cycle smaller than max
duty cycle limit, that max output capacity can be
calculate as below equation :
IOUTMAX =
VIN
× η × IINMAX
VOUT
Output Capacitor Selection
The ripple voltage is an important index for choosing
output capacitor. This portion consists of two parts.
One is the product of ripple current with the ESR of
the output capacitor, while the other part is formed by
the charging and discharging process of the output
capacitor.
Output capacitor is selected according to output ripple
which is calculated as below equation.
∆VOUT = ∆VESR + ∆VOUTCAP
∆VESR = ICRMS × RCESR
IOUT × Duty
f SW × CMIN
(IINMAX about equal ILvalley current limit level )
∆VOUTCAP =
Inductor Selection
User can use equation choose capacitor to meeting
systems ripple specification. And at least 22F x 3
Inductor value choose will effect transient, ripple and
other performance. The RT4803A recommended
nominal inductance value is 0.47H to achieve
capacitors is recommended to matching application
with VOUT ripple request and stability performance.
advantage performance.
The inductor peak current varies as a function of the
load. It is advisable to select an inductor with a
saturation current rating higher than peak current of
application flowing through the power switches.
It is suggested to select an inductor with the low DCR
to obtain good performance and efficiency for
application. The inductor saturation current must be
chosen carefully considering the current limit
(4500mA max default level).
The peak current of application can be estimated
using as below equation :
ILPEAKMAX =
IOUTMAX × VOUT
VIN × D
+
2 × L × f SW
VIN × η
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RT4803A
Register Table Lists [Slave address = 1110101 (0x75)]
Name
Address
Description
CONFIG
0x01
MODE control and spread modulation control
VOUTFLOOR
0x02
VSEL = L output voltage programmable register address
VOUTROOF
0x03
VSEL = H output voltage programmable register address
ILIMSET
0x04
Set current limit and soft-start current limit
STATUS
0x05
Read IC status
I2C Interface
The RT4803A I2C slave address is 1110101 (7bits). The I2C interface supports fast mode (bit rate up to 400kb/s).
The write or read bit stream (N 1) is shown below :
Read single byte of data from Register
Slave Address
Register Address
S
0
Slave Address
A
MSB
A Sr
1
LSB
A
A
Assume Address = m
R/W
Data
P
Data for Address = m
Read N bytes of data from Registers
Slave Address
Register Address
S
0
Slave Address
A
MSB
A Sr
1
MSB
A
Data for Address = m
Data 2
LSB
MSB
Data N
LSB
A
A
S
0
Register Address
A
0
Data
LSB
A
Write N bytes of data to Registers
Slave Address
S
MSB
Assume Address = m
R/W
A
MSB
Data 1
LSB
A
Assume Address = m
R/W
P
Data for Address = m
Register Address
A
P
Data for Address = m + N - 1
Data for Address = m + 1
Write single byte of data to Register
Slave Address
LSB
A
Assume Address = m
R/W
Data 1
MSB
Data 2
LSB
A
Data for Address = m
MSB
A
Data for Address = m + 1
Data N
LSB
A P
Data for Address = m + N - 1
Driven by Master,
Driven by Slave, P Stop,
S Start,
Sr Repeat Start
I2C Waveform Information
SDA
tLOW
tF
tSU;DAT
tR
tF
tHD;STA
tSP
tBUF
tR
SCL
tHD;STA
S
tHD;DAT
tHIGH
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tSU;STO
Sr
P
S
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RT4803A
Address 0x01
CONFIG
Bits
7
6
5
Name
RESET
Reset
0
0
Type
RW
RW
4
3
2
Reserved
GPIOCFG
SSFM
0
0
0
0
0
1
RW
RW
RW
RW
RW
RW
2
1
0
ENABLE[1:0]
Address 0x02
Bits
0
MODE_CTRL[1 : 0]
VOUTFLOOR
7
6
Name
1
5
4
3
Reserved
VOUT[4:0]
Reset
0
0
0
0
0
1
1
0
Type
RW
RW
RW
RW
RW
RW
RW
RW
2
1
0
Address 0x03
Bits
VOUTROOF
7
6
Name
5
4
3
Reserved
VOUT[4:0]
Reset
0
0
0
0
1
0
1
1
Type
RW
RW
RW
RW
RW
RW
RW
RW
2
1
0
Address 0x04
Bits
ILIMSET
7
Name
6
Reserved
5
4
ILIM_OFF
SOFT_START
3
ILIM[3:0]
Reset
0
0
0
1
1
1
0
1
Type
RW
RW
RW
RW
RW
RW
RW
RW
Address 0x05
STATUS
Bits
7
6
5
4
3
2
1
0
Name
TSD
HOTDIE
DCDCMODE
OPMODE
ILIMPT
ILIMBST
FAULT
PGOOD
Reset
0
0
0
0
0
0
0
0
Type
R
R
R
R
R
R
R
R
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RT4803A
Addr
0x01
Reg Name
Bit
Bit Name
Default
Type
7
RESET
0
R/W
0 : Normal operation (default)
1 : All registers are reset to default
value.
6:5
ENABLE[1:0]
00
R/W
00 : Device operation follows
hardware control signal. (Refer to
Table 1) (default)
01 : Device operation in auto
transition mode (boost/auto pass)
regardless of the nBYP control
signal. (EN = 1)
10 : Device is forced in bypass
mode regardless of the nBYP
control signal. (EN = 1)
11 : Device is in shutdown mode.
Regardless of the nBYP control
signal. (EN = 1)
4
Reserved
0
R/W
Reserved
R/W
0 : GPIO port is configured to
support manual reset input (nRST)
and interrupt generation output
(nFAULT). (default)
1 : GPIO port is configured as a
device mode selection input.
R/W
0 : Spread spectrum modulation is
disabled. (default)
1 : Spread spectrum modulation is
enabled in PWM mode.
R/W
00 : Device operation follows
hardware control signal (GPIO must
be configured as mode select
input).
01 : PFM with automatic transition
into PWM operation. (default)
10 : Forced PWM operation.
11 : PFM with automatic transition
into PWM operation (VSEL = L),
forced PWM operation. (VSEL = H).
CONFIG
3
2
1:0
GPIOCFG
SSFM
MODE_CTRL[1:0]
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0
01
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RT4803A
Addr
0x02
0x03
Reg Name
VOUTFLOOR
VOUTROOF
Bit
Bit Name
Default
Type
7:5
Reserved
000
R/W
Reserved
4:0
VOUT[4:0]
00110
R/W
00000 : VOUT = 2.85V
00001 : VOUT = 2.9V
00010 : VOUT = 2.95V
00011 : VOUT = 3V
00100 : VOUT = 3.05V
…
00110 : VOUT = 3.15V (default)
…
11111 : VOUT = 4.4V
7:5
Reserved
000
R/W
Reserved
4:0
VOUT[4:0]
01011
R/W
00000 : VOUT = 2.85V
00001 : VOUT = 2.9V
00010 : VOUT = 2.95V
00011 : VOUT = 3V
00100 : VOUT = 3.05V
…
01011 : VOUT = 3.4V (default)
…
11111 : VOUT = 4.4V
7:6
Reserved
00
R/W
Reserved
5
ILIM_OFF
0
R/W
0 : Current limit enabled (default)
1 : Current limit disabled
R/W
0 : Boost soft-start current is limited
per ILIM bit settings. (EN L to H with
VIN ready state)
1 : Boost soft-start current is limited
to ca. 1250mA inductor valley
current. (default)
(EN L to H with VIN ready state)
R/W
1000 : 1500mA
1001 : 2000mA
1010 : 2500mA
1011 : 3000mA
1100 : 3500mA
1101 : 4000mA (default)
1110 : 4500mA
1111 : 5000mA
4
0x04
SOFT_START
1
ILIMSET
3:0
ILIM[3:0]
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Description
1101
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RT4803A
Addr
Reg Name
Bit
Bit Name
Default
Type
7
TSD
0
R
0 : Normal operation.
1 : Thermal shutdown tripped. The
flag is reset after readout.
6
HOTDIE
0
R
0 : TJ < 90°C (Typ.)
1 : TJ > 100°C (Typ.)
5
DCDCMODE
0
R
0 : Device operates in PFM mode.
1 : Device operates in PWM mode.
R
0 : Device operates in forced
bypass mode.
1 : Device operates in DC-DC
mode.
R
0 : Normal operation.
1 : Indicates that the bypass FET
current limit has triggered. This flag
is reset after readout.
R
0 : Normal operation.
1 : Indicates that the valley input
current limit has triggered. This flag
is reset after readout.
R
0 : Normal operation.
1 : Indicates that a fault condition
has occurred. This flag is reset after
readout.
R
0 : Indicates the output voltage is
out of regulation.
1 : Indicates the output voltage is
within its nominal range. This bit is
set if the converter is forced in
pass-through.
4
3
0x05
OPMODE
ILIMPT
0
STATUS
2
1
0
ILIMBST
FAULT
PGOOD
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RT4803A
Thermal Considerations
Layout Considerations
For continuous operation, do not exceed absolute
The PCB layout is an important step to maintain the
high performance of the RT4803A.
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature.
The maximum power dissipation can be calculated by
the following formula :
PD(MAX) = (TJ(MAX) TA) / JA
where TJ(MAX) is the maximum junction temperature,
TA is the ambient temperature, and JA is the junction to
ambient thermal resistance.
For recommended operating condition specifications,
the maximum junction temperature is 125C. The
junction to ambient thermal resistance, JA, is layout
dependent. For WL-CSP-16B 1.67x1.67 (BSC)
package, the thermal resistance, JA, is 47.7C/W on a
standard JEDEC 51-7 four-layer thermal test board.
Both the high current and the fast switching nodes
demand full attention to the PCB layout to save the
robustness of the RT4803A through the PCB layout.
Improper layout might show the symptoms of poor line
or load regulation, ground and output voltage shifts,
stability issues, unsatisfying EMI behavior or worsened
efficiency. For the best performance of the RT4803A,
the following PCB layout guidelines must be strictly
followed.
Place the input and output capacitors as close as
possible to the input and output pins respectively for
good filtering.
For thermal consider, it needed to maximize the pure
area for the power stage area besides the LX.
The maximum power dissipation at TA = 25C can be
calculated by the following formula :
PD(MAX) = (125C 25C) / (47.7C/W) = 2.09W for
WL-CSP-16B 1.67x1.67 (BSC) package
The maximum power dissipation depends on the
operating ambient temperature for fixed TJ(MAX) and
thermal resistance, JA. The derating curve in Figure 6
allows the designer to see the effect of rising ambient
temperature on the maximum power dissipation.
Maximum Power Dissipation (W)1
2.5
Four-Layer PCB
2.0
1.5
1.0
0.5
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 6. Derating Curve of Maximum Power
Dissipation
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RT4803A
Top View
L1
The inductor should be connected
to this pin with the shortest path.
VIN
LX
L1
CIN
COUT
The input capacitor Cin
connected to this pin should
be grounded with the
shortest path
CIN
The output capacitor Cout connected to
this pin should be grounded with the
shortest path
A1
A2
A3
A4
B1
B2
B3
B4
C1
C2
C3
C4
D1
D2
D3
D4
GND
VOUT
COUT
The EN, VSEL , GPIO , SCL , SDA and nBYP
pin should be connected to MCU or GND. Do
not floating these pins.
Figure 7. PCB Layout Guide
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RT4803A
Outline Dimension
Dimensions In Millimeters
Symbol
Dimensions In Inches
Min
Max
Min
Max
A
0.500
0.600
0.020
0.024
A1
0.170
0.230
0.007
0.009
b
0.240
0.300
0.009
0.012
D
1.620
1.720
0.064
0.068
D1
E
1.200
1.620
0.047
1.720
0.064
0.068
E1
1.200
0.047
e
0.400
0.016
WL-CSP-16B 1.67x1.67 (BSC)
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RT4803A
Footprint Information
Number of
Package
Pin
WL-CSP1.67*1.67-16(BSC)
16
Footprint Dimension (mm)
Type
NSMD
SMD
e
0.400
A
B
0.240
0.340
0.270
0.240
Tolerance
±0.025
Richtek Technology Corporation
14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume
responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and
reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may
result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
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2019
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