RT5047B
Single Output LNB Supply and Control Voltage Regulator
Features
General Description
The RT5047B is a highly integrated voltage regulator
and interface IC, specifically design for supplying
power and control signals from advanced satellite
set-top box (STB) modules to the LNB down-converter
in the antenna dish or to the multi-switch box.
The device is consists of the independent current-mode
boost controller and low dropout linear regulator along
with the circuitry required for 22kHz tone shaping to
support DiSEqCTM1.x communications.
Wide Input Supply Voltage Range : 8V to 16V
Output Current Limit of 550mA with 6ms timer
Low Noise LNB Output Voltage (13.3V/14.3V and
18.3V/19.3V by SEL/COMP Pin)
3% High Accuracy for 0mA to 500mA Current
Output
Push-Pull Output Stage Minimizes Output
Transition Time
External 22kHz Tone Input
Meet DiSEqCTM 1.x Protocol
Output Short Circuit Protection
Over-Temperature Protection
The
RT5047B
has
protection
(over-current,
over-temperature and under-voltage lockout).
The RT5047B is available in a SOP-8 (Exposed Pad)
package to achieve optimized solution for thermal
dissipation.
Ordering Information
Applications
RT5047B
LNB Power Supply and Control for Satellite Set-Top
Box
Analog and Digital Satellite Receivers/Satellite TV,
Satellite PC cards
Package Type
SP : SOP-8 (Exposed Pad-Option 2)
Lead Plating System
G : Green (Halogen Free and Pb Free)
Note :
Richtek products are :
RoHS compliant and compatible with the current
requirements of IPC/JEDEC J-STD-020.
Suitable for use in SnPb or Pb-free soldering
processes.
Simplified Application Circuit
D1
L1
VIN
CIN1
CBST
LX
BOOST
D3
VIN
CIN2
Max. 550mA
EN
RT5047B
D5
LNB
VLNB
D2
CLNB
D4
TONE
SEL
COMP
GND
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May 2019
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RT5047B
Pin Configuration
Marking Informaton
RT5047B
GSPYMDNN
(TOP VIEW)
RT5047BGSP : Product Number
YMDNN : Date Code
8
LNB
BOOST
2
LX
3
VIN
4
GND
TONE
7
COMP
6
SEL
5
EN
9
SOP-8 (Exposed Pad)
Functional Pin Description
Pin No.
Pin Name
Pin Function
1
LNB
Output voltage for LNB.
2
BOOST
Boost output and tracking supply voltage to LNB.
3
LX
Switching node of DC-DC boost converter.
4
VIN
Power supply input.
5
EN
LNB output enable.
6
SEL
LNB output voltage selection pin (Low is for 13.3V, high is for 18.3V).
7
COMP
LNB output voltage compensate pin.
8
TONE
22kHz TONE input.
9 (Exposed Pad)
GND
Ground. The exposed pad must be soldered to a large PCB and connected
to GND for maximum power dissipation.
Functional Block Diagram
LX
VIN
BOOST
OCP_Boost
UVLO
VR1
VFB1
RF1
EN
Oscillator
Error
Amp
PWM
Controller
RF2
4-steps
Voltage
Setting
OSC
VD2
Dynamic
Dropout
Control
Linear
Regulator
LNB
VUD
SEL
DAC
OCP_LNB
COMP
Bandgap
Reference
VD1
TONE
22kHz Tone Shape
VFB2
OTP
VR1
Reference
Voltage
GND
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RT5047B
Operation
The RT5047B integrates a current mode boost
Tone Circuit
converter and linear regulator. Use the SEL pin to
control the LNB voltage and the boost converter track is
at least greater 850mV than LNB voltage. The boost
converter is the high efficiency PWM architecture with
700kHz operation frequency. The linear regulator has
the capability to source current up to 550mA during
This circuit is used for tone generation. Use the TONE
pin to control output amplitude of LNB.
continuous operation. All the loop compensation,
current sensing, and slope compensation functions are
provided internally.
OCP
Both the boost converter and the linear regulator have
independent current limit.
(1) Boost
In the boost converter, this is achieved through
cycle-by-cycle internal current limit.
(2) LNB
OTP
When the junction temperature reaches the critical
temperature (typically 140C), the boost converter and
the linear regulator are immediately disabled.
UVLO
The UVLO circuit compares the VIN with the UVLO
threshold (7.7V rising typically) to ensure that the input
voltage is high enough for reliable operation. The
350mV (typ.) hysteresis prevents supply transients
from causing a shutdown.
PWM Controller
The loop compensation, current sensing, and slope
compensation functions are provided internally.
In the linear regulator, when the linear regulator
exceeds OCP more than 6ms, the LNB output will
be disabled and re-start after 1800ms.
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RT5047B
Absolute Maximum Ratings
(Note 1)
Supply Input Voltage, VIN ------------------------------------------------------------------------------------------- 0.3V to 28V
Output Voltage LNB, LX and BOOST Pins --------------------------------------------------------------------- 0.3V to 30V
Others Pin to GND ---------------------------------------------------------------------------------------------------- 0.3V to 6V
Power Dissipation, PD @ TA = 25C
(Note 5)
SOP-8 (Exposed pad) ------------------------------------------------------------------------------------------------ 3.44W
Package Thermal Resistance
(Note 2)
SOP-8 (Exposed pad), JA ------------------------------------------------------------------------------------------ 29C/W
SOP-8 (Exposed pad), JC------------------------------------------------------------------------------------------ 2C/W
Lead Temperature (Soldering, 10 sec.) -------------------------------------------------------------------------- 260C
Junction Temperature ------------------------------------------------------------------------------------------------ 150C
Storage Temperature Range --------------------------------------------------------------------------------------- 65C to 150C
ESD Susceptibility
(Note 3)
HBM (Human Body Model)----------------------------------------------------------------------------------- 2kV
Recommended Operating Conditions
(Note 4)
Supply Input Voltage ------------------------------------------------------------------------------------------------- 8V to 16V
Ambient Temperature Range--------------------------------------------------------------------------------------- 40C to 85C
Junction Temperature Range -------------------------------------------------------------------------------------- 40C to 125C
Electrical Characteristics
(VIN (typ.) = 12V, VIN = 8V to 16V, TA = 25C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
ERR
Relative to selected VLNB target level,
ILNB = 0 to 450mA
3
--
3
%
IIN_OFF
EN = 0, LNB output disabled
--
0.3
0.5
mA
IIN_ON
EN = 1, VLNB = 18.3V, Tone = 0V
--
10
18
mA
IIN_ON
EN = 1, VLNB = 18.3V, 22kHz TONE
Input
--
16
28
mA
Boost Switch On
Resistance
RDS(ON)
ILNB = 450mA
--
150
300
m
Switching Frequency
f SW
600
700
800
kHz
Switch Current Limit
ILIMSW
VIN = 10V, VLNB = 18.3V
--
3
--
A
Linear Regulator Voltage
Drop
VDROP
VBOOST-VLNB, ILNB = 450mA
--
0.85
--
V
Output Voltage Rise Time
tR_LNB
For VLNB = 13.3V18.3V,
CLNB = 100nF, ILNB = 450mA
--
3
10
ms
Output Voltage Pull-Down
Time
tF_LNB
For VLNB = 18.3V13.3V,
CLNB = 100nF, ILNB = 0mA
--
3
10
ms
20MHz bandwidth limit
--
20
--
mVPP
General
LNB Output Accuracy,
Load and Line Regulation
Supply Current
Ripple and Noise on LNB
VRIP_PP
Output
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(Note 6)
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RT5047B
Parameter
Load Regulation
Line Regulation
Symbol
VOUT_LOAD
VOUT_LINE
Test Conditions
Min
Typ
Max
VLNB = 13.3V, ILNB = 50mA to 450mA
--
38
76
VLNB = 18.3V, ILNB = 50mA to 450mA
--
45
90
VIN = 9 to 14V, VLNB = 13.3V,
ILNB = 50mA
10
--
10
VIN = 9 to 14V, VLNB = 18.3V,
ILNB = 50mA
10
--
10
Unit
mV
mV
Protection
Output Over-Current Limit
ILIM_LNB1
VLNB = 13.3V/18.3V
500
550
650
mA
Output Over-Current
Disable Time
tDIS_ON
VLNB short to GND
--
6
--
ms
Output Over-Current
Disable Time
tDIS_OFF
VLNB short to GND
--
1800
--
ms
(Note 6)
VIN Under-Voltage Lockout
VUVLO
Threshold
VIN falling
--
7.35
--
V
VIN Turn On Threshold
VIN rising
--
7.7
8
V
VIN Under-Voltage Lockout
VUVLOHYS
Hysteresis
--
350
--
mV
OTP Threshold
TOTP
--
140
--
C
OTP Hysteresis
TOTPHYS
--
15
--
C
TONE Frequency
fTONE
20
22
24
kHz
TONE Amplitude, Peak to
Peak
VTONE_PP
ILNB = 50 to 450mA, CLNB = 200nF
550
700
900
mVPP
TONE Duty Cycle
DCTONE
ILNB = 0 to 450mA, CLNB = 570nF
40
50
60
%
TONE Rise Time
tRTONE
ILNB = 0 to 450mA, CLNB = 570nF
5
10
15
s
TONE Fall Time
tFTONE
ILNB = 0 to 450mA, CLNB = 570nF
5
10
15
s
VTONE_H
1.2
--
--
V
VTONE_L
--
--
0.4
V
ITONELKG
--
5
10
A
VEN_H
1.2
--
--
V
VEN_L
--
--
0.4
V
IENLKG
--
5
10
A
VSEL_H
1.2
--
--
V
VSEL_L
--
--
0.4
V
ISELLKG
--
5
10
A
VCOMP_H
1.2
--
--
V
VCOMP_L
--
--
0.4
V
ICOMPLKG
--
5
10
A
VIN_TH
TONE
TONE Logic Input
TONE Input Leakage
ENABLE, SEL, COMP Pins
EN Logic Input
EN Input Leakage
SEL Logic Input
SEL Input Leakage
COMP Logic Input
COMP Input Leakage
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RT5047B
Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These
are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect
device reliability.
Note 2. JA is measured under natural convection (still air) at TA = 25°C with the component mounted on a high
effective-thermal-conductivity four-layer test board on a JEDEC 51-7 thermal measurement standard. JC is measured
at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. Operation in VIN > 14.5V can be limited by power losss in the linear regulator, and recommend voltage difference
across the linear regulator between input (Boost) and output (LNB) terminal is smaller than 1.2V.
Note 6. Guaranteed by design.
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RT5047B
Typical Application Circuit
L1
10μH
VIN
D1
SS14
CIN1
2x10μF
3
4
CIN2
1μF
5
8
6
7
CBST
20μF/30μF
2
LX
BOOST
D3
SS14
VIN
EN
RT5047B
LNB
1
Max. 550mA
D2
SS14
D5
SS14
CLNB
0.1μF
VLNB
D4
SMDJ20A
TONE
SEL
COMP
GND
9 (Exposed Pad)
Note :
1. D2, D3, D4, D5 are used for surge protection.
2. The capacitor CLNB should be less than 1F for the power stability.
3. EN, TONE, SEL and COMP are connected to microcontroller directly.
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RT5047B
Typical Operating Characteristics
System Efficiency vs. Output Current
Boost Efficiency vs. Output Current
95
95
90
90
Efficiency (%)
100
Efficiency (%)
100
85
80
75
85
80
75
70
70
65
65
VIN = 12V, V BOOST = 14.3V, V LNB = 13.3V
VIN = 12V, VBOOST = 14.3V
60
0.00
0.10
0.20
0.30
0.40
0.50
60
0.00
0.60
0.10
Tone Amplitude vs. Temperature
0.40
0.50
0.60
Tone Amplitude vs. Output Current
0.90
0.90
0.85
0.85
Tone Amplitude (V)
Tone Amplitude (V)
0.30
Output Current (A)
Output Current (A)
0.80
0.75
0.70
0.65
0.80
0.75
0.70
0.65
0.60
0.60
VIN = 12V, VLNB = 13.3V, TONE enable
VIN = 12V, VLNB = 13.3V, TONE enable
0.55
0.55
-50
-25
0
25
50
75
100
0
125
0.1
0.2
0.3
0.4
0.5
0.6
Output Current (A)
Temperature (°C)
Output Voltage v.s Temperature
Output Voltage vs. Output Current
19
19
18
18
VLNB_ 18.3V
VLNB_18.3
Output Voltage (V)
Output Voltage (V)
0.20
17
16
15
14
VLNB_13.3
13
17
16
15
14
VLNB_13.3V
13
VIN = 12V
VIN = 12V
12
12
-50
-25
0
25
50
75
100
Temperature (°C)
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125
0.00
0.10
0.20
0.30
0.40
0.50
0.60
Output Current (A)
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RT5047B
Over-Current Protect vs. Temperature
Under-Voltage Lockout vs. Temperature
0.70
Under-Voltage Lockout (V)1
8.00
Current (A)
0.65
0.60
0.55
VIN = 12V, VLNB = 13.3V
0
25
50
75
100
7.60
7.40
7.20
7.00
0.50
-25
7.80
125
-50
-25
0
25
50
75
100
125
Temperature (°C)
Temperature (°C)
Tone Output
Output Voltage Transition Rising
VLNB
(5V/Div)
VIN = 12V VSEL from 0V to 3.3V,
CLNB = 0.1F, VLNB from 13V to 18V
VLNB_ac
(200mV/Div)
VIN = 12V
VSEL
(2V/Div)
Time (50s/Div)
Time (500s/Div)
Output Voltage Transition Falling
Power On Sequence
VLNB
(5V/Div)
VIN = 12V, VSEL from 3.3V to 0V,
CLNB = 1F, VLNB from 18V to 13V
VSEL
(2V/Div)
VIN
(10V/Div)
VBOOST
(10V/Div)
VLNB
(10V/Div)
Time (500s/Div)
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VIN = 12V
Time (5ms/Div)
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RT5047B
Over-Current Protection
VBOOST
(5V/Div)
VLNB
(5V/Div)
ILNB
(500mA/Div)
VIN = 12V
Time (500ms/Div)
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RT5047B
Application Information
Boost Converter/Linear Regulator
with half of the inductor ripple current as shown in the
The 5047B integrates a current-mode boost converter
and linear regulator. Use the SEL pin to control the
LNB voltage and the boost converter track is at least
greater 800mV than the LNB voltage. The boost
converter is high efficiency PWM architecture with
700kHz operation frequency. The linear regulator has
the capability to source current up to 550mA during
continuous operation. All the loop compensation,
current sensing, and slope compensation functions are
provided internally.
following equation :
The RT5047B has current limiting on the boost
converter and the LNB output to protect the IC against
short circuits. The internal MOSFET will turn off when
the LX current is higher than 3A cycle-by-cycle. The
LNB output will turn off when the output current higher
than the 550mA and 6ms and turn-on after 1800ms
automatically.
Input Capacitor Selection
The input capacitor reduces voltage spikes from the
input supply and minimizes noise injection to the
converter. A 20F capacitance is sufficient for most
applications. Nevertheless, a higher or lower value may
be used depending on the noise level from the input
supply and the input current to the converter. Note that
the voltage rating of the input capacitor must be greater
than the maximum input voltage.
Inductor Selection
The inductance depends on the maximum input current.
As a general rule, the inductor ripple current range is
20% to 40% of the maximum input current. If 40% is
selected as an example, the inductor ripple current can
be calculated according to the following equations :
VOUT IOUT(MAX)
VIN
IRIPPLE = 0.4 IIN(MAX)
IIN(MAX) =
where η is the efficiency of the converter, IIN(MAX) is
the maximum input current, and IRIPPLE is the
inductor ripple current. The input peak current can
IPEAK = 1.2 x IIN(MAX)
note that the saturated current of the inductor must be
greater than IPEAK. The inductance can eventually be
determined according to the following equation :
η VIN VOUT VIN
2
L
0.4 VOUT I OUT(MAX)fOSC
2
where f OSC is the switching frequency. For better
system performance, a shielded inductor is preferred to
avoid EMI problems.
Boost Output Capacitor Selection
The RT5047B boost regulator is internally
compensated and relies on the inductor and output
capacitor value for overall loop stability. The output
capacitor is in the 20F to 30F range with a low ESR,
as strongly recommended. The voltage rating on this
capacitor should be in the 25V to 35V range since it is
connected to the boost VOUT rail.
The output ripple voltage is an important index for
estimating chip performance. This portion consists of
two parts. One is the product of the inductor current
with the ESR of the output capacitor, while the other
part is formed by the charging and discharging process
of the output capacitor. As shown in Figure 1, VOUT1
can be evaluated based on the ideal energy
equalization. According to the definition of Q, the Q
value can be calculated as the following equation :
Q = 1 IIN 1 IL IOUT IIN 1 IL IOUT
2
2
2
V
IN 1 = COUT VOUT1
VOUT fOSC
where f OSC is the switching frequency and IL is the
inductor ripple current. Bring COUT to the left side to
estimate the value of VOUT1 according to the following
equation :
VOUT1 =
D IOUT
COUT fOSC
then be obtained by adding the maximum input current
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RT5047B
where D is the duty cycle and η is the boost converter
efficiency. Finally, take ESR into consideration, the
overall output ripple voltage can be determined by the
transients from causing a shutdown. Once the input
voltage exceeds the UVLO rising threshold, start-up
begins. When the input voltage falls below the UVLO
following equation :
falling threshold, all IC internal functions will be turned
off by the controller.
VOUT = IIN ESR
D IOUT
COUT fOSC
Over-Current Protection
The output capacitor, COUT, should be selected
accordingly.
Inductor Current
Output Current
Time
(1-D)TS
function to prevent chip damage from high peak
currents. Both the boost converter and the linear
regulator have independent current limit.
(1) Boost
ΔIL
Input Current
The RT5047B features an over-current protection
In the boost converter, this is achieved through
cycle-by-cycle internal current limit. During the
ON-period, the chip senses the inductor current
that is flowing into the LX pin. The internal NMOS
will be turned off if the peak inductor current
reaches the current-limit value of 3A (typ.).
(2) LNB
Output Ripple
Voltage (ac)
Time
ΔVOUT1
When the linear regulator exceeds 550mA (typ.)
more than 6ms, the LNB output will be disabled.
During this period of time, if the current limit
condition disappears, the OCP will be cleared and
the part restarts.
Figure 1. The Output Ripple Voltage without the
If the part is still in current limit after this time period,
Contribution of ESR
the linear regulator and boost converter will
automatically disable to prevent the part from
Schottky Diode Selection
Schottky
diodes
are
overheating.
chosen
for
their
low
forward-voltage drop and fast switching speed.
However, when making a selection, important
parameters such as power dissipation, reverse voltage
rating, and pulsating peak current should all be taken
into consideration. A suitable Schottky diode’s reverse
voltage rating must be greater than the maximum
output voltage and its average current rating must
exceed the average output current. The chosen diode
should also have a sufficiently low leakage current level,
since it increases with temperature.
Under-Voltage Lockout (UVLO)
Short Circuit Protection
If the LNB output is shorted to ground, and more than
6ms, the RT5047B will be disabled 1800ms then
enable automatically.
Over-Temperature Protection
When the junction temperature reaches the critical
temperature (typically 140°C), the boost converter and
the linear regulator are immediately disabled. When the
junction temperature cools down to a lower
temperature threshold specified, the RT5047B will be
allowed to restart by normal start operation.
The UVLO circuit compares the input voltage at VIN
with the UVLO threshold (7.7V rising typically) to
ensure that the input voltage is high enough for reliable
operation. The 350mV (typ.) hysteresis prevents supply
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RT5047B
standards and compensation if the cable line has
voltage drop. These voltage levels are defined in Table
1. The rise time and fall time of the VLNB is 3ms (typ.).
LNB Output Voltage
The RT5047B has voltage control function on the LNB
output. This function provides 4 levels for the common
Table 1
SEL Pin Status
COMP Pin Status
LNB Output Voltage
0
0
13.3V
0
1
14.3V
1
0
18.3V
1
1
19.3V
carry a 22kHz, 700mV peak to peak signal for DiSEqC
Tone Generation
The RT5047B provides the tone generation function,
please refer to the Figure 2. Set the TONE pin with
22kHz logic signal, the LNB linear regulator output will
LNB
1.x communication. It can meet base-band timings of
500s (±100s) for a one-third bit PWK coded signal
period on a nominal 22kHz (±20%)
700mV
3.3V
TONE
0V
Figure 2. Tone Generation Options
Pull-Down Rate Control
The output linear stage provides approximately 40mA
of pull-down capability. This ensures that the output
volts are ramped in a reasonable amount of time.
If loading is 1000mA
3.5ms OCP2 = 550mA
2.5ms
Over-Current Disable Time
If the LNB output current exceeds 550mA, typical, for
more than 6ms, then the LNB output will be disabled
and device enters a tON = 6ms/tOFF = 1800ms routine.
It will be returned to normal operation after a successful
soft-start process.
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OCP1 = 1000mA
OCP1 = 1000mA
3.5ms OCP2 = 550mA
2.5ms
1800ms
If LNB is shorted to GND
OCP1 = 250mA
3.5ms
OCP1 = 250mA
OCP2 = 138mA
2.5ms
3.5ms
1800ms
OCP2 = 138mA
2.5ms
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RT5047B
Maximum Power Dissipation (W) 1
Inrush Current
At start-up or during a LNB reconfiguration event, a
transient surge current above the normal DC operating
level can be provided by the IC. This current increase
can be as high as 550mA, typical, for as long as
required, up to a maximum of 6ms.
DC Current
The RT5047B can handle up to 500mA during
continuous operation.
5.0
Four-Layer PCB
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
Thermal Considerations
0
PD(MAX) = (TJ(MAX) - TA) / JA
For continuous operation, the maximum operating
junction temperature indicated under Recommended
Operating
Conditions
is
125°C.
The
junction-to-ambient thermal resistance, JA, is highly
package dependent. For a SOP-8 (Exposed Pad)
package, the thermal resistance, JA, is 29°C/W on a
standard
JEDEC
51-7
high
effective-thermal-conductivity four-layer test board. The
maximum power dissipation at TA = 25°C can be
calculated as below :
75
100
125
Figure 3. Derating Curve of Maximum Power
Dissipation
Layout Consideration
For high frequency switching power supplies, the PCB
layout is important to get good regulation, high
efficiency and stability. The following descriptions are
the guidelines for better PCB layout.
For good regulation, place the power components as
close as possible. The traces should be wide and
where TJ(MAX) is the maximum junction temperature,
TA is the ambient temperature, and JA is the
junction-to-ambient thermal resistance.
50
Ambient Temperature (°C)
The junction temperature should never exceed the
absolute maximum junction temperature TJ(MAX), listed
under Absolute Maximum Ratings, to avoid permanent
damage to the device. The maximum allowable power
dissipation depends on the thermal resistance of the IC
package, the PCB layout, the rate of surrounding
airflow, and the difference between the junction and
ambient temperatures. The maximum power
dissipation can be calculated using the following
formula :
25
short enough especially for the high-current loop.
Minimize the size of the LX node and keep it wide
and shorter.
The exposed pad of the chip should be connected to a
strong ground plane for maximum thermal
consideration.
PD(MAX) = (125°C - 25°C) / (29°C/W) = 3.44W for a
SOP-8 (Exposed Pad) package.
The maximum power dissipation depends on the
operating ambient temperature for the fixed TJ(MAX) and
the thermal resistance, JA. The derating curves in
Figure 3 allows the designer to see the effect of rising
ambient temperature on the maximum power
dissipation.
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
www.richtek.com
14
is a registered trademark of Richtek Technology Corporation.
DS5047B-03
May 2019
RT5047B
The CIN, CBST and CLNB
should be placed as closed
as possible to the RT5047B
for good filter.
D 3 and D 4 should be placed
as closed as possible to
VOUT for surge protection.
VOUT
D4
The exposed pad of the chip
should be connected to
analog ground plane for
thermal consideration.
CLNB1
D5
D2
LNB
TONE
BOOST
COMP
D3
CBST1
CBST2
CBST3
GND
D1
LX
SEL
VIN
EN
L1
VIN
CIN1
The TONE, SEL, COMP and
EN pin should be connected to
MCU or GND. Do not floating
these pins.
CIN2
The inductor should be placed as close as possible to the L X pin to minimize the
noise coupling into other circuits.
LX node copper area should be minimized for reducing EMI
Place the power components as close as possible. The traces should be wide and
short especially for the high-current loop.
Figure 4. PCB Layout Guide
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
DS5047B-03
May 2019
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
15
RT5047B
Outline Dimension
Dimensions In Millimeters
Symbol
Dimensions In Inches
Min
Max
Min
Max
A
4.801
5.004
0.189
0.197
B
3.810
4.000
0.150
0.157
C
1.346
1.753
0.053
0.069
D
0.330
0.510
0.013
0.020
F
1.194
1.346
0.047
0.053
H
0.170
0.254
0.007
0.010
I
0.000
0.152
0.000
0.006
J
5.791
6.200
0.228
0.244
M
0.406
1.270
0.016
0.050
X
2.000
2.300
0.079
0.091
Y
2.000
2.300
0.079
0.091
X
2.100
2.500
0.083
0.098
Y
3.000
3.500
0.118
0.138
Option 1
Option 2
8-Lead SOP (Exposed Pad) Plastic Package
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
www.richtek.com
16
is a registered trademark of Richtek Technology Corporation.
DS5047B-03
May 2019
RT5047B
Footprint Information
Footprint Dimension (mm)
Package
PSOP-8
Option1
Number of Pin
8
P
A
B
C
1.27 6.80 4.20 1.30
Option2
D
0.70
Sx
Sy
2.30
2.30
3.40
2.40
M
4.51
Tolerance
±0.10
Richtek Technology Corporation
14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume
responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Ric htek is believed to be accurate and
reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may
result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
DS5047B-03
May 2019
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
17
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