RT5760A/B/C/D
6V 1A, ACOT® Buck Converter in Thin SOT-563 Package
General Description
Features
The RT5760A/B/C/D is a simple, easy-to-use, 1A
synchronous step-down DC-DC converter with an input
supply voltage range from 2.5V to 6V. The device
build-in an accurate 0.6V reference voltage and
integrates low RDS(ON) power MOSFETs to achieve
high efficiency in a SOT-563 (FC) package.
The RT5760A/B/C/D adopts Advanced Constant
On-Time (ACOT® ) control architecture to provide an
ultrafast transient response with few external
components and to operate in nearly constant
switching frequency over the line, load, and output
voltage range. The RT5760A/C operate in automatic
PSM that maintain high efficiency during light load
operation. The RT5760B/D operate in Forced PWM
that help to meet tight voltage regulation accuracy
requirements.
The RT5760A/B/C/D senses both FETs current for a
robust over-current protection. The device features
cycle-by-cycle current limit protection and prevent the
device from the catastrophic damage in output short
Input Voltage Range from 2.5V to 6V
Integrated 120m and 80m FETs
1A Output Current, up to 95% Efficiency
100% Duty Cycle for Lowest Dropout
1% Internal Reference Voltage
2.2MHz Typical Switching Frequency
Power Saving Mode for Light Loads (RT5760A/C)
Low Quiescent Current: 25A (Typ.)
Fast Advanced Constant On-Time (ACOT ® )
Control
Internal Soft Startup (0.6ms)
Enable Control Input
Power Good Indicator (RT5760A/B)
Both FETs Over-Current Protection
Negative Over-Current Protection (RT5760B/D)
Input Under-Voltage Lockout Protection
Hiccup-Mode Output Under-Voltage Protection
Over-Temperature Protection
RoHS Compliant and Halogen Free
Applications
circuit, over current or inductor saturation. A built-in
soft-start function prevents inrush current during
start-up. The device also includes input under-voltage
lockout, output under-voltage protection, and
Mobile Phones and Handheld Devices
STB, Cable Modem, and xDSL Platforms
WLAN ASIC Power / Storage (SSD and HDD)
General Purpose for POL LV Buck Converter
over-temperature protection to provide safe and
smooth operation in all operating conditions.
Simplified Application Circuit
RT5760A/B/C/D
*PG
VIN
CIN
VPG
VIN
RPG
L
VOUT
SW
Enable
EN
RFB1
GND
CFF
COUT
FB
RFB2
*PG : RT5760A/B only.
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RT5760A/B/C/D
Ordering Information
Pin Configuration
(TOP VIEW)
RT5760
Package Type
H6F : SOT-563 (FC)
PG
EN
SW
6
5
4
1
2
3
FB
GND
VIN
Lead Plating System
G : Green (Halogen Free and Pb Free)
UVP Option
H : Hiccup
PWM Operation Mode
A : Automatic PSM
B : Forced PWM
C : Automatic PSM
D : Forced PWM
Note :
SOT-563 (FC) (RT5760A/B)
NC
EN
SW
6
5
4
1
2
3
FB
GND
VIN
Richtek products are :
RoHS compliant and compatible with the current
requirements of IPC/JEDEC J-STD-020.
Suitable for use in SnPb or Pb-free soldering processes.
SOT-563 (FC) (RT5760C/D)
Marking Information
RT5760AHGH6F
03W
03 : Product Code
W : Date Code
RT5760BHGH6F
02W
02 : Product Code
W : Date Code
RT5760CHGH6F
0BW
0B : Product Code
W : Date Code
RT5760DHGH6F
0AW
0A : Product Code
W : Date Code
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RT5760A/B/C/D
Functional Pin Description
Pin No.
Pin Name
RT5760A/B RT5760C/D
Pin Function
1
1
FB
Feedback voltage input. Connect this pin to the midpoint of the external
feedback resistive divider to set the output voltage of the converter to
the desired regulation level. The device regulates the FB voltage at
Feedback Reference Voltage, typically 0.6V.
2
2
GND
Signal and power ground pin. Place the bottom resistor of the feedback
network as close as possible to this pin.
3
3
VIN
Power input. The input voltage range is from 2.5V to 6V. Connect input
capacitors directly to this pin and GND pins. MLCC with capacitance
higher than 10F is recommended.
4
4
SW
Switch node between the internal switch. Connect this pin to the
inductor.
5
5
EN
Enable control input. Connect this pin to logic high enables the device
and connect this pin to GND disables the device. Do not leave this pin
floating.
6
--
PG
Power good indicator. The output of this pin is an open-drain with
external pull-up resistor. After soft startup, PG is pulled up when the FB
voltage is within 90% (typ.). The PG status is low while EN is disable.
--
6
NC
No internal connection.
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RT5760A/B/C/D
Functional Block Diagram
For RT5760A/B
EN
VIN
UVLO
Shutdown
Control
OTP
Error Amplifier
+
+
FB
Comparator
+
-
Ramp
Generator
VREF
UV
TON
Logic
Control
SW
VIN
SW
Driver
SW
90%VREF
PG
FB
GND
Current
Limit
Detector
SW
+
Discharge
Resistor
-
VFB
For RT5760C/D
EN
VIN
UVLO
OTP
Shutdown
Control
Error Amplifier
+
+
FB
VREF
Ramp
Generator
Comparator
+
-
FB
UV
Logic
Control
TON
Driver
SW
Current
Limit
Detector
SW
VIN
SW
GND
SW
Discharge
Resistor
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RT5760A/B/C/D
Operation
The RT5760A/B/C/D is a high-efficiency, synchronous
Enable Control
step-down DC-DC converter that can deliver up to 1A
output current from a 2.5V to 6V input supply.
The RT5760A/B/C/D provides an EN pin, as an
external chip enable control, to enable or disable the
device. If VEN is held below a logic-low threshold
voltage (VEN_L) of the enable input (EN), the converter
will disable output voltage, that is, the converter is
disabled and switching is inhibited even if the VIN
voltage is above VIN under-voltage lockout threshold
(VUVLO). During shutdown mode, the supply current
can be reduced to ISHDN (1A or below). If the EN
voltage rises above the logic-high threshold voltage
(VEN_H) while the VIN voltage is higher than UVLO
Advanced Constant On-Time Control and PWM
Operation
The RT5760A/B/C/D adopts ACOT® control for its
ultrafast transient response, low external component
counts and stable with low ESR MLCC output
capacitors. When the feedback voltage falls below the
feedback reference voltage, the minimum off-time
one-shot (80ns, typ.) has timed out and the inductor
current is below the current limit threshold, then the
internal on-time one-shot circuitry is triggered and the
high-side switch is turn-on. Since the minimum off-time
is short, the device exhibits ultrafast transient response
and enables the use of smaller output capacitance.
threshold, the device will be turned on, that is,
switching being enabled and soft-start sequence being
initiated. Do not leave this pin floating.
Soft-Start (SS)
The on-time is inversely proportional to input voltage
and directly proportional to output voltage to achieve
pseudo-fixed frequency over the input voltage range.
After the on-time one-shot timer expired, the high-side
switch is turn-off and the low-side switch is turn-on until
the on-time one-shot is triggered again. In the steady
The RT5760A/B/C/D provides an internal soft-start
feature for inrush control. At power up, the internal
state, the error amplifier compares the feedback
voltage VFB and an internal reference voltage. If the
virtual inductor current ramp voltage is lower than the
output of the error amplifier, a new pre-determined
fixed on-time will be triggered by the on-time one-shot
generator.
to its targeted regulation voltage only after this ramp
voltage is greater than the feedback voltage VFB to
ensure the converters have a smooth start-up from
pre-biased output. The output voltage starts to rise in
0.1ms from EN rising, and the soft-start ramp-up time
(10%VOUT to 90%VOUT) is 0.6ms.
capacitor is charged by an internal current source to
generate a soft-start ramp voltage as a reference
voltage to the PWM comparator. The device will initiate
switching and the output voltage will smoothly ramp up
Power Saving Mode (RT5760A/C)
The RT5760A/C automatically enters power saving
mode (PSM) at light load to maintain high efficiency. As
the load current decreases and eventually the inductor
current ripple valley touches the zero current, which is
the boundary between continuous conduction and
discontinuous conduction modes. The low-side switch
is turned off when the zero inductor current is detected.
As the load current is further decreased, it takes longer
time to discharge the output capacitor to the level that
requires the next on-time. The switching frequency
decreases and is proportional to the load current to
maintain high efficiency at light load.
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VIN = 5V
VIN
EN
VOUT
0.6ms
0.1ms
90%VOUT
10%VOUT
SS END
SS
(Internal)
PG
1.3ms
Figure 1. Start-Up Sequence
Maximum Duty Cycle Operation
The RT5760A/B/C/D is designed to operate in dropout
at the high duty cycle approaching 100%. If the
operational duty cycle is large and the required off time
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RT5760A/B/C/D
Table 1. PG Pin Status
becomes smaller than minimum off time, the
RT5760A/B/C/D starts to enable skip off time function
and keeps high-side MOSFET switch on continuously.
The RT5760A/B/C/D implements skip off time function
to achieve high duty approaching 100%. Therefore, the
maximum output voltage is near the minimum input
supply voltage of the application. The input voltage at
which the devices enter dropout changes depending on
the input voltage, output voltage, switching frequency,
load current, and the efficiency of the design.
Power Good Indication (RT5760A/B)
The RT5760A/B features an open-drain power-good
output (PGOOD) to monitor the output voltage status.
The output delay of comparator prevents false flag
operation for short excursions in the output voltage,
such as during line and load transients. Pull-up
PGOOD with a resistor to VOUT or an external voltage
below 6V. When VIN voltage rises above VUVLO, the
power-good function is activated. After soft start is
finished, the PGOOD pin is controlled by a comparator
connected to the feedback signal VFB. If VFB rises
above a power-good high threshold (VTH_PGLH)
(typically 90% of the reference voltage), the PGOOD
pin will be in high impedance and VPG will be held high.
When VFB falls short of power-good low threshold
(VTH_PGHL) (typically 85% of the reference voltage), the
PGOOD pin will be pulled low after a certain delay
(60s, typically) elapsed. Once being started-up, if any
internal protection is triggered, PGOOD will be pulled
low to GND. The internal open-drain pull-down device
(10, typically) will pull the PGOOD pin low. The power
good indication profile is shown below.
VTH_PGLH
VTH_PGHL
VFB
Conditions
PG Pin
VEN > VEN_H,
VFB > VTH_PGLH
High Impedance
VEN > VEN_H,
VFB < VTH_PGHL
Low
Shutdown
VEN < VEN_L
Low
OTP
TJ > TSD
Low
Enable
Input Under-Voltage Lockout
In addition to the EN pin, the RT5760A/B/C/D also
provides enable control through the VIN pin. If VEN
rises above VEN_H first, switching will still be inhibited
until the VIN voltage rises above VUVLO. It is to ensure
that the internal regulator is ready so that operation
with not-fully-enhanced internal MOSFET switches can
be prevented. After the device is powered up, if the
input voltage VIN goes below the UVLO falling
threshold voltage (VUVLO VUVLO), this switching will
be inhibited; if VIN rises above the UVLO rising
threshold (VUVLO), the device will resume normal
operation with a complete soft-start.
The Over-Current Protection
The
RT5760A/B/C/D
features
cycle-by-cycle
current-limit protection on both the high-side and
low-side MOSFETs and prevents the device from the
catastrophic damage in output short circuit, over
current or inductor saturation.
The high-side MOSFET over-current protection is
achieved by an internal current comparator that
monitors the current in the high-side MOSFET during
each on-time. The switch current is compared with the
high-side switch peak-current limit (ILIM_H) after a
certain amount of delay when the high-side switch
being turned on each cycle. If an over-current condition
occurs, the converter will immediately turns off the
high-side switch and turns on the low-side switch to
prevent the inductor current exceeding the high-side
current limit.
The low-side MOSFET over-current protection is
VPGOOD
60μs
Figure 2. The Logic of PGOOD
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achieved by measuring the inductor current through the
synchronous rectifier (low-side switch) during the
low-side on-time. Once the current rises above the
low-side switch valley current limit (ILIM_L), the on-time
one-shot will be inhibited until the inductor current
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RT5760A/B/C/D
ramps down to the current limit level (ILIM_L), that is,
another on-time can only be triggered when the
inductor current goes below the low-side current limit. If
output under-voltage protection with hiccup mode.
During hiccup mode, the IC will shut down for
tHICCUP_OFF (2.4ms), and then attempt to recover
the output load current exceeds the available inductor
current (clamped by the low-side current limit), the
output capacitor needs to supply the extra current such
that the output voltage will begin to drop. If it drops
below the output under-voltage protection trip threshold,
the IC will stop switching to avoid excessive heat.
automatically for tHICCUP_ON (1.2ms). Upon completion
of the soft-start sequence, if the fault condition is
removed, the converter will resume normal operation;
otherwise, such cycle for auto-recovery will be
repeated until the fault condition is cleared. Hiccup
mode allows the circuit to operate safely with low input
current and power dissipation, and then resume normal
operation as soon as the over-load or short-circuit
condition is removed. A short circuit protection and
recovery profile is shown below.
Over-Current Protection
VOUT
(500mV/Div)
VSW
(5V/Div)
Short Circuit Protection and Recovery
VPG
(5V/Div)
Output short
Short removed
VOUT
(500mV/Div)
VSW
(5V/Div)
IL
(1A/Div)
VPG
(5V/Div)
Time (50s/Div)
IL
(1A/Div)
Figure 3. Over-Current Protection
Output Active Discharge
Time (2ms/Div)
When the RT5760A/B/C/D is disabled by EN pin,
UVLO or OTP, the device discharges the output
capacitors (via SW pins) through an internal discharge
resistor (150) connected to ground. This function
prevents the reverse current flow from the output
capacitors to the input capacitors once the input
voltage collapses. It doesn’t need to rely on another
active discharge circuit for discharging output
capacitors. This function will be turned off when the
fault condition is removed.
Hiccup-Mode Output Under-Voltage Protection
The RT5760A/B/C/D includes output under-voltage
protection (UVP) against over-load or short-circuited
condition by constantly monitoring the feedback
voltage VFB. If VFB drops below the under-voltage
protection trip threshold (typically 50% of the internal
feedback reference voltage), the UV comparator will go
high to turn off both the internal high-side and low-side
MOSFET switches. The RT5760A/B/C/D will enter
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Figure 4. Short Circuit Protection and Recovery
Thermal Shutdown
The RT5760A/B/C/D includes an over-temperature
protection (OTP) circuitry to prevent overheating due to
excessive power dissipation. The OTP will shut down
switching operation when junction temperature
exceeds a thermal shutdown threshold (TSD). Once the
junction temperature cools down by a thermal
shutdown hysteresis (TSD), the IC will resume normal
operation with a complete soft-start.
Note that the over temperature protection is intended to
protect the device during momentary overload
conditions. The protection is activated outside of the
absolute maximum range of operation as a secondary
fail-safe and therefore should not be relied upon
operationally. Continuous operation above the
specified absolute maximum operating junction
temperature may impair device reliability or
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RT5760A/B/C/D
permanently damage the device.
Negative Over-Current Limit (RT5760B/D)
The RT5760B/D is the part which is forced to PWM and
allows negative current operation. In case of PWM
operation, high negative current may be generated as
an external power source which is tied to output
terminal unexpectedly. As the risk described above, the
internal circuit monitors negative current in each
on-time interval of low-side MOSFET and compares it
with NOC threshold. Once the negative current
exceeds the NOC threshold, the low-side MOSFET is
turned off immediately, and then the high-side
MOSFET will be turned on to discharge the energy of
output inductor. This behavior can keep the valley of
negative current at NOC threshold to protect low-side
MOSFET. However, the negative current can’t be
limited at NOC threshold anymore since minimum
off-time is reached.
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RT5760A/B/C/D
Absolute Maximum Ratings
(Note 1)
Supply Input Voltage, VIN ---------------------------------------------------------------------------------------0.3V to 6.5V
Switch Voltage, SW -----------------------------------------------------------------------------------------------0.3V to 6.5V
< 50ns ----------------------------------------------------------------------------------------------------------------2.5V to 9V
Other Pins -----------------------------------------------------------------------------------------------------------0.3V to 6.5V
Power Dissipation, PD @ TA = 25C
SOT-563 (FC) ------------------------------------------------------------------------------------------------------1W
Lead Temperature (Soldering, 10 sec.) ----------------------------------------------------------------------260C
Junction Temperature --------------------------------------------------------------------------------------------150C
Storage Temperature Range -----------------------------------------------------------------------------------65C to 150C
ESD Ratings
ESD Susceptibility
(Note 2)
HBM (Human Body Model) -------------------------------------------------------------------------------------2kV
Recommended Operating Conditions
(Note 3)
Supply Input Voltage ---------------------------------------------------------------------------------------------2.5V to 6V
Output Voltage -----------------------------------------------------------------------------------------------------0.6V to VIN
Junction Temperature Range ----------------------------------------------------------------------------------40C to 125C
Thermal Information
(Note 4 and Note 5)
Thermal Parameter
SOT-563 (FC)
Unit
109.4
C/W
JA
Junction-to-ambient thermal resistance (JEDEC
standard)
JC(Top)
Junction-to-case (top) thermal resistance
7.3
C/W
JC(Bottom)
Junction-to-case (bottom) thermal resistance
18.1
C/W
JA(EVB)
Junction-to-ambient thermal resistance (specific EVB)
100
C/W
JC(Top)
Junction-to-top characterization parameter
13
C/W
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RT5760A/B/C/D
Electrical Characteristics
(VIN = 3.6V. TJ = TA = 40C to 125C. Typical value is tested at TA = 25C. The limit over temperature is guaranteed by
characterization, unless otherwise noted.)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
2.5
--
6
V
2.15
2.3
2.47
V
--
300
--
mV
--
0.3
1
µA
--
25
35
--
300
--
--
0.6
--
Supply Voltage
VIN Supply Input Operating
Voltage
VIN
Under-Voltage Lockout Threshold VUVLO
VIN rising
Under-Voltage Lockout Threshold
VUVLO
Hysteresis
Shutdown Current
Quiescent Current (RT5760A/C)
Quiescent Current (RT5760B/D)
ISHDN
VEN = 0V, TA = 25C
IQ
VEN = 2V, VFB = 0.63V
tSS
10%VOUT to 90%VOUT
VEN_H
EN high-level input voltage
0.6
0.82
0.95
VEN_L
EN low-level input voltage
0.5
0.76
0.9
594
600
606
mV
0.1
0
0.1
A
µA
Soft-Start
Soft-Start Time
ms
Enable Voltage
Enable Voltage Threshold
V
Feedback Voltage and Discharge Resistance
Feedback Threshold Voltage
VFB
Feedback Input Current
IFB
VFB = 0.6V, TA = 25°C
Internal MOSFET
High-Side On-Resistance
RDS(ON)_H
--
120
--
Low-Side On-Resistance
RDS(ON)_L
--
80
--
1.85
2.65
--
1.05
1.55
2.05
--
1.5
--
1.76
2.2
2.64
MHz
--
80
--
ns
--
50
--
%
mΩ
Current Limit
High-Side Switch Current Limit
ILIM_H
Low-Side Switch Valley Current
Limit
ILIM_L
Low-Side Switch Negative Valley
Current Limit
ILIM_NL
VIN = 3.6V, VOUT = 1.2V
L = 1H, TA = 25C
A
Switching Frequency
Switching Frequency
f SW
On-Time Timer Control
Minimum Off-Time
tOFF_MIN
Hiccup-Mode Output Under-Voltage Protection
UVP Trip Threshold
VUVP
Hiccup detect
Thermal Shutdown
Thermal Shutdown Threshold
TSD
--
150
--
Thermal Shutdown Hysteresis
TSD
--
30
--
°C
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RT5760A/B/C/D
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Power Good
Power Good High Threshold
VTH_PGLH
VFB rising, PGOOD goes high
--
90
--
%
Power Good High Hysteresis
VTH_PGLH
VFB falling, PGOOD goes low
--
5
--
%
--
60
--
s
--
150
--
Power Good Falling Delay Time
Output Discharge Resistor
Output Discharge Resistor
Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These
are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect
device reliability.
Note 2. Devices are ESD sensitive. Handling precaution is recommended.
Note 3. The device is not guaranteed to function outside its operating conditions.
Note 4. For more information about thermal parameter, see the Application and Definition of Thermal Resistances report,
AN061.
Note 5. θJA(EVB) and ΨJC(TOP) are measured on a high effective-thermal-conductivity four-layer test board which is in size of
70mm x 50mm; furthermore, all layers with 1 oz. Cu. Thermal resistance/parameter values may vary depending on the
PCB material, layout, and test environmental conditions.
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RT5760A/B/C/D
Typical Application Circuit
RT5760A/B/C/D
VIN
3
CIN
10μF
CIN
0.1μF
5
Enable
*PG
6
VPG
VIN
SW
RPG
100k
L
4
VOUT
1μH
EN
CFF
RFB1
GND
2
FB
COUT
10μF
1
RFB2
*PG : RT5760A/B only.
Table 2. Suggested Component Values
VOUT (V)
RFB1 (k)
RFB2 (k)
L (H)
CFF (pF)
3.3
45
10
1
--
1.8
20
10
1
--
1.5
15
10
1
--
1.2
10
10
1
--
1.05
7.5
10
1
--
1
6.65
10
1
--
Table 3. Recommended External Components
Component
Description
CIN
10F, 6.3V, X5R, 0603
0603X106M6R3 (WALSIN)
GRM188R60J106ME84 (MURATA)
*COUT
10F, 6.3V, X5R, 0603
0603X106M6R3 (WALSIN)
GRM188R60J106ME84 (MURATA)
1H
DFE252010F-1R0M (MURATA)
HMLQ25201T-1R0MSR (CYNTEC)
L
Vendor P/N
*COUT : Considering the effective capacitance de-rated with biased voltage level and size, the COUT component
needs satisfy the effective capacitance at least 4F for VOUT = 3.3V and 7F for VOUT 3.3V for stable and
normal operation.
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RT5760A/B/C/D
Typical Operating Characteristic
Efficiency vs. Output Current
Efficiency vs. Output Current
100
100
90
90
80
70
VOUT = 3.3V
60
VOUT = 1.8V
Efficiency (%)
Efficiency (%)
80
VOUT = 1.2V
50
VOUT = 1V
40
30
70
VOUT = 3.3V
60
VOUT = 1.8V
50
VOUT = 1.2V
30
20
20
10
10
RT5760A/C, VIN = 5V
0
0.001
0.01
0.1
0
0.001
1
Efficiency vs. Output Current
100
90
90
Efficiency (%)
Efficiency (%)
VOUT = 1.2V
60
0.1
1
80
VOUT = 1.8V
70
0.01
Efficiency vs. Output Current
100
80
RT5760B/D, VIN = 5V
Output Current (A)
Output Current (A)
VOUT = 1V
50
40
30
20
VOUT = 1.8V
70
VOUT = 1.2V
60
VOUT = 1V
50
40
30
20
10
10
RT5760A/C, VIN = 3.6V
0
0.001
0.01
0.1
0
0.001
1
Output Current (A)
RT5760B/D, VIN = 3.6V
0.01
1.215
1.215
1.210
1.210
Output Voltage (V)
1.220
1.205
1.200
1.195
1.190
1.205
1.200
1.195
1.190
1.185
1.185
RT5760B, VIN = 5V, VOUT = 1.2V
RT5760A, VIN = 5V, VOUT = 1.2V
0.01
0.1
Output Current (A)
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1
Output Voltage vs. Output Current
1.220
1.180
0.001
0.1
Output Current (A)
Output Voltage vs. Output Current
Output Voltage (V)
VOUT = 1V
40
November
2020
1
1.180
0.001
0.01
0.1
1
Output Current (A)
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RT5760A/B/C/D
Current Limit vs. Temperature
2.0
1.215
1.9
1.8
1.210
Current Limit (A)
Output Voltage (V)
Output Voltage vs. Input Voltage
1.220
1.205
1.200
1.195
1.7
1.6
1.5
1.4
1.3
1.190
1.2
1.185
1.1
VOUT = 1.2V, IOUT = 1A
1.180
Low-Side MOSFET, VIN = 3.6V
1.0
2.5
3
3.5
4
4.5
5
5.5
6
-50
-25
0
Current Limit vs. Temperature
75
100
125
Switching Frequency vs. Temperature
Switching Frequency (MHz)1
2.9
2.8
Current Limit (A)
50
2.50
3.0
2.7
2.6
2.5
2.4
2.3
2.2
2.1
2.40
2.30
2.20
2.10
High-Side MOSFET, VIN = 3.6V
VIN = 3.6V, VOUT = 1.2V, IOUT = 1A
2.00
2.0
-50
-25
0
25
50
75
100
-50
125
-25
0
25
50
75
100
125
Temperature (°C)
Temperature (°C)
Shutdown Current vs. Temperature
Quiescent Current vs. Temperature
50
5.00
VIN = 3.6V
45
Quiescent Current (μA)
4.50
Shutdown Current (μA)1
25
Temperature (°C)
Input Voltage (V)
4.00
3.50
3.00
2.50
2.00
1.50
1.00
40
35
30
25
20
15
10
0.50
5
0.00
0
-50
-25
0
25
50
75
100
Temperature (°C)
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125
RT5760A, VIN = 3.6V
-50
-25
0
25
50
75
100
125
Temperature (°C)
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RT5760A/B/C/D
Quiescent Current vs. Temperature
UVLO Threshold vs. Temperature
400
2.5
Rising
2.4
360
UVLO Threshold (V)
Quiescent Current (μA)
380
340
320
300
280
260
240
2.3
2.2
2.1
2.0
Falling
1.9
220
RT5760B, VIN = 3.6V
200
1.8
-50
-25
0
25
50
75
100
125
-50
-25
0
Temperature (°C)
0.9
0.61
Rising
0.7
0.6
50
75
100
125
Reference Voltage vs. Temperature
0.62
Reference Voltage (V)
Enable Threshold (V)
Enable Threshold vs. Temperature
1.0
0.8
25
Temperature (°C)
Falling
0.5
0.60
0.59
0.58
0.57
0.4
0.56
0.3
0.55
VIN = 3.6V, IOUT = 1A
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
Temperature (°C)
Temperature (°C)
Load Transient Response
Load Transient Response
VIN = 3.6V, VOUT = 1.2V, IOUT = 0.5A to 1A
TR = TF = 1s, L = 1H, COUT = 10F x 1
VIN = 3.6V, VOUT = 1.2V, IOUT = 10mA to 1A
TR = TF = 1s, L = 1H, COUT = 10F x 1
VOUT
(50mV/Div)
VOUT
(50mV/Div)
IOUT
(500mA/Div)
IOUT
(500mA/Div)
Time (10s/Div)
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Time (10s/Div)
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RT5760A/B/C/D
Load Transient Response
Load Transient Response
VIN = 5V, VOUT = 1.2V, IOUT = 10mA to 1A
TR = TF = 1s, L = 1H, COUT = 10F x 1
VOUT
(50mV/Div)
VIN = 5V, VOUT = 1.2V, IOUT = 0.5A to 1A
TR = TF = 1s, L = 1H, COUT = 10F x 1
VOUT
(50mV/Div)
IOUT
(500mA/Div)
IOUT
(500mA/Div)
Time (10s/Div)
Time (10s/Div)
Output Ripple Voltage
Output Ripple Voltage
VIN = 3.6V, VOUT = 1.2V, IOUT = 1A
VIN = 3.6V, VOUT = 1.2V, IOUT = 10mA
VOUT
(10mV/Div)
VOUT
(10mV/Div)
VSW
(3V/Div)
VSW
(3V/Div)
Time (5s/Div)
Time (200ns/Div)
Output Ripple Voltage
Output Ripple Voltage
VIN = 5V, VOUT = 1.2V, IOUT = 1A
VIN = 5V, VOUT = 1.2V, IOUT = 10mA
VOUT
(10mV/Div)
VOUT
(10mV/Div)
VSW
(3V/Div)
VSW
(3V/Div)
Time (5s/Div)
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Time (200ns/Div)
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RT5760A/B/C/D
Power On from EN
Power Off from EN
VOUT
(500mV/Div)
VOUT
(500mV/Div
VSW
(5V/Div)
VSW
(5V/Div)
VEN
(2V/Div)
VEN
(2V/Div)
VPG
(1V/Div)
VPG
(1V/Div)
VIN = 3.6V, VOUT = 1.2V, IOUT = 1A
VIN = 3.6V, VOUT = 1.2V, IOUT = 1A
Time (10s/Div)
Time (500s/Div)
Power On from VIN
Power Off from VIN
VOUT
(500mV/Div)
VOUT
(500mV/Div)
VSW
(5V/Div)
VSW
(5V/Div)
VIN
(2V/Div)
VIN
(2V/Div)
VPG
(1V/Div)
VPG
(1V/Div)
VIN = 3.6V, VOUT = 1.2V, IOUT = 1A
VIN = 3.6V, VOUT = 1.2V, IOUT = 1A
Time (500s/Div)
Time (200s/Div)
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RT5760A/B/C/D
Application Information
The output stage of a synchronous buck converter is
composed of an inductor and capacitor, which stores
and delivers energy to the load, and forms a
second-order low-pass filter to smooth out the switch
node voltage to maintain a regulated output voltage.
Inductor Selection
The inductor selection trade-offs among size, cost,
efficiency, and transient response requirements.
Generally, three key inductor parameters are specified
for operation with the device: inductance value (L),
inductor saturation current (ISAT), and DC resistance
(DCR).
A good compromise between size and loss is to choose
the peak-to-peak ripple current equals to 20% to 50%
of the IC rated current. The switching frequency, input
voltage, output voltage, and selected inductor ripple
current determines the inductor value as follows :
L=
VOUT VIN VOUT
VIN fSW IL
Once an inductor value is chosen, the ripple current
(IL) is calculated to determine the required peak
inductor current.
IL =
VOUT VIN VOUT
I
and IL(PEAK) = IOUT(MAX) L
VIN fSW L
2
IL(PEAK) should not exceed the minimum value of IC's
calculated inductance value is :
L
1.2 5 1.2
1μH
5 2.2MHz 0.4A
For the typical application, a standard inductance value
of 1H can be selected.
IL =
1.2 5 1.2
= 0.41A (41% of the IC rated current)
5 2.2MHz 1μH
and IL(PEAK) = 1A + 0.41A = 1.205A
2
For the 1H value, the inductor's saturation and
thermal rating should exceed at least 1.205A. For more
conservative, the rating for inductor saturation current
must be equal to or greater than switch current limit of
the device rather than the inductor peak current.
For EMI sensitive application, choosing shielding type
inductor is preferred.
Input Capacitor Selection
Input capacitance, CIN, is needed to filter the pulsating
current at the drain of the high-side power MOSFET.
CIN should be sized to do this without causing a large
variation in input voltage. The waveform of CIN ripple
voltage and ripple current are shown in Figure 5. The
peak-to-peak voltage ripple on input capacitor can be
estimated as equation below :
through the inductor is the inductor ripple current plus
VCIN = D IOUT 1 D + IOUT ESR
CIN fSW
the output current. During power up, faults or transient
Where
upper current limit level. Besides, the current flowing
load conditions, the inductor current can increase above
the calculated peak inductor current level calculated
above. In transient conditions, the inductor current can
increase up to the switch current limit of the device. For
this reason, the most conservative approach is to
specify an inductor with a saturation current rating equal
to or greater than the switch current limit rather than the
peak inductor current.
Considering the Typical Application Circuit for 1.2V
output at 1A and an input voltage of 5V, using an
inductor ripple of 0.4A (40% of the IC rated current), the
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D=
VOUT
VIN
For ceramic capacitors, the equivalent series
resistance (ESR) is very low, the ripple which is caused
by ESR can be ignored, and the minimum input
capacitance can be estimated as equation below :
CIN_MIN = IOUT_MAX
D 1 D
VCIN_MAX fSW
Where VCIN_MAX 100mV
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RT5760A/B/C/D
capacitor should be 0402 or 0603 in size.
VCIN
CIN Ripple Voltage
VESR = IOUT x ESR
(1-D) x IOUT
CIN Ripple Current
D x IOUT
D x tSW (1-D) x tSW
Figure 5. CIN Ripple Voltage and Ripple Current
In addition, the input capacitor needs to have a very
low ESR and must be rated to handle the worst-case
RMS input current of :
IRMS IOUT_MAX
VOUT
VIN
1
VIN
VOUT
It is commonly to use the worse IRMS IOUT/2 at VIN =
2VOUT for design. Note that ripple current ratings from
capacitor manufacturers are often based on only 2000
hours of life which makes it advisable to further de-rate
the capacitor, or choose a capacitor rated at a higher
temperature than required.
Several capacitors may also be paralleled to meet size,
height and thermal requirements in the design. For low
input voltage applications, sufficient bulk input
capacitance is needed to minimize transient effects
during output load changes.
Ceramic capacitors are ideal for switching regulator
applications due to its small, robust and very low ESR.
However, care must be taken when these capacitors
are used at the input. A ceramic input capacitor
combined with trace or cable inductance forms a high
quality (under damped) tank circuit. If the
RT5760A/B/C/D circuit is plugged into a live supply, the
input voltage can ring to twice its nominal value,
possibly exceeding the device’s rating. This situation is
easily avoided by placing the low ESR ceramic input
capacitor in parallel with a bulk capacitor with higher
ESR to damp the voltage ringing.
The input capacitor should be placed as close as
possible to the VIN pins, with a low inductance
connection to the GND of the IC. In addition to a larger
bulk capacitor, a small ceramic capacitors of 0.1F
should be placed close to the VIN and GND pin. This
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2020
Output Capacitor Selection
The RT5760A/B/C/D are optimized for ceramic output
capacitors and best performance will be obtained using
them. The total output capacitance value is usually
determined by the desired output voltage ripple level and
transient response requirements for sag (undershoot on
load apply) and soar (overshoot on load release).
Output Ripple
The output voltage ripple at the switching frequency is
a function of the inductor current ripple going through
the output capacitor’s impedance. To derive the output
voltage ripple, the output capacitor with capacitance,
COUT, and its equivalent series resistance, RESR, must
be taken into consideration. The output peak-to-peak
ripple voltage VRIPPLE, caused by the inductor current
ripple IL, is characterized by two components, which
are ESR ripple VRIPPLE(ESR) and capacitive ripple
VRIPPLE(C), can be expressed as below :
VRIPPLE = VRIPPLE(ESR) VRIPPLE(C)
VRIPPLE(ESR) = IL RESR
VRIPPLE(C) =
IL
8 COUT fSW
If ceramic capacitors are used as the output capacitors,
both the components need to be considered due to the
extremely low ESR and relatively small capacitance.
For the RT5760A/B/C/D’s Typical Application Circuit for
output voltage of 1.2V, and actual inductor current
ripple (IL) of 0.41A, taking a 10F ceramic capacitors
of GRM188R60J106ME84 from Murata as example,
the output ripple of the output capacitor is as below :
The ripple caused by the ESR of about 5m can be
calculated as
VRIPPLEESR = 0.41A 5m = 2.05mV
Due to DC bias capacitance degrading, the effective
capacitance at output voltage of 1.2V is about 8F
0.41A
= 2.91mV
8 8μF 2.2MHz
= 2.05mV + 2.91mV = 4.96mV
VRIPPLE C =
VRIPPLE
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RT5760A/B/C/D
Output Transient Undershoot and Overshoot
In addition to voltage ripple at the switching frequency,
the output capacitor and its ESR also affect the voltage
sag (undershoot) and soar (overshoot) when the load
steps up and down abruptly. The ACOT® transient
response is very quick and output transients are
usually small. The following section shows how to
calculate the worst-case voltage swings in response to
load step, the output capacitor value, the inductor value
and the output voltage :
VSOAR =
L (IOUT )2
2 COUT VOUT
Due to some modern digital loads can exhibit nearly
instantaneous load changes, the amplitude of the ESR
step up or down should be taken into consideration.
very fast load steps.
Output Voltage Setting
The output voltage transient undershoot and overshoot
each have two components : the voltage steps caused
by the output capacitor's ESR, and the voltage sag and
soar due to the finite output capacitance and the
inductor current slew rate. Use the following formulas
to check if the ESR is low enough (typically not a
problem with ceramic capacitors) and the output
capacitance is large enough to prevent excessive sag
and soar on very fast load step edges, with the chosen
Set the desired output voltage using a resistive divider
from the output to ground with the midpoint connected
to FB, as shown in Figure 6. The output voltage is set
according to the following equation :
inductor value.
VOUT = 0.6V x (1 + RFB1 / RFB2)
VOUT
RFB1
FB
RT5760A/B/C/D
The amplitude of the ESR step up or down is a function
of the load step and the ESR of the output capacitor :
VESR _STEP = IOUT x RESR
RFB2
GND
Figure 6. Output Voltage Setting
The amplitude of the capacitive sag is a function of the
load step, the output capacitor value, the inductor value,
Place the FB resistors within 5mm of the FB pin. For
the input-to-output voltage differential, and the
maximum duty cycle. The maximum duty cycle during a
or better tolerance.
fast transient is a function of the on-time and the
minimum off-time since the ACOT® control scheme will
ramp the current using on-times spaced apart with
minimum off-times, which is as fast as allowed.
Calculate the approximate on-time (neglecting
parasites) and maximum duty cycle for a given input
and output voltage as :
tON =
VOUT
tON
and DMAX =
VIN fSW
tON tOFF_MIN
The actual on-time will be slightly longer as the IC
compensates for voltage drops in the circuit, but we
can neglect both of these since the on-time increase
compensates for the voltage losses. Calculate the
output voltage sag as :
VSAG =
L (IOUT )2
2 COUT VIN(MIN) DMAX VOUT
The amplitude of the capacitive soar is a function of the
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output voltage accuracy, use divider resistors with 1%
EN Pin for Start-Up and Shutdown Operation
For automatic start-up, the EN pin can be connected to
the input supply VIN directly. The large built-in
hysteresis band makes the EN pin useful for simple
delay and timing circuits. The EN pin can be externally
connected to VIN by adding a resistor REN and a
capacitor CEN, as shown in Figure 7, to have an
additional delay. The time delay can be calculated with
the EN's internal threshold, at which switching
operation begins (typically 0.82V).
An external MOSFET can be added for the EN pin to
be logic-controlled, as shown in Figure 8. In this case, a
pull-up resistor, REN, is connected between VIN and
the EN pin. The MOSFET Q1 will be under logic control
to pull down the EN pin. To prevent the device being
enabled when VIN is smaller than the VOUT target
level or some other desired voltage level, a resistive
divider (REN1 and REN2) can be used to externally set
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RT5760A/B/C/D
the input under-voltage lockout threshold, as shown in
Figure 9.
VIN
REN
junction-to-ambient thermal resistance.
RT5760A/B/C/D
For continuous operation, the maximum operating
junction temperature indicated under Recommended
Operating Conditions is 125C. The junction-to-ambient
GND
Figure 7. Enable Timing Control
REN
EN
RT5760A/B/C/D
Q1
Enable
Figure 8. Logic Control for the EN Pin
REN1
EN
REN2
thermal resistance, JA, is highly package dependent.
For a SOT-563 (FC) package, the thermal resistance,
JA, is 100C/W on a high effective-thermal-conductivity
four-layer test board. The maximum power dissipation at
TA = 25C can be calculated as below :
PD(MAX) = (125C 25C) / (100C/W) = 1W for a
GND
VIN
where TJ(MAX) is the maximum junction temperature, TA
is the ambient temperature, and JA is the
EN
CEN
VIN
PD(MAX) = (TJ(MAX) TA) / JA
RT5760A/B/C/D
GND
SOT-563 (FC) package.
The maximum power dissipation depends on the
operating ambient temperature for the fixed TJ(MAX) and
the thermal resistance, JA. The derating curves in
Figure 10 allows the designer to see the effect of rising
ambient temperature on the maximum power
dissipation.
Maximum Power Dissipation (W)1
1.6
Figure 9. Resistive Divider for Under-Voltage Lockout
Threshold Setting
Power-Good Output
The PGOOD pin is an open-drain power-good
indication output and is to be connected to an external
voltage source through a pull-up resistor.
The external voltage source can be an external voltage
supply below 6V, VCC or the output of the
RT5760A/B/C/D if the output voltage is regulated under
1.0
0.8
0.6
0.4
0.2
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 10. Derating Curve of Maximum Power
Thermal Considerations
Dissipation
The junction temperature should never exceed the
absolute maximum junction temperature TJ(MAX), listed
under Absolute Maximum Ratings, to avoid permanent
damage to the device. The maximum allowable power
dissipation depends on the thermal resistance of the IC
package, the PCB layout, the rate of surrounding airflow,
and the difference between the junction and ambient
temperatures. The maximum power dissipation can be
calculated using the following formula :
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1.2
0.0
6V. It is recommended to connect a 100k between
external voltage source to PGOOD pin.
DS5760A/B/C/D-04
Four-Layer PCB
1.4
2020
Layout Considerations
Follow the PCB layout
performance of the device.
guidelines
for
optimal
Keep the high-current paths short, especially at the
ground terminals. This practice is essential for stable,
jitter-free operation. The high current path
comprising of input capacitor, high-side FET,
inductor, and the output capacitor should be as short
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RT5760A/B/C/D
as possible. This practice is essential for high
efficiency.
Place the input MLCC capacitors as close to the VIN
and GND pins as possible. The major MLCC
capacitors should be placed on the same layer as
the RT5760A/B/C/D.
SW node is with high frequency voltage swing and
should be kept at small area. Keep analog
components away from the SW node to prevent
stray capacitive noise pickup.
Connect feedback network behind the output
capacitors. Place the feedback components next to
the FB pin.
For better thermal performance, to design a wide
and thick plane for GND pin or to add a lot of vias to
GND plane.
An example of PCB layout guide is shown from Figure
11.
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RT5760A/B/C/D
GND
VOUT
The VIN trace should have enough
width, and use several vias to
shunt the high input current.
COUT
Connect feedback network
behind the output.
GND
CIN1
L
Keep analog components
away from the SW node to
prevent stray capacitive noise
pickup.
Place the input MLCC capacitors as
close to the VIN and GND pins as
possible.
CIN2
3
2
1
EN
FB GND VIN
4
5
6
PG
EN SW
REN
Add extra vias for thermal dissipation
RFB2
CFF
RFB1
RPG
GND
Place the feedback components
next to the FB pin.
GND
VOUT
Figure 11. Layout Guide
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RT5760A/B/C/D
Outline Dimension
Dimensions In Millimeters
Symbol
Dimensions In Inches
Min
Max
Min
Max
A
0.500
0.600
0.020
0.024
A1
0.000
0.050
0.000
0.002
A3
0.080
0.180
0.003
0.007
b
0.150
0.300
0.006
0.012
D
1.500
1.700
0.059
0.067
E
1.500
1.700
0.059
0.067
E1
1.100
1.300
0.043
0.051
e
0.500
0.020
L
0.100
0.300
0.004
0.012
L1
0.200
0.400
0.008
0.016
SOT-563 (FC) Surface Mount Package
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2020
RT5760A/B/C/D
Footprint Information
Package
Footprint Dimension (mm)
Number of
SOT-563(FC)
Tolerance
Pin
P1
A
B
C
D
M
6
0.50
2.42
1.02
0.70
0.30
1.30
±0.10
Richtek Technology Corporation
14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that
such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product.
Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any
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