RT6150BGQW

® RT6150A/B Current Mode Buck-Boost Converter General Description Features The RT6150A/B is a high efficiency, fixed frequency, BuckBoost DC/DC converter that operates from input voltages above, below or equal to the output voltage. The topology incorporated in the IC provides a continuous transfer function through all operating modes, making the product ideal for single lithium-ion, multi-cell alkaline or Ni-MH battery applications where the output voltage is within the battery voltage range.  Single Inductor  Fixed Frequency Operation with Battery Voltages Synchronous Rectification : Up to 90% Efficiency Up to 800mA Continuous Output Current VOUT Disconnected from VIN during Shutdown Power Save Mode (PSM) Enable Control VOUT   VIN(MAX)  VOUT  f  IL  VIN(MAX) L2 > VIN(MIN)   VOUT  VIN(MIN)  f  IL  VOUT (H) (H) where f is the minimum switching frequency. L1 is the minimum inductor value for Buck mode operation. VIN(MAX) is the maximum input voltage. L2 is the minimum inductance, for Boost mode operation. VIN(MIN) is the minimum input voltage. The recommended minimum inductor value is either L1 or L2 whichever is higher. For example, a suitable inductor value is 2.2μH for generating a 3.3V output voltage from a Li-Ion battery with the range from 2.5V to 4.2V. The recommended inductor value range is between 1.5μH and 4.7μH. In general, a higher inductor value offers better performance in high voltage conversion condition. Input Capacitor Selection At least a 10μF input capacitor is recommended to improve transient behavior of the regulator and EMI behavior of the total power supply circuit. A ceramic capacitor placed as close as possible to the VIN and GND pins of the IC is recommended. Output Capacitor Selection The output capacitor selection determines the output voltage ripple and transient response. It is recommended to use ceramic capacitors placed as close as possible to the VOUT and GND pins of the IC. If, for any reason, the application requires the use of large capacitors which can not be placed close to the IC, using a small ceramic capacitor in parallel to the large one is recommended. This small capacitor should be placed as close as possible to the VOUT and GND pins of the IC. The output voltage ripple for a given output capacitor is expressed as follows : VOUT , peak (Buck) = VOUT  (VIN  VOUT ) VIN  8  L  (fOSC )2  COUT I  (VOUT  VIN ) VOUT , peak (Boost) = LOAD COUT  VOUT  fOSC Copyright © 2015 Richtek Technology Corporation. All rights reserved. www.richtek.com 10 If the RT6150A/B operates in Buck mode, the worst-case voltage ripple occurs at the highest input voltage. When the RT6150A/B operates in boost mode, the worst-case voltage ripple occurs at the lowest input voltage. The maximum voltage of overshoot or undershoot, is inversely proportional to the value of the output capacitor. To ensure stability and excellent transient response, it is recommended to use a minimum of 10μF/X7R/1206 capacitors at the output. For surface mount applications, Taiyo Yuden or TDK ceramic capacitors, X7R series Multilayer Ceramic Capacitor is recommended. A capacitor with a value in the range of the calculated minimum should be used. This is required to maintain control loop stability. There are no additional requirements regarding minimum ESR. Low ESR capacitors should be used to minimize output voltage ripple. Larger capacitors will cause lower output voltage ripple as well as lower output voltage drop during load transients. Thermal Considerations For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : PD(MAX) = (TJ(MAX) − TA) / θJA where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction to ambient thermal resistance. For recommended operating condition specifications, the maximum junction temperature is 125°C. The junction to ambient thermal resistance, θJA, is layout dependent. For WDFN-10L 3x3 package, the thermal resistance, θJA, is 30.5°C/W on a standard JEDEC 51-7 four-layer thermal test board. For WDFN-10L 2.5x2.5 package, the thermal resistance, θJA, is 40.9°C/W on a standard JEDEC 51-7 four-layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by the following formula : is a registered trademark of Richtek Technology Corporation. DS6150A/B-05 July 2015 RT6150A/B PD(MAX) = (125°C − 25°C) / (30.5°C/W) = 3.28W for WDFN-10L 3x3 package Layout Considerations For the best performance of the RT6150A/B, the following PCB layout guidelines must be strictly followed. PD(MAX) = (125°C − 25°C) / (40.9°C/W) = 2.44W for WDFN-10L 2.5x2.5 package The maximum power dissipation depends on the operating ambient temperature for fixed T J(MAX) and thermal resistance, θJA. The derating curve in Figure 1 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. Maximum Power Dissipation (W)1 3.5  Place the input and output capacitors as close as possible to the input and output pins respectively for good filtering.  Keep the main power traces as wide and short as possible.  The switching node area connected to LX and inductor should be minimized for lower EMI.  Place the feedback components as close as possible to the FB pin and keep these components away from the noisy devices.  Connect the GND and Exposed Pad to a strong ground plane for maximum thermal dissipation and noise protection.  Directly connect the output capacitors to the feedback network to avoid bouncing caused by parasitic resistance and inductance from the PCB trace. Four-Layer PCB WDFN-10L 3x3 3.0 2.5 2.0 WDFN-10L 2.5x2.5 1.5 1.0 0.5 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Figure 1. Derating Curve of Maximum Power Dissipation VOUT GND R1 Input/Output capacitors must be placed as close as possible to the Input/Output pin. L VOUT 1 LX2 GND 2 LX1 VIN 4 3 5 GND COUT 10 FB 9 GND VINA 8 7 11 6 R2 VIN The feedback divider should be placed as close as possible to the FB pin. PS EN CIN GND LX should be connected to inductor by wide and short trace. Keep sensitive components away from this trace. Figure 2. PCB Layout Guide Copyright © 2015 Richtek Technology Corporation. All rights reserved. DS6150A/B-05 July 2015 is a registered trademark of Richtek Technology Corporation. www.richtek.com 11 RT6150A/B Outline Dimension D2 D L E E2 1 e SEE DETAIL A b 2 1 2 1 A A1 A3 DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.180 0.300 0.007 0.012 D 2.950 3.050 0.116 0.120 D2 2.300 2.650 0.091 0.104 E 2.950 3.050 0.116 0.120 E2 1.500 1.750 0.059 0.069 e L 0.500 0.350 0.020 0.450 0.014 0.018 W-Type 10L DFN 3x3 Package Copyright © 2015 Richtek Technology Corporation. All rights reserved. www.richtek.com 12 is a registered trademark of Richtek Technology Corporation. DS6150A/B-05 July 2015 RT6150A/B 2 1 2 1 DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Symbol Dimensions In Millimeters Dimensions In Inches Min. Max. Min. Max. A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.200 0.300 0.008 0.012 D 2.400 2.600 0.094 0.102 D2 1.950 2.050 0.077 0.081 E 2.400 2.600 0.094 0.102 E2 1.150 1.250 0.045 0.049 e L 0.500 0.350 0.020 0.450 0.014 0.018 W-Type 10L DFN 2.5x2.5 Package Richtek Technology Corporation 14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. DS6150A/B-05 July 2015 www.richtek.com 13