RT6217BHGJ8F

® RT6217A/B 24V, 3A, 500kHz, ACOTTM Step-Down Converter in 8 Pin TSOT-23 General Description Features The RT6217A/B is a simple, easy-to-use, 3A synchronous step-down DC-DC converter with an input supply voltage range of 4.5V to 24V. The device build-in an accurate 0.791V reference voltage and integrates low RDS(ON) power  MOSFETs to achieve high efficiency in a TSOT-23-8 (FC) package.  The RT6217A/B adopts Advanced Constant On-Time (ACOTTM) control architecture to provide an ultrafast transient response with few external components and to operate in nearly constant switching frequency over the line, load, and output voltage range. The RT6217A operates in automatic PSM that maintains high efficiency during light load operation. The RT6217B operates in Forced PWM that helps meet tight voltage regulation accuracy requirements. The RT6217A/B senses both FETs current for a robust over-current protection. It features cycle-by-cycle current limit protection and prevent the device from the catastrophic damage in output short circuit, over current or inductor saturation. An externally adjustable soft-start function prevents inrush current during start-up. The device also includes input under-voltage lockout, output under-voltage protection, and over-temperature protection (thermal shutdown) to provide safe and smooth operation in all operating conditions. The RT6217A/B is offered in a TSOT23-8(FC) package.                   Ω/40mΩ Ω Low RDS(ON) 3A Converter With Built-in 85mΩ Power FETs Input Supply Voltage Range : 4.5V to 24V Output Voltage Range : 0.791V to 6V Advanced Constant On-Time (ACOTTM) Control Ultrafast Transient Response No Needs For External Compensations Optimized for Low-ESR Ceramic Output Capacitors 0.791V ±1.5% High-Accuracy Feedback Reference Voltage Low Quiescent Current (150μ μA typ.) Both HS/LS FETs Protection for Robust Over-Current Protection Optional for Operation Modes :  Power Saving Mode (PSM) at Light Load (RT6217A)  Forced PWM Mode (RT6217B) Light-load VOUT Ripple Reduction Technology in PSM Fixed Switching Frequency : 500kHz Externally Adjustable Soft-Start Monotonic Start-up for Pre-biased Output Input Under-Voltage Lockout (UVLO) Output Under-Voltage Protection (UVP) with Hiccup Mode Power Good Indication Enable Control Available In TSOT-23-8 (FC) Package Simplified Application Circuit RT6217A/B VIN VIN BOOT EN SW CIN Enable SS Copyright © 2018 Richtek Technology Corporation. All rights reserved. DS6217A/B-00 January 2018 VOUT R1 PGOOD CSS CBOOT L RPGOOD VPGOOD R3 CFF COUT FB GND R2 is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT6217A/B Ordering Information Marking Information RT6217A/B RT6217AHGJ8F Package Type J8F : TSOT-23-8 (FC) 0U= : Product Code 0U=DNN DNN : Date Code Lead Plating System G : Green (Halogen Free and Pb Free) RT6217BHGJ8F 0T= : Product Code UVP Option H : Hiccup 0T=DNN PSM/PWM A : PSM/PWM B : Forced PWM DNN : Date Code Pin Configuration Note : BOOT 8 7 6 5 2 3 4 GND Suitable for use in SnPb or Pb-free soldering processes. EN  SW RoHS compliant and compatible with the current require- SS  FB (TOP VIEW) Richtek products are : ments of IPC/JEDEC J-STD-020.     Set Top Box Portable TV Access Point Router DSL Modem LCD TV VIN  PGOOD Applications TSOT-23-8 (FC) Functional Pin Description Pin No. Pin Name Pin Function 1 PGOOD Open-drain power-good indication output. Once being started-up, PGOOD will be pulled low to GND if any internal protection is triggered. 2 VIN Power input. The input voltage range is from 4.5V to 24V. Connect a suitable input capacitor between this pin and GND, with a typical capacitance of 22F. 3 SW Switch node between the internal switch and the synchronous rectifier. Connect this pin to the inductor and bootstrap capacitor. 4 GND Power ground. 5 BOOT Bootstrap capacitor connection node to supply the high-side gate driver. Connect a 0.1F ceramic capacitor between this pin and SW pin. 6 EN 7 SS 8 FB Enable control input. A logic-high enables the converter; a logic-low forces the device into shutdown mode. Soft-start capacitor connection node. Connect an external capacitor between this pin and ground to set the soft-start time. Do not leave this pin unconnected. A capacitor of 2.8nF to 100nF is suggested. Feedback voltage input. Connect this pin to the midpoint of the external feedback resistive divider to set the output voltage of the converter to the desired regulation level. The device regulates the FB voltage at Feedback Threshold Voltage, typically 0.791V. Copyright © 2018 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 is a registered trademark of Richtek Technology Corporation. DS6217A/B-00 January 2018 RT6217A/B Functional Block Diagram PGOOD VIN BOOT VIN VCC Minoff Reg VCC UGATE OC VIBIAS SS SoftStart Control SW VREF LGATE UV SW Control Driver Ripple Gen. GND GND SW EN + + Comparator FB EN VIN On Time SW Operation The RT6217A/B is a high-efficiency, synchronous stepdown DC-DC converter that can deliver up to 3A output current from a 4.5V to 24V input supply. The RT6217A/B adopts ACOTTM control mode, which can reduce the output capacitance and provide ultrafast transient responses, and allow minimal components sizes without any additional external compensation network. Enable Control The RT6217A/B provides an EN pin, as an external chip enable control, to enable or disable the device. If VEN is held below a logic-low threshold voltage (VENH − ΔVEN) of the enable input (EN), the converter will enter into shutdown mode, that is, the converter is disabled and switching is inhibited even if the VIN voltage is above VIN under-voltage lockout threshold (VUVLO). During shutdown mode, the supply current can be reduced to ISHDN (10μA or below). If the EN voltage rises above the logic-high threshold voltage (VENH) while the VIN voltage is higher than UVLO threshold (VUVLO), the device will be turned on, that is, switching being enabled and soft-start sequence being initiated. Copyright © 2018 Richtek Technology Corporation. All rights reserved. DS6217A/B-00 January 2018 Input Under-Voltage Lockout In addition to the EN pin, the RT6217A/B also provides enable control through the VIN pin. It features an undervoltage lockout (UVLO) function that monitors the internal linear regulator (VCC). If VEN rises above VENH first, switching will still be inhibited until the VIN voltage rises above VUVLO. It is to ensure that the internal regulator is ready so that operation with not- fully-enhanced internal MOSFET switches can be prevented. After the device is powered up, if the input voltage VIN goes below the UVLOfalling threshold voltage (VUVLO − ΔVUVLO), this switching will be inhibited; if VIN rises above the UVLO-rising threshold (VUVLO), the device will resume switching. Low-Side Current Limit Protection The RT6217A/B features cycle-by-cycle valley-type current limit protection, measuring the inductor current through the synchronous rectifier (low-side switch). The inductor current level is determined by measuring the lowside switch voltage between the SW pin and GND, which is proportional to the switch current, during the low-side on-time. For greater accuracy, temperature compensation is added to the voltage sensing. Once the current rises above the low-side switch valley current limit (ILIM_L), the is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT6217A/B on-time one-shot will be inhibited until the inductor current ramps down to the current limit level (ILIM_L), that is, another on-time can only be triggered when the inductor current goes below the low-side current limit. This function can prevent the average output current from greatly exceeding the guaranteed low-side current limit value. If the output load current exceeds the available inductor current (clamped by the above-mentioned low-side current limit), the output capacitor needs to supply the extra current such that the output voltage will begin to drop. If it drops below the output under-voltage protection trip threshold, the IC will stop switching to avoid excessive heat. Output Under-Voltage Protection The RT6217A/B includes output under-voltage protection (UVP) against over-load or short-circuited condition by constantly monitoring the feedback voltage VFB. If VFB drops below the under-voltage protection trip threshold (typically 50% of the internal reference voltage), the UV comparator will go high to turn off both the internal highside and low-side MOSFET switches. Hiccup Mode If the output under-voltage condition continues for a period of time, the RT6217A/B will enter output under-voltage protection with hiccup mode. When the protection function is triggered, the device will shut down for a period of time and then attempt to recover automatically by initiating a new soft-start sequence. Once the soft-start ends, the fault condition will determine the IC's operation. If the fault condition is removed, the converter will resume normal operation; otherwise, the cycle will be repeated until this fault condition is cleared. Hiccup mode allows the circuit to operate safely with low input current and power dissipation, and then resume normal operation as soon as the over-load or short-circuit condition is removed. Soft-Start (SS) The soft-start function is used to prevent large inrush currents while the converter is being powered up. The RT6217A/B provides an SS pin so that the soft-start time can be programmed by selecting the value of the external soft-start capacitor CSS connected from the SS pin to GND. Copyright © 2018 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 During the start-up sequence, the soft-start capacitor is charged by an internal current source ISS (typically, 4μA) to generate a soft-start ramp voltage as a reference voltage to the PWM comparator. If the output is for some reasons pre-biased to a certain voltage during start-up, the device will initially the switching of both high-side and low-side switches. And only when this ramp voltage is greater than the feedback voltage VFB, the switching will be resumed. The output voltage can then ramp up smoothly to its targeted regulation voltage, and the converter can have a monotonic smooth start-up. For soft-start control, the SS pin should never be left unconnected. Power Good Indication The RT6217A/B provides a power-good (PGOOD) opendrain output pin. It is to be connected to an external voltage source through a pull-up resistor. The power-good function is activated after soft-start is finished and is controlled by a comparator connected to the feedback signal VFB. If VFB raises above a power-good threshold (VTH_PGLH) (typically 95% of the target value), the PGOOD pin will be in high impedance and VPGOOD will be held high after a certain delay elapsed. When VFB drops by a power-good hysteresis (ΔVTH_PGLH) (typically 5% of the target value) or exceeds VTH_PGHL (typically 115% of the target value), the PGOOD pin will be pulled low. For VFB above VTH_PGHL, VPGOOD will be pulled high again when VFB drops back by a power-good hysteresis (ΔVTH_PGHL) (typically 5% of the target value). Once being started-up, if any internal protection is triggered, PGOOD will be pulled low to GND. External Bootstrap Capacitor Connect a 0.1μF low-ESR ceramic capacitor between the BOOT and SW pins. This bootstrap capacitor supplies for the gate driver of the high-side N-channel MOSFET switch. Over-Temperature Protection (Thermal Shutdown) The RT6217A/B includes an over-temperature protection (OTP) circuitry to prevent overheating due to excessive power dissipation. The OTP will shut down switching operation when junction temperature exceeds a thermal shutdown threshold TSD. Once the junction temperature cools down by a thermal shutdown hysteresis (ΔTSD), the IC will resume normal operation with a complete soft-start. is a registered trademark of Richtek Technology Corporation. DS6217A/B-00 January 2018 RT6217A/B Absolute Maximum Ratings (Note 1) Supply Input Voltage, VIN ------------------------------------------------------------------------------------------- −0.3V to 28V Enable Pin Voltage, EN ---------------------------------------------------------------------------------------------- −0.3V to 28V  Switch Voltage, SW --------------------------------------------------------------------------------------------------- −0.3V to 28V SW (t ≤ 10ns) ---------------------------------------------------------------------------------------------------------- −5V to 30V  BOOT to SW, VBOOT − VSW ----------------------------------------------------------------------------------------- −0.3V to 6V  BOOT Voltage ---------------------------------------------------------------------------------------------------------- −0.3V to 34V  Other Pins --------------------------------------------------------------------------------------------------------------- −0.3V to 6V  Power Dissipation, PD @ TA = 25°C TSOT-23-8 (FC) -------------------------------------------------------------------------------------------------------- 1.428W  Package Thermal Resistance (Note 2) TSOT-23-8 (FC), θJA --------------------------------------------------------------------------------------------------- 70°C/W TSOT-23-8 (FC), θJC -------------------------------------------------------------------------------------------------- 15°C/W  Junction Temperature ------------------------------------------------------------------------------------------------- 150°C  Lead Temperature (Soldering, 10 sec.) --------------------------------------------------------------------------- 260°C  Storage Temperature Range ----------------------------------------------------------------------------------------- −65°C to 150°C  ESD Susceptibility (Note 3) HBM (Human Body Model) ----------------------------------------------------------------------------------------- 2kV   Recommended Operating Conditions    (Note 4) Supply Input Voltage -------------------------------------------------------------------------------------------------- 4.5V to 24V Junction Temperature Range ---------------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range ---------------------------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics (VIN = 12V, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit 4.5 -- 24 V 3.7 3.9 4.1 V -- 350 -- mV Supply Voltage VIN Supply Input Operating Voltage VIN VIN Under-Voltage Lockout Threshold VUVLO VIN Under-Voltage Lockout Threshold-Hysteresis VUVLO VIN Rising Supply Current Shutdown Current ISHDN VEN = 0V -- -- 10 A Quiescent Current IQ VEN = 2V, VFB = 1V, VSS = 0V (not switching) -- 150 250 A -- 4 -- A Soft-Start Soft-Start Current ISS Enable Voltage EN Rising Threshold VENH 1.2 1.4 1.6 V EN Hysteresis VEN 80 150 220 mV Copyright © 2018 Richtek Technology Corporation. All rights reserved. DS6217A/B-00 January 2018 is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT6217A/B Parameter Symbol Test Conditions Min Typ Max Unit 779 791 803 mV -- 85 -- m -- 40 -- m Low-Side Switch Valley Current Limit ILIM_L 3.3 4.2 4.9 A High-Side Switch Peak Current Limit ILIM_H -- 5.5 -- A f SW -- 500 -- kHz Maximum Duty Cycle DMAX -- 90 -- % Minimum On-Time tON_MIN -- 60 -- ns Thermal Shutdown Threshold TSD -- 160 -- C Thermal Shutdown Hysteresis TSD -- 25 -- C UVP detect -- 50 -- % Hysteresis -- 10 -- % Feedback Voltage Feedback Threshold Voltage VTH_FB Internal MOSFET High-Side Switch On-Resistance RDS(ON)_H Low-Side Switch On-Resistance RDS(ON)_L VBOOTVSW = 4.8V Current Limit Switching Frequency Switching Frequency On-Time Timer Control Thermal Shutdown Output Under Voltage Protections UVP Trip Threshold Power Good Power-Good High Threshold VTH_PGLH VFB rising. PGOOD goes High. -- 95 -- % Power-Good High Hysteresis VTH_PGLH VFB falling. PGOOD goes Low. -- 5 -- % Power-Good Low Threshold VTH_PGHL -- 115 -- % Power-Good Low Hysteresis VTH_PGHL VFB falling. PGOOD goes High. -- 5 -- % VFB rising. PGOOD goes Low. Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured under natural convection (still air) at TA = 25°C with the component mounted on a high effectivethermal-conductivity four-layer test board on a JEDEC 51-7 thermal measurement standard. θJC is measured at the lead of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Copyright © 2018 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 is a registered trademark of Richtek Technology Corporation. DS6217A/B-00 January 2018 RT6217A/B Typical Application Circuit RT6217A/B VIN 4.5V to 24V 2 C1 22µF 6 Enable VPGOOD RPGOOD 100k VIN BOOT 5 EN SW 1 PGOOD 7 SS R3 20 3 CBOOT 0.1µF L 1.5µH R1 6.49k FB 8 C2 22µF C3 22µF R2 20k GND 4 CSS 3.9nF CFF Option VOUT 1.05V Table 1. Suggested Component Values VOUT (V) R1 (k) R2 (k) L (H) COUT (F) CFF (pF) 1.05 6.49 20 1.5 44 -- 1.2 10.5 20 2.2 44 -- 1.8 25.5 20 2.2 44 -- 2.5 43.2 20 3.3 44 22 to 68 3.3 63.4 20 4.7 44 22 to 68 5 107 20 4.7 44 22 to 68 Note : (1) All the input and output capacitors are the suggested values, referring to the effective capacitances, subject to any de-rating effect, like a DC Bias. (2) For lower output voltage applications, load transient responses can also be improved by adding a feedforward capacitor (CFF, 22pF to 68pF). Copyright © 2018 Richtek Technology Corporation. All rights reserved. DS6217A/B-00 January 2018 is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 RT6217A/B Typical Operating Characteristics Efficiency vs. Output Current Output Voltage vs. Output Current 100 1.20 90 70 Output Voltage (V) Efficiency (%) 80 VIN = 4.5V VIN = 12V VIN = 19V VIN = 24V 60 50 40 30 20 1.15 1.10 1.05 VIN = 24V VIN = 19V VIN = 12V VIN = 4.5V 1.00 10 VOUT = 1.05V 0 0.001 VOUT = 1.05V 0.95 0.01 0.1 1 10 0 0.5 1 Output Current (A) 2 2.5 3 Output Current (A) Output Voltage vs. Temperature Output Voltage vs. Temperature 1.08 5.10 1.07 5.06 Output Voltage (V) Output Voltage (V) 1.5 1.06 1.05 VIN = 12V VIN = 24V VIN = 4.5V 1.04 5.02 VIN = 24V VIN = 12V VIN = 7V 4.98 4.94 1.03 VOUT = 1.05V, IOUT = 1.2A 1.02 VOUT = 5V, IOUT = 1.2A 4.90 -50 -25 0 25 50 75 100 125 -25 0 25 50 75 Temperature (°C) Load Transient Response Output Ripple Voltage VOUT (20mV/Div) 100 125 VOUT (20mV/Div) VSW (5V/Div) IOUT (1A/Div) VIN = 12V, VOUT = 1.05V, IOUT = 1.5A to 3A, L = 1.5μH Time (100μs/Div) Copyright © 2018 Richtek Technology Corporation. All rights reserved. www.richtek.com 8 -50 Temperature (°C) VIN = 12V, VOUT = 1.05V, IOUT = 3A, L = 1.5μH Time (2μs/Div) is a registered trademark of Richtek Technology Corporation. DS6217A/B-00 January 2018 RT6217A/B Power On from EN Power Off from EN VOUT (1V/Div) VOUT (1V/Div) VIN = 12V, VOUT = 1.05V, IOUT = 3A, L = 1.5μH VEN (2V/Div) VEN (2V/Div) VSW (10V/Div) VSW (10V/Div) IOUT (2A/Div) IOUT (2A/Div) VIN = 12V, VOUT = 1.05V, IOUT = 3A, L = 1.5μH Time (5ms/Div) Time (200μs/Div) Power On from VIN Power Off from VIN VOUT (1V/Div) VOUT (1V/Div) VIN = 12V, VOUT = 1.05V, IOUT = 3A, L = 1.5μH VIN (10V/Div) VIN (10V/Div) VSW (10V/Div) VSW (10V/Div) IOUT (2A/Div) IOUT (2A/Div) VIN = 12V, VOUT = 1.05V, IOUT = 3A, L = 1.5μH Time (10ms/Div) Copyright © 2018 Richtek Technology Corporation. All rights reserved. DS6217A/B-00 January 2018 Time (10ms/Div) is a registered trademark of Richtek Technology Corporation. www.richtek.com 9 RT6217A/B Application Information The output stage of a synchronous buck converter is composed of an inductor and capacitor, which stores and delivers energy to the load, and forms a second-order lowpass filter to smooth out the switch node voltage to maintain a regulated output voltage. VOUT   VIN  VOUT  VIN  fSW  L IL_PEAK = IOUT_MAX  1 IL 2 IL_VALLY = IOUT_MAX  1 IL 2 Inductor Selection where IOUT_MAX is the maximum rated output current or the required peak current. When designing the output stage of the synchronous buck converter, it is recommended to start with the inductor. However, it may require several iterations because the exact inductor value is generally flexible and is optimized for low cost, small form factor, and high overall performance of the converter. Further, inductors vary with manufacturers in both material and value, and typically have a tolerance of ±20%. Three key inductor parameters to be specified for operation with the device are inductance (L), inductor saturation current (ISAT), and DC resistance (DCR), which affects performance of the output stage. An inductor with lower DCR is recommended for applications of higher peak current or load current, and it can improve system performance. Lower inductor values are beneficial to the system in physical size, cost, DCR, and transient response, but they will cause higher inductor peak current and output voltage ripple to decrease system efficiency. Conversely, higher inductor values can increase system efficiency at the expense of larger physical size, slower transient response due to the longer response time of the inductor. A good compromise among size, efficiency, and transient response can be achieved by setting an inductor current ripple (ΔIL) of about 20% to 50% of the desired full output load current. To meet the inductor current ripple (ΔIL) requirements, a minimum inductance must be chosen and the approximate inductance can be calculated by the selected input voltage, output voltage, switching frequency (fSW), and inductor current ripple (ΔIL), as below : L= VOUT   VIN  VOUT  VIN  fSW  IL Once the inductance is chosen, the inductor ripple current (ΔIL) and peak inductor current (IL_PEAK) can be calculated, as below : Copyright © 2018 Richtek Technology Corporation. All rights reserved. www.richtek.com 10 IL = The inductor must be selected to have a saturation current and thermal rating which exceed the required peak inductor current IL_PEAK. For a robust design to maintain control of inductor current in overload or short-circuit conditions, some applications may desire inductor saturation current rating up to the high-side switch current limit of the device. However, the built-in output under-voltage protection (UVP) feature makes this unnecessary for most applications. IL_PEAK should not exceed the minimum value of the device's high-side switch current limit because the device will not be able to supply the desired output current. By reducing the inductor current ripple (ΔIL) to increase the average inductor current (and the output current), IL_PEAK can be lowered to meet the device current limit requirement. For best efficiency, a low-loss inductor having the lowest possible DCR that still fits in the allotted dimensions will be chosen. Ferrite cores are often the best choice. However, a shielded inductor, possibly larger or more expensive, will probably give fewer EMI and other noise problems. The following design example is illustrated to walk through the steps to apply the equations defined above. The RT6217A/B's Typical Application Circuit for output voltage of 1.05V at maximum output current of 3A and an input voltage of 12V with inductor current ripple of 1.5A (i.e. 50%, in the recommended range of 20% to 50%, of the maximum rated output current) is taken as the design example. The approximate minimum inductor value can first be calculated as below : L= 1.05  12  1.05  = 1.28μH 12  500kHz  1.5A is a registered trademark of Richtek Technology Corporation. DS6217A/B-00 January 2018 RT6217A/B where fSW is 500kHz. The inductor current ripple will be set at 1.5A, as long as the calculated inductance of 1.28μH is used. However, the inductor of the exact inductance value may not be readily available, and therefore an inductor of a nearby value will be chosen. In this case, 1.5μH inductance is available and actually used in the Typical Application Circuit. The actual inductor current ripple (ΔIL) and required peak inductor current (I L_PEAK) can be calculated as below :  IL = 1.05  12  1.05  = 1.28A 12  500kHz  1.5μH IL_PEAK = IOUT_MAX  1 IL = 3 + 1.28 = 3.64A 2 2 For the 1.5μH inductance value, the inductor saturation current and thermal rating should exceed 3.64A. Input Capacitor Selection Input capacitors are needed to smooth out the RMS ripple current (IRMS) imposed by the switching currents and drawn from the input power source, by reducing the ripple voltage amplitude seen at the input of the converters. The voltage rating of the input filter capacitors must be greater than the maximum input voltage. It's also important to consider the ripple current capabilities of capacitors. The RMS ripple current (IRMS) of the regulator can be determined by the input voltage (VIN), output voltage (VOUT), and rated output current (IOUT) as the following equation : V VIN IRMS = IOUT  OUT  1 VIN VOUT From the above, the maximum RMS input ripple current occurs at maximum output load, which will be used as the requirements to consider the current capabilities of the input capacitors. Furthermore, for a single phase buck converter, the duty cycle is approximately the ratio of output voltage to input voltage. The maximum ripple voltage usually occurs at 50% duty cycle, that is, VIN = 2 x VOUT. The maximum IRMS, as IRMS (Max), can be approximated as 0.5 x IOUT_MAX, where IOUT_MAX is the maximum rated output current. Besides, the variation of the capacitance value with temperature, DC bias voltage, switching frequency, and allowable peal-to-peak ripple voltage that Copyright © 2018 Richtek Technology Corporation. All rights reserved. DS6217A/B-00 January 2018 reflects back to the input, also need to be taken into consideration. For example, the capacitance value of a capacitor decreases as the DC bias across the capacitor increases; also, higher switching frequency allows the use of input capacitors of smaller capacitance values. Ceramic capacitors are most commonly used to be placed right at the input of the converter to reduce ripple voltage amplitude because only ceramic capacitors have extremely low ESR which is required to reduce the ripple voltage. Note that the capacitors need to be placed as close as to the input pins as possible for highest effectiveness. Ceramic capacitors are preferred also due to their low cost, small size, high RMS current ratings, robust inrush surge current capabilities, and low parasitic inductance, which helps reduce the high-frequency ringing on the input supply. However, care must be taken when ceramic capacitors are used at the input, and the input power is supplied by a wall adapter, connected through a long and thin wire. When a load step occurs at the output, a sudden inrush current will surge through the long inductive wire, which can induce ringing at the device's power input and potentially cause a very large voltage spike at the VIN pin to damage the device. For applications where the input power is located far from the device input, it may be required that the low-ESR ceramic input capacitors be placed in parallel with a bulk capacitor of other types, such as tantalum, electrolytic, or polymer, to dampen the voltage ringing and overshoot at the input, caused by the long input power path and input ceramic capacitor. It is suggested to choose capacitors with higher temperature ratings than required. Several ceramic capacitors may be parallel to meet application requirements, such as the RMS current, size, and height. The Typical Application Circuit can use one 22μF, or two 10μF and one high-frequency- noise-filtering 0.1μF lowESR ceramic capacitors at the input. is a registered trademark of Richtek Technology Corporation. www.richtek.com 11 RT6217A/B Output Capacitor Selection Output capacitance affects the output voltage of the converter, the response time of the output feedback loop, and the requirements for output voltage sag and soar. The sag occurs after a sudden load step current applied, and the soar occurs after a sudden load removal. Increasing the output capacitance reduces the output voltage ripple and output sag and soar, while it increases the response time that the output voltage feedback loop takes to respond to step loads, Therefore, there is a tradeoff between output capacitance and output response. It is recommended to choose a minimum output capacitance to meet the output voltage requirements of the converter, and have a quick transient response to step loads. The ESR of the output capacitor affects the damping of the output filter and the transient response. In general, low-ESR capacitors are good choices due to their excellent capability in energy storage and transient performance. The RT6217A/B, therefore, is specially optimized for ceramic capacitors. Consider also DC bias and aging effects while selecting the output capacitor.  Output Voltage Ripple The output voltage ripple at the switching frequency is a function of the inductor current ripple going through the output capacitor's impedance. To derive the output voltage ripple, the output capacitor with capacitance, COUT, and its equivalent series resistance, RESR, must be taken into consideration. The output peak-to-peak ripple voltage ΔVP-P, caused by the inductor current ripple ΔIL, is characterized by two components, which are ESR ripple ΔVP-P_ESR and capacitive ripple ΔVP-P_C, can be expressed as below : VP-P = VP-P_ESR  VP-P_C VP-P_ESR = IL  RESR VP-P_C = IL 8  COUT  fSW If ceramic capacitors are used as the output capacitors, both the components need to be considered due to the extremely low ESR and relatively small capacitance. For the RT6217A/B's Typical Application Circuit for output voltage of 1.05V, and actual inductor current ripple (ΔI L) of 1.28A, using two paralleled 22μF ceramic Copyright © 2018 Richtek Technology Corporation. All rights reserved. www.richtek.com 12 capacitors with ESR of about 5mΩ as output capacitors, the two output ripple components are as below : VP-P_ESR = IL  RESR = 1.28A  5m  = 6.4mV IL 1.28A = 8  COUT  fSW 8  44μF  500kHz 　　　　　 = 7.27mV VP-P = VP-P_ESR  VP-P_C = 13.67mV VP-P_C =  Output Transient Undershoot and Overshoot In addition to the output voltage ripple at the switching frequency, the output capacitor and its ESR also affect output voltage sag, which is undershoot on a positive load step, and output voltage soar, which is overshoot on a negative load step. With the built-in ACOTTM architecture, the IC can have very fast transient responses to the load steps and small output transients. However, the combination of a small ceramic output capacitor (that is, of little capacitance) and a low output voltage (that is, only little charge stored in the output capacitor), used in low-duty-cycle applications (which require high inductance to get reasonable ripple currents for high input voltages), causes an increase in the size of voltage variations (i.e. sag/soar) in response to very quick load changes. Typically, the load changes slowly, compared with the IC's switching frequency. However, for present-day applications, more and more digital blocks may exhibit nearly instantaneous large transient load changes. Therefore, in the following section, how to calculate the worst-case voltage swings in response to very fast load steps will be explained in details. Both of the output transient undershoot and overshoot have two components : a voltage step caused by the output capacitor's ESR, and a voltage sag or soar due to the finite output capacitance and the inductor current slew rate. The following formulas can be used to check if the ESR is low enough (which is usually not a problem with ceramic capacitors) and if the output capacitance is large enough to prevent excessive sag or soar on very fast load steps, with the chosen inductor value. The voltage step (ΔVOUT_ESR) caused by the ESR is a function of the load step (ΔIOUT) and the ESR (RESR) of the output capacitor, described as below : is a registered trademark of Richtek Technology Corporation. DS6217A/B-00 January 2018 RT6217A/B VOUT_ESR = IOUT  RESR The voltage amplitude (VOUT_SAG) of the capacitive sag is a function of the load step (ΔIOUT), the output capacitor value (COUT), the inductor value (L), the input-to-output voltage differential, and the maximum duty cycle (DMAX). And, the maximum duty cycle during a fast transient can be determined by the on-time (tON) and the minimum off-time (tOFF_MIN) since the ACOTTM control scheme will ramp the current during on-times, which are spaced apart by a minimum off-time, that is, as fast as allowed. The approximate on-time (neglecting parasitics) and maximum duty cycle for a given input and output voltage can be calculated according to the following equations : VOUT VIN  fSW tON DMAX = tON  tOFF_MIN tON = Note the actual on-time will be slightly larger than the calculated one as the IC will automatically adapt to compensate the internal voltage drops, such as the voltage across high-side switch due to on-resistance. However, both of these can be neglected since the ontime increase can compensate for the voltage drops. The output voltage sag (ΔV OUT_SAG) can then be calculated as below : L  (IOUT )2 VOUT_SAG = 2  COUT   VIN  DMAX  VOUT  response becomes under-damped and transient response is slowed. A small feedforward capacitor (CFF) can be introduced into the feedback network to speed up the transient response of high output voltage circuits. The feedforward capacitor is added across the upper FB divider resistor (as seen in Figure 1) to speed up the transient response without affecting the steady-state stability of the circuit. To optimize transient response, a CFF value is chosen so that the gain and phase boost of the feedback network increases the bandwidth of the converter, while still maintaining an acceptable phase margin. Generally, larger CFF values provide higher bandwidth, but may result in an unacceptable phase margin or instability. Suitable feedforward capacitor values can be chosen from the table of Suggested Component Values. VOUT R1 CFF FB RT6217A/B R2 GND Figure 1. CFF Capacitor Setting EN Pin for Start-Up and Shutdown Operation Feedforward Capacitor (CFF) For automatic start-up, the EN pin, with high-voltage rating, can be connected to the input supply VIN, either directly or through a 100kΩ resistor. The large built-in hysteresis band makes the EN pin useful for simple delay and timing circuits. The EN pin can be externally connected to VIN by adding a resistor REN and a capacitor CEN, as shown in Figure 2, to have an additional delay. The time delay can be calculated with the EN's internal threshold, at which switching operation begins. The RT6217A/B is optimized for ceramic output capacitors and for low duty-cycle applications. This optimization makes circuit stability easy to achieve with reasonable output capacitors, but it also narrows the optimization of transient responses of the converter. For high output voltage (that is, high duty-cycle) applications, the FB voltage is highly attenuated from the output, the circuit's An external MOSFET can be added for the EN pin to be logic-controlled, as shown in Figure 3. In this case, a 100kΩ pull-up resistor, REN, is connected between VIN and the EN pin. The MOSFET Q1 will be under logic control to pull down the EN pin. To prevent the device being enabled when VIN is smaller than the VOUT target level or some other desired voltage level, a resistive divider (REN1 The voltage amplitude of the capacitive soar is a function of the load step (ΔIOUT), the output capacitor value (COUT), the inductor value (L), and the output voltage (VOUT). And the output voltage soar (ΔVOUT_SOAR) can be calculated as below : VOUT_SOAR = L  (IOUT )2 2  COUT  VOUT Copyright © 2018 Richtek Technology Corporation. All rights reserved. DS6217A/B-00 January 2018 is a registered trademark of Richtek Technology Corporation. www.richtek.com 13 RT6217A/B VOUT and REN2) can be used to externally set the input undervoltage lockout threshold, as shown in Figure 4. VIN R1 FB REN EN RT6217A/B RT6217A/B CEN R2 GND GND Figure 5. Output Voltage Setting Figure 2. Enable Timing Control VIN REN 100k EN Q1 Enable RT6217A/B GND Figure 3. Logic Control for the EN Pin VIN REN1 REN2 EN RT6217A/B GND Figure 4. Resistor Divider for Under-Voltage Lockout Threshold Setting Output Voltage Setting The output voltage can be programmed by a resistive divider from the output to ground with the midpoint connected to the FB pin. The resistive divider allows the FB pin to sense a fraction of the output voltage as shown in Figure 5. The output voltage is set according to the following equation : The placement of the resistive divider should be within 5mm of the FB pin. The resistance of R2 is suggested between 10kΩ and 100kΩ to minimize power consumption and noise pick-up at the FB pin. Once R2 is chosen, the resistance of R1 can then be obtained as below : R1  R2  (VOUT  VTH_FB ) VTH_FB For better output voltage accuracy, the divider resistors (R1 and R2) with ±1% tolerance or better should be used. External Bootstrap Diode A bootstrap capacitor of 0.1μF low-ESR ceramic capacitor is connected between the BOOT and SW pins to supply the high-side gate driver. It is recommended to add an external bootstrap diode between an external 5V voltage supply and the BOOT pin to improve enhancement of the internal MOSFET switch and improve efficiency when the input voltage is below 5.5V. The bootstrap diode can be a low-cost one, such as 1N4148 or BAT54. The external 5V can be a fixed 5V voltage supply from the system, or a 5V output voltage generated by the RT6217A/B. Note that the BOOT voltage VBOOT must be lower than 5.5V. 5V where VTH_FB is around 0.791V (Typ). VOUT  VTH_FB  (1 + R1 ) R2 DBOOT BOOT RT6217A/B SW CBOOT 0.1µF Figure 6. External Bootstrap Diode Copyright © 2018 Richtek Technology Corporation. All rights reserved. www.richtek.com 14 is a registered trademark of Richtek Technology Corporation. DS6217A/B-00 January 2018 RT6217A/B Resistor at BOOT Pin The gate driver of an internal power MOSFET, utilized as a high-side switch, is optimized for turning on the switch not only fast enough for reducing switching power loss, but also slow enough for minimizing EMI. The EMI issue is worse when the switch is turned on rapidly due to high di/dt noises induced. When the high-side switch is being turned off, the SW node will be discharged relatively slowly by the inductor current due to the presence of the dead time when both the high-side and low-side switches are turned off. In some cases, it is desirable to reduce EMI further, even at the expense of some additional power dissipation. The turn-on rate of the high-side switch can be slowed by placing a small (< 47Ω) resistor between the BOOT pin and the external bootstrap capacitor. This will slow down the rates of the high-side switch turn-on and the rise of VSW. The recommended application circuit is shown in Figure 7, which includes an external bootstrap diode for charging the bootstrap capacitor and a bootstrap resistor RBOOT being placed between the BOOT pin and the capacitor/diode connection. 5V Soft-Start Time C (nF)  VTH _FB CSS (nF)  0.791 tSS (ms)  SS  ISS (μA) 4(μA) Do not leave SS unconnected. Power-Good Output The PGOOD pin is an open-drain power-good indication output and is to be connected to an external voltage source through a pull-up resistor. The power-good function is activated after soft-start is finished and is controlled by the feedback signal VFB. During soft-start, PGOOD is actively held low and only allowed to transition high after soft-start is over. If VFB rises above a power-good threshold (VTH_PGLH) (typically 95% of the target value), the PGOOD pin will be in high impedance and VPGOOD will be held high after a certain delay elapsed. When VFB drops by a powergood hysteresis (ΔVTH_PGLH) (typically 5% of the target value) or exceeds VTH_PGHL (typically 115% of the target value), the PGOOD pin will be pulled low. For VFB above VTH_PGHL, VPGOOD will be pulled high again when VFB drops back by a power-good hysteresis (ΔVTH_PGHL) (typically 5% of the target value). Once being started-up, if any internal protection is triggered, PGOOD will be pulled low to GND. DBOOT BOOT RBOOT RT6217A/B SW Thermal Considerations CBOOT 0.1µF Figure 7. External Bootstrap Diode and Resistor at the BOOT Pin Soft-Start Function The RT6217A/B provides an adjustable soft-start function. The soft-start function is used to prevent large inrush current while the converter is being powered-up. The softstart time is the output voltage rising time from 0V to a settled level and can be programmed by the external softstart capacitor CSS between the SS and GND pins. An internal current source ISS (typically, 4μA) charges the capacitor to build a soft-start ramp voltage. The FB voltage will track the internal ramp voltage during soft-start. The typical soft-start time can be calculated as follows : Copyright © 2018 Richtek Technology Corporation. All rights reserved. DS6217A/B-00 January 2018 The junction temperature should never exceed the absolute maximum junction temperature TJ(MAX), listed under Absolute Maximum Ratings, to avoid permanent damage to the device. The maximum allowable power dissipation depends on the thermal resistance of the IC package, the PCB layout, the rate of surrounding airflow, and the difference between the junction and ambient temperatures. The maximum power dissipation can be calculated using the following formula : PD(MAX) = (TJ(MAX) − TA) / θJA where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction-to-ambient thermal resistance. For continuous operation, the maximum operating junction temperature indicated under Recommended Operating Conditions is 125°C. The junction-to-ambient thermal resistance, θJA, is highly package dependent. For a TSOTis a registered trademark of Richtek Technology Corporation. www.richtek.com 15 RT6217A/B 23-8 (FC) package, the thermal resistance, θJA, is 70°C/W on a standard JEDEC 51-7 high effective-thermalconductivity four-layer test board. The maximum power dissipation at TA = 25°C can be calculated as below : PD(MAX) = (125°C − 25°C) / (70°C/W) = 1.428W for a TSOT-23-8 (FC) package. The maximum power dissipation depends on the operating ambient temperature for the fixed TJ(MAX) and the thermal resistance, θJA. The derating curves in Figure 8 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. Maximum Power Dissipation (W)1 2.5 Layout Considerations For best performance of the RT6217A/B, the following layout guidelines must be strictly followed.  Input capacitor must be placed as close to the IC as possible.  SW should be connected to inductor by wide and short trace. Keep sensitive components away from this trace.  Keep every trace connected to pin as wide as possible for improving thermal dissipation.  The feedback components must be connected as close to the device as possible.  Via can help to reduce power trace and improve thermal dissipation. Four-Layer PCB 2.0 1.5 1.0 0.5 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Figure 8. Derating Curve of Maximum Power Dissipation SW should be connected to inductor by Wide and short trace. Keep sensitive components away from this trace. Suggestion layout trace wider for thermal. SW R1 VOUT R3 FB 4 3 6 SW 2 SS 7 EN CSS GND VIN PGOOD 8 BOOT 5 CBOOT VOUT COUT COUT CIN CIN R2 The feedback components must be connected as close to the device as possible. PGVCss GND Via can help to reduce power trace and improve thermal dissipation. Input capacitor must be placed as close to the IC as possible. Suggestion layout trace wider for thermal. Figure 8. PCB Layout Guide Copyright © 2018 Richtek Technology Corporation. All rights reserved. www.richtek.com 16 is a registered trademark of Richtek Technology Corporation. DS6217A/B-00 January 2018 RT6217A/B Outline Dimension Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.700 1.000 0.028 0.039 A1 0.000 0.100 0.000 0.004 B 1.397 1.803 0.055 0.071 b 0.220 0.380 0.009 0.015 C 2.591 3.000 0.102 0.118 D 2.692 3.099 0.106 0.122 e 0.585 0.715 0.023 0.028 H 0.080 0.254 0.003 0.010 L 0.300 0.610 0.012 0.024 TSOT-23-8 (FC) Surface Mount Package Richtek Technology Corporation 14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. DS6217A/B-00 January 2018 www.richtek.com 17