RT6218AHRGJ8F

RT6218A/B 18V, 2A, ACOTTM Step-Down Converter in 8 Pin TSOT-23 General Description Features The RT6218A/B is a simple, easy-to-use, 2A synchronous step-down DC-DC converter with an input supply voltage range of 4.5V to 18V. The device integrates low RDS(ON) power MOSFETs to achieve high efficiency in a SOT23 package and build-in accurate reference voltage (0.765V by product options).      Input Supply Voltage Range : 4.5V to 18V 2A Converter With Built-in 120m/65m Low RDS(ON) Power FETs Advanced Constant On-Time (ACOT TM) Control for Ultrafast Transient Response Fixed Switching Frequency : 650kHz (SOT23-8) Optional for Operation Modes :  The RT6218A/B adopts Advanced Constant On-Time TM (ACOT ) control architecture to provide an ultrafast transient response with few external components and to operate in nearly constant switching frequency over the line, load, and output voltage range. The RT6218A operates in automatic PSM that maintains high efficiency during light load operation. RT6218B operates in Forced PWM that helps meet tight voltage regulation accuracy requirements. Automatically Power      Optimized for Low-ESR Ceramic Output Capacitors 1.5% High-Accuracy Feedback Reference Voltage Output Voltage Range : up to 6.5V Externally Adjustable Soft-Start Monotonic Start-Up for Pre-biased Outputs Both HS/LS FETs Protection for Robust Over Current Protection Input Under-Voltage Lockout (UVLO) Output Under-Voltage Protection (UVP) with Hiccup Mode Over-Temperature Protection (OTP) (Thermal Shutdown) Enable Control circuit, over current or inductor saturation. The RT6218A/B series offers programmable start-up by connecting a capacitor at external SS pin. The device also includes input under-voltage lockout, output  under-voltage protection, and over-temperature protection (thermal shutdown) to provide safe and smooth operation in all operating conditions. The RT6218A/B are offered in TSOT-23-8(FC) package.  Applications Marking Information  LCD TVs Home Networking Devices Surveillance General Purpose          Power Good Indication RoHS Compliant and Halogen Free Available in TSOT-23-8 Package RT6218AHRGJ8F 25=DNN RT6218BHRGJ8F 26=DNN Copyright © 2017 Richtek Technology Corporation. All rights reserved. DS6218A/B-00 September 2017 (PSM) Forced PWM Mode (RT6218B)  Set-Top Boxes Mode (RT6218A) The RT6218A/B senses both FETs current for a robust over-current protection. The device features cycle-by-cycle current limit protection and prevent the device from the catastrophic damage in output short  Saving 25= : Product Code DNN : Date Code 26= : Product Code DNN : Date Code is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT6218A/B Pin Configuration Ordering Information FB SS 8 7 6 5 2 3 4 VIN PGOOD Lead Plating System G : Green (Halogen Free and Pb Free) EN Package Type J8F : TSOT-23-8 (FC) LX (TOP VIEW) R BOOT RT6218A/B Reference Voltage VREF = 0.765V GND UVP Option H : Hiccup PWM Operation Mode A : Automatic PSM B : Forced PWM TSOT-23-8 (FC) Note : Richtek products are :  RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.  Suitable for use in SnPb or Pb-free soldering processes. Functional Pin Description Pin No. Pin Name Pin Function 1 GND Power ground. This pin, connected to analog ground, must be soldered to a large PCB copper area for maximum power dissipation. 2 LX Switch node between the internal switch and the synchronous rectifier. Connect this pin to the inductor and bootstrap capacitor. 3 VIN Power input. The input voltage range is from 4.5V to 18V. Connect a suitable input capacitor between this pin and GND, with a typical capacitance of 22F. 4 PGOOD Open-drain power-good indication output. Once being started-up, PGOOD will be pulled low to GND if any internal protection is triggered. 5 SS Soft-start capacitor connection node. Connect an external capacitor between this pin and ground to set the soft-start time. Do not leave this pin unconnected. A capacitor of 8.2nF is suggested. 6 FB Feedback voltage input. Connect this pin to the midpoint of the external feedback resistive divider to set the output voltage of the converter to the desired regulation level. The device regulates the FB voltage at Feedback Threshold Voltage, typically 0.765V. 7 EN Enable control input. Floating this pin or connecting this pin to GND can disable the device and connecting this pin to logic high can enable the device. 8 BOOT Bootstrap capacitor connection node to supply the high-side gate driver. Connect a 0.1F ceramic capacitor between this pin and LX pin. Copyright © 2017 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 is a registered trademark of Richtek Technology Corporation. DS6218A/B-00 September 2017 RT6218A/B Functional Block Diagram VIN LX 6.5K - EN 3V UVLO + VEN_ REF Shutdown Comparator VCC Internal Regulator PVCC OnTime BOOT OC UGATE UV Protection VCC 6µA Control Ripple Gen. + + - SS FB - LX LGATE MIN OFF Comparator GND VCC + 0.9VREF Power Stage & Dead-time Control PGOOD Comparator VIBIAS VRef PGOOD Copyright © 2017 Richtek Technology Corporation. All rights reserved. DS6218A/B-00 September 2017 is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT6218A/B Operation The RT6218A/B is a high-efficiency, synchronous step-down DC-DC converter that can deliver up to 2A output current from a 4.5V to 18V input supply. The RT6218A/B adopts ACOTTM control mode, which can reduce the output capacitance and provide ultrafast transient responses, and allow minimal component sizes without any additional external compensation network. Output Under-Voltage Protection The RT6218A/B includes output under-voltage protection (UVP) against over-load or short-circuited condition by constantly monitoring the feedback voltage VFB. If VFB drops below the under-voltage protection trip threshold, the UV comparator will go high to turn off both the internal high-side and low-side MOSFET switches. Enable Control The RT6218A/B provides an EN pin, as an external chip enable control, to enable or disable the device. If VEN is held below a logic-low threshold voltage (VENHVEN) of the enable input (EN), the converter will enter into shutdown mode, that is, the converter is disabled and switching is inhibited even if the VIN voltage is above VIN under-voltage lockout threshold (VUVLO). During shutdown mode, the supply current can be reduced to ISHDN (5A or below). If the EN voltage rises above the logic-high threshold voltage (VENH) while the VIN voltage is higher than UVLO threshold (VUVLO), the device will be turned on, that is, switching being enabled and soft-start sequence being initiated. Low-Side Current Limit Protection The RT6218A/B features a cycle-by-cycle valley-type current limit protection, measuring the inductor current through the synchronous rectifier (low-side switch). The inductor current level is determined by measuring the low-side switch voltage between the LX pin and GND, which is proportional to the switch current, during the low-side on-time. For greater accuracy, temperature compensation is added to the voltage sensing. Once the current rises above the low-side switch valley Copyright © 2017 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 current limit (ILIM), the on-time one-shot will be inhibited until the inductor current ramps down to the current limit level (ILIM), that is, another on-time can only be triggered when the inductor current goes below the low-side current limit. This function can prevent the average output current from greatly exceeding the guaranteed low-side current limit value. If the output load current exceeds the available inductor current (clamped by the above-mentioned low-side current limit), the output capacitor needs to supply the extra current such that the output voltage will begin to drop. If it drops below the output under-voltage protection trip threshold, the IC will stop switching to avoid excessive heat. High-Side Current Limit Protection The RT6218A/B also includes a cycle-by-cycle peak-type current limit protection against the condition that the inductor current increasing abnormally, even over the inductor saturation current rating. To ensure the low-side current limit protection can still function properly, the inductor current through the high-side switch will only be measured after a certain amount of delay when the high-side switch being turned on. If an over-current condition occurs, the converter will immediately turn off the high-side switch and turn on the low-side switch to prevent the inductor current exceeding the high-side switch peak-current limit. Hiccup Mode If the output under-voltage condition continues for a period of time, the RT6218A/B will enter output under-voltage protection with hiccup mode. During hiccup mode, the device remains shut down. After a period of time, a soft-start sequence for auto-recovery will be initiated. Upon completion of the soft-start sequence, if the fault condition is removed, the converter will resume normal operation; otherwise, such cycle for auto-recovery will be repeated until the fault condition is cleared. Hiccup mode allows the circuit to operate safely with low input current and power dissipation, and then resume normal operation as soon as the over-load or short-circuit condition is removed. is a registered trademark of Richtek Technology Corporation. DS6218A/B-00 September 2017 RT6218A/B External Bootstrap Capacitor Connect a 0.1F low-ESR ceramic capacitor between the BOOT and LX pins. This bootstrap capacitor supplies for the gate driver of the high-side N-channel MOSFET switch. Over-Temperature Protection (Thermal Shutdown) The RT6218A/B includes an over-temperature protection (OTP) circuitry to prevent overheating due to excessive power dissipation. The OTP will shut down switching operation when junction temperature exceeds a thermal shutdown threshold TSD. Once the junction temperature cools down by a thermal shutdown hysteresis (TSD), the IC will resume normal operation with a complete soft-start. Soft-Start (SS) The soft-start function is used to prevent large inrush currents while the converter is being powered up. The RT6218A/B provides a soft-start feature for inrush control. It provides an SS pin so that the soft-start time can be programmed by selecting the value of the external capacitor CSS connected from the SS pin to GND. During the start-up sequence, the external capacitor is charged by an internal current source ISS (typically, 6A) to generate a soft-start ramp voltage as a reference voltage to the PWM comparator. The device will initiate switching and the output voltage will smoothly ramp up to its targeted regulation voltage only after this ramp voltage is greater than the feedback voltage VFB to ensure the converters have a smooth start-up. For soft-start control, the SS pin should never be left unconnected. Power Good Indication The PGOOD pin is an open-drain output and is connected to an external pull-up resistor. It is controlled by a comparator, which the feedback signal VFB is fed to. If VFB is above 90% of the internal reference voltage after soft-start finished, the PGOOD pin will be in high impedance and VPGOOD will be held high. Otherwise, the PGOOD output will be pulled low. Copyright © 2017 Richtek Technology Corporation. All rights reserved. DS6218A/B-00 September 2017 is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT6218A/B Absolute Maximum Ratings (Note 1)  Supply Input Voltage --------------------------------------------------------------------------------- 0.3V to 20V  Switch Node Voltage, LX ---------------------------------------------------------------------------- 0.3V to (VIN + 0.3V) < 50ns ---------------------------------------------------------------------------------------------------- 5V to 25V  BOOT Pin Voltage ------------------------------------------------------------------------------------ (VLX – 0.3V) to (VIN + 6.3V)  BOOT to LX, VBOOT VLX -------------------------------------------------------------------------- –0.3V to 6V  Other Pins ----------------------------------------------------------------------------------------------- 0.3V to 6V  Power Dissipation, PD @ TA = 25C TSOT-23-8 (FC) --------------------------------------------------------------------------------------- 1.667W  Package Thermal Resistance (Note 2) TSOT-23-8 (FC), JA --------------------------------------------------------------------------------- 60C/W TSOT-23-8 (FC), JC --------------------------------------------------------------------------------- 8C/W  Lead Temperature (Soldering, 10 sec.) ---------------------------------------------------------- 260C  Junction Temperature -------------------------------------------------------------------------------- 150C  Storage Temperature Range ----------------------------------------------------------------------- 65C to 150C  ESD Susceptibility (Note 3) HBM (Human Body Model) ------------------------------------------------------------------------- 2kV Recommended Operating Conditions (Note 4)  Supply Input Voltage --------------------------------------------------------------------------------- 4.5V to 18V  Ambient Temperature Range----------------------------------------------------------------------- 40C to 85C  Junction Temperature Range ---------------------------------------------------------------------- 40C to 125C Electrical Characteristics (VIN = 12V, TA = 25C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit 4.5 -- 18 V Supply Voltage VIN Supply Input Operating Voltage VIN Under-Voltage Lockout Threshold VUVLO -- 3.7 -- V Under-Voltage Lockout Threshold Hysteresis VUVLO -- 300 -- mV Supply Current Supply Current (Shutdown) ISHDN VEN = 0V -- -- 5 A Supply Current (Quiescent) IQ VEN = 2V, VFB = 0.85V -- 0.5 -- mA Copyright © 2017 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 is a registered trademark of Richtek Technology Corporation. DS6218A/B-00 September 2017 RT6218A/B Parameter Symbol Test Conditions Min Typ Max Unit -- 6 -- A 1.32 1.43 1.55 V -- 0.18 -- V 0.753 0.765 0.777 V -- 120 -- -- 65 -- 2.5 3.2 -- A f SW -- 650 -- kHz Minimum On-Time tON_MIN -- 60 -- Minimum Off-Time tOFF_MIN -- 240 -- UVP detect 57.5 62.5 67.5 Hysteresis -- 10 -- Soft-Start Soft-Start Internal Charging Current tSS Enable Voltage Enable Voltage Threshold VEN_R VEN rising Enable Voltage Hysteresis Feedback Voltage VREF 4.5V  VIN  18V, High-Side On-Resistance RDS(ON)_H VBOOT  VLX = 4.8V Low-Side On-Resistance RDS(ON)_L Feedback Reference Voltage Internal MOSFET m Current Limit Current Limit ILIM Valley current Switching Frequency Switching Frequency On-Time Timer Control ns Output Under-Voltage Protections UVP Trip Threshold % Thermal Shutdown Thermal Shutdown Threshold TSD -- 150 -- °C Thermal Shutdown Hysteresis TSD -- 20 -- °C FB rising -- 90 -- FB falling -- 85 -- Power Good Power Good Threshold VPGOOD % Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. JA is measured under natural convection (still air) at TA = 25C with the component mounted on a high effective-thermal-conductivity four-layer test board on a JEDEC 51-7 thermal measurement standard. The first layer is filled with copper. JA is measured at the lead of the package. Note 3. Devices are ESD sensitive. Handling precaution recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Copyright © 2017 Richtek Technology Corporation. All rights reserved. DS6218A/B-00 September 2017 is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 RT6218A/B Typical Application Circuit RT6218A/B VIN 3 CIN 22μF BOOT LX 7 Enable VPGOOD VIN RPGOOD 4 5 8 2 CBOOT 0.1μF VOUT L EN R1 PGOOD FB SS CSS CFF Open COUT 44μF 6 RT* 10k GND 1 R2 * Note : When CFF is added, it is necessary to add RT = 10k between feedback network and chip FB pin. Table 1. Suggested Component Values (VIN = 12V) VOUT (V) R1 (k) R2 (k) L (H) COUT (F) CFF (pF) 1.05 10 27 2.2 44 -- 1.2 20.5 36 2.2 44 -- 1.8 40.2 30 3.6 44 -- 2.5 40.2 18 3.6 44 22 to 68 3.3 40.2 12.1 4.7 44 22 to 68 5 40.2 7.32 4.7 44 22 to 68 Note 1 : All the input and output capacitances are the suggested values, which refer to the effective capacitances, and are subject to any de-rating effect, like a DC bias. Note 2 : For lower output voltage applications, load transient responses can also be improved by adding a feedforward capacitor (CFF, 22pF to 68pF). Copyright © 2017 Richtek Technology Corporation. All rights reserved. www.richtek.com 8 is a registered trademark of Richtek Technology Corporation. DS6218A/B-00 September 2017 RT6218A/B Typical Operating Characteristics Efficiency vs. Output Current Efficiency vs. Output Current 100 100 90 90 80 VOUT = 3.3V 70 Efficiency (%) Efficiency (%) 80 VOUT = 1.8V 60 VOUT = 1.05V 50 40 30 70 VOUT = 5V 60 VOUT = 3.3V 50 VOUT = 1.8V 40 VOUT = 1.05V 30 20 20 10 10 RT6218A, VIN = 5V 0 0.001 0.01 0.1 1 RT6218A, VIN = 12V 0 0.001 10 0.01 0.1 10 Output Current (A) Output Current (A) Efficiency vs. Output Current Efficiency vs. Output Current 100 100 90 90 80 80 70 VOUT = 3.3V 60 VOUT = 1.8V Efficiency (%) Efficiency (%) 1 VOUT = 1.05V 50 40 30 70 VOUT = 5V 60 VOUT = 3.3V 50 VOUT = 1.8V 40 VOUT = 1.05V 30 20 20 10 10 RT6218B, VIN = 5V 0 0.001 0.01 0.1 1 RT6218B, VIN = 12V 0 0.001 10 0.01 0.1 1 10 Output Current (A) Output Current (A) Output Voltage vs. Output Current Output Voltage vs. Temperature 1.40 1.220 RT6218A 1.210 Output Voltage (V) Output Voltage (V) 1.35 1.30 1.25 1.20 VIN = 18V 1.15 1.200 1.190 VIN = 12V VIN = 18V 1.180 1.170 VIN = 12V VOUT = 1.2V VOUT = 1.2V, IOUT = 1A 1.10 1.160 0 0.5 1 1.5 2 2.5 Output Current (A) Copyright © 2017 Richtek Technology Corporation. All rights reserved. DS6218A/B-00 September 2017 3 -50 -25 0 25 50 75 100 125 Temperature (°C) is a registered trademark of Richtek Technology Corporation. www.richtek.com 9 RT6218A/B Enable Threshold vs. Temperature 1.6 0.775 1.5 Enable Threshold (V) Reference Voltage(V) Reference Voltage vs. Temperature 0.780 0.770 0.765 0.760 0.755 Rising 1.4 1.3 1.2 Falling 1.1 VIN = 12V, IOUT = 1A 0.750 VOUT = 1V, IOUT = 0A 1.0 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 Temperature (°C) Temperature (°C) Load Transient Response Load Transient Response VIN = 12V, VOUT = 1.05V, IOUT = 0A to 2A, L = 2.2H VOUT (40mV/Div) 100 125 VIN = 12V, VOUT = 1.05V, IOUT = 1A to 2A, L = 2.2H VOUT (40mV/Div) IOUT (1A/Div) IOUT (1A/Div) Time (100s/Div) Time (100s/Div) Output Ripple Voltage Power On Then Short VIN = 12V, VOUT = 1.05V, IOUT = 2A, L = 2.2H VOUT (20mV/Div) VIN (5V/Div) VIN = 12V, VOUT = 5V VOUT (2V/Div) VLX (5V/Div) Time (1s/Div) Copyright © 2017 Richtek Technology Corporation. All rights reserved. www.richtek.com 10 Time (10ms/Div) is a registered trademark of Richtek Technology Corporation. DS6218A/B-00 September 2017 RT6218A/B Power On from EN VEN (2V/Div) VEN (2V/Div) VOUT (2V/Div) Power Off from EN VOUT (2V/Div) VIN = 12V, VOUT = 5V, IOUT = 2A VIN = 12V, VOUT = 5V, IOUT = 2A VLX (10V/Div) VLX (10V/Div) IOUT (2A/Div) IOUT (2A/Div) Time (1ms/Div) Time (200s/Div) Power On from VIN Power Off from VIN VIN (5V/Div) VOUT (2V/Div) VIN (5V/Div) VOUT (2V/Div) VLX (10V/Div) VLX (10V/Div) IOUT (2A/Div) IOUT (2A/Div) Time (4ms/Div) Copyright © 2017 Richtek Technology Corporation. All rights reserved. DS6218A/B-00 VIN = 12V, VOUT = 5V, IOUT = 2A VIN = 12V, VOUT = 5V, IOUT = 2A September 2017 Time (10ms/Div) is a registered trademark of Richtek Technology Corporation. www.richtek.com 11 RT6218A/B Application Information Inductor Selection Selecting an inductor involves specifying its inductance and also its required peak current. The exact inductor value is generally flexible and is ultimately chosen to obtain the best mix of cost, physical size, and circuit efficiency. Lower inductor values benefit from reduced size and cost and they can improve the circuit's transient response, but they increase the inductor ripple current and output voltage ripple and reduce the inductor current (and the output current) while ensuring that IL(PEAK) does not exceed the upper current limit level. For best efficiency, choose an inductor with a low DC resistance that meets the cost and size requirements. For low inductor core losses some type of ferrite core is usually best and a shielded core type, although possibly larger or more expensive, will probably give fewer EMI and other noise problems. efficiency due to the resulting higher peak currents. Conversely, higher inductor values increase efficiency, Considering the Typical Operating Circuit for 1.2V output at 2A and an input voltage of 12V, using an but the inductor will either be physically larger or have higher resistance since more turns of wire are required and transient response will be slower since more time is required to change current (up or down) in the inductor. A good compromise between size, efficiency, and transient response is to use a ripple current (IL) inductor ripple of 0.6A (30%), the calculated inductance value is : about 20% to 50% of the desired full output load current. Calculate the approximate inductor value by selecting the input and output voltages, the switching frequency (f SW ), the maximum output current (IOUT(MAX)) and estimating a IL as some percentage of that current. L= VOUT   VIN  VOUT  VIN  fSW  IL L 1.2  12  1.2   2.77μH 12  650kHz  0.6A The ripple current was selected at 0.6A and, as long as we use the calculated 2.77H inductance, that should be the actual ripple current amount. The ripple current and required peak current as below : IL = 1.2  12  1.2  = 0.6A 12  650kHz  2.77μH and IL(PEAK) = 2A + 0.6A = 2.3A 2 Once an inductor value is chosen, the ripple current For the 2.77H value, the inductor's saturation and thermal rating should exceed 2.3A. Since the actual (IL) is calculated to determine the required peak inductor current. value used was 2.77H and the ripple current exactly 0.6A, the required peak current is 2.3A. IL = VOUT   VIN  VOUT  I and IL(PEAK) = IOUT(MAX)  L VIN  fSW  L 2 To guarantee the required output current, the inductor needs a saturation current rating and a thermal rating that exceeds IL(PEAK). These are minimum requirements. To maintain control of inductor current in overload and short circuit conditions, some applications may desire current ratings up to the current limit value. However, the IC's output under-voltage shutdown feature make this unnecessary for most applications. IL(PEAK) should not exceed the minimum value of IC's upper current limit level or the IC may not be able to meet the desired output current. If needed, reduce the inductor ripple current (IL) to increase the average Copyright © 2017 Richtek Technology Corporation. All rights reserved. www.richtek.com 12 Input Capacitor Selection Input capacitors are needed to smooth out the RMS ripple current (IRMS) imposed by the switching currents and drawn from the input power source, by reducing the ripple voltage amplitude seen at the input of the converters. The voltage rating of the input filter capacitors must be greater than the maximum input voltage. It’s also important to consider the ripple current capabilities of capacitors. The RMS ripple current (IRMS) of the regulator can be determined by the input voltage (VIN), output voltage (VOUT), and rated output current (IOUT) as the following equation : is a registered trademark of Richtek Technology Corporation. DS6218A/B-00 September 2017 RT6218A/B IRMS = IOUT  VOUT VIN  1 VIN VOUT From the above, the maximum RMS input ripple current occurs at maximum output load, which will be used as the requirements to consider the current capabilities of the input capacitors. Furthermore, for a single phase buck converter, the duty cycle is approximately the ratio of output voltage to input voltage. The maximum ripple voltage usually occurs at 50% duty cycle, that is, VIN = 2 x VOUT. The maximum IRMS, as IRMS (Max), can be approximated as 0.5 x IOUT_MAX, where IOUT_MAX is the maximum rated output current. Besides, the variation of the capacitance value with temperature, DC bias voltage, switching frequency, and allowable peal-to-peak ripple voltage that reflects back to the input, also need to be taken into consideration. For example, the capacitance value of a capacitor decreases as the DC bias across the capacitor increases; also, higher switching frequency allows the use of input capacitors of smaller capacitance values. Ceramic capacitors are most commonly used to be placed right at the input of the converter to reduce ripple voltage amplitude because only ceramic capacitors have extremely low ESR which is required to reduce the ripple voltage. Note that the capacitors need to be placed as close as to the input pins as possible for highest effectiveness. Ceramic capacitors are preferred also due to their low cost, small size, high RMS current ratings, robust inrush surge current capabilities, and low parasitic inductance, which helps reduce the high-frequency ringing on the input supply. However, care must be taken when ceramic capacitors are used at the input, and the input power is supplied by a wall adapter, connected through a long and thin wire. When a load step occurs at the output, a sudden inrush current will surge through the long inductive wire, which can induce ringing at the device’s power input and potentially cause a very large voltage spike at the VIN pin to damage the device. For applications where the input power is located far from the device input, it may be required that the low-ESR ceramic input capacitors be placed in parallel with a bulk capacitor of other types, such as tantalum, electrolytic, or polymer, to dampen the voltage ringing and overshoot at the Copyright © 2017 Richtek Technology Corporation. All rights reserved. DS6218A/B-00 September 2017 input, caused by the long input power path and input ceramic capacitor. It is suggested to choose capacitors with higher temperature ratings than required. Several ceramic capacitors may be parallel to meet application requirements, such as the RMS current, size, and height. The Typical Application Circuit can use one 22F, or two 10F and one high-frequencynoise-filtering 0.1uF low-ESR ceramic capacitors at the input. Output Capacitor Selection Output capacitance affects the output voltage of the converter, the response time of the output feedback loop, and the requirements for output voltage sag and soar. The sag occurs after a sudden load step current applied, and the soar occurs after a sudden load removal. Increasing the output capacitance reduces the output voltage ripple and output sag and soar, while it increases the response time that the output voltage feedback loop takes to respond to step loads, Therefore, there is a tradeoff between output capacitance and output response. It is recommended to choose a minimum output capacitance to meet the output voltage requirements of the converter, and have a quick transient response to step loads. The ESR of the output capacitor affects the damping of the output filter and the transient response. In general, low-ESR capacitors are good choices due to their excellent capability in energy storage and transient performance. The RT6218A/B, therefore, is specially optimized for ceramic capacitors. Consider also DC bias and aging effects while selecting the output capacitor. Output Ripple Output ripple at the switching frequency is caused by the inductor current ripple and its effect on the output capacitor's ESR and stored charge. These two ripple components are called ESR ripple and capacitive ripple. Since ceramic capacitors have extremely low ESR and relatively little capacitance, both components are similar in amplitude and both should be considered if ripple is critical. is a registered trademark of Richtek Technology Corporation. www.richtek.com 13 RT6218A/B VRIPPLE = VRIPPLE(ESR)  VRIPPLE(C) VOUT VRIPPLE(ESR) = IL  RESR VRIPPLE(C) = IL 8  COUT  fSW For the Typical Operating Circuit for 1.2V output and an inductor ripple of 0.6A, with 2 x 22F output capacitance each with about 5m ESR including PCB trace R1 CFF FB RT6218A/B R2 GND resistance, the output voltage ripple components are : Figure 1. CFF Capacitor Setting VRIPPLE(ESR) = 0.6A  5m = 3mV 0.6A = 2.62mV 8  44μF  650kHz VRIPPLE = 3mV + 2.62mV = 5.62mV VRIPPLE(C) = Feed-Forward Capacitor (CFF) The RT6218A/B is optimized for ceramic output capacitors and for low duty-cycle applications. This optimization makes circuit stability easy to achieve with reasonable output capacitors, but it also narrows the optimization of transient responses of the converter. For high output voltage (that is, high duty-cycle) applications, the FB voltage is highly attenuated from the output, the circuit's response becomes under-damped and transient response is slowed. A small feedforward capacitor (CFF) can be introduced into the feedback network to speed up the transient response of high output voltage circuits. The feedforward capacitor is added across the upper FB divider resistor (as seen in Figure 1) to speed up the transient response without affecting the steady-state stability of the circuit. Enable Operation (EN) For automatic start-up the EN pin can be connected to VIN, through a 100k resistor. Its large hysteresis band makes EN useful for simple delay and timing circuits. EN can be externally pulled to VIN by adding a resistor-capacitor delay (REN and CEN in Figure 2). Calculate the delay time using EN's internal threshold where switching operation begins. An external MOSFET can be added to implement digital control of EN when no system voltage above 2V is available (Figure 3). In this case, a 100k pull-up resistor, REN, is connected between VIN and the EN pin. MOSFET Q1 will be under logic control to pull down the EN pin. To prevent enabling circuit when VIN is smaller than the VOUT target value or some other desired voltage level, a resistive voltage divider can be placed between the input voltage and ground and connected to EN to create an additional input under voltage lockout threshold (Figure 4). EN VIN To optimize transient response, a CFF value is chosen so that the gain and phase boost of the feedback network increases the bandwidth of the converter, while still maintaining an acceptable phase margin. Generally, larger CFF values provide higher bandwidth, but may result in an unacceptable phase margin or instability. Suitable feedforward capacitor values can be chosen from the table of Suggested Component Values. REN EN RT6218A/B CEN GND Figure 2. External Timing Control VIN Enable REN 100k EN Q1 RT6218A/B GND Figure 3. Digital Enable Control Circuit Copyright © 2017 Richtek Technology Corporation. All rights reserved. www.richtek.com 14 is a registered trademark of Richtek Technology Corporation. DS6218A/B-00 September 2017 RT6218A/B VIN REN1 5V EN REN2 DBOOT RT6218A/B GND BOOT CBOOT 0.1μF RT6218A/B Figure 4. Resistor Divider for Lockout Threshold Setting Figure 6. External Bootstrap Diode Output Voltage Setting Set the desired output voltage using a resistive divider from the output to ground with the midpoint connected to FB. The output voltage is set according to the following equation : VOUT = 0.765V x (1 + R1 / R2) VOUT R1 FB RT6218A/B R2 GND Figure 5. Output Voltage Setting Place the FB resistors within 5mm of the FB pin. Choose R2 between 10k and 100k to minimize power consumption without excessive noise pick-up and calculate R1 as follows : R1  LX R2  (VOUT  VREF ) VREF For output voltage accuracy, use divider resistors with 1% or better tolerance. External BOOT Bootstrap Diode Resistor at BOOT Pin The gate driver of an internal power MOSFET, utilized as a high-side switch, is optimized for turning on the switch not only fast enough for reducing switching power loss, but also slow enough for minimizing EMI. The EMI issue is worse when the switch is turned on rapidly due to high di/dt noises induced. When the high-side switch is being turned off, the LX node will be discharged relatively slowly by the inductor current due to the presence of the dead time when both the high-side and low-side switches are turned off. In some cases, it is desirable to reduce EMI further, even at the expense of some additional power dissipation. The turn-on rate of the high-side switch can be slowed by placing a small (< 47) resistor between the BOOT pin and the external bootstrap capacitor. This will slow down the rates of the high-side switch turn-on and the rise of VLX. The recommended application circuit is shown in Figure 7, which includes an external bootstrap diode for charging the bootstrap capacitor and a bootstrap resistor RBOOT being placed between the BOOT pin and the capacitor/diode connection. 5V A bootstrap capacitor of 0.1F low-ESR ceramic capacitor is connected between the BOOT and LX pins to supply the high-side gate driver. It is recommended to add an external bootstrap diode between an external 5V voltage supply and the BOOT pin to improve enhancement of the internal MOSFET switch and improve efficiency when the input voltage is below 5.5V. The bootstrap diode can be a low-cost one, such as 1N4148 or BAT54. The external 5V can be a fixed 5V voltage supply from the system, or a 5V output voltage generated by the RT6218A/B. Note that the BOOT voltage VBOOT must be lower than 5.5V. Copyright © 2017 Richtek Technology Corporation. All rights reserved. DS6218A/B-00 September 2017 DBOOT RBOOT BOOT RT6218A/B CBOOT 0.1μF SW Figure 7. External Bootstrap Diode and Resistor at the BOOT Pin is a registered trademark of Richtek Technology Corporation. www.richtek.com 15 RT6218A/B Soft-Start PD(MAX) = (TJ(MAX) TA) / JA The RT6218A/B provides adjustable soft-start function. where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and JA is the and GND. An internal current source ISS (6A) charges an external capacitor to build a soft-start ramp voltage. The VFB voltage will track the internal ramp voltage during soft-start interval. The typical soft-start time is calculated as follows : Soft-Start time tSS = CSS x 0.7 / 11A + CSS x VFB / 6A Power-Good Output The PGOOD pin is an open-drain power-good indication output and is to be connected to an external voltage source through a pull-up resistor. The power-good function is activated after soft-start is finished and is controlled by the feedback signal VFB. During soft-start, PGOOD is actively held low and only allowed to transition high after soft-start is over. If VFB rises above a power-good threshold (VTH_PGLH) (typically 90% of the target value), the PGOOD pin will be in high impedance and VPGOOD will be held high after a certain delay elapsed. Once being started-up, if any internal protection is triggered, PGOOD will be pulled low to GND. Thermal Considerations The junction temperature should never exceed the absolute maximum junction temperature TJ(MAX), listed under Absolute Maximum Ratings, to avoid permanent damage to the device. The maximum allowable power dissipation depends on the thermal resistance of the IC package, the PCB layout, the rate of surrounding airflow, and the difference between the junction and ambient temperatures. The maximum power dissipation can be calculated using the following junction-to-ambient thermal resistance. For continuous operation, the maximum operating junction temperature indicated under Recommended Operating Conditions is 125C. The junction-to-ambient thermal resistance,JA, is highly package dependent. For a TSOT-23-8 (FC) package, the thermal resistance, JA, is 60C/W on a standard JEDEC 51-7 high effective-thermal-conductivity four-layer test board. The maximum power dissipation at TA = 25C can be calculated as below : PD(MAX) = (125C 25C) / (60C/W) = 1.667W for a TSOT-23-8 (FC) package. The maximum power dissipation depends on the operating ambient temperature for the fixed TJ(MAX) and the thermal resistance, JA. The derating curves in Figure 8 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. 2.0 Maximum Power Dissipation (W)1 When the EN pin becomes high, the SS charge current (ISS) begins charging the capacitor which is connected from the SS pin to GND (CSS).The soft-start function is used to prevent large inrush current while converter is being powered-up. The soft-start timing can be programmed by the external capacitor CSS between SS Four-Layer PCB 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Figure 8. Derating Curve of Maximum Power Dissipation formula : Copyright © 2017 Richtek Technology Corporation. All rights reserved. www.richtek.com 16 is a registered trademark of Richtek Technology Corporation. DS6218A/B-00 September 2017 RT6218A/B Layout Considerations Follow the PCB layout performance of the device. guidelines for optimal  Keep the traces of the main current paths as short and wide as possible.  Put the input capacitor as close as possible to VIN pin.  components away from the LX node to prevent stray capacitive noise pickup. LX node is with high frequency voltage swing and  Connect feedback network behind the output capacitors. Keep the loop area small. Place the feedback components near the device.  An example of RT6218A/B PCB layout guide is shown in Figure 9 for references. should be kept at small area. Keep analog L GND CB VOUT COUT RBOOT COUT CEN REN2 4 FB 5 3 PGOOD EN 6 VIN BOOT 7 2 LX CIN CIN 8 GND SS RT CFF VIN CSS REN1 RPGOOD R2 EN VOUT VOUT R1 GND Figure 9. PCB Layout Guide for TSOT-23-8 package Copyright © 2017 Richtek Technology Corporation. All rights reserved. DS6218A/B-00 September 2017 is a registered trademark of Richtek Technology Corporation. www.richtek.com 17 RT6218A/B Outline Dimension Dimensions In Millimeters Symbol Dimensions In Inches Min. Max. Min. Max. A 0.700 1.000 0.028 0.039 A1 0.000 0.100 0.000 0.004 B 1.397 1.803 0.055 0.071 b 0.220 0.380 0.009 0.015 C 2.591 3.000 0.102 0.118 D 2.692 3.099 0.106 0.122 e 0.585 0.715 0.023 0.028 H 0.080 0.254 0.003 0.010 L 0.300 0.610 0.012 0.024 TSOT-23-8 (FC) Surface Mount Package Richtek Technology Corporation 14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. Copyright © 2017 Richtek Technology Corporation. All rights reserved. www.richtek.com 18 is a registered trademark of Richtek Technology Corporation. DS6218A/B-00 September 2017