®
RT6365
60VIN, 5A, Asynchronous Step-Down Converter with Low
Quiescent Current
General Description
Features
The RT6365 is a 5A, high-efficiency, peak current mode
control asynchronous step-down converter. The device
operates with input voltages from 4V to 60V. The device
can program the output voltage between 0.8V to VIN. The
low quiescent current design with the integrated low RDS(ON)
of high-side MOSFET achieves high efficiency over the
wide load range. The peak current mode control with simple
external compensation allows the use of small inductors
and results in fast transient response and good loop
stability.
The wide switching frequency of 100kHz to 2500kHz allows
for efficiency and size optimization when selecting the
output filter components. The ultra-low minimum on-time
enables constant-frequency operation even at very high
step-down ratios. For switching noise sensitive
applications, it can be externally synchronized from
300kHz to 2200kHz.
The RT6365 provides complete protection functions such
as input under-voltage lockout, output under-voltage
protection, output over-voltage protection, over-current
protection, and thermal shutdown. Cycle-by-cycle current
limit provides protection against shorted outputs, and softstart eliminates input current surge during start-up. The
RT6365 is available in WDFN-10L 4x4 and SOP-8
(Exposed pad) packages.
Wide Input Voltage Range
4.5V to 60V
4V to 60V (Soft-start is finished)
Wide Output Voltage Range : 0.8V to VIN
0.8V ±1% Reference Accuracy
Peak Current Mode Control
Integrated 70mΩ
Ω High-Side MOSFET
Low Quiescent Current : 100μ
μA
Low Shutdown Current : 2.25μ
μA
Adjustable Switching : 100kHz to 2.5MHz
Synchronizable Switching : 300kHz to 2.2MHz
Power Saving Mode (PSM) at Light Load
Low Dropout at Light Loads with Integrated Boot
Recharge FET
Externally Adjustable Soft-Start by Part Number
Option
Power Good Indication by Part Number Option
Enable Control
Adjustable UVLO Voltage and Hysteresis
Built-In UVLO, UVP, OVP, OCP, OTP
Applications
12V, 24V and 48V Power Systems
GPS, Entertainment
Simplified Application Circuit
CBOOT
RT6365GQW
VIN
VIN
BOOT
CIN
SW
PGOOD
D1
RFB2
RT/SYNC
BOOT
CIN
L1
SW
VOUT
D1
COUT
EN
Enable Signal
RRT
CCOMP1
RFB1
FB
PGOOD
VIN
VOUT
EN
Enable Signal
CBOOT
RT6365GSP
VIN
L1
CCOMP1
RFB1
COUT
FB
RFB2
RCOMP
COMP
RCOMP
COMP
SS/TR
CCOMP2
CSS
GND PAD
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CCOMP2
RT/SYNC
RRT
GND PAD
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1
RT6365
Ordering Information
Pin Configuration
RT6365
Pin 1 Orientation***
(2) : Quadrant 2, Follow EIA-481-D
(WDFN-10L 4x4 only)
Package Type
SP : SOP-8 (Exposed Pad-Option 2)
QW : WDFN-10L 4x4 (W-Type)
Lead Plating System
G : Green (Halogen Free and Pb Free)
Note :
***Empty means Pin1 orientation is Quadrant 1
Richtek products are :
RoHS compliant and compatible with the current require-
(TOP VIEW)
BOOT
VIN
2
EN
3
RT/SYNC
4
8
SW
7
GND
6
COMP
5
FB
PAD
9
SOP-8 (Exposed pad)
BOOT
1
10
PGOOD
VIN
2
9
SW
EN
3
8
GND
SS/TR
4
7
COMP
RT/SYNC
5
6
FB
PAD
11
ments of IPC/JEDEC J-STD-020.
Suitable for use in SnPb or Pb-free soldering processes.
WDFN-10L 4x4
Marking Information
RT6365GSP
RT6365GSP : Product Number
RT6365
GSPYMDNN
YMDNN : Date Code
RT6365GQW
9T= : Product Code
9T=YM
DNN
YMDNN : Date Code
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RT6365
Functional Pin Description
Pin No.
Pin Name
SOP-8
(Exposed Pad)
WDFN-10L 4x4
1
1
Pin Function
BOOT
Bootstrap capacitor connection node to supply the high-side
gate driver. Connect a 0.1F ceramic capacitor between this
pin and the SW pin.
2
2
VIN
Power input. The input voltage range is from 4V to 60V.
Connect a suitable input capacitor between this pin and GND,
usually four 2.2F or larger ceramic capacitors with two
typical capacitance 4.7F.
3
3
EN
Enable control pin with internal pull-up current source. Float
or provide a logic-high ( 1.2V) enables the converter; a
logic-low forces the device into shutdown mode.
SS/TR
Soft-start and tracking control input. Connect a capacitor from
SS to GND to set the soft-start period. ”Do Not” leave this pin
floating to avoid inrush current during power up. It also can
be used to track and sequence because the SS/TR pin
voltage can override the internal reference voltage.
--
4
4
5
RT/SYNC
Frequency setting and external synchronous signal input.
Connect a resistor from this pin to GND to set the switching
frequency. Tie to a clock source for synchronization to an
external frequency.
5
6
FB
Output voltage sense. Sense the output voltage at the FB pin
through a resistive divider. The feedback reference voltage is
0.8V typically.
6
7
COMP
Compensation node. Connect external compensation
elements to this pin to stabilize the control loop.
7
8
GND
Ground. Provide the ground return path for the control
circuitry.
8
9
SW
Switch node. SW is the switching node that supplies power
to the output. Connect the output LC filter from SW to the
output load.
--
10
PGOOD
Open-drain power-good indication output. Once being
started-up, PGOOD will be pulled low to GND if any internal
protection is triggered.
9 (Exposed Pad)
11 (Exposed Pad) PAD
Exposed pad. The exposed pad is internally unconnected
and must be soldered to a large PCB copper area for
maximum power dissipation.
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RT6365
Functional Block Diagram
WDFN-10L 4x4 package
PGOOD
VIN
EN
Shutdown
+
Thermal
Shutdown
UV
IEN
-
Voltage
Reference
+
OV
Logic
Shutdown
Logic
+
-
Enable
Threshold
PGOOD
Enable
Comparator
SS/TR
VCC
Regulator
Current
Sense
Pulse-Skip
Minimum Clamp
ISS
0.8V
Shutdown
-
+
FB
UVLO
IEN_Hys
+ EA
+
-
High-Side
MOSFET
Logic
+
SW
Shutdown
+
COMP
BOOT
BOOT
UVLO
PWM
Comparator
Slope
Compensation
OC
Clamp
Frequency
Foldback
GND
BOOT
recharge
MOSFET
Oscillator
RT/SYNC
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RT6365
SOP-8 (Exposed pad) package
VIN
EN
Shutdown
+
Thermal
Shutdown
UV
UVLO
IEN_Hys
IEN
-
Voltage
Reference
+
OV
Logic
Shutdown
Logic
+
Enable
Threshold
-
Shutdown
-
Enable
Comparator
VCC
Regulator
Current
Sense
Pulse-Skip
Minimum Clamp
FB
0.8V
SS
+ EA
+
-
High-Side
MOSFET
Logic
+
SW
Shutdown
+
COMP
BOOT
BOOT
UVLO
PWM
Comparator
Slope
Compensation
OC
Clamp
Frequency
Foldback
GND
BOOT
recharge
MOSFET
Oscillator
RT/SYNC
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RT6365
Operation
Control Loop
The RT6365 is a high efficiency asynchronous step-down
converter utilizes the peak current mode control. An
internal oscillator initiates the turn-on of the high-side
MOSFET. At the beginning of each clock cycle, the internal
high-side MOSFET turns on, allowing current to ramp-up
in the inductor. The inductor current is internally monitored
during each switching cycle. The output voltage is sensed
on the FB pin via the resistor divider, R1 and R2, and
compared with the internal reference voltage (VREF) to
generate a compensation signal (VCOMP) on the COMP
pin. A control signal derived from the inductor current is
compared to the voltage at the COMP pin, derived from
the feedback voltage. When the inductor current reaches
its threshold, the high-side MOSFET is turned off and
inductor current ramps down. While the high-side MOSFET
is off, the inductor current is supplied through the external
low-side diode, freewheel diode, connected between the
SW pin and GND. This cycle repeats at the next clock
cycle. In this way, duty-cycle and output voltage are
controlled by regulating inductor current.
Light Load Operation
The RT6365 operates in power saving mode (PSM) at
light load to improve light load efficiency. IC starts to switch
when VFB is lower than PSM threshold ( VREF x 1.005,
typically) and stops switching when VFB is high enough.
During PSM, IC controls the minimum inductor peak
current (IL_PEAK) by clamping the COMP level. During nonswitching period, most of the internal circuit is shut down,
and the supply current drops to quiescent current (100μA,
typically) to reduce the quiescent power consumption.
With lower output loading, the non-switching period is
longer, so the effective switching frequency becomes lower
to reduce the switching loss and switch driving loss.
from 300kHz to 2.2MHz by RT/SYNC pin. The switching
frequency of synchronization should be equal to or higher
than the frequency set by the RT resistor. For example, if
the switching frequency of synchronization is 500kHz or
higher, the RRT/SYNC should be selected for 500kHz.
The RT6365 implements a frequency foldback function to
protect the device at over-load or short-circuited condition,
especially higher switching frequencies and input voltages.
The switching frequency is divided by 1, 2, 4, and 8 as the
FB pin voltage falls from 0.8 V to 0 V for switching
frequency control by RT resistor setting mode and the
synchronization mode both. The frequency foldback
function increases the switching cycle period and provides
more time for the inductor current to ramp down.
Maximum Duty Cycle Operation
The RT6365 is designed to operate in dropout at the high
duty cycle approaching 100%. If the operational duty cycle
is large and the required off-time becomes smaller than
minimum off-time, the RT6365 starts to enable skip offtime function and keeps high-side MOSFET on
continuously.
The RT6365 implements skip off-time function to achieve
high duty approaching 100% and the maximum output
voltage is near the minimum input supply voltage of the
application for input voltage momentarily falls down to the
normal output voltage requirement. The input voltage at
which the devices enter dropout changes depending on
the input voltage, output voltage, switching frequency, load
current, and the efficiency of the design.
For normal operation, the minimum input voltage can be
calculated from below equation :
VIN_MIN =
VOUT + IOUT_MAX RL + VD
1 fSW tOFF_MIN
+ IOUT_MAX RDS(ON)_H + VD
Switching Frequency Selection and Synchronization
The RT6365 provides an RT/SYNC pin for switching
frequency selection. The switching frequency can be set
by using external resistor RRT/SYNC and the switching
frequency range is from 100kHz to 2.5MHz. The RT6365
can also be synchronized with an external clock ranging
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where VIN_MIN is the minimum normal operating input
voltage; RDS(ON)_H is the on-resistance of the high-side
MOSFET; VD is the forward conduction voltage of the
freewheel diode; RL is the DC resistance of inductor.
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RT6365
BOOT UVLO
The BOOT UVLO circuit is implemented to ensure a
sufficient voltage of BOOT capacitor for turning on the highside MOSFET at any conditions. The BOOT UVLO usually
actives at extremely high conversion ratio or the higher
VOUT application operates at very light load. With such
conditions when the BOOT to SW voltage falls below
VBOOT_UVLO_L (2.7V, typically), the device turns on the
internal BOOT recharge FET (150ns, typically) to charge
the BOOT capacitor. The BOOT UVLO is sustained until
the BOOT to SW voltage is higher than VBOOT_UVLO_H
(2.8V, typically).
Enable Control
The RT6365 provides an EN pin, as an external chip enable
control, to enable or disable the device. If VEN is held
below the enable threshold voltage, switching is inhibited
even if the VIN voltage is above VIN under-voltage lockout
threshold (VUVLOH). If VEN is held below 0.4V, the converter
will enter into shutdown mode, that is, the converter is
disabled. During shutdown mode, the supply current can
be reduced to ISHDN (2.25μA, typically). If the EN voltage
rises above the enable threshold voltage while the VIN
voltage is higher than VUVLOH, the device will be turned
on, that is, switching being enabled and soft-start
sequence being initiated. The EN pin has an internal pullup current source IEN (1.2μA, typically) that enables
operation of the RT6365 when the EN pin floats. The EN
pin can be used to adjust the under-voltage lockout (UVLO)
threshold and hysteresis by using two external resistors.
The RT6365 implements additional hysteresis current
source IEN_Hys (3.4μA, typically) to adjust the UVLO. The
IEN_Hys is sourced out of the EN pin when VEN is larger
than enable threshold voltage. When the VEN falls below
enable threshold voltage, the IEN_Hys will be stopped
sourcing out of the EN pin.
the value of the external soft-start capacitor CSS/TR
connected from the SS/TR pin to ground or controlled by
external ramp voltage to SS/TR pin. During the start-up
sequence, the soft-start capacitor is charged by an internal
current source ISS (1.7μA, typically) to generate a softstart ramp voltage as a reference voltage to the PWM
comparator. The high-side MOSFET will start switching if
the voltage difference between SS/TR pin and FB pin is
equal to 42mV ( i.e. VSS/TR − VFB = 42mV, typically) during
power-up period. If the output is pre-biased to a certain
voltage during start-up for some reason, the device will
not start switching until the voltage difference between
SS/TR pin and FB pin is equal to 42mV (typically). Only
when this ramp voltage is higher than the feedback voltage
VFB, the switching will be resumed. The FB voltage will
track the SS/TR pin ramp voltage with a SS/TR to FB
offset voltage (42mV, typically) during soft-start interval.
The output voltage can then ramp up smoothly to its
targeted regulation voltage, and the converter can have a
monotonic smooth start-up. For soft-start control, the SS
pin should never be left unconnected. After the FB pin
voltage rises above 94% of VREF (typically), the PGOOD
pin will be in high impedance and the VPGOOD will be held
high. The typical start-up waveform shown in Figure 1
indicates the sequence and timing between the output
voltage and related voltage.
VIN = 4.5V to 60V
VIN
EN
tSS
540µs
SS
42mV
VOUT
10% x
VOUT
90% x VOUT
94% x VOUT
PGOOD
Soft-Start and Tracking Control
The soft-start function is used to prevent large inrush
currents while the converter is being powered up. The
RT6365GSP provides internal soft-start and the
RT6365GQW provides external soft-start function for inrush
currents control. The RT6365GQW provides an SS/TR pin
so that the soft-start time can be programmed by selecting
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
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Figure 1 Start-Up Sequence for RT6365GQW
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RT6365
Power Good Indication
Input Under-Voltage Lockout
The RT6365GQW features an open-drain power-good
output (PGOOD) to monitor the output voltage status. The
output delay of comparator prevents false flag operation
for short excursions in the output voltage, such as during
line and load transients. Pull-up PGOOD with a resistor
to an external voltage source and it is recommended to
use pull-up resistance between the values of 1 and 10kΩ
to reduce the switching noise coupling to PGOOD pin.
The PGOOD assertion requires input voltage above 2V.
The power-good function is controlled by a comparator
connected to the feedback signal VFB. If VFB rises above
the power-good high threshold (VTH_PGLH1) (94% of the
reference voltage, typically), the PGOOD pin will be in
high impedance and VPGOOD will be held high after a certain
delay elapsed. When VFB falls below power-good low
threshold (VTH_PGHL2) (92% of the reference voltage,
typically) or exceeds VTH_PGHL1 (109% of the reference
voltage, typically), the PGOOD pin will be pulled low. For
VFB higher than VTH_PGHL1, VPGOOD can be pulled high
again if VFB drops back by a power-good high threshold
(VTH_PGLH2) (106% of the reference voltage, typically).
Once being started-up, if any internal protection is
triggered, PGOOD will be pulled low to GND. The internal
open-drain pull-down device (45Ω, typically) will pull the
PGOOD pin low. The power good indication profile is shown
in Figure 2.
In addition to the EN pin, the RT6365 also provides enable
control through the VIN pin. If VEN rises above VTH_EN first,
VTH_PGHL1
VTH_PGLH2
VTH_PGLH1
VTH_PGHL2
VFB
VPGOOD
Figure 2. The Logic of PGOOD for RT6365GQW
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the switching will be inhibited until the VIN voltage rises
above VUVLOH. It is to ensure that the internal regulator is
ready so that operation with not-fully-enhanced internal
high-side MOSFET can be prevented. After the device is
powered up, if the input voltage VIN goes below the UVLO
falling threshold voltage (VUVLOL), this switching will be
inhibited; if VIN rises above the UVLO rising threshold
(VUVLOH), the device will resume switching. Note that VIN
= 4V is only design for input voltage momentarily falls
down to the UVLO threshold voltage requirement, and
normal input voltage should be larger than the VUVLOH.
High-Side MOSFET Peak Current Limit Protection
The RT6365 includes a cycle-by-cycle high-side MOSFET
peak current-limit protection against the condition that
the inductor current increasing abnormally, even over the
inductor saturation current rating. The inductor current
through the high-side MOSFET will be measured after a
certain amount of delay when the high-side MOSFET
being turned on. If an over-current condition occurs, the
converter will immediately turn off the high-side MOSFET
to prevent the inductor current exceeding the high-side
MOSFET peak current limit (ILIM).
Output Under-Voltage Protection
The RT6365 includes output under-voltage protection
(UVP) against over-load or short-circuited condition by
constantly monitoring the feedback voltage VFB. If VFB
drops below the under-voltage protection trip threshold
(50% of the internal reference voltage, typically), the UV
comparator will go high to turn off the internal high-side
switch. If the output under-voltage condition continues for
a period of time, the RT6365 enters output under-voltage
protection with hiccup mode and discharges the CSS/TR
by an internal discharging current source ISS_DIS (0.5μA,
typically). During hiccup mode, the device remains
shutdown. After the SS pin voltage is discharged to less
than 54mV (typically), the RT6365 attempts to re-start up
again, and the internal charging current source ISS (1.7μA,
typically) gradually increases the voltage on CSS/TR. The
high-side MOSFET will start switching when voltage
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RT6365
difference between SS pin and FB pin is equal to 42mV (
i.e. VSS − VFB = 42mV, typically). If the output undervoltage condition is not removed, the high-side MOSFET
stops switching when the voltage difference between SS
pin and FB pin is 1.2V ( i.e. VSS − VFB = 1.2V, typically)
and then the ISS_DIS discharging current source begins to
discharge C SS/TR. Upon completion of the soft-start
sequence, if the output under-voltage condition is removed,
the converter will resume normal operation; otherwise, such
cycle for auto-recovery will be repeated until the output
under-voltage condition is cleared. Hiccup mode allows
the circuit to operate safely with low input current and
power dissipation, and then resume normal operation as
soon as the over-load or short-circuit condition is removed.
A short circuit protection and recovery profile is shown in
Figure 3.
Since the CSS/TR will be discharged to 54mV when the
RT6365 enters output under-voltage protection, the first
discharging time (tSS_DIS1) can be calculated as below :
V 0.054
tSS_DIS1 = CSS SS
ISS_DIS
The equation below assumes that the VFB will be 0 at
short-circuited condition and it can be used to calculate
the CSS/TR discharging time (tSS_DIS2) and charging time
(tSS_CH) during hiccup mode.
1.146
tSS_DIS2 = CSS
ISS_DIS
tSS_CH = CSS
VOUT
2V/DIV
Output Over-Voltage Protection
The RT6365 includes an output over-voltage protection
(OVP) circuit to limit output voltage. Since the VFB is lower
than the reference voltage (VREF) at over-load or shortcircuited condition, the COMP voltage will be high to
demand maximum output current. Once the over-load or
short-circuited condition is removed, the COMP voltage
resumes to the normal voltage to regulate the output
voltage. The output voltage leads to the possibility of an
output overshoot if the load transient is faster than the
COMP voltage transient response, especially for small
output capacitance. If the VFB goes above the 109% of
the reference voltage, the high-side MOSFET will be forced
off to limit the output voltage. When the VFB drops lower
than the 106% of the reference voltage, the high-side
MOSFET will be resumed.
Over-Temperature Protection
The RT6365 includes an over-temperature protection (OTP)
circuitry to prevent overheating due to excessive power
dissipation. The OTP will shut down switching operation
when junction temperature exceeds a thermal shutdown
threshold TSD. Once the junction temperature cools down
by a thermal shutdown hysteresis (ΔTSD), the IC will
resume normal operation with a complete soft-start.
1.146
ISS_CH
Short Removed
Short Applied
VPGOOD
4V/DIV
VSS
4V/DIV
I SW
3A/DIV
Figure 3. Short Circuit Protection and Recovery
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RT6365
Absolute Maximum Ratings
Supply Voltage, VIN -----------------------------------------------------------------------------------------------------Enable Voltage, EN ------------------------------------------------------------------------------------------------------Switch Voltage, SW -----------------------------------------------------------------------------------------------------SW (t ≤ 100ns) ------------------------------------------------------------------------------------------------------------Power Good Voltage, PGOOD ----------------------------------------------------------------------------------------BOOT to SW (BOOT−SW) ---------------------------------------------------------------------------------------------All Other Pins -------------------------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------Junction Temperature ----------------------------------------------------------------------------------------------------Storage Temperature Range --------------------------------------------------------------------------------------------
ESD Ratings
(Note 1)
(Note 2)
ESD Susceptibility
HBM (Human Body Model) ---------------------------------------------------------------------------------------------- 2kV
Recommended Operating Conditions
−0.3V to 65V
−0.3V to 65V
−0.6V to 65V
−5V to 70V
−0.3V to 65V
−0.3V to 6V
−0.3V to 6V
260°C
150°C
−65°C to 150°C
(Note 3)
Supply Input Voltage, VIN ----------------------------------------------------------------------------------------------- 4V to 60V
Output Voltage ------------------------------------------------------------------------------------------------------------- 0.8V to VIN
Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C
Thermal Information
(Note 4 and Note 5)
Thermal Parameter
WDFN-10L 4x4
SOP-8
(Exposed pad)
Unit
JA
Junction-to-ambient thermal resistance (JEDEC
standard)
31.7
30.4
C/W
JC(Top)
Junction-to-case (top) thermal resistance
46.4
73.9
C/W
JC(Bottom)
Junction-to-case (bottom) thermal resistance
4.1
3.4
C/W
JA(EVB)
Junction-to-ambient thermal resistance (specific
EVB)
30.4
30
C/W
JC(Top)
Junction-to-top characterization parameter
3.4
5
C/W
JB
Junction-to-board characterization parameter
13
13.2
C/W
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RT6365
Electrical Characteristics
(VIN = 12V, TA = TJ = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
4
--
60
V
Supply Voltage
Input Operating Voltage
VIN
After soft-start is finished
VIN Under-Voltage Lockout
Threshold
VUVLOH
VIN rising
4.1
4.3
4.5
VUVLOL
VIN falling
3.8
3.9
4
Shutdown Current
ISHDN
VEN = 0V
--
2.25
5
A
Quiescent Current
IQ
VEN = 2V, VFB = 0.83V, not
switching
--
100
135
A
1.1
1.2
1.3
V
VIN = 12V, TA = 25C
--
540
--
s
VTH_EN + 50mV
--
4.6
--
A
VTH_EN 50mV
0.58
1.2
1.8
A
2.2
3.4
4.5
A
0.792
0.8
0.808
V
--
70
140
m
--
50
--
nA
Normal operation
2A < ICOMP < 2A
VCOMP = 1V
--
440
--
During SS,
2A < ICOMP < 2A
VCOMP = 1V, VFB = 0.4V
--
77
--
VFB = 0.8V
--
10000
--
V/V
--
2500
--
kHz
--
30
--
A
--
17
--
A/V
6.375
7.5
8.625
A
V
Enable Voltage
Enable Threshold Voltage
VTH_EN
Enable to COMP Active
Pull-Up Current
IEN
Hysteresis Current
IEN_Hys
Reference Voltage
Reference Voltage
VREF
Internal MOSFET
High-Side Switch OnResistance
RDS(ON)_H
VIN = 12V, VBOOT VSW = 5V
Error Amplifier
Input Current
Error Amplifier TransConductance
gm
Error Amplifier DC Gain
Error Amplifier Bandwidth
Source/Sink Current
COMP to Current Sense
Trans-Conductance
VCOMP = 1V, 100mV overdrive
gm_cs
A/V
Current Limit
Current Limit
ILIM
f SW = 500kHz,
VOUT = 5V
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11
RT6365
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
IOUT = 1A
--
--
135
ns
On-Time Timer Control
Minimum On-Time
tON_MIN
Timing Resistor and External Clock
Switching Frequency 1
f SW1
RRT/SYNC = 1M
90
105
120
kHz
Switching Frequency 2
f SW2
RRT/SYNC = 200k
450
500
550
kHz
Switching Frequency 3
f SW3
RRT/SYNC = 37.4k
2200
2450
2700
kHz
0.3
--
2.2
MHz
--
20
--
ns
VIH_SYNC
--
1.55
2
VIL_SYNC
0.5
1.2
--
--
70
--
ns
VSS/TR = 0.4V, RT6365GQW
--
1.7
--
A
SS/TR to FB Offset
VSS/TR = 0.4V, RT6365GQW
--
42
--
mV
SS/TR-to-Reference Crossover
98% nominal, RT6365GQW
--
1.16
--
V
SS/TR Discharge Voltage
VFB = 0V, RT6365GQW
--
54
--
mV
10% to 90%, RT6365GSP
1.4
2
2.6
ms
VTH_PGLH1
VFB rising, % of VREF, PGOOD
from low to high, RT6365GQW
90
94
98
VTH_PGHL1
VFB rising, % of VREF, PGOOD
from high to low, RT6365GQW
105
109
113
VTH_PGHL2
VFB falling, % of VREF, PGOOD
from high to low, RT6365GQW
88
92
96
VTH_PGLH2
VFB falling, % of VREF, PGOOD
from low to high, RT6365GQW
102
106
110
VFB falling, RT6365GQW
--
2
--
%
VPGOOD = 5.5V, TA = 25°C,
RT6365GQW
--
10
500
nA
On-Resistance
IPGOOD = 3mA, VFB < 0.79V,
RT6365GQW
--
45
--
Minimum VIN for defined output
VPGOOOD < 0.5V, IPGOOD = 100A,
RT6365GQW
--
0.9
2
V
SYNC Frequency Range
External clock
Minimum Sync Pulse Width
SYNC Threshold Voltage
RT/SYNC Falling Edge to SW
Rising Edge Delay
V
Soft-Start and Tracking
Internal Charge Current
ISS
Internal Soft-Start Time
Soft-Start Period
Power Good
Power Good Threshold
Power Good Hysteresis
Power Good Leakage Current
ILK_PGOOD
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%
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DS6365-02 March 2020
RT6365
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Thermal Shutdown
Thermal Shutdown
TSD
--
175
--
°C
Thermal Shutdown
Hysteresis
TSD
--
15
--
°C
--
0.4
--
V
Output Under-Voltage Protection
UVP Trip Threshold
VUVP
UVP detect
Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
These are stress ratings only, and functional operation of the device at these or any other conditions beyond those
indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions may affect device reliability.
Note 2. Devices are ESD sensitive. Handling precaution is recommended.
Note 3. The device is not guaranteed to function outside its operating conditions.
Note 4. θJA and θJC are measured or simulated at TA = 25°C based on the JEDEC 51-7 standard.
Note 5. θJA(EVB), ψJC(Top) and ψJB are measured on a high effective-thermal-conductivity four-layer test board which is in size of
70mm x 50mm; furthermore, outer layers with 2 oz. Cu and inner layers with 1 oz. Cu. Thermal resistance/parameter
values may vary depending on the PCB material, layout, and test environmental conditions.
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RT6365
Typical Application Circuit
300kHz, 3.3V, 5A Step-Down Converter
CBOOT
0.1µF
RT6365GSP
VIN
4.5V to 60V
2
C1
2.2µF
C3
2.2µF
C2
2.2µF
VIN
BOOT
C4
2.2µF
SW
1
L1
7.8µH
8
D1
SS5P6
3 EN
Enable Signal
FB
C5
10nF
R3
5.36k
6
5
VOUT
3.3V/5A
R1
31.6k
C7
47µF
C8
47µF
C9
47µF
R2
10k
COMP
C6
220pF
RT/SYNC
RRT
332k
4
GND PAD
7
9 (Exposed pad)
fSW = 300kHz
L1 = 744325780
C7/C8/C9 = GRM32ER61C476KE15L
C1/C2/C3/C4 = HMK316AC7225KL-TE
400kHz, 5V, 5A Step-Down Converter
RT6365GSP
VIN
8V to 60V
2
C1
2.2µF
C3
2.2µF
C2
2.2µF
VIN
BOOT
C4
2.2µF
SW
1
CBOOT
0.1µF
L1
6.8µH
8
D1
SS5P6
3 EN
Enable Signal
FB
C5
8.2nF
R3
10.5k
6
5
VOUT
5V/5A
R1
52.3k
C7
47µF
C8
47µF
C9
47µF
R2
10k
COMP
C6
100pF
RT/SYNC
4
RRT
249k
GND PAD
7
9 (Exposed pad)
fSW = 400kHz
L1 = Cyntec-VCHA075D-6R8MS6
C7/C8/C9 = GRM32ER61C476KE15L
C1/C2/C3/C4 = HMK316AC7225KL-TE
400kHz, 12V, 5A Step-Down Converter
RT6365GSP
VIN
14V to 60V
2
C1
2.2µF
C2
2.2µF
C3
2.2µF
VIN
BOOT
C4
2.2µF
SW
3
Enable Signal
R3
8.87k
L1
15µH
8
D1
SS5P6
EN
FB
C5
8.2nF
1
CBOOT
0.1µF
5
VOUT
12V/5A
R1
140k
C7
10µF
C8
10µF
C9
10µF
C10
10µF
C11
10µF
C12
10µF
R2
10k
6
C6
100pF
COMP
RT/SYNC
4
RRT
249k
GND PAD
7
9 (Exposed pad)
fSW = 400kHz
L1 = Cyntec-VCHA105D-150MS6
C7/C8/C9/C10/C11/C12 = UMK325AB7106KM
C1/C2/C3/C4 = HMK316AC7225KL-TE
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is a registered trademark of Richtek Technology Corporation.
DS6365-02 March 2020
RT6365
300kHz, 3.3V, 5A Step-Down Converter
RT6365GQW
2
VIN
4.5V to 60V
C1
2.2µF
C3
2.2µF
C2
2.2µF
BOOT
C4
2.2µF
Enable Signal
PWRGD
RRT
332k
C5
R3
7
L1
7.8µH
D1
SS5P6
3 EN
10
PGOOD
5
CBOOT
0.1µF
9
SW
C6 5.36k
10nF
VIN
1
6
FB
R1
31.6k
C7
47µF
C8
47µF
C9
47µF
R2
10k
RT/SYNC
SS/TR 4
COMP
VOUT
3.3V/5A
CSS
0.01µF
GND PAD
8
11 (Exposed pad)
220pF
fSW = 300kHz
L1 =744325780
C7/C8/C9 = GRM32ER61C476KE15L
C1/C2/C3/C4 = HMK316AC7225KL-TE
400kHz, 5V, 5A Step-Down Converter
RT6365GQW
2
VIN
8V to 60V
C1
2.2µF
C3
2.2µF
C2
2.2µF
VIN
C4
2.2µF
Enable Signal
PWRGD
RRT
249k
C5
R3
8.2nF C6 10.5k
SW
7
L1
6.8µH
9
D1
SS5P6
3 EN
10
PGOOD
5
1
BOOT
CBOOT
0.1µF
6
FB
R1
52.3k
C7
47µF
C8
47µF
C9
47µF
R2
10k
RT/SYNC
COMP
VOUT
5V/5A
SS/TR 4
CSS
0.01µF
GND PAD
8
11 (Exposed pad)
100pF
fSW = 400kHz
L1 = Cyntec-VCHA075D-6R8MS6
C7/C8/C9 = GRM32ER61C476KE15L
C1/C2/C3/C4 = HMK316AC7225KL-TE
400kHz, 12V, 5A Step-Down Converter
RT6365GQW
VIN
14V to 60V
2
C1
2.2µF
C2
2.2µF
C3
2.2µF
Enable Signal
PWRGD
RRT
249k
C5
VIN
C4
2.2µF
R3
BOOT
SW
3 EN
10
PGOOD
5
7
8.2nF C6 8.87k
100pF
1
CBOOT
0.1µF
L1
15µH
9
D1
SS5P6
FB
6
R1
140k
C7
10µF
C8
10µF
C9
10µF
C10
10µF
C11
10µF
C12
10µF
R2
10k
RT/SYNC
COMP
VOUT
12V/5A
SS/TR 4
CSS
0.01µF
GND PAD
8
11 (Exposed pad)
fSW = 400kHz
L1 = Cyntec-VCHA105D-150MS6
C7/C8/C9/C10/C11/C12 = UMK325AB7106KM
C1/C2/C3/C4 = HMK316AC7225KL-TE
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15
RT6365
Typical Operating Characteristics
Efficiency vs. Output Current
Efficiency vs. Output Current
100
100
90
90
70
60
50
40
VIN = 12V, VOUT = 5V
fSW = 2.5MHz, L= VCMT063T-1R5MN5, 1.5μH
fSW = 1MHz, L= VCHA075D-3R3MS6, 3.3μH
fSW = 400kHz, L= VCHA075D-6R8MS6, 6.8μH
fSW = 100kHz, L= 74435573300, 33μH
30
20
10
0
0.001
0.01
0.1
1
VIN
VIN
VIN
VIN
VIN
80
Freq = 100k
Freq = 400k
Freq = 1M
Freq = 2.5M
Efficiency (%)
Efficiency (%)
80
70
60
40
30
20
VOUT = 12V, fSW = 400kHz,
L = VCHA105D-150MS6, 15μH
10
0
0.001
10
0.01
Efficiency vs. Output Current
90
90
40
30
=
=
=
=
=
=
=
=
70
VOUT = 5V, fSW = 400kHz
L = VCHA075D-6R8MS6, 6.8μH
0
0.001
50
40
30
0.01
0.1
1
VOUT = 3.3V, fSW = 300kHz
L = 744325780, 7.8μH
10
0
0.001
10
0.01
Output Current (A)
0.1
=
=
=
=
=
=
=
=
=
4.5V
8V
12V
13.5V
18V
24V
36V
48V
60V
1
10
Output Current (A)
Output Voltage vs. Output Current
Output Voltage vs. Input Voltage
5.15
5.06
5.05
Output Voltage (V)
5.10
Output Voltage (V)
VIN
VIN
VIN
VIN
VIN
VIN
VIN
VIN
VIN
60
20
20
10
10
80
8V
12V
13.5V
18V
24V
36V
48V
60V
Efficiency (%)
Efficiency (%)
VIN
VIN
VIN
VIN
VIN
VIN
VIN
VIN
50
1
Efficiency vs. Output Current
100
60
0.1
Output Current (A)
100
70
14V
24V
36V
48V
60V
50
Output Current (A)
80
=
=
=
=
=
5.05
5.00
4.95
4.90
5.04
5.03
5.02
5.01
5.00
4.99
VIN = 12V, VOUT = 5V
IOUT = 5A, VOUT = 5V
4.85
4.98
0
1
2
3
4
Output Current (A)
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5
5
10
15
20
25
30
35
40
45
50
55
60
Input Voltage (V)
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RT6365
Current Limit vs. Input Voltage
Switching Frequency vs. Temperature
9.0
Switching Frequency (kHz)1
120
Current Limit (A)
8.5
8.0
7.5
7.0
6.5
115
110
105
100
95
VIN = 12V, VOUT = 5V
IOUT = 2.5A, RRT/SYNC = 1MΩ
VOUT = 5V, fSW = 500kHz, L = 5.6μH
6.0
90
6
12
18
24
30
36
42
48
54
60
-50
-25
0
Input Voltage (V)
Switching Frequency vs. Temperature
75
100
125
Switching Frequency vs. Temperature
2700
530
510
490
470
VIN = 12V, VOUT = 5V
IOUT = 2.5A, RRT/SYNC = 200kΩ
Switching Frequency (kHz)1
Switching Frequency (kHz)1
50
Temperature (°C)
550
450
2600
2500
2400
2300
VIN = 12V, VOUT = 5V
IOUT = 2.5A, RRT/SYNC = 37.4kΩ
2200
-50
-25
0
25
50
75
100
125
-50
-25
0
Temperature (°C)
25
50
75
100
125
Temperature (°C)
Quiescent Current vs. Temperature
Shutdown Current vs. Temperature
135
5.0
4.5
125
Shutdown Current (μA)1
Quiescent Current (μA)
25
115
105
95
85
75
VIN = 12V
65
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
VIN = 12V
0.0
-50
-25
0
25
50
75
100
Temperature (°C)
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125
-50
-25
0
25
50
75
100
125
Temperature (°C)
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RT6365
UVLO Threshold vs. Temperature
Enable Threshold vs. Temperature
1.30
4.6
Enable Threshold (V)
UVLO Threshold (V)
5.0
Rising
4.2
Falling
3.8
3.4
1.26
1.22
1.18
1.14
VOUT = 1V
VOUT = 1V
3.0
1.10
-50
-25
0
25
50
75
100
125
-50
-25
0
Temperature (°C)
50
75
100
125
Temperature (°C)
Output Voltage vs. Temperature
Current Limit vs. Temperature
5.10
9.0
High-Side MOSFET
8.5
Current Limit (A)
5.05
Output Voltage (V)
25
5.00
4.95
4.90
4.85
8.0
7.5
7.0
6.5
6.0
VIN = 12V, VOUT = 5V
fSW = 500kHz, L= 5.6μH
5.5
VIN = 12V, VOUT = 5V, IOUT = 2.5A
4.80
-50
-25
0
25
50
75
100
5.0
125
-50
-25
0
25
50
75
Temperature (°C)
Temperature (°C)
Load Transient Response
Output Ripple Voltage
100
125
VOUT
(10mV/Div)
IOUT
(1A/Div)
VOUT
(200mV/Div)
VIN = 12V, VOUT = 5V
IOUT = 2.5A to 5A, fSW = 400kHz
COUT = 47μF x 3, L = 6.8μH
VSW
(5V/Div)
VIN = 12V, VOUT = 5V, IOUT = 3mA, fSW = 400kHz
Time (100μs/Div)
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Time (200μs/Div)
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RT6365
Output Ripple Voltage
Power On from EN
VIN = 12V, VOUT = 5V, IOUT = 5A, fSW = 400kHz
VEN
(2V/Div)
VOUT
(10mV/Div)
VSS/TR
(1V/Div)
VIN = 12V, VOUT = 5V
IOUT = 5A, fSW = 400kHz
VOUT
(2V/Div)
VPGOOD
(5V/Div)
VSW
(5V/Div)
Time (4μs/Div)
Time (2ms/Div)
Power Off from EN
Power On from VIN
VEN
(2V/Div)
VSS/TR
(5V/Div)
VOUT
(2V/Div)
VIN = 12V, VOUT = 5V
IOUT = 5A, fSW = 400kHz
VPGOOD
(5V/Div)
VIN
(4V/Div)
VSS/TR
(2V/Div)
VIN = 12V, VOUT = 5V
IOUT = 5A, fSW = 400kHz
VOUT
(2V/Div)
VPGOOD
(5V/Div)
Time (200μs/Div)
Time (4ms/Div)
Power Off from VIN
Start-Up Dropout Performance
VIN
(4V/Div)
VIN
VSS/TR
(5V/Div)
VOUT
(2V/Div)
VPGOOD
(5V/Div)
VIN = 12V, VOUT = 5V
IOUT = 5A, fSW = 400kHz
VOUT
VIN
(2V/Div)
VOUT
(2V/Div)
VOUT = 5V, IOUT = 0.1A, 50Ω, EN pin floats
Time (4ms/Div)
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RT6365
Start-Up Dropout Performance
VIN
VOUT
VIN
(2V/Div)
VOUT
(2V/Div)
VOUT = 5V, IOUT = 1A, 5Ω, EN pin floats
Time (100ms/Div)
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RT6365
Application Information
Switching Frequency Setting
The RT6365 offers adjustable switching frequency setting
and the switching frequency can be set by using external
resistor RRT/SYNC. The switching frequency range is from
100kHz to 2.5MHz. The selection of the operating
frequency is a trade-off between efficiency and component
size. High frequency operation allows the use of smaller
inductor and capacitor values. Operation at lower
frequencies improves efficiency by reducing internal gate
charge and transition losses, but requires larger inductance
values and/or capacitance to maintain low output ripple
voltage. The additional constraints on operating frequency
are the minimum on-time and minimum off-time. The
minimum on-time, tON_MIN, is the smallest duration of time
in which the high-side switch can be in its “on” state.
The minimum on-time of the RT6365 is 100ns (typically).
In continuous mode operation, the maximum operating
frequency, fSW_MAX, can be derived from the minimum ontime according to the formula below :
VOUT
fSW_MAX =
tON_MIN VIN_MAX
where VIN_MAX is the maximum operating input voltage.
The minimum off-time, tOFF_MIN, is the smallest amount of
time that the RT6365 is capable of tripping the current
comparator and turning the high-side MOSFET back off.
The minimum off-time of the RT6365 is 130ns (typically).
If the switching frequency should be constant, the required
off-time needs to be larger than minimum off-time. Below
shows minimum off-time calculation with loss terms
consideration :
VOUT + IOUT_MAX RL + VD
1
VIN_MIN IOUT_MAX RDS(ON)_H VD
t OFF_MIN
fSW
where RDS(ON)_H is the on-resistance of the high-side
MOSFET; VD is the forward conduction voltage of the
freewheel diode; RL is the DC resistance of inductor.
The switching frequency fSW is set by the external resistor
RRT/SYNC connected between the RT/SYNC pin and
ground. The failure mode and effects analysis (FMEA)
consideration is applied to the RT/SYNC pin setting to
avoid abnormal switching frequency operation at failure
conditions. It includes failure scenarios of short-circuit to
ground and the pin is left open. The switching frequency
will be 900kHz (typically) when the RT/SYNC pin is
shorted to ground, and 240kHz (typically) when the pin is
left open. The equation below shows the relation between
setting frequency and the RRT/SYNC value.
120279
RRT/SYNC (k ) =
fSW1.033
where fSW (kHz) is the desired setting frequency. It is
recommended to use 1% tolerance or better, and the
temperature coefficient of 100 ppm or less resistors. Figure
4 shows the relationship between switching frequency and
the RRT/SYNC resistor.
1200
1000
RRT/SYNC (k Ω )
A general RT6365 application circuit is shown in typical
application circuit section. External component selection
is largely driven by the load requirement and begins with
the switching frequency selection by using external resistor
RRT/SYNC. Next, the inductor L, the input capacitor CIN,
the output capacitor COUT and freewheel diode are chosen.
Next, feedback resistors and compensation circuit are
selected to set the desired output voltage and crossover
frequency, and the bootstrap capacitor CBOOT can be
selected. Finally, the remaining optional external
components can be selected for functions such as the
EN, external soft-start, PGOOD, and synchronization.
800
600
400
200
0
0
500
1000
1500
2000
2500
f SW (kHz)
Figure 4. Switching Frequency vs. RRT/SYNC
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RT6365
Inductor Selection
The inductor selection trade-offs among size, cost,
efficiency, and transient response requirements. Generally,
three key inductor parameters are specified for operation
with the device: inductance value (L), inductor saturation
current (ISAT), and DC resistance (DCR).
A good compromise between size and loss is a 30% peakto-peak ripple current to the IC rated current. The switching
frequency, input voltage, output voltage, and selected
inductor ripple current determines the inductor value as
follows :
V
(VIN VOUT )
L = OUT
VIN fSW IL
Larger inductance values result in lower output ripple
voltage and higher efficiency, but a slightly degraded
transient response. This results in additional phase lag in
the loop and reduces the crossover frequency. As the ratio
of the slope-compensation ramp to the sensed-current
ramp increases, the current-mode system tilts towards
voltage-mode control. Lower inductance values allow for
smaller case size, but the increased ripple lowers the
effective current limit threshold and increases the AC
losses in the inductor. It also causes insufficient slope
compensation and ultimately loop instability as duty cycle
approaches or exceeds 50%. When duty cycle exceeds
50%, below condition needs to be satisfied :
V
4 fSW OUT
L
A good compromise among size, efficiency, and transient
response can be achieved by setting an inductor current
ripple (ΔIL) with about 10% to 50% of the maximum rated
output current (5A).
To enhance the efficiency, choose a low-loss inductor
having the lowest possible DC resistance that fits in the
allotted dimensions. The inductor value determines not
only the ripple current but also the load-current value at
which DCM/CCM switchover occurs. The selected inductor
should have a saturation current rating greater than the
peak current limit of the device. The core must be large
enough not to saturate at the peak inductor current (IL_PEAK) :
V
(VIN VOUT )
IL = OUT
VIN fSW L
IL_PEAK = IOUT_MAX + 1 IL
2
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22
The current flowing through the inductor is the inductor
ripple current plus the output current. During power up,
faults, or transient load conditions, the inductor current
can increase above the calculated peak inductor current
level calculated above . In transient conditions, the inductor
current can increase up to the switch current limit of the
device. For this reason, the most conservative approach
is to specify an inductor with a saturation current rating
which is equal to or greater than the switch current limit
rather than the peak inductor current. It is recommended
to use shielded inductors for good EMI performance.
Input Capacitor Selection
Input capacitance, CIN, is needed to filter the pulsating
current at the drain of the high-side MOSFET. The CIN
should be sized to do this without causing a large variation
in input voltage. The peak-to-peak voltage ripple on input
capacitor can be estimated as equation below :
+ ESR IOUT
VCIN = D IOUT 1 D
CIN fSW
where
V
D = OUT
VIN
Figure 5 shows the CIN ripple current flowing through the
input capacitors and the resulting voltage ripple across
the capacitors.
For ceramic capacitors, the equivalent series resistance
(ESR) is very low, the ripple which is caused by ESR can
be ignored, and the minimum value of effective input
capacitance can be estimated as equation below :
CIN_MIN = IOUT_MAX
D 1 D
VCIN_MAX fSW
where ΔVCIN_MAX is maximum input ripple voltage.
VCIN
CIN Ripple Voltage
VESR = IOUT x ESR
(1-D) x IOUT
CIN Ripple Current
D x IOUT
D x tSW (1-D) x tSW
Figure 5. CIN Ripple Voltage and Ripple Current
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RT6365
In addition, the input capacitor needs to have a very low
ESR and must be rated to handle the worst-case RMS
input current. The RMS ripple current (IRMS) of the regulator
can be determined by the input voltage (VIN), output voltage
(VOUT), and rated output current (IOUT) as the following
equation :
V
VIN
IRMS IOUT _MAX OUT
1
VIN
VOUT
From the above, the maximum RMS input ripple current
occurs at maximum output load, which will be used as
the requirements to consider the current capabilities of
the input capacitors. The maximum ripple voltage usually
occurs at 50% duty cycle, that is, VIN = 2 x VOUT. It is
common to use the worse IRMS ≅ 0.5 x IOUT_MAX at VIN = 2
x VOUT for design. Note that ripple current ratings from
capacitor manufacturers are often based on only 2000
hours of life which makes it advisable to further de-rate
the capacitor, or choose a capacitor rated at a higher
temperature than required.
Several capacitors may also be paralleled to meet size,
height and thermal requirements in the design. For low
input voltage applications, sufficient bulk input capacitance
is needed to minimize transient effects during output load
changes.
Ceramic capacitors are ideal for switching regulator
applications because of its small size, robustness, and
very low ESR. However, care must be taken when these
capacitors are used at the input. A ceramic input capacitor
combined with trace or cable inductance forms a high
quality (under damped) tank circuit. If the RT6365 circuit
is plugged into a live supply, the input voltage can ring to
twice its nominal value, possibly exceeding the device's
rating. This situation is easily avoided by placing the low
ESR ceramic input capacitor in parallel with a bulk
capacitor with higher ESR to damp the voltage ringing.
The input capacitor should be placed as close as possible
to the VIN pin with a low inductance connection to the
GND of the IC. The VIN pin must be bypassed to ground
with a minimum value of effective capacitance 3μF. For
400kHz switching frequency application, two 4.7μF, X7R
capacitors can be connected between the VIN pin and the
GND pin. The larger input capacitance is required when a
lower switching frequency is used. For filtering high
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
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frequency noise, an additional small 0.1μF capacitor should
be placed close to the part and the capacitor should be
0402 or 0603 in size. X7R capacitors are recommended
for best performance across temperature and input voltage
variations.
Output Capacitor Selection
The selection of COUT is determined by considering to
satisfy the voltage ripple and the transient loads. The peakto-peak output ripple, ΔVOUT, is determined by :
1
VOUT = IL ESR +
8 fSW COUT
Where the ΔIL is the peak-to-peak inductor ripple current.
The highest output ripple is at maximum input voltage
since ΔIL increases with input voltage. Multiple capacitors
placed in parallel may be needed to meet the ESR and
RMS current handling requirements.
Regarding to the transient loads, the VSAG and VSOAR
requirement should be taken into consideration for
choosing the effective output capacitance value. The
amount of output sag/soar is a function of the crossover
frequency factor at PWM, and can be calculated from
below equation :
IOUT
VSAG = VSOAR =
2 COUT fC
Ceramic capacitors have very low equivalent series
resistance (ESR) and provide the best ripple performance.
The X7R dielectric capacitor is recommended for the best
performance across temperature and input voltage
variations. The variation of the capacitance value with
temperature, DC bias voltage and switching frequency
needs to be taken into consideration. For example, the
capacitance value of a capacitor decreases as the DC bias
across the capacitor increases. Be careful to consider the
voltage coefficient of ceramic capacitors when choosing
the value and case size. Most ceramic capacitors lose
50% or more of their rated values when used near their
rated voltage.
Transient performance can be improved with a higher value
output capacitor. Increasing the output capacitance will
also decrease the output voltage ripple.
Freewheel Diode Selection
When the high-side MOSFET turns off, inductor current
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RT6365
is supplied through the external low-side diode, freewheel
diode, connected between the SW pin and GND.
The reverse voltage rating of freewheel diode should be
equal to or greater than the VIN_MAX. The maximum average
forward rectified current of freewheel diode should be equal
to or greater than the maximum load current. Considering
the efficiency performance, the diode must have a
minimum forward voltage and reverse recovery time. So
Schottky Diodes are recommended to be freewheel diode.
Restriction of Forward Voltage (V)
The select forward voltage of Schottky Diode must be less
than the restriction of forward voltage in Figure 6 at
operating temperature range to avoid the IC malfunction.
output voltage is set according to the following equation :
R1
VOUT = VREF 1 +
R2
where the reference voltage VREF, is 0.8V (typically).
VOUT
R1
FB
RT6365
R2
GND
Figure 7. Output Voltage Setting
The placement of the resistive divider should be within
5mm of the FB pin. The resistance of R2 should not be
larger than 80kΩ for noise immunity consideration. The
resistance of R1 can then be obtained as below :
R2 (VOUT VREF )
R1 =
VREF
1.45
1.40
1.35
1.30
1.25
1.20
For better output voltage accuracy, the divider resistors
(R1 and R2) with ±1% tolerance or better should be used.
1.15
1.10
1.05
Compensation Network Design
1.00
The purpose of loop compensation is to ensure stable
operation while maximizing the dynamic performance. An
undercompensated system may result in unstable
operation. Typical symptoms of an unstable power supply
include: audible noise from the magnetic components or
ceramic capacitors, jittering in the switching waveforms,
oscillation of output voltage, overheating of power MOSFET
and so on.
-50
-25
0
25
50
75
100
125
150
Temperature (°C)
Figure 6. Restriction of Forward Voltage vs. Temperature
The losses of freewheel diode must be considered in order
to ensure sufficient power rating for diode selection. The
conduction loss in the diode is determined by the forward
voltage of the diode, and the switching loss in the diode
can be determined by the junction capacitor of the diode.
The power dissipation of the diode can be calculated as
following formula
V
PD = PD_CON + PD_SW = IOUT VD 1 OUT
V
IN
1
2
+ CJ VIN + VD fSW
2
where CJ is the junction capacitance of the freewheel diode.
Output Voltage Programming
The output voltage can be programmed by a resistive divider
from the output to ground with the midpoint connected to
the FB pin. The resistive divider allows the FB pin to sense
a fraction of the output voltage as shown in Figure 7. The
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In most cases, the peak current mode control architecture
used in the RT6365 only requires two external components
to achieve a stable design as shown in Figure 8. The
compensation can be selected to accommodate any
capacitor type or value. The external compensation also
allows the user to set the crossover frequency and optimize
the transient performance of the device. At around the
crossover frequency, the peak current mode control
(PCMC) equivalent circuit of Buck converter can be
simplified as shown in Figure 9. The method presented
here is easy to calculate and ignore the effects of the
internal slope compensation. Since the slope
compensation is ignored, the actual crossover frequency
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RT6365
is usually lower than the crossover frequency used in the
calculations. It is always necessary to make a
measurement before releasing the design for final
production. Though the models of power supplies are
theoretically correct, they cannot take full account of the
circuit parasitic and component nonlinearity, such as the
ESR variations of output capacitors, the nonlinearity of
inductors and capacitors, etc. Also, circuit PCB noise and
limited measurement accuracy may also cause
measurement errors. A Bode plot is ideally measured with
a network analyzer while Richtek application note AN038
provides an alternative way to check the stability quickly
and easily. Generally, follow the steps below to calculate
the compensation components :
1. Set up the crossover frequency, f C. For stability
purposes, the target is to have a loop gain slope that
is −20dB/decade from a very low frequency to beyond
the crossover frequency. In general, one-twentieth to
one-tenth of the switching frequency (5% to 10% of
fsw) is recommended to be the crossover frequency.
Do “NOT” design the crossover frequency over 80kHz
with the RT6365. For dynamic purposes, the higher
the bandwidth, the faster the load transient response.
The downside of the high bandwidth is that it increases
the susceptibility of the regulators to board noise which
ultimately leads to excessive falling edge jitter of the
switch node voltage.
2. RCOMP can be determi ned by :
2 fC VOUT COUT
2 fC COUT
RCOMP =
=
gm VREF gm_cs
gm gm_cs
R1 + R2
R2
where gm is the error amplifier gain of transconductance (440μA/V) ; gm_cs is COMP to current
sense trans-conductance (17A/V); the variation of COUT
with temperature, DC bias voltage and switching
frequency needs to be taken into consideration.
3. A compensation zero can be placed at or before the
dominant pole of buck which is provided by output
capacitor and maximum output loading (RL). Calculate
CCOMP :
R COUT
CCOMP = L
RCOMP
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4. The compensation pole is set to the frequency at the
ESR zero or 1/2 of the operating frequency. Output
capacitor and its ESR provide a zero, and optional
CCOMP2 can be used to cancel this zero.
R
COUT
CCOMP2 = ESR
RCOMP
If 1/2 of the operating frequency is lower than the ESR
zero, the compensation pole is set at 1/2 of the
operating frequency.
1
CCOMP2 =
fsw
RCOMP
2
2
Note: Generally, CCOMP2 is an optional component used
to enhance noise immunity.
COMP
RCOMP
CCOMP2
RT6365
(option)
CCOMP
GND
Figure 8. External Compensation Components
VOUT
RESR
gm_cs
RL
COUT
VCOMP
-
(option)
RCOMP
R1
EA
+
CCOMP2
VFB
VREF
R2
CCOMP
Figure 9. Simplified Equivalent Circuit of Buck with
PCMC
Bootstrap Driver Supply
The bootstrap capacitor (CBOOT) between the BOOT pin
and the SW pin is used to create a voltage rail above the
applied input voltage, VIN. Specifically, the bootstrap
capacitor is charged through an internal diode to an internal
voltage source each time when the low-side freewheel
diode conducts. The charge on this capacitor is then used
to supply the required current during the remainder of the
switching cycle. For most applications, a 0.1μF, 0603
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RT6365
ceramic capacitor with X7R is recommended, and the
capacitor should have a 6.3 V or higher voltage rating.
External Bootstrap Diode
It has to add an external bootstrap diode between an
external 5V voltage supply and the BOOT pin to improve
enhancement of the high-side MOSFET and improve
efficiency when the input voltage is below 5.5V or duty
ratio is higher than 65%. The recommended application
circuit is shown in Figure 10. The bootstrap diode can be
a low-cost one, such as 1N4148. The external 5V can be
a fixed 5V voltage supply from the system, or a 5V output
voltage generated by the RT6365. Note that the VBOOT−SW
must be lower than 5.5V. Figure 11 shows efficiency
comparison between with and without bootstrap diode.
5V
DBOOT
BOOT
CBOOT
0.1µF
RT6365
Figure 10. External Bootstrap Diode
VIN = 4.5V, VOUT = 3.3V,
L = 744325780, 7.8μH,
fSW = 300kHz
98
Efficiency (%)
96
The gate driver of an internal high-side MOSFET, utilized
as a high-side switch, is optimized for turning on the
switch. The gate driver is not only fast enough for reducing
switching power loss, but also slow enough for minimizing
EMI. The EMI issue is worse when the switch is turned
on rapidly due to induced high di/dt noises. When the
high-side MOSFET is turned off, the SW node will be
discharged relatively slow by the inductor current because
the presence of the dead time when both the high-side
MOSFET and low-side freewheel diode are turned off.
In some cases, it is desirable to reduce EMI further, even
at the expense of some additional power dissipation. The
turn-on rate of the high-side MOSFET can be slowed by
placing a small bootstrap resistor RBOOT between the
BOOT pin and the external bootstrap capacitor as shown
in Figure 12. The recommended range for the RBOOT is
several ohms to 10 ohms, and it could be 0402 or 0603 in
size.
This will slow down the rates of the high-side switch turnon and the rise of VSW. In order to improve EMI performance
and enhancement of the internal high-side MOSFET, the
recommended application circuit is shown in Figure 13,
which includes an external bootstrap diode for charging
the bootstrap capacitor and a bootstrap resistor RBOOT
placed between the BOOT pin and the capacitor/diode
connection.
SW
100
External Bootstrap Resistor (Option)
94
92
90
BOOT
With Bootstrap Diode (1N4148)
Without Bootstrap Diode
88
86
RBOOT
CBOOT
RT6365
84
SW
82
80
0
1
2
3
4
5
Figure 12. External Bootstrap Resistor at the BOOT Pin
5V
Output Current (A)
Figure 11. Efficiency Comparison between with and
without Bootstrap Diode
BOOT
RBOOT
DBOOT
CBOOT
RT6365
SW
Figure 13. External Bootstrap Diode and Resistor at the
BOOT Pin
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is a registered trademark of Richtek Technology Corporation.
DS6365-02 March 2020
RT6365
EN Pin for Start-Up and UVLO Adjustment
For automatic start-up, the EN pin has an internal pull-up
current source IEN (1.2μA, typically) that enables operation
of the RT6365 when the EN pin floats. If the EN voltage
rises above the VTH_EN (1.2V, typically) and the VIN voltage
is higher than VUVLOH (4.3V, typically), the device will be
turned on, that is, switching is enabled and soft-start
sequence is initiated. If the high UVLO is required, the
EN pin can be used to adjust the under-voltage lockout
(UVLO) threshold and hysteresis. There is an additional
hysteresis current source IEN_Hys (3.4μA, typically) which
is sourced out of the EN pin when the EN pin voltage
exceeds VTH_EN. When the EN pin drops below VTH_EN,
the IEN_Hys is removed. Therefore, the EN pin can be
externally connected to VIN by adding two resistors, RENH
and RENL to achieve UVLO adjustment as shown in Figure
14.
According to the desired start and stop input voltage, the
resistance of REN1 and REN2 can be obtained as below :
REN1 =
REN2
VStart VStop
IEN_Hys
VTH_EN
=
VStart VTH_EN
REN1
VREF 0.8
ISS
If a heavy load is added to the output with large
capacitance, the output voltage will never enter regulation
because of UVP. Thus, the device remains in hiccup
operation. The CSS/TR should be large enough to ensure
soft-start period ends after COUT is fully charged.
t SS = CSS/TR
CSS/TR COUT
ISS VOUT
0.8 ICOUT_CHG
where ICOUT_CHG is the COUT charge current which is
related to the switching frequency, inductance, high-side
MOSFET peak current limit and load current.
+ IEN
Power-Good Output
The EN pin, with high-voltage rating, supports wide input
voltage range to adjust the VIN UVLO.
VIN
typically) charges an external capacitor to build a softstart ramp voltage. The internal charging current source
ISS gradually increases the voltage on CSS/TR, and the highside MOSFET will start switching if voltage difference
between SS/TR pin and FB pin is equal to 42mV ( i.e.
VSS/TR − VFB = 42mV, typically) during power-up period.
The FB voltage will track the SS/TR pin ramp voltage with
a SS/TR to FB offset voltage (42mV, typically) during softstart interval. The typical soft-start time (tSS) which is the
duration of VOUT rises from 10% to 90% of setting value is
calculated as follows :
REN1
EN
REN2
RT6365
GND
Figure 14. Resistive Divider for Under-Voltage Lockout
Threshold Setting
The RT6365GQW features an open-drain power-good
output (PGOOD) to monitor the output voltage status. The
PGOOD pin is an open-drain power-good indication output
and is to be connected to an external voltage source
through a pull-up resistor.
It is recommended to use pull-up resistance between the
values of 1 and 10kΩ to reduce the switching noise
coupling to PGOOD pin.
Synchronization
Soft-Start and Tracking Control
The RT6365GQW provides adjustable soft-start function.
The soft-start function is used to prevent large inrush
current while converter is being powered-up. The
RT6365GQW provides an SS/TR pin so that the soft-start
time can be programmed by selecting the value of the
external soft-start capacitor CSS/TR connected from the
SS/TR pin to ground or controlled by external ramp voltage
to SS/TR pin. An internal current source ISS (1.7μA,
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The RT6365 can be synchronized with an external clock
ranging from 300kHz to 2.2MHz which is applied to the
RT/SYNC pin. The minimum synchronous pulse width of
the external clock applied to the RT/SYNC pin must be
larger than 20ns and the amplitude should have valleys
that are below 0.5V and peaks above 2V (up to 6V). The
rising edge of the SW will be synchronized to the falling
edge of the RT/SYNC pin signal.
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RT6365
The switching frequency control of the RT6365 will switch
from the RT resistor setting mode to the synchronization
mode when the external clock is applied to the RT/SYNC
pin. The RT6365 transitions from the RT resistor setting
mode to the synchronization mode within 60
microseconds. Figure 15 and Figure 16 show the device
synchronized to an external system clock in power saving
mode (PSM) and continuous conduction mode (CCM).
The sub-harmonic oscillation may occur for duty cycle
greater than 50% in CCM at synchronization mode. By
choosing a larger inductor, more slope compensation can
be achieved and the risk of such sub-harmonic oscillations
is eliminated.
The switching frequency of synchronization should be
equal to or higher than the frequency set with the RT
resistor. For example, if the switching frequency of
synchronization will be 500kHz and higher, the RRT/SYNC
should be selected for 500kHz. Be careful to design the
compensation network and inductance for switching
frequency controlled by both RT resistor setting mode
and the synchronization mode.
VSW
(5V/Div)
V RT/SYNC
(2V/Div)
I SW
(500mA/Div)
Figure 15. Synchronization Mode in PSM
VSW
(5V/Div)
V RT/SYNC
(2V/Div)
I SW
(5A/Div)
Figure 16. Synchronization Mode in CCM
Thermal Considerations
In many applications, the RT6365 does not generate much
heat due to its high efficiency and low thermal resistance
of its WDFN-10L 4x4 and SOP-8 (Exposed pad) packages.
However, in applications which the RT6365 runs at a high
ambient temperature and high input voltage or high
switching frequency, the generated heat may exceed the
maximum junction temperature of the part.
The junction temperature should never exceed the
absolute maximum junction temperature TJ(MAX), listed
under Absolute Maximum Ratings, to avoid permanent
damage to the device. If the junction temperature reaches
approximately 175°C, the RT6365 stops switching the highside MOSFET until the temperature cools down by 15°C.
The maximum power dissipation can be calculated by
the following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA(EFFECTIVE)
where TJ(MAX) is the maximum allowed junction temperature
of the die. For recommended operating condition
specifications, the maximum junction temperature is
150°C. T A is the ambient operating temperature,
θJA(EFFECTIVE) is the system-level junction to ambient
thermal resistance. It can be estimated from thermal
modeling or measurements in the system.
The thermal resistance of the device strongly depends on
the surrounding PCB layout and can be improved by
providing a heat sink of surrounding copper ground. The
addition of backside copper with thermal vias, stiffeners,
and other enhancements can also help reduce thermal
resistance. Carefully select the freewheel diode to ensure
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is a registered trademark of Richtek Technology Corporation.
DS6365-02 March 2020
RT6365
that thermal performance will not be limited by the
freewheel diode.
Experiments in the Richtek thermal lab show that simply
set θJA(EFFECTIVE) as 110% to 120% of the θJA is reasonable
to obtain the allowed PD(MAX).
If the application calls for a higher ambient temperature
and may exceed the recommended maximum junction
temperature of 150°C, care should be taken to reduce the
temperature rise of the part by using a heat sink or air
flow.
Note that the over-temperature protection is intended to
protect the device during momentary overload conditions.
The protection is activated outside of the absolute
maximum range of operation as a secondary fail-safe and
therefore should not be relied upon operationally.
Continuous operation above the specified absolute
maximum operating junction temperature may impair
device reliability or permanently damage the device.
Place freewheel diode, D1, and inductor, L1, as close to
the IC as possible to reduce the area size of the SW
exposed copper to reduce the electrically coupling from
this voltage.
Connect the feedback sense network behind via of output
capacitor.
Place the feedback components RFB1 / RFB2 / CFF near
the IC.
Place the compensation components RCP1 / CCP1 / CCP2
near the IC.
The RT/SYNC resistor, RRT/SYNC, should be placed as
close to the IC as possible because to the RT/SYNC
pin is sensitive to noise.
Figure 17 and Figure 18 are the RT6365GQW layout
examples.
Layout Guidelines
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the RT6365 :
Four-layer or six-layer PCB with maximum ground plane
is strongly recommended for good thermal performance.
Keep the traces of the main current paths wide and
short.
Place high frequency decoupling capacitor CIN5 as close
to the IC as possible to reduce the loop impedance and
minimize switch node ringing.
Place bootstrap capacitor, CBOOT, as close to the IC as
possible. Routing the trace with width of 20mil or wider.
Place multiple vias under the device near VIN and GND,
and close to input capacitors to reduce parasitic
inductance and improve thermal performance. To keep
thermal resistance low, extend the ground plane as much
as possible. Add thermal vias under and near the
RT6365 to additional ground planes within the circuit
board and on the bottom side.
The high frequency switching nodes, SW and BOOT,
should be as small as possible. Keep analog
components away from the SW and BOOT nodes.
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DS6365-02 March 2020
is a registered trademark of Richtek Technology Corporation.
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29
RT6365
L1
COUT2
COUT1
COUT3
SW should be connected to
inductor / diode by wide and
short trace. Keep sensitive
components away from this
trace. Reducing area of SW
trace as possible.
D1
CIN1
CIN2
CIN3
CIN4
CIN5
CCP2
REN1
Input capacitors must be
placed as close to IC
VIN-GND as possible.
RCP1
REN2
CSS
RRT
RFB2
The exposed pad must be soldered to a large
GND plane and add 6 thermal vias with
0.25mm diameter on exposed pad for thermal
dissipation.
RFB1
CFF
CCP1
The feedback and compensation
components must be connected
as close to the device as possible.
Top Layer
Figure 17. Layout Guide for RT6365GQW (Top Layer)
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is a registered trademark of Richtek Technology Corporation.
DS6365-02 March 2020
RT6365
Place the CBOOT on another layer and
connect by short trace. Keep sensitive
components away from this trace.
Bottom Layer
Figure 18. Layout Guide for RT6365GQW (Bottom Layer)
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31
RT6365
Outline Dimension
H
A
M
EXPOSED THERMAL PAD
(Bottom of Package)
Y
J
X
B
F
C
I
D
Dimensions In Millimeters
Symbol
Dimensions In Inches
Min
Max
Min
Max
A
4.801
5.004
0.189
0.197
B
3.810
4.000
0.150
0.157
C
1.346
1.753
0.053
0.069
D
0.330
0.510
0.013
0.020
F
1.194
1.346
0.047
0.053
H
0.170
0.254
0.007
0.010
I
0.000
0.152
0.000
0.006
J
5.791
6.200
0.228
0.244
M
0.406
1.270
0.016
0.050
X
2.000
2.300
0.079
0.091
Y
2.000
2.300
0.079
0.091
X
2.100
2.500
0.083
0.098
Y
3.000
3.500
0.118
0.138
Option 1
Option 2
8-Lead SOP (Exposed Pad) Plastic Package
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is a registered trademark of Richtek Technology Corporation.
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RT6365
2
1
2
1
DETAIL A
Pin #1 ID and Tie Bar Mark Options
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.250
0.350
0.010
0.014
D
3.900
4.100
0.154
0.161
D2
3.250
3.350
0.128
0.132
E
3.900
4.100
0.154
0.161
E2
2.550
2.650
0.100
0.104
0.800
e
L
0.350
0.031
0.450
0.014
0.018
W-Type 10L DFN 4x4 Package
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
DS6365-02 March 2020
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
33
RT6365
Footprint Information
Package
PSOP-8
Option1
Option2
Number of Pin
8
Footprint Dimension (mm)
P
A
B
C
D
1.27
6.80
4.20
1.30
0.70
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
www.richtek.com
34
Sx
Sy
2.30
2.30
3.40
2.40
M
4.51
Tolerance
±0.10
is a registered trademark of Richtek Technology Corporation.
DS6365-02 March 2020
RT6365
Footprint Dimension (mm)
Package
Number of
Pin
P
A
B
C
D
Sx
Sy
M
V/W/U/XDFN4x4-10
10
0.80
4.80
3.10
0.85
0.40
3.40
2.70
3.60
Tolerance
±0.05
Richtek Technology Corporation
14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
DS6365-02 March 2020
www.richtek.com
35
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