®
RT7027
0.3A/0.6A Half-Bridge Gate Driver
General Description
Features
The RT7027 is a high-voltage gate driver IC with dual
outputs. The IC, together with an external bootstrap
network, drives dual N-MOSFETs or IGBTs in a half-bridge
configuration with input voltage rail up to 600V.
Floating Channel Designed for Bootstrap Operation
with Input Voltage up to 600V
The IC is equipped with a “common-mode dV/dt noise
canceling technique” to provide high dV/dt immunity which
enables stable operation under high dV/dt noise
circumstances. Two Under-Voltage Lockout (UVLO)
functions continuously monitor the bias voltages on VCC
and BOOT-to-LX for preventing malfunction when the bias
voltages are lower than the specified threshold voltages.
A dead time control prevents shoot-through of the external
300mA/600mA Sourcing/Sinking Current
High dV/dt Immunity : ±50V/ns
VCC and VBOOT − LX Supply Range from 10V to 20V
Under-Voltage Lockout Functions for Both Channels
Matched Propagation Delays Between Both
Channels
TTL Compatible Logic Input
Internal Dead-Time Setting
High-Side Output In-Phase with HIN Input Signal
power MOSFETs. The logic level of the PWM signal input
pins are compatible with standard TTL logic level for ease
of interfacing with controlling devices.
Applications
Ordering Information
RT7027
Package Type
S : SOP-8
Lead Plating System
G : Green (Halogen Free and Pb Free)
Low-Side Output Out of Phase with LIN Input Signal
RoHS Compliant and Halogen Free
PDP Scan Driver
Fluorescent Lamp Ballast
SMPS
Motor Driver
Pin Configuration
(TOP VIEW)
Note :
Richtek products are :
VCC
8
BOOT
RoHS compliant and compatible with the current require-
HIN
2
7
UGATE
ments of IPC/JEDEC J-STD-020.
LIN
3
6
LX
GND
4
5
LGATE
Suitable for use in SnPb or Pb-free soldering processes.
SOP-8
Marking Information
RT7027GS : Product Number
RT7027
GSYMDNN
YMDNN : Date Code
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September 2017
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RT7027
Typical Application Circuit
VCC
Up to 600V
1
C1
UGATE
VCC
RUGATE
BOOT 8
RT7027
PWM
Signal
7
2 HIN
3 LIN
4 GND
LX 6
LGATE 5
To Load
RLGATE
Functional Pin Description
Pin No.
Pin Name
Pin Function
1
VCC
Supply voltage input.
2
HIN
Logic input for high-side gate driver.
3
LIN
Logic input for low-side gate driver.
4
GND
Logic ground and low-side driver return.
5
LGATE
Low-side driver output.
6
LX
Return for high-side gate driver.
7
UGATE
High-side driver output.
8
BOOT
Bootstrap supply for high-side gate driver.
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RT7027
Functional Block Diagram
BOOT
BOOT-to-LX
UVLO1
Under-Voltage
Lockout
Pulse
Generator
Level
Shifter
Noise
Filter
R
S
Driver
UGATE
Q
LX
UGATE High/Low
VCC
VCC
HIN
VCC
UVLO2
Under-Voltage
Lockout
IIN+
Dead
Time
Control
VCC
IIN+
LGATE High/Low
Driver
LGATE
Delay
GND
LIN
Operation
The RT7027 is a high-voltage gate driver for driving highside and low-side MOSFETs in a half-bridge configuration.
The RT7027 uses ultra high voltage device and floating
well to allow UGATE to drive external MOSFET operating
up to 600V. When the HIN voltage is above the logic-high
threshold, the UGATE voltage goes to turn on the external
MOSFET. When the HIN voltage is below the logic-low
threshold, the MOSFET is turned off.
The operating behavior of the LGATE, controlled by the
LIN pin, is like the behavior of the UGATE.
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Under-Voltage Lockout (UVLO) Function
When the VCC or BOOT-to-LX voltage is lower than the
UVLO threshold, the UGATE and LGATE output will be
disabled.
Pulse Generator
The pulse generator is used to transmit the HIN input signal
to the UGATE driver.
Dead-Time Control
The dead-time control function is designed to prevent the
high-side and low-side MOSFETs form shoot-through.
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RT7027
Absolute Maximum Ratings
(Note 1)
VCC Supply Voltage, VCC -------------------------------------------------------------------------------LX to GND ----------------------------------------------------------------------------------------------------BOOT to LX --------------------------------------------------------------------------------------------------UGATE to LX -------------------------------------------------------------------------------------------------LGATE to GND ----------------------------------------------------------------------------------------------HIN, LIN to GND ---------------------------------------------------------------------------------------------Allowable LX Voltage Slew Rate,dVLX/dt ---------------------------------------------------------------Power Dissipation, PD @ TA = 25°C
SOP-8 ---------------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2)
SOP-8, θJA ---------------------------------------------------------------------------------------------------Junction Temperature --------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ----------------------------------------------------------------Storage Temperature Range ------------------------------------------------------------------------------ESD Susceptibility (Note 3)
HBM (Human Body Model)
Except HV pin -----------------------------------------------------------------------------------------------HV (BOOT, UGATE and LX) to GND ---------------------------------------------------------------------
Recommended Operating Conditions
−0.3 to 25V
−0.3V to 625V
−0.3V to 25V
−0.3V to VBOOT−LX + 0.3V
−0.3V to VCC + 0.3V
−0.3V to VCC + 0.3V
−50V/ns to 50V/ns
0.53W
188°C/W
150°C
260°C
−65°C to 150°C
2kV
1kV
(Note 4)
VCC Supply Voltage, VCC -------------------------------------------------------------------------------BOOT-to-LX --------------------------------------------------------------------------------------------------LX to GND ----------------------------------------------------------------------------------------------------UGATE to LX -------------------------------------------------------------------------------------------------LGATE to GND ----------------------------------------------------------------------------------------------HIN, LIN to GND --------------------------------------------------------------------------------------------Ambient Temperature Range ------------------------------------------------------------------------------
10V to 20V
10V to 20V
0V to 600V
0V to VBOOT−LX
0 to VCC
0 to VCC
−40°C to 125°C
Electrical Characteristics
(VCC = VBOOT − LX = 15V, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
VCC Under-Voltage Lockout
Threshold (On)
VTHON_VCC
7
8.5
10
V
VBOOT LX Under-Voltage
Lockout Threshold (On)
VTHON_BOOT
7
8.5
10
V
VCC Under-Voltage Lockout
Threshold (Off)
VTHOFF_VCC
6.3
7.8
9.3
V
VBOOT LX Under-Voltage
Lockout Threshold (Off)
VTHOFF_BOOT
6.3
7.8
9.3
V
VCC Under-Voltage Lockout
Hysteresis
VHYS_VCC
--
0.7
--
V
VBOOT LX Under-Voltage
Lockout Hysteresis
VHYS_BOOT
--
0.7
--
V
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RT7027
Parameter
Symbol
Test Conditions
Typ
Max
Unit
--
--
50
A
LX Leakage Current
ILK
VCC Quiescent Current
IQ_VCC
--
220
400
A
BOOT-to-LX Quiescent
Current
IQ_ BOOTLX
--
100
200
A
VCC Operating Current
IP_VCC
--
--
600
A
BOOT-to-LX Operating
Current
IP_ BOOTLX
--
--
600
A
2.5
--
--
--
--
0.8
HIN, LIN
Input Voltage
VBOOT = VLX = 600V
Min
Frequency = 20kHz,
UGATE = LGATE = open
Logic-High VIH
Logic-Low
VIL
High-Level VOH
Sourcing current = 2mA,
VBOOT VUGATE, VCC VLGATE
--
50
200
Low-Level
Sinking current = 2mA, VUGATELX,
VLGATE
--
20
100
Logic-High IIN+
HIN = VCC, LIN = GND
--
2
10
Logic-Low
1
--
--
UGATE and LGATE Sourcing
IO+
Current
HIN = GND, LIN = VCC
UGATE = LX, LGATE = GND, current
pulse width < 10s, low duty
--
290
--
UGATE and LGATE Sinking
Current
UGATE = LX, LGATE = GND, current
pulse width < 10s, low duty
UGATE, LGATE
Output Voltage
HIN Input
Current
VOL
IIN
IO
V
mV
A
mA
--
600
--
Min
Typ
Max
Unit
--
680
820
ns
--
150
300
ns
Dynamic Electrical Characteristics (Note 5)
(VCC = VBOOT − LX = 15V, LX = GND, CL = 1000pF, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Turn-on Delay
tON
Turn-off Delay
tOFF
Turn-on Rising Time
tR
--
70
170
ns
Turn-off Falling Time
tF
--
35
90
ns
Dead-Time
tDead
--
520
650
ns
VLX = 0 or 600V
(Note 6)
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured under natural convection (still air) at TA = 25°C with the component mounted on a high effectivethermal-conductivity four-layer test board on a JEDEC 51-7 thermal measurement standard.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. Please refer to the Timing Diagram and Dynamic Waveforms in the Application Information.
Note 6. Turn-off Delay for VLX = 600V is guaranteed by design.
Copyright © 2017 Richtek Technology Corporation. All rights reserved.
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RT7027
Typical Operating Characteristics
Turn-On Delay Time vs. Temperature
Turn-On Delay Time vs. VCC
700
Turn-On Delay Time (ns))
Turn-On Delay Time (ns))
700
600
UGATE
500
LGATE
400
600
UGATE
500
LGATE
400
TA = 25°C
300
300
-50
-25
0
25
50
75
100
125
10
12
14
Temperature (°C)
Turn-Off Delay Time vs. Temperature
20
400
Turn-Off Delay Time (ns)
Turn-Off Delay Time (ns)
18
Turn-Off Delay Time vs. VCC
400
300
200
UGATE
LGATE
100
0
-50
-25
0
25
50
75
100
300
200
UGATE
LGATE
100
TA = 25°C
0
125
10
12
14
Temperature (°C)
16
18
20
VCC (V)
Turn-On Rising Time vs. Temperature
Turn-On Rising Time vs. VCC
160
160
120
Turn-On Rising Time (ns)
Turn-On Rising Time (ns)
16
VCC (V)
UGATE
LGATE
80
40
120
UGATE
80
LGATE
40
TA = 25°C
0
0
-50
-25
0
25
50
75
100
Temperature (°C)
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125
10
12
14
16
18
20
VCC (V)
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RT7027
Turn-Off Falling Time vs. Temperature
Turn-Off Falling Time vs. VCC
50
Turn-Off Falling Time (ns)
Turn-Off Falling Time (ns)
50
40
30
LGATE
20
UGATE
10
40
LGATE
30
UGATE
20
10
TA = 25°C
0
0
-50
-25
0
25
50
75
100
125
10
12
14
16
18
20
VCC (V)
Temperature (°C)
Dead-Time vs. Temperature
Dead-Time vs. VCC
1000
600
450
Dead-Time (ns)
Dead-Time (ns)
800
600
UG rising - LG falling
400
LG rising - UG falling
200
0
-50
-25
0
25
50
75
100
VUGATE rising - VLGATE falling
300
VLGATE rising - VUGATE falling
150
TA = 25°C
0
125
10
12
Temperature (°C)
VCC Operating Current vs. Temperature
18
20
VCC Operating Current vs. VCC
600
500
500
VCC Operating Current (μA)
VCC Operating Current (μA)
16
VCC (V)
600
400
300
200
100
400
300
200
100
TA = 25°C
0
0
-50
-25
0
25
50
75
100
Temperature (°C)
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September 2017
125
10
12
14
16
18
20
VCC (V)
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RT7027
VBOOT - LX Operating Current vs .Temperature
VBOOT - LX Operating Current vs. VBOOT - LX
300
VBOOT - LX Operating Current (μA)
VBOOT - LX Operating Current (μA)
300
240
180
120
60
240
180
120
60
TA = 25°C
0
0
-50
-25
0
25
50
75
100
125
10
12
14
Temperature (°C)
20
Logic-High Threshold Voltage vs.Temperature
LX Leakage Current vs. Temperature
3.0
Logic-High Threshold Voltage (V)
LX Leakage Current (μA)
18
VBOOT - LX (V)
30
25
20
15
10
5
0
-50
-25
0
25
50
75
100
2.5
HIN
LIN
2.0
1.5
1.0
125
-50
-25
0
Temperature (°C)
4
3
HIN
2
LIN
1
TA = 25°C
0
12
14
16
18
VCC (V)
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50
75
100
125
20
Logic-Low Threshold Voltage vs. Temperature
2.0
Logic-Low Threshold Voltage (V)
Logic-High Threshold Voltage vs. VCC
10
25
Temperature (°C)
5
Logic-High Threshold Voltage (V)
16
1.8
HIN
1.6
1.4
LIN
1.2
1.0
-50
-25
0
25
50
75
100
125
Temperature (°C)
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Logic-Low Threshold Voltage vs. VCC
High-Level Output Voltage vs. Temperature
100
4
3
2
HIN
1
LIN
TA = 25°C
High-Level Output Voltage (mV))
Logic-Low Threshold Voltage (V)
5
0
80
60
LIN
40
HIN
20
0
10
12
14
16
18
20
-50
-25
0
VCC - VLGATE
VBOOT - VUGATE
20
TA = 25°C
Low-Level Output Voltage (mV))
High-Level Output Voltage (mV))
80
14
16
18
20
15
LIN
10
HIN
5
-50
20
-25
0
5
TA = 25°C
100
125
150
100
50
0
0
10
12
14
16
18
VCC or VBOOT - LX (V)
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VBOOT - LX Quiescent Current (μA)
Low-Level Output Voltage (mV)
20
10
75
200
25
VUGATE - LX
50
VBOOT - LX Quiescent Current vs. Temperature
Low-Level Output Voltage vs. VCC or VBOOT - LX
VLGATE
25
Temperature (°C)
VCC or VBOOT - LX (V)
15
125
0
0
12
100
25
100
10
75
Low-Level Output Voltage vs. Temperature
High-Level Output Voltage vs. VCC or VBOOT - LX
40
50
Temperature (°C)
VCC (V)
60
25
September 2017
20
-50
-25
0
25
50
75
100
125
Temperature (°C)
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RT7027
VCC Quiescent Current vs. Temperature
Output Sourcing Current vs. Temperature
600
Output Sourcing Current (mA))
VCC Quiescent Current (μA)
400
300
200
100
500
400
LGATE
300
UGATE
200
100
0
0
-50
-25
0
25
50
75
100
-50
125
-25
0
Temperature (°C)
400
LGATE
200
UGATE
100
TA = 25°C
16
18
800
LGATE
600
UGATE
400
200
-50
20
-25
0
25
50
75
100
125
Temperature (°C)
VCC or VBOOT - LX (V)
Output Sinking Current vs. VCC or VBOOT - LX
VTHON_VCC / VTHOFF_VCC vs.Temperature
800
15
600
UGATE
400
LGATE
200
TA = 25°C
0
VTHON_VCC / VTHOFF_VCC (V)
Output Sinking Current (mA))
125
0
0
14
100
Output Sinking Current vs.Temperature
Output Sinking Current (mA)1
Output Sourcing Current (mA))
500
12
75
1000
600
10
50
Temperature (°C)
Output Sourcing Current vs. VCC or VBOOT - LX
300
25
12
VTHON_VCC
9
VTHOFF_VCC
6
3
0
10
12
14
16
18
VCC or VBOOT - LX (V)
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10
20
-50
-25
0
25
50
75
100
125
Temperature (°C)
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RT7027
VTHON_BOOT / VTHOFF_BOOT vs.Temperature
VTHON_BOOT / VTHOFF_BOOT (V)
15
12
VTHON_BOOT
9
VTHOFF_BOOT
6
3
0
-50
-25
0
25
50
75
100
125
Temperature (°C)
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RT7027
Application Information
90%
Timing Diagram and Dynamic Waveforms
Figure 1 is the RT7027 input/output timing diagram, and
Figure 2 is a definition of dynamic characteristics. You
can know those definitions and the relationship between
input and output from these figures. For example : tON,
VUGATE
10%
tDead
tDead
90%
VLGATE
10%
tOFF, tR, tF...
Figure 3. Deadtime Definition
VHIN
Matched Propagation Delays between Both
Channels
VLIN
Because the IC internal level shifter circuit causes the
propagation delay of the high-side output signal, shown
in Figure 4. The RT7027 adds a propagation delay
matching circuit in the low-side logic circuit, so that highside and low-side output signals approximately
synchronization.
VUGATE
VLGATE
Figure 1. Input/Output Timing Diagram
BOOT
BOOT-to-LX
UVLO1
Under-Voltage
Lockout
VHIN
50%
tON tR
50%
tF
IIN+
50%
90%
UGATE
VCC
HIN
Dead
Time
Control
VCC
IIN+
VCC
UVLO2
Under-Voltage
Lockout
LGATE High/Low
Driver
LGATE
Delay
GND
LIN
tF
10%
Figure 2. Dynamic Electrical Characteristics Definition
Deadtime, tDead
To avoid the simultaneous conduction of high-side and
low-side power switches cause shoot through, the
switching operation of the IC control circuit introduces a
deadtime function. In the deadtime period, even if the input
sends another power switch conduction signal, the control
circuit will remain closed drive state. Figure 3 illustrates
the definition of deadtime and the relationship between
the high-side and low-side gate signals.
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S
Driver
Q
VCC
tOFF
10%
R
UGATE High/Low
10%
50%
tON tR
VLGATE
Noise
Filter
LX
10%
VLIN
Level
Shifter
tOFF
90%
VUGATE
Pulse
Generator
Figure 4. Propagation Delay Matching Circuit
Thermal Considerations
The junction temperature should never exceed the
absolute maximum junction temperature TJ(MAX), listed
under Absolute Maximum Ratings, to avoid permanent
damage to the device. The maximum allowable power
dissipation depends on the thermal resistance of the IC
package, the PCB layout, the rate of surrounding airflow,
and the difference between the junction and ambient
temperatures. The maximum power dissipation can be
calculated using the following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
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RT7027
where TJ(MAX) is the maximum junction temperature, TA is
In order to shorten the length of IC layout, you need to
consider the relative placement for IC and the power
switches. It is recommended that the power switches
placed in a symmetrical manner, and the IC close to
high-side and low-side elements.
In order to reduce the noise coupling, it is recommended
that the ground layout should not be placed under or
near the high voltage floating side.
The layout between high-side and low-side power
switches should be thick and straight, avoiding the
formation of long loops. Too long distance will increase
the loop area, and electromagnetic interference
suppression capabilities would be affected. However,
too short distance may cause overheating situation. It
is necessary to consider the most appropriate way.
Refer to typical application circuit, the VCC capacitor
(C1), BOOT to LX capacitor (CBOOT), and bootstrap diode
(DBOOT) need to be placed as close to the IC as possible
to minimize parasitic inductance and resistance. The
CBOOT selected range is from 0.1μF to 0.47μF, and the
VCC capacitor (C1) is greater than ten times CBOOT. It is
recommended to use fast or ultra fast reverse recovery
time bootstrap diode DBOOT.
the ambient temperature, and θJA is the junction-to-ambient
thermal resistance.
For continuous operation, the maximum operating junction
temperature indicated under Recommended Operating
Conditions is 125°C. The junction-to-ambient thermal
resistance, θJA, is highly package dependent. For a SOP8 package, the thermal resistance, θJA, is 188°C/W on a
standard JEDEC 51-7 high effective-thermal-conductivity
four-layer test board. The maximum power dissipation at
TA = 25°C can be calculated as below :
PD(MAX) = (125°C − 25°C) / (188°C/W) = 0.53W for a
SOP-8 package.
The maximum power dissipation depends on the operating
ambient temperature for the fixed TJ(MAX) and the thermal
resistance, θJA. The derating curves in Figure 5 allows
the designer to see the effect of rising ambient temperature
on the maximum power dissipation.
Maximum Power Dissipation (W)1
0.6
Four-Layer PCB
0.5
0.4
0.3
VCC
0.2
+VDC+
DBOOT
BOOT
0.1
UGATE
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
LX
CBOOT
RUGATE
Q1
RLX
Figure 5. Derating Curve of Maximum Power Dissipation
Layout Consideration
A proper PCB layout for power supply can reduce
unnecessary waveform noise and electromagnetic
interference problems to ensure proper system operation,
please refer to the following PCB layout considerations:
For the high voltage and high current loop layout of
power supply should be as thick and short. Avoid
excessive layout generated parasitic inductance and
resistors to cause significant noise.
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Figure 6. LX Pin Resister
In Figure 6, the LX pin voltage drop can be improved by
adding RLX (RLX = 1 to 10Ω), because the dv/dt is
affected by (RLX + RUGATE).
If the gate current loop opens circuit for some factors,
at this time, the current flows through the gate loop via
the power MOSFET drain-to-gate parasitic capacitor. The
current will charge the gate-to-source parasitic capacitor
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RT7027
to result in power MOSFET wrong action. The power
switches can be damaged or burned out, the resisters
(about least 10kΩ) are connected between the gate and
source pin can prevent malfunction of the power
switches.
The selection of larger parasitic capacitor power switch
or gate resister may result in too long turn-off time
making the high-side and low-side power switches shoot
through. In order to prevent the situation, reverse parallel
with diodes (DUGATE & DLGATE) in the RUGATE and RLGATE
(shown in Figure 7), providing a fast discharge path for
the power switches in a short time to complete the
closing operation.
VCC
+VDC+
DBOOT
BOOT
CBOOT
DUGATE
UGATE
RUGATE
Q1
To
Load
LX
DLGATE
LGATE
RLGATE
Q2
Figure 7. Reverse Parallel with Diodes
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is a registered trademark of Richtek Technology Corporation.
DS7027-00
September 2017
RT7027
Outline Dimension
H
A
M
J
B
F
C
I
D
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
4.801
5.004
0.189
0.197
B
3.810
3.988
0.150
0.157
C
1.346
1.753
0.053
0.069
D
0.330
0.508
0.013
0.020
F
1.194
1.346
0.047
0.053
H
0.170
0.254
0.007
0.010
I
0.050
0.254
0.002
0.010
J
5.791
6.200
0.228
0.244
M
0.400
1.270
0.016
0.050
8-Lead SOP Plastic Package
Richtek Technology Corporation
14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
DS7027-00
September 2017
www.richtek.com
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