0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
会员中心
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
RT7274GSP

RT7274GSP

  • 厂商:

    RICHTEK(台湾立锜)

  • 封装:

    SOIC-8

  • 描述:

    IC REG BUCK ADJUSTABLE 2A 8SOP

  • 数据手册
  • 价格&库存
RT7274GSP 数据手册
® RT7274/79/80/81 2A, 18V, 700kHz ACOTTM Synchronous Step-Down Converter General Description Features The RT7274/79/80/81 is a synchronous step-down DC/ DC converter with Advanced Constant On-Time (ACOTTM) z mode control. It achieves high power density to deliver up to 2A output current from a 4.5V to 18V input supply. The proprietary ACOTTM mode offers an optimal transient response over a wide range of loads and all kinds of ceramic capacitors, which allows the device to adopt very low ESR output capacitor for ensuring performance stabilization. In addition, RT7274/79/80/81 keeps an excellent constant switching frequency under line and load variation and the integrated synchronous power switches with the ACOTTM mode operation provides high efficiency in whole output current load range. Cycle-by-cycle current limit provides an accurate protection by a valley detection of low-side MOSFET and external soft-start setting eliminates input current surge during startup. Protection functions include thermal shutdown for RT7274/79/80/81; output under voltage protection and output over voltage protection for RT7279/80 only. z z z z z z z z z z z z z ACOTTM Mode Enables Fast Transient Response 4.5V to 18V Input Voltage Range 2A Output Current High Efficient Internal N-MOSFET Optimized for Lower Duty Cycle Applications 105mΩ Ω Internal Low-Side N-MOSFET Advanced Constant On-Time Control Allows Ceramic Output Capacitor 700kHz Switching Frequency Adjustable Output Voltage from 0.765V to 8V Adjustable and Pre-biased Soft-Start Cycle-by-Cycle Current Limit Input Under Voltage Lockout Thermal Shutdown RoHS Compliant and Halogen Free Applications z z z z z Industrial and Commercial Low Power Systems Computer Peripherals LCD Monitors and TVs Green Electronics/Appliances Point of Load Regulation for High-Performance DSPs, FPGAs, and ASICs Simplified Application Circuit VIN RT7274/79/80/81 VIN SW VINR* Input Signal Power Good EN VOUT BOOT FB GND* PGOOD* PVCC SS VOUT* PGND* * : VINR pin for TSSOP-14 (Exposed Pad) only. VOUT pin for TSSOP-14 (Exposed Pad) only. PGND pin for TSSOP-14 (Exposed Pad) and WDFN-10L 3x3 only. PGOOD pin for TSSOP-14 (Exposed Pad) and WDFN-10L 3x3 only. GND pin for TSSOP-14 (Exposed Pad) and SOP-8 (Exposed Pad) only. Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS7274/79/80/81-02 April 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT7274/79/80/81 Ordering Information Marking Information Discontinuous Operating Mode RT7274GSP RT7274 RT7274GSP : Product Number RT7274 GSPYMDNN Package Type SP : SOP-8 (Exposed Pad-Option 2) Lead Plating System G : Green (Halogen Free and Pb Free) YMDNN : Date Code RT7280GCP RT7280GCP : Product Number RT7280 GCPYMDNN RT7280 Package Type CP : TSSOP-14 (Exposed Pad) QW : WDFN-10L 3x3 (W-Type) YMDNN : Date Code RT7280GQW 2Y= : Product Code Lead Plating System G : Green (Halogen Free and Pb Free) 2Y=YM DNN YMDNN : Date Code RT7279GCP Forced PWM Mode RT7279GCP : Product Number RT7279 RT7279 GCPYMDNN Package Type CP : TSSOP-14 (Exposed Pad) QW : WDFN-10L 3x3 (W-Type) YMDNN : Date Code RT7279GQW Lead Plating System G : Green (Halogen Free and Pb Free) 2Z= : Product Code 2Z=YM DNN YMDNN : Date Code RT7281 RT7281GSP Package Type SP : SOP-8 (Exposed Pad-Option 2) RT7281GSP : Product Number RT7281 GSPYMDNN Lead Plating System G : Green (Halogen Free and Pb Free) YMDNN : Date Code Pin Configurations VOUT FB PVCC SS GND PGOOD EN 14 2 13 3 4 12 PGND 11 5 10 6 9 7 15 8 VINR VIN BOOT SW SW PGND PGND EN FB PVCC SS PGOOD TSSOP-14 (Exposed Pad) Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 1 2 3 4 5 PGND (TOP VIEW) 11 10 9 8 7 6 VIN VIN BOOT SW SW WDFN-10L 3x3 EN 8 FB 2 PVCC 3 SS 4 GND 9 VIN 7 BOOT 6 SW 5 GND SOP-8 (Exposed Pad) is a registered trademark of Richtek Technology Corporation. DS7274/79/80/81-02 April 2013 RT7274/79/80/81 Functional Pin Description Pin No. Pin Name SOP-8 (Exposed Pad) Pin Function TSSOP-14 (Exposed Pad) WDFN-10L 3x3 1 -- -- VOUT Output Voltage Sense Input. This terminal is used for On-Time Adjustment. 2 2 2 FB Feedback Input Voltage. Connect with feedback resistive divider to the output voltage. 3 3 3 PVCC 5.1V Power Supply Output. PVCC is the output of the internal 5.1V linear regulator powered by VIN (WDFN-10L 3x3) or VINR (TSSOP-14L (Exposed Pad)). Connect a 1μF capacitor from this pin to GND. 4 4 4 SS Soft-Start Control. Connect an external capacitor between this pin and GND to set the soft- start time. 5 -- 6 5 -- PGOOD Open Drain Power Good Output. 7 1 1 EN Enable Control Input. -- PGND Power Ground. The exposed pad must be soldered to a large PCB and connected to PGND for maximum power dissipation. 8, 9, 11 15 (Exposed Pad) (Exposed Pad) 5, GND 9 (Exposed Pad) Analog Ground. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. 10, 11 6, 7 6 SW Switch Node. 12 8 7 BOOT Bootstrap Supply for High-Side Gate Driver. Connect a 0.1μF capacitor between the BOOT and SW pin. 13 9, 10 8 VIN Power Input. It is connected to the drain of the internal high-side MOSFET. Connect VIN to the input capacitor. For the WDFN-10L 3x3 package, VIN also supplies power to the internal linear regulator. 14 -- -- VINR Supply Input for Internal Linear Regulator to the Control Circuitry. Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS7274/79/80/81-02 April 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT7274/79/80/81 Function Block Diagram For TSSOP-14 (Exposed Pad) and WDFN-10L 3x3 Package BOOT PVCC VIN (WDFN-10L 3x3) Internal Regulator Over Current Protection PVCC PVCC VIBIAS GND (TSSOP-14 (Exposed Pad)) VOUT (TSSOP-14 (Exposed Pad)) VIN VREF UGATE Under & Over Voltage Protection Discharge PVCC Switch Controller SW Driver LGATE PGND SW Ripple Gen. 2µA 0.9 VREF + FB - - SS FB On-Time FB Comparator PGOOD + - VINR (TSSOP-14 (Exposed Pad)) PGOOD Comparator EN EN For SOP-8 (Exposed Pad) Package BOOT PVCC Internal Regulator PVCC VIBIAS Over Current Protection VIN PVCC VREF UGATE GND Switch Controller PVCC 2µA SW Driver LGATE Ripple Gen. SW + - - SS FB On-Time FB Comparator EN EN Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 is a registered trademark of Richtek Technology Corporation. DS7274/79/80/81-02 April 2013 RT7274/79/80/81 Detailed Description The RT7274/79/80/81 are high-performance 700kHz 2A step-down regulators with internal power switches and synchronous rectifiers. They feature an Advanced Constant On-Time (ACOTTM) control architecture that provides stable operation with ceramic output capacitors without complicated external compensation, among other benefits. The input voltage range is from 4.5V to 18V and the output is adjustable from 0.765V to 8V. The proprietary ACOTTM control scheme improves upon other constant on-time architectures, achieving nearly constant switching frequency over line, load, and output voltage ranges. The RT7274/79/80/81 are optimized for ceramic output capacitors. Since there is no internal clock, response to transients is nearly instantaneous and inductor current can ramp quickly to maintain output regulation without large bulk output capacitance. Constant On-Time (COT) Control The heart of any COT architecture is the on-time oneshot. Each on-time is a pre-determined “fixed” period that is triggered by a feedback comparator. This robust arrangement has high noise immunity and is ideal for low duty cycle applications. After the on-time one-shot period, there is a minimum off-time period before any further regulation decisions can be considered. This arrangement avoids the need to make any decisions during the noisy time periods just after switching events, when the switching node (SW) rises or falls. Because there is no fixed clock, the high-side switch can turn on almost immediately after load transients and further switching pulses can ramp the inductor current higher to meet load requirements with minimal delays. Traditional current mode or voltage mode control schemes typically must monitor the feedback voltage, current signals (also for current limit), and internal ramps and compensation signals, to determine when to turn off the high-side switch and turn on the synchronous rectifier. Weighing these small signals in a switching environment is difficult to do just after switching large currents, making those architectures problematic at low duty cycles and in less than ideal board layouts. Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS7274/79/80/81-02 April 2013 Because no switching decisions are made during noisy time periods, COT architectures are preferable in low duty cycle and noisy applications. However, traditional COT control schemes suffer from some disadvantages that preclude their use in many cases. Many applications require a known switching frequency range to avoid interference with other sensitive circuitry. True constant on-time control, where the on-time is actually fixed, exhibits variable switching frequency. In a step-down converter, the duty factor is proportional to the output voltage and inversely proportional to the input voltage. Therefore, if the on-time is fixed, the off-time (and therefore the frequency) must change in response to changes in input or output voltage. Modern pseudo-fixed frequency COT architectures greatly improve COT by making the one-shot on-time proportional to VOUT and inversely proportional to VIN. In this way, an on-time is chosen as approximately what it would be for an ideal fixed-frequency PWM in similar input/output voltage conditions. The result is a big improvement but the switching frequency still varies considerably over line and load due to losses in the switches and inductor and other parasitic effects. Another problem with many COT architectures is their dependence on adequate ESR in the output capacitor, making it difficult to use highly-desirable, small, low-cost, but low-ESR ceramic capacitors. Most COT architectures use AC current information from the output capacitor, generated by the inductor current passing through the ESR, to function in a way like a current mode control system. With ceramic capacitors the inductor current information is too small to keep the control loop stable, like a current mode system with no current information. ACOTTM Control Architecture Making the on-time proportional to VOUT and inversely proportional to VIN is not sufficient to achieve good constant-frequency behavior for several reasons. First, voltage drops across the MOSFET switches and inductor cause the effective input voltage to be less than the measured input voltage and the effective output voltage to be greater than the measured output voltage. As the load is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT7274/79/80/81 changes, the switch voltage drops change causing a switching frequency variation with load current. Also, at light loads if the inductor current goes negative, the switch dead-time between the synchronous rectifier turn-off and the high-side switch turn-on allows the switching node to rise to the input voltage. This increases the effective ontime and causes the switching frequency to drop noticeably. One way to reduce these effects is to measure the actual switching frequency and compare it to the desired range. This has the added benefit eliminating the need to sense the actual output voltage, potentially saving one pin connection. ACOTTM uses this method, measuring the actual switching frequency and modifying the on-time with a feedback loop to keep the average switching frequency in the desired range. To achieve good stability with low-ESR ceramic capacitors, ACOTTM uses a virtual inductor current ramp generated inside the IC. This internal ramp signal replaces the ESR ramp normally provided by the output capacitor's ESR. The ramp signal and other internal compensations are optimized for low-ESR ceramic output capacitors. ACOTTM One-shot Operation The RT7274/79/80/81 control algorithm is simple to understand. The feedback voltage, with the virtual inductor current ramp added, is compared to the reference voltage. When the combined signal is less than the reference the on-time one-shot is triggered, as long as the minimum off-time one-shot is clear and the measured inductor current (through the synchronous rectifier) is below the current limit. The on-time one-shot turns on the high-side switch and the inductor current ramps up linearly. After the on-time, the high-side switch is turned off and the synchronous rectifier is turned on and the inductor current ramps down linearly. At the same time, the minimum offtime one-shot is triggered to prevent another immediate on-time during the noisy switching time and allow the feedback voltage and current sense signals to settle. The minimum off-time is kept short (230ns typical) so that rapidly-repeated on-times can raise the inductor current quickly when needed. Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 Discontinuous Operating Mode (RT7274/80 Only) After soft start, the RT7279/81 operates in fixed frequency mode to minimize interference and noise problems. The RT7274/80 uses variable-frequency discontinuous switching at light loads to improve efficiency. During discontinuous switching, the on-time is immediately increased to add “hysteresis” to discourage the IC from switching back to continuous switching unless the load increases substantially. The IC returns to continuous switching as soon as an ontime is generated before the inductor current reaches zero. The on-time is reduced back to the length needed for 700kHz switching and encouraging the circuit to remain in continuous conduction, preventing repetitive mode transitions between continuous switching and discontinuous switching. Current Limit The RT7274/79/80/81 current limit is a cycle-by-cycle “valley” type, measuring the inductor current through the synchronous rectifier during the off-time while the inductor current ramps down. The current is determined by measuring the voltage between source and drain of the synchronous rectifier, adding temperature compensation for greater accuracy. If the current exceeds the upper current limit, the on-time one-shot is inhibited until the inductor current ramps down below the upper current limit plus a wide hysteresis band of about 1A and drops below the lower current limit level. Thus, only when the inductor current is well below the upper current limit is another ontime permitted. This arrangement prevents the average output current from greatly exceeding the guaranteed upper current limit value, as typically occurs with other valley-type current limits. If the output current exceeds the available inductor current (controlled by the current limit mechanism), the output voltage will drop. If it drops below the output under-voltage protection level (see next section) the IC will stop switching to avoid excessive heat. The RT7279/81 also includes a negative current limit to protect the IC against sinking excessive current and possibly damaging the IC. If the voltage across the synchronous rectifier indicates the negative current is too is a registered trademark of Richtek Technology Corporation. DS7274/79/80/81-02 April 2013 RT7274/79/80/81 high, the synchronous rectifier turns off until after the next high-side on-time. RT7274/80 does not sink current and therefore does not need a negative current limit. Output Over-voltage Protection and Under-voltage Protection The RT7279/80 include output over-voltage protection (OVP). If the output voltage rises above the regulation level, the high-side switch naturally remains off and the synchronous rectifier turns on. If the output voltage remains high the synchronous rectifier remains on until the inductor current reaches the negative current limit (RT7279) or until it reaches zero (RT7280). If the output voltage remains high, the IC's switches remain off. If the output voltage exceeds the OVP trip threshold for longer than 5μs (typical), the IC's OVP is triggered. The RT7279/80 include output under-voltage protection (UVP). If the output voltage drops below the UVP trip threshold for longer than 250μs (typical) the IC's UVP is triggered. There are two different behaviors for OVP and UVP events for the TSSOP-14 (Exposed Pad) packages. ` Latch-Off Mode (TSSOP-14 (Exposed Pad) Only) ` The RT7280GCP/RT7279GCP, use latch-off mode OVP and UVP. When the protection function is triggered the IC will shut down. The IC stops switching, leaving both switches open, and is latched off. To restart operation, toggle EN or power the IC off and then on again. ` Hiccup Mode (WDFN-10L 3x3 Only) ` The RT7279GQW/RT7280GQW, use hiccup mode OVP and UVP. When the protection function is triggered, the IC will shut down for a period of time and then attempt to recover automatically. Hiccup mode allows the circuit to operate safely with low input current and power dissipation, and then resume normal operation as soon as the overload or short circuit is removed. Between these 2 levels there are 2 thresholds (1.2V typical and 1.4V typical). When VEN exceeds the lower threshold the internal bias regulators begin to function and supply current increases above the shutdown current level. Switching operation begins when VEN exceeds the upper threshold. Unlike many competing devices, EN is a high voltage input that can be safely connected to VIN (up to 18V) for automatic start-up. Input Under-voltage Lock-out In addition to the enable function, the RT7274/79/80/81 feature an under-voltage lock-out (UVLO) function that monitors the internal linear regulator output (PVCC). To prevent operation without fully-enhanced internal MOSFET switches, this function inhibits switching when PVCC drops below the UVLO-falling threshold. The IC resumes switching when PVCC exceeds the UVLO-rising threshold. Soft-Start (SS) The RT7274/79/80/81 soft-start uses an external pin (SS) to clamp the output voltage and allow it to slowly rise. After VEN is high and PVCC exceeds its UVLO threshold, the IC begins to source 2μA from the SS pin. An external capacitor at SS is used to adjust the soft-start timing. The available capacitance range is from 2.7nF to 220nF. Do not leave SS unconnected. During start-up, while the SS capacitor charges, the RT7274/79/80/81 operate in discontinuous switching mode with very small pulses. This prevents negative inductor currents and keeps the circuit from sinking current. Therefore, the output voltage may be pre-biased to some positive level before start-up. Once the VSS ramp charges enough to raise the internal reference above the feedback voltage, switching will begin and the output voltage will smoothly rise from the pre-biased level to its regulated level. After VSS rises above about 2.2V output over-and under-voltage protections are enabled and the RT7279/81 begins continuous-switching operation. Shut-down, Start-up and Enable (EN) Internal Regulator (PVCC) The enable input (EN) has a logic-low level of 0.4V. When VEN is below this level the IC enters shutdown mode and supply current drops to less than 10μA. When VEN exceeds its logic-high level of 1.6V the IC is fully operational. An internal linear regulator (PVCC) produces a 5.1V supply from VIN that powers the internal gate drivers, PWM logic, reference, analog circuitry, and other blocks. If VIN is 6V or greater, PVCC is guaranteed to provide significant power for external loads. Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS7274/79/80/81-02 April 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 RT7274/79/80/81 PGOOD Comparator PGOOD is an open drain output controlled by a comparator connected to the feedback signal. If FB exceeds 90% of the internal reference voltage, PGOOD will be high impedance. Otherwise, the PGOOD output is connected to PGND. External Bootstrap Capacitor (C6) Connect a 0.1μF low ESR ceramic capacitor between BOOT and SW. This bootstrap capacitor provides the gate driver supply voltage for the high-side N-channel MOSFET switch. Over Temperature Protection The RT7274/79/80/81 includes an Over Temperature Protection (OTP) circuitry to prevent overheating due to excessive power dissipation. The OTP will shut down switching operation when the junction temperature exceeds 150°C. Once the junction temperature cools down by approximately 25°C the IC will resume normal operation with a complete soft-start. For continuous operation, provide adequate cooling so that the junction temperature does not exceed 150°C. Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 8 is a registered trademark of Richtek Technology Corporation. DS7274/79/80/81-02 April 2013 RT7274/79/80/81 Absolute Maximum Ratings z z z z z z z z z z z z (Note 1) Supply Input Voltage, VIN, VINR ------------------------------------------------------------------------------Switch Node, SW -------------------------------------------------------------------------------------------------Switch Node, SW (
RT7274GSP 价格&库存

很抱歉,暂时无法提供与“RT7274GSP”相匹配的价格&库存,您可以联系我们找货

免费人工找货
RT7274GSP
  •  国内价格 香港价格
  • 2500+6.628412500+0.82225
  • 5000+6.267395000+0.77747
  • 7500+6.085347500+0.75489
  • 12500+5.8825112500+0.72973

库存:458

RT7274GSP
  •  国内价格 香港价格
  • 1+21.356161+2.64922
  • 10+13.7700010+1.70817
  • 25+11.7798125+1.46128
  • 100+9.53715100+1.18308
  • 250+8.44435250+1.04752
  • 500+7.77649500+0.96467
  • 1000+7.221191000+0.89579

库存:458