RT8005GQV

RT8005 1A, 2MHz, High-Efficiency Synchronous Buck PWM Converter General Description The RT8005 is a high-efficiency synchronous buck PWM converter with integrated P-Channel and N-Channel power MOSFET switches. Capable of delivering 1A output current over a wide input voltage range of 2.4V to 5.5V, the RT8005 is ideally suited for portable applications powered by a single Li-Ion battery or by 3-cell NiMH/NiCd batteries. The device operates at 2MHz PWM switching fixed frequency, can use smaller CIN, COUT capacitor and inductor. The RT8005 integrates two low RDS(ON) 230mΩ and 180mΩ of high- and low-side switching MOSFETs to reduce board space, as only resistors and capacitors along with one inductor are required externally for operation. The RT8005 has adjustable output range down to 0.5V. The other features include internal soft-start, chip enable, overtemperature and over-current protections. It is available in a space-saving VDFN-10L 3x3 package. Features l l l l l l l l l l l l l l l 2.4V to 5.5V Input Voltage Range Adjustable Output from 0.5V to VIN Guaranteed 1A Output Current Accurate Reference : 0.5V (±1.5%) Up to 90% Conversion Efficiency Typical Quiescent Current : 200µA Integrated Low RDS(ON) High- and Low-Side Power MOSFET Switches : 230mΩ and 180mΩ Current Mode PWM Operation Fixed Frequency : 2MHz 100% Maximum Duty Cycle for Lowest Dropout Internal Soft-Start No Schottky Diode Required Over-Temperature and Over-Current Protection Small 10-Lead VDFN 3x3 Package RoHS Compliant and 100% Lead (Pb)-Free Ordering Information RT8005 Package Type QV : VDFN-10L 3x3 (V-Type) Operating Temperature Range P : Pb Free with Commercial Standard G : Green (Halogen Free with Commercial Standard) Note : Richtek Pb-free and Green products are : }RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. }Suitable for use in SnPb or Pb-free soldering processes. }100% matte tin (Sn) plating. Applications l l l l l l Battery-Powered Equipments Low Power CPU and DSP Supplies Digital Cameras and Hard Disks Protable Instruments and Notebook Computers Celluar Phones, PDAs, and Handheld PCs USB-Based DSL Modems and Other Network Interface Cards Pin Configurations (TOP VIEW) LX PVDD PVDD VDD EN 1 2 3 4 5 10 9 8 7 9 GND 11 Marking Information For marking information, contact our sales representative directly or through a Richtek distributor located in your area, otherwise visit our website for detail. PGND PGND GND COMP FB VDFN-10L 3x3 DS8005-08 August 2007 www.richtek.com 1 RT8005 Typical Application Circuit V IN 2.4V to 5.5V C IN 2.2uF 5 7 CCOMP 10nF 4 VDD 2,3 PVDD LX EN RT8005 FB PGND 6 9, 10 1 LOUT 2.2uH R1 10k R2 7.15k V OUT 1.2V/1A C OUT 2.2uF Chip Enable COMP GND 8, Exposed Pad (11) Recommended component selection for Typical Application Circuit. VOUT (V) 0.5 1 1.2 1.8 2.5 3.3 VIN (V) 2.4 to 5.5 2.4 to 5.5 2.4 to 5.5 2.4 to 5.5 3.3 to 5.5 4.2 to 5.5 CIN (uF) 2.2 2.2 2.2 2.2 2.2 2.2 COUT (uF) 2.2/4.7 2.2/4.7 2.2/4.7 2.2/4.7 2.2/4.7 2.2/4.7 LOUT (uH) 2.2 2.2 2.2 2.2 2.2 2.2 R1 (kΩ ) 10 10 10 10 10 10 R2 (kΩ) Open 10 7.15 3.83 2.49 1.78 CCOMP (nF) 10 10 10 10 10 10 Suggested Inductors Component Supplier ABC Sumida GOTREND SR0403 CDRH3D16 GTSD53 Series Inductance (µH) 2.2 2.2 2.2 DCR (mΩ) 47 59 29 Current Rating (mA) 2600 1750 2410 Dimensions (mm) 4.5x4x3.2 4x4x1.8 5x5x2.8 Suggested Capacitors For C IN and COUT Component Supplier TDK Panasonic TAIYO YUDEN Part No. C1608X5R1A225M ECJ1VB0J225M JMK107BJ225M Capacitance (uF) 2.2 2.2 2.2 Case Size 0603 0603 0603 www.richtek.com 2 DS8005-08 August 2007 RT8005 Functional Pin Description Pin No. 1 2, 3 4 5 Pin Name LX PVDD VDD EN Pin Function Internal Power MOSFET Switches Output. Connect this pin to the inductor. Power Input Supply. Decouple this pin to PGND with a capacitor. Signal Input Supply. Decouple this pin to GND with a capacitor. N ormally VDD is equal to PVDD. Chip Enable (Active High). Logic low shuts down the converter. Floating this pin is forbidden. Switcher Feedback Voltage. This pin is the inverting input of the error amplifier. FB senses the switcher output throug h an external resistor divider network. FB regulation voltage is 0.5V. Compensation Input. This pin is the output of the internal error amplifier. Connect an external capacitor to compensate the regulator controlled loop. Signal Ground. All small-signal components, compensation components and the exposed pad on the bottom side of the IC should connect to this ground, which in turn connects to PGND at one point. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. Power Ground. Connect this pin close to the terminal of C IN and COUT. 6 FB 7 8, Exposed Pad (11) 9, 10 COMP GND PGND Function Block Diagram EN VDD PVDD Shutdown Control Oscillator COMP VREF Slope Compensation Current Limit Detector Over Temperature Detector Current Sense PWM Comparator + Error Amplifier + Control Logic Driver LX FB - Zero Detector GND PGND DS8005-08 August 2007 www.richtek.com 3 RT8005 Absolute Maximum Ratings l (Note 1) Supply Voltage, PVDD and VDD ------------------------------------------------------------------------------ −0.3V to 6V l EN, FB Voltage --------------------------------------------------------------------------------------------------- −0.3V to VDD l PGND to GND ---------------------------------------------------------------------------------------------------- −0.3V to 0.3V l LX Voltage --------------------------------------------------------------------------------------------------------- −0.3V to (VDD + 0.3V) l Power Dissipation, PD @ TA = 25°C VDFN-10L 3x3 ----------------------------------------------------------------------------------------------------1.923W l Package Thermal Resistance (Note 4) VDFN-10L 3x3, θJA -----------------------------------------------------------------------------------------------52°C/W l Junction Temperature -------------------------------------------------------------------------------------------150°C l Lead Temperature (Soldering, 10 sec.) ----------------------------------------------------------------------260°C l Storage Temperature Range ----------------------------------------------------------------------------------- −65°C to 150°C l ESD Susceptibility (Note 2) HBM (Human Body Mode) -------------------------------------------------------------------------------------2kV MM (Machine Mode) --------------------------------------------------------------------------------------------200V Recommended Operating Conditions l l l l (Note 3) Supply Voltage, PVDD and VDD ------------------------------------------------------------------------------2.4V to 5.5V Enable Input Voltage, VEN -------------------------------------------------------------------------------------0V to VDD Ambient Temperature Range ---------------------------------------------------------------------------------- −40°C to 85°C Junction Temperature Range ---------------------------------------------------------------------------------- −40°C to 125°C Electrical Characteristics (VDD = 3.3V, TA = 25°C, unless otherwise specified) Parameter Supply Current Quiescent Current Shutdown Current Reference Reference Voltage Oscillator Switching Frequency Range Maximum Duty Cycle Output Voltage Line Regulation Load Regulation Power Switches RDS(ON) of P-Channel MOSFET RDS(ON) of N-Channel MOSFET Current Limit Symbol Test Conditions Min Typ M ax Units IQ ISHDN VEN = 3.3V, VFB = VREF + 0.15V, IOUT = 0mA VEN = 0V --- 200 0.01 400 1 µA µA VREF 0.4925 0.5 0.5075 V fOSC DC VPVDD = VOUT 1.7 100 2.0 -- 2.3 -- MHz % VDD = 2.4V to 5.5V, ILOAD = 100mA 10mA < ILOAD < 600mA --- --- +1.5 +1.5 % % mΩ mΩ A R P_FET R N_FET ILIMIT VPVDD = 3.3V, ILX = 300mA VPVDD = 3.3V, ILX = − 300mA VPVDD = 3.3V, VFB = VREF - 0.15V ---- 230 180 1.8 ---- To be continued www.richtek.com 4 DS8005-08 August 2007 RT8005 Parameter Logic Input EN Threshold Protection Thermal Shutdown Temperature Thermal Shutdown Hysteresis TSD ∆TSD --180 20 --°C °C Logic-Low Voltage VIL Logic-High Voltage VIH VDD = 2.4V to 5.5V, Shutdown VDD = 2.4V to 5.5V, Enable -1.5 --0.4 -V Symbol Test Conditions Min Typ Max Units Note 1. S tresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. D evices are ESD sensitive. Handling precaution recommended. Note 3. T he device is not guaranteed to function outside its operating conditions. Note 4. θ JA is measured in the natural convection at T A = 2 5 ° C on a high effective thermal conductivity test board of JEDEC 51-7 thermal measurement standard. DS8005-08 August 2007 www.richtek.com 5 RT8005 Typical Operating Characteristics Line Regulation Deviation 0.4% 0.4 Load Regulation Devation 0.40% 0.4 VOUT = 1.2V IOUT = 50mA Output V olta ge D eviation (%)1 0.2% 0.2 O utpu t Vo ltage Dev iatio n (% )1 0.20% 0.2 0.0% 0 IOUT -0.2% -0.2 IOUT = 1000mA = 500mA 0.00% 0 VIN = 5V -0.20% -0.2 VIN = 3.3V -0.40% -0.4 -0.4% -0.4 -0.6% -0.6 2 2.5 3 3.5 4 4.5 5 5.5 -0.60% -0.6 0 Input Voltage (V) 100 200 300 400 500 600 700 800 900 100 1000 0 Load Regulation (mA) Current Limit vs. Input Voltage 2.2 2 Efficiency vs. Output Current 100 90 80 VOUT = 1.2V VOUT = 1.2V Curre nt L imit (A) 1.8 1.6 1.4 1.2 1 2 2.5 3 3.5 4 4.5 5 5.5 Effic ienc y (%) 70 60 50 40 30 20 10 0 1 VIN = 3.3V VIN = 5V 10 100 1000 Input Voltage (V) Output Current (mA) Frequency vs. Input Voltage 2.15 2.1 2.1 2.05 Frequency vs. Temperature F requ enc y(MH z)1 2.05 2 1.95 1.9 1.85 2.5 3 3.5 4 4.5 5 5.5 F requ enc y(MH z)1 2 1.95 1.9 1.85 1.8 -50 -25 0 25 50 75 100 125 Input Voltage(V) Temperature (°C) www.richtek.com 6 DS8005-08 August 2007 RT8005 Quiescent Current vs. Input Voltage 300 220 Quiescent Current vs. Temperature VEN = 3.3V, VFB = 0.65V 210 VEN = 3.3V, VFB = 0.65V Quiesc ent Current (uA) Q uies cent Current (uA) 275 250 225 200 175 150 2 2.5 3 3.5 4 4.5 5 5.5 200 190 180 170 160 150 -50 -25 0 25 50 75 100 125 Input Voltage(V) Temperature (°C) VREF v s. Input Voltage 0.51 0.502 0.5 0.505 0.498 VREF v s. Temperature VREF (V) 2 2.5 3 3.5 4 4.5 5 5.5 V REF (V) 0.5 0.496 0.494 0.492 0.49 0.495 0.49 0.488 0.485 0.486 -50 -25 0 25 50 75 100 125 Input Voltage (V) Temperature (°C) Soft Start Function VIN = 3.3V VOUT = 1.2V IOUT = 0mA VIN = 3.3V Soft Start Function VOUT = 1.2V IOUT = 1A VOUT (500mV/Div) VOUT (500mV/Div) VEN (2V/Div) VEN (2V/Div) II N (50mA/Div) II N (500mA/Div) Time (500 µs/Div) Time (500 µs/Div) DS8005-08 August 2007 www.richtek.com 7 RT8005 Steady State VIN = 3.3V, VOUT = 1.2V, IOUT = 0mA Steady State VIN = 3.3V, VOUT = 1.2V, IOUT = 1A VOUT (2mV/Div) VOUT (2mV/Div) VLX VLX (1V/Div) (2V/Div) ILX (500mA/Div) ILX (1A/Div) Time (100 µs/Div) Time (250ns/Div) Load Transient Response VIN = 3.3V, VOUT = 1.2V IOUT = 100mA to 1A Output Voltage (100mV/Div) Load Current Time (100 µs/Div) (500mA/Div) www.richtek.com 8 DS8005-08 August 2007 RT8005 Application Information RT8005 is a pulse-width-modulated (PWM) step-down DCDC converter. Capable of delivering 1A output current over a wide input voltage range from 2.4V to 5.5V. The RT8005 is ideally suited for portable electronic devices that are powered from 1-cell Li-ion battery or from other power sources within the range such as cellular phones, PDAs and handy terminals. Chip Enable/Disable and Soft Start Four operational modes are available: PWM, PSM, LowDrop-Out and shut-down modes. Pulling EN pin lower than 0.4V shuts down the RT8005 and reduces its quiescent current to 1µA. Pulling EN pin higher than 1.5V enables the RT8005 and initiates the softstart cycle. RT8005 has internal soft-start that can reduce the Inrush Current during the rising of Output Voltage. PWM Operation During normal operation, the RT8005 regulates output voltage by switching at a constant frequency transferring the power to the load in each cycle by PWM. The RT8005 uses a slope-compensated, current-mode PWM controller capable of achieving 100% duty cycle. At each rising edge of the internal oscillator, the Control Logic cell sends a PWM ON signal to the Driver cell to turn on internal PMOSFET. This allows current to ramp up through the inductor to the load, and stores energy in a magnetic field. The switch remains on until either the current-limit is tripped or the PWM comparator signals for the output in regulation. After the switch is turned off, the inductor releases the magnetic energy and forces current through the N-MOSFET synchronous rectifier to the output-filter capacitor and load. The output-filter capacitor stores charge when the inductor current is above the average output current and releases charge when the inductor current is below the average current to smooth the output voltage across the load. A Zero Detector monitors inductor current by sensing v oltage drop across the N-MOSFET synchronous rectifier when it turns on. The N-MOSFET turns off and allows the converter entering discontinuous conduction mode when the inductor current decreases to zero. The zero current detection on threshold is about 80mA.This reduces conduction loss and increase power conversion efficiency at light load condition. DS8005-08 August 2007 www.richtek.com 9 PSM Operation Consequently, the converter will enter pulse-skipping mode (PSM) during extreme light load condition or when modulation index (VOUT /VIN) is extreme low. This could reduce switching loss and further increase power conversion efficiency. Over Current Protection The RT8005 continuously monitors the inductor current by sensing the voltage across the P-MOSFET when it turns on. When the inductor current is higher than current limit threshold (1.8A typical), OCP activates and forces the P-MOSFET turning off to limit inductor current cycle by cycle. Output Voltage Setting and Feedback Network The output voltage can be set from VREF to VIN by a voltage divider as: the internal VREF is 0.5V with 1.5% accuracy. In practical application, keep R1 = 10kΩ respectively and choose appropriate R2 according to the required output voltage. Inductor Selection The output inductor is suggested as the table of suggested inductors for optimal performance. Make sure that the inductor will not saturate over the operation conditions including temperature range, input voltage range, and maximum output current. If possible, choose an inductor with rated current higher than 2A so that it will not saturate even under short circuit condition. Input Capacitor Selection The input capacitor can filter the input peak current and noise at input voltage source. The capacitor with low ESR (effective series resistance) provides the small drop voltage to stabilize the input voltage during the transient loading. For input capacitor selection, the ceramic capacitors larger than 2.2µF is recommend. The capacitor must conform to the RMS current requirement. The maximum RMS ripple current is calculated as : IRMS = IOUT(MAX) VOUT (VIN - VOUT) VIN RT8005 Output Capacitor Selection The capacitor’ s ESR determines the output ripple voltage and the initial voltage drop following a high slew-rate transient’ s edge. Typically, if the ESR requirement is satisfied, the capacitance is adequate to filtering. The output ripple voltage can be calculated as : ∆VOUT = ∆IC (ESR + 1 ) 8 x COUT x fOSC VIN 2, 3 R3 4 R5 C2 C3 5 EN 8 GND VDD FB 6 RT8005 1 PVDD LX L1 VOUT R1 C1 R2 R4 C4 COMP 7 9, 10 PGND VIN Where f OSC = o perating frequency, COUT = o utput capacitance and ∆IC = ∆IL = ripple current in the inductor. The ceramic capacitor with low ESR value provides the low output ripple and low size profile. Connect a 2.2µF/4.7µF ceramic capacitor at output terminal for good performance and place the input and output capacitors as close as possible to the device. Layout Considerations Follow the PCB layout guidelines for optimal performance of RT8005. 1. For the main current paths as indicated in bold lines in Figure 1, keep their traces short and wide. 2. Put the input capacitor as close as possible to the device pins (PVDD and PGND). 3. LX node is with high frequency voltage swing and should be kept small area. Keep analog components away from LX node to prevent stray capacitive noise pick-up. 4. Connect feedback network behind the output capacitors. Keep the loop area small. Place the feedback components near the RT8005. 5.Connect all analog grounds to a command node and then connect the command node to the power ground behind the output capacitors. 6. An example of 2-layer PCB layout is shown in Figure 2 to Figure 3 for reference. Figure 1 Figure 2. Top Layer Figure 3. Bottom Layer www.richtek.com 10 DS8005-08 August 2007 RT8005 Outline Dimension D2 D L E E2 SEE DETAIL A 1 e A A1 A3 b 2 1 2 1 DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Symbol A A1 A3 b D D2 E E2 e L Dimensions In Millimeters Min 0.800 0.000 0.175 0.180 2.950 2.300 2.950 1.500 0.500 0.350 0.450 Max 1.000 0.050 0.250 0.300 3.050 2.650 3.050 1.750 D imensions In Inches Min 0.031 0.000 0.007 0.007 0.116 0.091 0.116 0.059 0.020 0.014 0.018 Max 0.039 0.002 0.010 0.012 0.120 0.104 0.120 0.069 V-Type 10L DFN 3x3 Package Richtek Technology Corporation Headquarter 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Richtek Technology Corporation Taipei Office (Marketing) 8F, No. 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)89191466 Fax: (8862)89191465 Email: marketing@richtek.com DS8005-08 August 2007 www.richtek.com 11