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RT8010-25GQW

RT8010-25GQW

  • 厂商:

    RICHTEK(台湾立锜)

  • 封装:

    WDFN6_EP

  • 描述:

    IC REG BUCK 2.5V 1A SYNC 6WDFN

  • 数据手册
  • 价格&库存
RT8010-25GQW 数据手册
RT8010/A 1.5MHz, 1A, High Efficiency PWM Step-Down DC/DC Converter General Description The RT8010/A is a high-efficiency Pulse-Width-Modulated (PWM) step-down DC-DC converter. Capable of delivering 1A output current over a wide input voltage range from 2.5V to 5.5V, the RT8010/A is ideally suited for portable electronic devices that are powered from 1-cell Li-ion battery or from other power sources such as cellular phones, PDAs and hand-held devices. Two operating modes are available including : PWM/LowDropout autoswitch and shut-down modes. The Internal synchronous rectifier with low RDS(ON) dramatically reduces conduction loss at PWM mode. No external Schottky diode is required in practical application. The RT8010/A enters Low-Dropout mode when normal PWM cannot provide regulated output voltage by continuously turning on the upper PMOS. RT8010/A enter shut-down mode and consumes less than 0.1μA when EN pin is pulled low. The switching ripple is easily smoothed-out by small package filtering elements due to a fixed operating frequency of 1.5MHz. This along with small WDFN-6L 2x2 and WQFN-16L 3x3 package provides small PCB area application. Other features include soft start, lower internal reference voltage with 2% accuracy, over temperature protection, and over current protection. Features +2.5V to +5.5V Input Range Output Voltage (Adjustable Output From 0.6V to VIN) RT8010 : 1.0V, 1.2V, 1.5V, 1.6V, 1.8V, 2.5V and 3.3V Fixed/Adjustable Output Voltage RT8010A Adjustable Output Voltage Only 1A Output Current 95% Efficiency No Schottky Diode Required 1.5MHz Fixed-Frequency PWM Operation Small 6-Lead WDFN and 16-Lead WQFN Package RoHS Compliant and 100% Lead (Pb)-Free Applications Mobile Phones Personal Information Appliances Wireless and DSL Modems MP3 Players Portable Instruments Ordering Information RT8010/A() Package Type QW : WDFN/WQFN (W-Type) Operating Temperature Range P : Pb Free with Commercial Standard G : Green (Halogen Free with Commercial Standard) Output Voltage Default : Adjustable (RT8010/A) Fixed (RT8010) 10 : 1.0V 12 : 1.2V 15 : 1.5V 16 : 1.6V 18 : 1.8V 25 : 2.5V 33 : 3.3V WQFN-16L 3x3 WDFN-6L 2x2 Note : RichTek Pb-free and Green products are : RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. Suitable for use in SnPb or Pb-free soldering processes. 100% matte tin (Sn) plating. www.richtek.com 1 Pin Configurations (TOP VIEW) NC LX LX LX 16 15 14 13 WDFN-6L 2x2 (RT8010) WQFN-16L 3x3 (RT8010A) Marking Information For marking information, contact our sales representative directly or through a RichTek distributor located in your area, otherwise visit our website for detail. DS8010/A-02 March 2007 GND NC EN NC NC EN VIN 1 2 3 6 5 4 FB/VOUT GND LX GND GND GND FB/VOUT 1 2 3 4 5 6 7 8 12 11 10 VIN VIN VIN 9 VIN RT8010/A Typical Application Circuit VIN 2.5V to 5.5V 3 CIN 4.7uF 4 6 COUT 5 10uF L 2.2uH VOUT VIN LX VOUT GND RT8010/A 2 1 EN NC Figure 1. Fixed Voltage Regulator VIN 2.5V to 5.5V 3 CIN 4.7uF 2 1 VIN LX 4 L 2.2uH C1 R1 VOUT RT8010/A EN NC FB GND 6 5 IR2 COUT 10uF R2 VOUT = VREF x ⎛ 1 + R1 ⎞ ⎜ ⎟ ⎝ R2 ⎠ with R2 = 300kΩ to 60kΩ so the IR2 = 2μA to 10μA, and (R1 x C1) should be in the range between 3x10-6 and 6x10-6 for component selection. Figure 2. Adjustable Voltage Regulator Layout Guide RT8010/A_FIX NC EN VIN 1 2 3 6 VOUT 5 GND 4 LX COUT CIN LX should be connected CIN must be placed to Inductor by wide and between VDD and short trace, keep GND as closer as sensitive compontents away from this trace possible Output capacitor must be near RT8010 RT8010/A_ADJ NC 1 EN 2 VIN 3 6 FB 5 GND L1 4 LX COUT LX should be connected to Inductor by wide CIN must be placed and short trace, keep sensitive between VDD and compontents away GND as closer as from this trace possible CIN R1 R2 Output capacitor must be near RT8010/A L1 Figure 3 Layout note: 1. The distance that CIN connects to VIN is as close as possible (Under 2mm). 2. COUT should be placed near RT8010/A. www.richtek.com 2 DS8010/A-02 March 2007 RT8010/A Functional Pin Description Pin Number RT8010 1, 2 3 4 5 6 RT8010A 6, 8, 16, 7 13, 14, 15 1, 2, 3, 5 4 Pin Name NC EN LX GND FB/VOUT Pin Function No Internal Connect (Floating or Connecting to GND). Chip Enable (Active High). Power Input. (Pin 9 and Pin 10 must be connected with Pin 11) Pin for Switching. (Pin 13 must be connected with Pin 14) Ground. Feedback/Output Voltage Pin. Exposed Pad Exposed Pad 9 , 10, 11, 12 VIN Function Block Diagram EN VIN OSC & Shutdown Control Slope Compensation Current Sense RS1 Current Limit Detector FB/VOUT Error Amplifier RC COMP PWM Comparator Control Logic Driver LX UVLO & Power Good Detector RS2 VREF GND DS8010/A-02 March 2007 www.richtek.com 3 RT8010/A Absolute Maximum Ratings (Note 1) 6.5V −0.3V to VIN 0.606W 1.47W 165°C/W 20°C/W 68°C/W 7.5°C/W 260°C −65°C to 150°C 150°C 2kV 200V Supply Input Voltage -----------------------------------------------------------------------------------------------------EN, FB Pin Voltage ------------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C WDFN-6L 2x2 -------------------------------------------------------------------------------------------------------------WQFN-16L 3x3 -----------------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 4) WDFN-6L 2x2, θJA --------------------------------------------------------------------------------------------------------WDFN-6L 2x2, θJC -------------------------------------------------------------------------------------------------------WQFN-16L 3x3, θJA ------------------------------------------------------------------------------------------------------WQFN-16L 3x3, θJC -----------------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------Storage Temperature Range -------------------------------------------------------------------------------------------Junction Temperature ----------------------------------------------------------------------------------------------------ESD Susceptibility (Note 2) HBM (Human Body Mode) ---------------------------------------------------------------------------------------------MM (Machine Mode) ------------------------------------------------------------------------------------------------------ Recommended Operating Conditions (Note 3) Supply Input Voltage ------------------------------------------------------------------------------------------------------ 2.5V to 5.5V Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics (VIN = 3.6V, VOUT = 2.5V, VREF = 0.6V, L = 2.2μH, CIN = 4.7μF, COUT = 10μF, TA = 25°C, IMAX = 1A unless otherwise specified) Parameter Input Voltage Range Quiescent Current Shutdown Current Reference Voltage Adjustable Output Range Symbol VIN IQ ISHDN VREF VOUT ΔVOUT ΔVOUT Test Conditions Min 2.5 Typ -50 0.1 0.6 ------- Max 5.5 70 1 0.612 VIN − 0.2V +3 +3 +3 +3 +3 Units V μA μA V V % % % % % IOUT = 0mA, VFB = VREF + 5% EN = GND For Adjustable Output Voltage (Note 6) VIN = 2.5V to 5.5V, VOUT = 1.0V 0A < IOUT < 1A VIN = 2.5V to 5.5V, VOUT = 1.2V 0A < IOUT < 1A VIN = 2.5V to 5.5V, VOUT = 1.5V 0A < IOUT < 1A VIN = 2.5V to 5.5V, VOUT = 1.6V 0A < IOUT < 1A VIN = 2.5V to 5.5V, VOUT = 1.8V 0A < IOUT < 1A --0.588 VREF −3 −3 −3 −3 −3 Output Voltage Accuracy Fix ΔVOUT ΔVOUT ΔVOUT To be continued www.richtek.com 4 DS8010/A-02 March 2007 RT8010/A Parameter Output Voltage Accuracy Output Voltage Accuracy FB Input Current PMOSFET RON NMOSFET RON P-Channel Current Limit EN High-Level Input Voltage EN Low-Level Input Voltage Fix Adjustable Symbol ΔVOUT ΔVOUT ΔVOUT IFB Test Conditions VIN = VOUT + ΔV to 5.5V VIN = VOUT + ΔV to 5.5V VIN = VOUT + ΔV to 5.5V 0A < IOUT < 1A VFB = VIN VIN = 3.6V VIN = 2.5V VIN = 3.6V VIN = 2.5V (Note 5) (Note 5) (Note 5) Min −3 −3 Typ ----0.28 0.38 0.25 0.35 1.5 --1.8 0.1 1.5 160 --Max +3 +3 +3 50 ------0.4 --1.8 --1 Units % % % nA Ω Ω A V V V MHz °C % μA −3 −50 ----1.4 1.5 ---- RDS(ON)_P IOUT = 200mA RDS(ON)_N IOUT = 200mA ILIM_P VEN_H VEN_L VIN = 2.5V to 5.5 V VIN = 2.5V to 5.5V VIN = 2.5V to 5.5V Under Voltage Lock Out threshold UVLO Hysteresis Oscillator Frequency Thermal Shutdown Temperature Max. Duty Cycle LX Leakage Current VIN = 3.6V, VLX = 0V or VLX = 3.6V fOSC TSD VIN = 3.6V, IOUT = 100mA 1.2 -100 −1 Note 1. Stresses listed as the above “ Absolute Maximum Ratings” may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. Devices are ESD sensitive. Handling precaution recommended. Note 3. The device is not guaranteed to function outside its operating conditions. Note 4. θJA is measured in the natural convection at TA = 25°C on a high effective four layers thermal conductivity test board of JEDEC 51-7 thermal measurement standard. The case point of θJC is on the expose pad for the QFN package. Note 5. ΔV = IOUT x PRDS(ON) Note 6. Guarantee by design. DS8010/A-02 March 2007 www.richtek.com 5 RT8010/A Typical Operating Characteristics Efficiency vs. Output Current 100 90 80 100 Efficiency vs. Output Current 90 80 Efficiency (%) Efficiency (%) 70 60 50 40 30 20 10 0 0 VIN = 3.6V VIN = 4.2V VIN = 5.0V 70 60 50 40 30 20 VIN = 5.0V VIN = 3.3V VIN = 2.5V VOUT = 3.3V, COUT = 4.7μF, L = 4.7μH 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 10 0 0 0.1 0.2 VOUT = 1.2V, COUT = 4.7μF, L = 4.7μH 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Output Current (A) Output Current (A) Efficiency vs. Output Current 100 90 80 2.0 1.9 UVLO Voltage vs.Temperature Rising Efficiency (%) 60 50 40 30 20 10 0 0 0.1 0.2 VIN = 5.0V VIN = 3.3V VIN = 2.5V Input Voltage (V) 70 1.8 1.7 1.6 1.5 1.4 1.3 Falling VOUT = 1.2V, COUT = 10μF, L = 2.2μH 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.2 -40 -25 -10 5 20 35 VOUT = 1.2V, IOUT = 0A 50 65 80 95 110 125 Output Current (A) Temperature (°C) EN Pin Threshold vs. Input Voltage 1.20 1.15 1.10 EN Pin Threshold vs. Temperature 1.6 1.5 1.4 EN Pin Threshold (V) 1.05 1.00 0.95 0.90 0.85 0.80 0.75 0.70 0.65 0.60 2.5 2.8 3.1 3.4 3.7 4 EN Pin Threshold (V) 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 -40 -25 -10 5 Rising Falling Rising Falling VOUT = 1.2V, IOUT = 0A 4.3 4.6 4.9 5.2 5.5 VIN = 3.6V, VOUT = 1.2V, IOUT = 0A 20 35 50 65 80 95 110 125 Input Voltage (V) Temperature (°C) www.richtek.com 6 DS8010/A-02 March 2007 RT8010/A Output Voltage vs. Load Current 1.230 1.225 1.220 1.25 1.24 1.23 Output Voltage vs. Temperature Output Voltage (V) Output Voltage (V) 1.215 1.210 1.205 1.200 1.195 1.190 1.185 1.180 0 0.1 0.2 0.3 VIN = 5.0V VIN = 3.6V 1.22 1.21 1.20 1.19 1.18 1.17 1.16 1.15 VIN = 3.6V, IOUT = 0A -40 -25 -10 5 20 35 50 65 80 95 110 125 0.4 0.5 0.6 0.7 0.8 0.9 1 Load Current (A) Temperature (°C) Frequency vs. Input Voltage 1.60 1.55 Frequency vs. Temperature 1.60 1.55 Frequency (kHz) Frequency (kHz) 1.50 1.45 1.40 1.35 1.30 1.25 1.20 2.5 2.8 3.1 1.50 1.45 1.40 1.35 1.30 1.25 VIN = 3.6V, VOUT = 1.2V, IOUT = 300mA 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5 VIN = 3.6V, VOUT = 1.2V, IOUT = 300mA -40 -25 -10 5 20 35 50 65 80 95 110 125 1.20 Input Voltage (V) Temperature (°C) Output Current Limit vs. Input Voltage 2.6 2.5 2.4 2.3 2.2 2.1 2.0 1.9 1.8 1.7 1.6 1.5 2.5 2.8 3.1 3.4 3.7 Output Current Limit vs. Temperature 2.6 2.5 VIN = 5.0V VIN = 3.6V Output Current Limit (A) Output Current Limit (A) 2.4 2.3 2.2 2.1 2.0 1.9 1.8 1.7 1.6 1.5 -40 -25 -10 5 20 35 50 65 80 95 110 125 VIN = 3.3V VOUT = 1.2V @ TA = 20°C 4 4.3 4.6 4.9 5.2 5.5 VOUT = 1.2V Input Voltage (V) Temperature (°C) DS8010/A-02 March 2007 www.richtek.com 7 RT8010/A Power On from EN VIN = 3.6V, VOUT = 1.2V, IOUT = 10mA Power On from EN VIN = 3.6V, VOUT = 1.2V, IOUT = 1A VEN (2V/Div) VOUT (1V/Div) I IN (500mA/Div) Time (100μs/Div) VEN (2V/Div) VOUT (1V/Div) I IN (500mA/Div) Time (100μs/Div) Power On from VIN VEN = 3V, VOUT = 1.2V, ILX = 1A Power Off from EN VIN = 3.6V, VOUT = 1.2V, ILX = 1A VIN (2V/Div) VOUT (1V/Div) ILX (1A/Div) Time (250μs/Div) VEN (2V/Div) VOUT (1V/Div) ILX (1A/Div) Time (100μs/Div) Load Transient Response VIN = 3.6V, VOUT = 1.2V IOUT = 50mA to 1A Load Transient Response VIN = 3.6V, VOUT = 1.2V IOUT = 50mA to 0.5A VOUT ac (50mV/Div) VOUT ac (50mV/Div) IOUT (500mA/Div) Time (50μs/Div) IOUT (500mA/Div) Time (50μs/Div) www.richtek.com 8 DS8010/A-02 March 2007 RT8010/A Load Transient Response VIN = 5V, VOUT = 1.2V IOUT = 50mA to 1A Load Transient Response VIN = 5V, VOUT = 1.2V IOUT = 50mA to 0.5A VOUT ac (50mV/Div) VOUT ac (50mV/Div) IOUT (500mA/Div) Time (50μs/Div) IOUT (500mA/Div) Time (50μs/Div) Output Ripple Voltage VIN = 3.6V, VOUT = 1.2V IOUT = 1A Output Ripple Voltage VIN = 5V, VOUT = 1.2V IOUT = 1A VOUT (10mV/Div) VOUT (10mV/Div) VLX (2V/Div) Time (500ns/Div) VLX (2V/Div) Time (500ns/Div) DS8010/A-02 March 2007 www.richtek.com 9 RT8010/A Applications Information The basic RT8010/A application circuit is shown in Typical Application Circuit. External component selection is determined by the maximum load current and begins with the selection of the inductor value and operating frequency followed by CIN and COUT. Inductor Selection For a given input and output voltage, the inductor value and operating frequency determine the ripple current. The ripple current ΔIL increases with higher VIN and decreases with higher inductance. current is exceeded. This results in an abrupt increase in inductor ripple current and consequent output voltage ripple. Do not allow the core to saturate! Different core materials and shapes will change the size/ current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and don't radiate energy but generally cost more than powdered iron core inductors with similar characteristics. The choice of which style inductor to use mainly depends on the price vs size requirements and any radiated field/EMI requirements. CIN and COUT Selection The input capacitance, C IN, is needed to filter the trapezoidal current at the source of the top MOSFET. To prevent large ripple voltage, a low ESR input capacitor sized for the maximum RMS current should be used. RMS current is given by : IRMS = IOUT(MAX) VOUT VIN VIN −1 VOUT ⎡V ⎤⎡ V ⎤ ΔIL = ⎢ OUT ⎥ × ⎢1 − OUT ⎥ VIN ⎦ ⎣ f ×L ⎦ ⎣ Having a lower ripple current reduces the ESR losses in the output capacitors and the output voltage ripple. Highest efficiency operation is achieved at low frequency with small ripple current. This, however, requires a large inductor. A reasonable starting point for selecting the ripple current is ΔIL = 0.4(IMAX). The largest ripple current occurs at the highest VIN. To guarantee that the ripple current stays below a specified maximum, the inductor value should be chosen according to the following equation : VOUT ⎤ ⎡ VOUT ⎤ ⎡ L=⎢ ⎥ × ⎢1 − VIN(MAX) ⎥ ⎣ f × ΔIL(MAX) ⎦ ⎣ ⎦ Inductor Core Selection Once the value for L is known, the type of inductor must be selected. High efficiency converters generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite or mollypermalloy cores. Actual core loss is independent of core size for a fixed inductor value but it is very dependent on the inductance selected. As the inductance increases, core losses decrease. Unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. Ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite core material saturates “ hard” , which means that inductance collapses abruptly when the peak design This formula has a maximum at VIN = 2VOUT, where I RMS = I OUT/2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. The selection of COUT is determined by the effective series resistance (ESR) that is required to minimize voltage ripple and load step transients, as well as the amount of bulk capacitance that is necessary to ensure that the control loop is stable. Loop stability can be checked by viewing the load transient response as described in a later section. The output ripple, ΔVOUT, is determined by : ⎡ 1⎤ ΔVOUT ≤ ΔIL ⎢ESR + 8fCOUT ⎥ ⎣ ⎦ www.richtek.com 10 DS8010/A-02 March 2007 RT8010/A The output ripple is highest at maximum input voltage since ΔIL increases with input voltage. Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirements. Dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. Special polymer capacitors offer very low ESR but have lower capacitance density than other types. Tantalum capacitors have the highest capacitance density but it is important to only use types that have been surge tested for use in switching power supplies. Aluminum electrolytic capacitors have significantly higher ESR but can be used in cost-sensitive applications provided that consideration is given to ripple current ratings and long term reliability. Ceramic capacitors have excellent low ESR characteristics but can have a high voltage coefficient and audible piezoelectric effects. The high Q of ceramic capacitors with trace inductance can also lead to significant ringing. Using Ceramic Input and Output Capacitors Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. However, care must be taken when these capacitors are used at the input and output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN large enough to damage the part. Output Voltage Programming The resistive divider allows the FB pin to sense a fraction of the output voltage as shown in Figure 4. VOUT R1 FB RT8010/A GND R2 For adjustable voltage mode, the output voltage is set by an external resistive divider according to the following equation : VOUT = VREF (1 + R1) R2 where VREF is the internal reference voltage (0.6V typ.) Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as : Efficiency = 100% − (L1+ L2+ L3+ ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses : VIN quiescent current and I2R losses. The VIN quiescent current loss dominates the efficiency loss at very low load currents whereas the I2R loss dominates the efficiency loss at medium to high load currents. In a typical efficiency plot, the efficiency curve at very low load currents can be misleading since the actual power lost is of no consequence. 1. The VIN quiescent current appears due to two factors including : the DC bias current as given in the electrical characteristics and the internal main switch and synchronous switch gate charge currents. The gate charge current results from switching the gate capacitance of the internal power MOSFET switches. Each time the gate is switched from high to low to high again, a packet of charge ΔQ moves from VIN to ground. The resulting ΔQ/Δt is the current out of VIN that is typically larger than the DC bias current. In continuous mode, IGATECHG = f(QT+QB) where QT and QB are the gate charges of the internal top and bottom switches. Both the DC bias and gate charge losses are proportional to VIN and thus their effects will be more pronounced at higher supply voltages. Figure 4. Setting the Output Voltage DS8010/A-02 March 2007 www.richtek.com 11 RT8010/A 2. I2R losses are calculated from the resistances of the internal switches, RSW and external inductor RL. In continuous mode, the average output current flowing through inductor L is “chopped” between the main switch and the synchronous switch. Thus, the series resistance looking into the LX pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (DC) as follows : RSW = RDS(ON)TOP x DC + RDS(ON)BOT x (1−DC) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. Thus, to obtain I2R losses, simply add RSW to RL and multiply the result by the square of the average output current. Other losses including CIN and COUT ESR dissipative losses and inductor core losses generally account for less than 2% of the total loss. Thermal Considerations The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula : PD(MAX) = ( TJ(MAX) - TA ) / θJA Where T J(MAX) i s the maximum operation junction temperature, TA is the ambient temperature and the θJA is the junction to ambient thermal resistance. For recommended operating conditions specification of RT8010/A DC/DC converter, where TJ(MAX) is the maximum junction temperature of the die and TA is the maximum ambient temperature. The junction to ambient thermal resistance θJA is layout dependent. For WDFN-6L 2x2 packages, the thermal resistance θJA is 165°C/W on the standard JEDEC 51-7 four layers thermal test board. The maximum power dissipation at TA = 25°C can be calculated by following formula : PD(MAX) = (125 °C − 25 °C) / 165 °C/W = 0.606W for WDFN-6L 2x2 packages The maximum power dissipation depends on operating ambient temperature for fixed T J(MAX) and thermal resistance θJA. Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to ΔILOAD (ESR), where ESR is the effective series resistance of COUT. ΔILOAD also begins to charge or discharge COUT generating a feedback error signal used by the regulator to return VOUT to its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. Layout Considerations Follow the PCB layout guidelines for optimal performance of RT8010/A. For the main current paths as indicated in bold lines in Figure 6, keep their traces short and wide. Put the input capacitor as close as possible to the device pins (VIN and GND). LX node is with high frequency voltage swing and should be kept small area. Keep analog components away from LX node to prevent stray capacitive noise pick-up. Connect feedback network behind the output capacitors. Keep the loop area small. Place the feedback components near the RT8010/A. DS8010/A-02 March 2007 For RT8010/A packages, the Figure 5 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power allowed. 1.6 Maximum Power Dissipation (W) Four Layers PCB 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0 25 50 75 100 125 WQFN-16L 3x3 WDFN-6L 2x2 Ambient Temperature (°C) Figure 5. Derating Curves for RT8010/A Package www.richtek.com 12 RT8010/A Connect all analog grounds to a command node and then connect the command node to the power ground behind the output capacitors. An example of 2-layer PCB layout is shown in Figure 7 to Figure 8 for reference. V IN 3 1 2 RT8010/A 4 VIN LX NC FB/VOUT C1 EN GND V IN R3 6 5 L1 V OUT Figure 7. Top Layer C2 R1 C3 R2 Figure 6. EVB Schematic Figure 8. Bottom Layer Table 1. Recommended Inductors Supplier TAIYO YUDEN GOTREND Sumida Sumida TAIYO YUDEN GOTREND Inductance Current Rating (mA) (uH) 2.2 2.2 2.2 4.7 4.7 4.7 1480 1500 1500 1000 1020 1100 DCR (mΩ) 60 58 75 135 120 146 Dimensions (mm) 3.00 x 3.00 x 1.50 3.85 x 3.85 x 1.80 4.50 x 3.20 x 1.55 4.50 x 3.20 x 1.55 3.00 x 3.00 x 1.50 3.85 x 3.85 x 1.80 Series NR 3015 GTSD32 CDRH2D14 CDRH2D14 NR 3015 GTSD32 Table 2. Recommended Capacitors for CIN and COUT Supplier TDK MURATA TAIYO YUDEN TAIYO YUDEN TDK MURATA MURATA TAIYO YUDEN DS8010/A-02 March 2007 Capacitance (uF) 4.7 4.7 4.7 10 10 10 10 10 Package 603 603 603 603 805 805 805 805 Part Number C1608JB0J475M GRM188R60J475KE19 JMK107BJ475RA JMK107BJ106MA C2012JB0J106M GRM219R60J106ME19 GRM219R60J106KE19 JMK212BJ106RD www.richtek.com 13 RT8010/A Outline Dimension D D2 L E E2 SEE DETAIL A 1 e A A1 A3 b 2 1 2 1 DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Symbol A A1 A3 b D D2 E E2 e L Dimensions In Millimeters Min 0.700 0.000 0.175 0.200 1.950 1.000 1.950 0.500 0.650 0.300 0.400 Max 0.800 0.050 0.250 0.350 2.050 1.450 2.050 0.850 Dimensions In Inches Min 0.028 0.000 0.007 0.008 0.077 0.039 0.077 0.020 0.026 0.012 0.016 Max 0.031 0.002 0.010 0.014 0.081 0.057 0.081 0.033 W-Type 6L DFN 2x2 Package www.richtek.com 14 DS8010/A-02 March 2007 RT8010/A D D2 SEE DETAIL A L 1 E E2 1 1 2 e A A1 A3 b 2 DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Symbol A A1 A3 b D D2 E E2 e L Dimensions In Millimeters Min 0.700 0.000 0.175 0.180 2.950 1.300 2.950 1.300 0.500 0.350 0.450 Max 0.800 0.050 0.250 0.300 3.050 1.750 3.050 1.750 Dimensions In Inches Min 0.028 0.000 0.007 0.007 0.116 0.051 0.116 0.051 0.020 0.014 0.018 Max 0.031 0.002 0.010 0.012 0.120 0.069 0.120 0.069 W-Type 16L QFN 3x3 Package Richtek Technology Corporation Headquarter 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Richtek Technology Corporation Taipei Office (Marketing) 8F, No. 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)89191466 Fax: (8862)89191465 Email: marketing@richtek.com DS8010/A-02 March 2007 www.richtek.com 15
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