RT8011GF

RT8011/A 2A, 4MHz, Synchronous Step-Down Regulator General Description The RT8011/A is a high efficiency synchronous, step-down DC/DC converter. Its input voltage range is from 2.6V to 5.5V and provides an adjustable regulated output voltage from 0.8V to 5V while delivering up to 2A of output current. The internal sy nchronous low on-resistance power switches increase efficiency and eliminate the need for an external Schottky diode. Switching frequency is set by an external resistor or can be synchronized to an external clock. 100% duty cycle provides low dropout operation extending battery life in portable systems. Current mode operation with external compensation allows the transient response to be optimized over a wide range of loads and output capacitors. RT8011/A operation in forced continuous PWM Mode which minimizes ripple voltage and reduces the noise and RF interference. 100% duty cycle in Low Dropout Operation further maximize battery life. Features High Efficiency : Up to 95% Low RDS(ON) Internal Switches : 110mΩ Programmable Frequency : 300kHz to 4MHz No Schottky Diode Required 0.8V Reference Allows Low Output Voltage Forced Continuous Mode Operation Low Dropout Operation : 100% Duty Cycle Synchronizable Switching Frequency (For RT8011 Only) Power Good Output Voltage Monitor (For RT8011 Only) RoHS Compliant and 100% Lead (Pb)-Free Applications Portable Instruments Battery-Powered Equipment Notebook Computers Distributed Power Systems IP Phones Digital Cameras Ordering Information RT8011/A Package Type F : MSOP-10 (RT8011) QW : WDFN-10L 3x3 (RT8011) QW : WDFN-8E 3x3 (RT8011A) Operating Temperature Range P : Pb Free with Commercial Standard G : Green (Halogen Free with Commercial Standard) Without SYNC and PGOOD Function With SYNC and PGOOD Function Note : RichTek Pb-free and Green products are : RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. Suitable for use in SnPb or Pb-free soldering processes. 100% matte tin (Sn) plating. Pin Configurations (TOP VIEW) SHDN/RT SYNC GND LX PGND 10 2 3 4 5 9 8 7 6 COMP FB PGOOD VDD PVDD MSOP-10 WDFN-10L 3x3 Marking Information For marking information, contact our sales representative directly or through a RichTek distributor located in your area, otherwise visit our website for detail. DS8011/A-00 August 2006 9 SHDN/RT SYNC GND LX PGND 1 2 3 4 5 10 9 8 7 COMP FB PGOOD VDD PVDD SHDN/RT GND LX PGND 1 2 3 4 8 7 6 5 COMP FB VDD PVDD WDFN-8E 3x3 www.richtek.com 1 RT8011/A Typical Application Circuit VIN 2.6V to 5.5V ROSC 332k RT8011 1 SHDN/RT 2 SYNC 3 4 5 GND LX PGND COMP FB 10 9 RPGOOD 100k RCOMP 13k CCOMP 1000pF R2 240k PGOOD 8 VDD PVDD 7 6 CIN 22uF R1 510k C1 22pF L1 2.2uH COUT 22uF VOUT 2.5V/2A Figure 1. Typical Application Circuit for RT8011 VIN 2.6V to 5.5V ROSC 332k RT8011A 1 SHDN/RT 2 3 4 GND LX PGND COMP FB VDD PVDD 8 7 6 5 CIN 22uF R1 510k RCOMP 13k CCOMP 1000pF R2 240k L1 2.2uH COUT 22uF VOUT 2.5V/2A Figure 2. Typical Application Circuit for RT8011A Note : Using all Ceramic Capacitors Table 1 Component Supplier Series Inductance (uH) DCR (mΩ) Current Rating (mA) Dimensions (mm) TAIYO YUDEN NR 4018 2.2 60 2700 4x4x1.8 Sumida CDRH4D28 2.2 31.3 2040 4.5x4.5x3 GOTREND GTSD53 2.2 29 2410 5x5x2.8 ABC SR0403 2.2 47 2600 4.5x4x3.2 Table 2 Component Supplier TDK TDK TDK Panasonic Panasonic Panasonic TAIYO YUDEN TAIYO YUDEN TAIYO YUDEN Part No. C3225X5R0J226M C3225X5R0J226M C2012X5R0J106M ECJ4YB0J226M ECJ4YB1A226M ECJ4YB1A106M LMK325BJ226ML JMK316BJ226ML JMK212BJ106ML Capacitance (uF) 22 22 10 22 22 10 22 22 10 Case Size 1210 1210 0805 1210 1210 1210 1210 1206 0805 www.richtek.com 2 DS8011/A-00 August 2006 RT8011/A Layout Guide CIN must be placed between VDD and GND as closer as possible VIN CIN GND Output capacitor must be near RT8011 COUT VOUT RT8011 PVDD VDD PGOOD FB R1 CF VOUT R2 COMP RCOMP CCOMP GND Connect the FB pin directly to feedback resistors. The resistor divider must be connected between V OUT and GND. 6 7 8 9 10 5 4 3 2 1 L1 PGND LX GND SYNC SHDN/RT LX should be connected to Inductor by wide and short trace, keep sensitive compontents away from this trace CIN must be placed between VDD and GND as closer as possible VIN CIN GND Output capacitor must be near RT8011A COUT VOUT RT8011A PVDD VDD 5 6 7 8 4 3 2 1 L1 PGND LX GND SHDN/RT LX should be connected to Inductor by wide and short trace, keep sensitive compontents away from this trace VIN ROSC FB R1 CF VOUT R2 COMP RCOMP CCOMP ROSC GND Connect the FB pin directly to feedback resistors. The resistor divider must be connected between V OUT and GND. Figure 3. RT8011 Layout Guide Figure 4. RT8011A Layout Guide Functional Pin Description Pin Number RT8011 1 RT8011A 1 Pin Name Pin Function Oscillator Resistor Input. Connecting a resistor to ground from this pin sets SHDN/RT the switching frequency. Forcing this pin to VDD causes the device to be shut down. External Clock Synchronization Input. The oscillation frequency can be 2 -SYNC synchronized to an external oscillation applied to this pin. When tied to VDD, internal oscillator is selected. 3 4 5 6 7 8 9 2 3 4 5 6 -7 GND LX PGND PVDD VDD PGOOD FB Signal Ground. All small-signal components and compensation components should connect to this ground, which in turn connects to PGND at one point. Internal Power MOSFET Switches Output. Connect this pin to the inductor. Power Ground. Connect this pin close to the (−) terminal of CIN and COUT. Power Input Supply. Decouple this pin to PGND with a capacitor. Signal Input Supply. Decouple this pin to GND with a capacitor. Normally VDD is equal to PVDD. Power Good Indicator. Open-drain logic output that is pulled to ground when the output voltage is not within ±12.5% of regulation point. Feedback Pin. Receives the feedback voltage from a resistive divider connected across the output. Error Amplifier Compensation Point. The current comparator threshold 10 8 COMP increases with this control voltage. Connect external compensation elements to this pin to stabilize the control loop. DS8011/A-00 August 2006 www.richtek.com 3 RT8011/A Function Block Diagram SHDN/RT SD ISEN SYNC COMP 0.8V FB Output Clamp OC Limit OSC Slope Com PVDD EA Int-SS 0.9V 0.7V Control Logic Driver LX NISEN POR 0.4V NMOS I Limit PGND PGOOD VREF OTP GND VDD RT8011 SHDN/RT SD ISEN OSC COMP 0.8V FB Output Clamp OC Limit Slope Com PVDD EA Int-SS 0.9V 0.7V Control Logic Driver LX NISEN POR 0.4V NMOS I Limit PGND VREF OTP GND VDD RT8011A www.richtek.com 4 DS8011/A-00 August 2006 RT8011/A Operation Main Control Loop The RT8011/A is a monolithic, constant-frequency, current mode step-down DC/DC converter. During normal operation, the internal top power switch (P-Channel MOSFET) is turned on at the beginning of each clock cycle. Current in the inductor increases until the peak inductor current reach the value defined by the voltage on the COMP pin. The error amplifier adjusts the voltage on the COMP pin by comparing the feedback signal from a resistor divider on the FB pin with an internal 0.8V reference. When the load current increases, it causes a reduction in the feedback voltage relative to the reference. The error amplifier raises the COMP voltage until the average inductor current matches the new load current. When the top power MOSFET shuts off, the synchronous power switch (N-Channel MOSFET) turns on until either the bottom current limit is reached or the beginning of the next clock cycle. The operating frequency is set by an external resistor connected between the RT pin and ground. The practical switching frequency can range from 300kHz to 4MHz. Power Good comparators will pull the PGOOD output low if the output voltage comes out of regulation by 12.5%. In an over-voltage condition, the top power MOSFET is turned off and the bottom power MOSFET is switched on until either the over-voltage condition clears or the bottom MOSFET's current limit is reached. Frequency Synchronization The internal oscillator of the RT8011 can be synchronized to an external clock connected to the SYNC pin. The frequency of the external clock can be in the range of 300kHz to 4MHz. For this application, the oscillator timing resistor should be chosen to correspond to a frequency that is about 20% lower than the synchronization frequency. Dropout Operation When the input supply voltage decreases toward the output voltage, the duty cycle increases toward the maximum on-time. Further reduction of the supply voltage forces the main switch to remain on for more than one cycle eventually reaching 100% duty cycle. DS8011/A-00 August 2006 www.richtek.com 5 The output voltage will then be determined by the input voltage minus the voltage drop across the internal P-Channel MOSFET and the inductor. Low Supply Operation The RT8011/A is designed to operate down to an input supply voltage of 2.6V. One important consideration at low input supply voltages is that the R DS(ON) of the P-Channel and N-Channel power switches increases. The user should calculate the power dissipation when the RT8011/A is used at 100% duty cycle with low input voltages to ensure that thermal limits are not exceeded. Slope Compensation and Inductor Peak Current Slope compensation provides stability in constant frequency architectures by preventing sub-harmonic oscillations at duty cycles greater than 50%. It is accomplished internally by adding a compensating ramp to the inductor current signal. Normally, the maximum inductor peak current is reduced when slope compensation is added. In the RT8011/A, however, separated inductor current signals are used to monitor over current condition. This keeps the maximum output current relatively constant regardless of duty cycle. Short-Circuit Protection When the output is shorted to ground, the inductor current decays very slowly during a single switching cycle. A current runaway detector is used to monitor inductor current. As current increasing beyond the control of current loop, switching cycles will be skipped to prevent current runaway from occurring. RT8011/A Absolute Maximum Ratings (Note 1) Supply Input Voltage, VDD, PVDD ---------------------------------------------------------------------------- −0.3V to 6V LX Pin Switch Voltage -------------------------------------------------------------------------------------------- −0.3V to (PVDD + 0.3V) Other I/O Pin Voltages ------------------------------------------------------------------------------------------- −0.3V to (VDD + 0.3V) LX Pin Switch Current -------------------------------------------------------------------------------------------- 4A Power Dissipation, PD @ TA = 25°C MSOP-10 ------------------------------------------------------------------------------------------------------------ 467mW WDFN-10L 3x3 ----------------------------------------------------------------------------------------------------- 909mW WDFN-8L 3x3 ------------------------------------------------------------------------------------------------------ 909mW Package Thermal Resistance (Note 4) MSOP-10, θJA ------------------------------------------------------------------------------------------------------ 214°C/W WDFN-10L 3x3, θJA ----------------------------------------------------------------------------------------------- 110°C/W WDFN-8L 3x3, θJA ------------------------------------------------------------------------------------------------- 110°C/W Junction Temperature --------------------------------------------------------------------------------------------- 150°C Lead Temperature (Soldering, 10 sec.) ----------------------------------------------------------------------- 260°C Storage Temperature Range ------------------------------------------------------------------------------------ −65°C to 150°C ESD Susceptibility (Note 2) HBM (Human Body Mode) -------------------------------------------------------------------------------------- 2kV MM (Machine Mode) ---------------------------------------------------------------------------------------------- 200V Recommended Operating Conditions (Note 3) Supply Input Voltage ---------------------------------------------------------------------------------------------- 2.6V to 5.5V Junction Temperature Range ------------------------------------------------------------------------------------ −40°C to 125°C Ambient Temperature Range ------------------------------------------------------------------------------------ −40°C to 85°C Electrical Characteristics (VDD = 3.3V, TA = 25°C, unless otherwise specified) Parameter Input Voltage Range Feedback Voltage DC Bias Current Output Voltage Line Regulation Output Voltage Load Regulation Error Amplifier Transconductance Current Sense Transresistance Power Good Range Power Good Pull-Down Resistance Symbol VDD VFB Test Conditions Min 2.6 0.784 Typ -0.8 460 -0.04 0.25 800 0.4 ±12.5 -- Max 5.5 0.816 -1 ----±15 120 Units V V μA μA %/V % μs Ω % Ω Active , VFB = 0.78V, Not Switching Shutdown VIN = 2.7V to 5.5V 0A < ILOAD < 2A gm RT --------- To be continued www.richtek.com 6 DS8011/A-00 August 2006 RT8011/A Parameter Switching Frequency Sync Frequency Range Switch On Resistance, High Switch On Resistance, Low Peak Current Limit Under Voltage Lockout Threshold Shutdown Threshold RPMOS RNMOS ILIM VDD Rising VDD Falling ISW = 0.5A ISW = 0.5A Symbol Test Conditions ROSC = 332k Switching Frequency Min 0.8 0.3 0.3 --2.2 ---Typ 1 --110 110 3.2 2.4 2.3 Max 1.2 4 4 160 170 ---Units MHz MHz MHz mΩ mΩ A V V V VIN − 0.7 VIN − 0.4 Note 1. Stresses listed as the above “ Absolute Maximum Ratings” may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. Devices are ESD sensitive. Handling precaution recommended. Note 3. The device is not guaranteed to function outside its operating conditions. Note 4. θJA is measured in the natural convection at TA = 25°C on a effective single layer thermal conductivity test board of JEDEC thermal measurement standard. DS8011/A-00 August 2006 www.richtek.com 7 RT8011/A Typical Operating Characteristics Efficiency vs. Output Current 100 90 80 1.810 1.808 1.806 Output Voltage vs. Output Current VIN = 3.3V Efficiency (%) 70 60 50 40 30 20 10 0 0 250 500 VIN = 5V, VOUT = 1.8V VIN = 3.3V, VOUT = 1.8V Output Voltage (V) 1.804 1.802 1.800 1.798 1.796 1.794 1.792 1.790 750 1000 1250 1500 1750 2000 2250 0 250 500 750 1000 1250 1500 1750 2000 Output Current (mA) Output Current (mA) Frequency vs. Temperature 1100 Peak Current Limited vs. Input Voltage 4.0 VIN = 3.3V, VOUT = 1.8V IOUT = 0A 1080 VOUT = 2.5V Peak Current Limited (A) Frequency (kHz) 3.5 1060 3.0 1040 2.5 1020 1000 -50 -25 0 25 50 75 100 125 2.0 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 5.5 Temperature (°C) I nput Voltage (V) Quiescent Current vs. Input Voltage 550 Quiescent Current vs. Temperature 500 VIN = 3.3V Quiescent Current (uA) 510 Quiescent Current (uA) 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 5.5 530 480 460 490 440 470 420 450 400 -50 -25 0 25 50 75 100 125 Input Voltage (V) Temperature (°C) www.richtek.com 8 DS8011/A-00 August 2006 RT8011/A Output Voltage vs. Temperature 1.820 1.815 0.804 VREF v s. Input Voltage 0.805 VIN = 3.3V Output Voltage (V) 1.810 1.800 1.795 1.790 V REF (V) 1.805 0.803 0.802 0.801 1.785 1.780 -50 -25 0 25 50 75 100 125 0.800 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 5.5 Temperature (°C) Input Voltage (V) Load Transient Response VIN = 3.3V, VOUT = 2.5V IOUT = 0A to 2A Load Transient Response VIN = 3.3V, VOUT = 2.5V IOUT = 1A to 2A VOUT (50mV/Div) VOUT (50mV/Div) ILX (1A/Div) Time (50μs/Div) ILX (1A/Div) Time (50μs/Div) Output Ripple VIN = 3.3V, VOUT = 2.5V IOUT = 2A Output Ripple VIN = 5V, VOUT = 2.5V IOUT = 2A VOUT (10mV/Div) VOUT (10mV/Div) VLX (5V/Div) VLX (5V/Div) ILX (2A/Div) Time (250ns/Div) ILX (2A/Div) Time (250ns/Div) DS8011/A-00 August 2006 www.richtek.com 9 RT8011/A Power Good VIN = 3.3V, VOUT = 2.5V IOUT = 2A Power On & Inductor Current VIN = 3.3V, VOUT = 2.5V IOUT = 2A VIN (2V/Div) PGOOD (2V/Div) VOUT (2V/Div) ILX (2A/Div) Time (1ms/Div) VIN (2V/Div) VOUT (2V/Div) VLX (5V/Div) ILX (2A/Div) Time (1ms/Div) Power On & Inductor Current VIN = 5V, VOUT = 2.5V IOUT = 2A Soft Start and Inrush Current VIN = 3.3V, VOUT = 2.5V IOUT = 2A VIN (2V/Div) VOUT (2V/Div) VLX (5V/Div) ILX (2A/Div) Time (1ms/Div) VIN (2V/Div) VLX (5V/Div) VOUT (2V/Div) I IN (2A/Div) Time (2.5ms/Div) Soft Start and Inrush Current VIN = 5V, VOUT = 2.5V IOUT = 2A VIN (2V/Div) VLX (5V/Div) VOUT (2V/Div) I IN (2A/Div) Time (2.5ms/Div) www.richtek.com 10 DS8011/A-00 August 2006 RT8011/A Application Information The basic RT8011/A application circuit is shown in Typical Application Circuit. External component selection is determined by the maximum load current and begins with the selection of the inductor value and operating frequency followed by CIN and COUT. Operating Frequency Selection of the operating frequency is a tradeoff between efficiency and component size. High frequency operation allows the use of smaller inductor and capacitor values. Operation at lower frequency improves efficiency by reducing internal gate charge and switching losses but requires larger inductance and/or capacitance to maintain low output ripple voltage. The operating frequency of the RT8011/A is determined by an external resistor that is connected between the RT pin and ground. The value of the resistor sets the ramp current that is used to charge and discharge an internal timing capacitor within the oscillator. The RT resistor value can be determined by examining the frequency vs. RT curve. Although frequencies as high as 4MHz are possible, the minimum on-time of the RT8011/A imposes a minimum limit on the operating duty cycle. The minimum on-time is typically 110ns. Therefore, the minimum duty cycle is equal to 100 x 110ns x f(Hz). Inductor Selection For a given input and output voltage, the inductor value and operating frequency determine the ripple current. The ripple current ΔIL increases with higher VIN and decreases with higher inductance. The transition from low current operation begins when the peak inductor current falls below the minimum peak current. Lower inductor values result in higher ripple current which causes this to occur at lower load currents. This causes a dip in efficiency in the upper range of low current operation. 4.5 4 3.5 Frequency (MHz) 3 2.5 2 1.5 1 0.5 0 0 100 200 300 400 500 600 700 800 900 100 1000 0 RT = 154k for 2MHz RT = 332k for 1MHz RRT (k Ω) RT Figure 5 Inductor Core Selection Once the value for L is known, the type of inductor must be selected. High efficiency converters generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite or mollypermalloy cores. Actual core loss is independent of core size for a fixed inductor value but it is very dependent on the inductance selected. As the inductance increases, core losses decrease. Unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. Ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite core material saturates “ hard” , which means that inductance collapses abruptly when the peak design current is exceeded. This result in an abrupt increase in inductor ripple current and consequent output voltage ripple. Do not allow the core to saturate! ⎡V ⎤⎡ V ⎤ ΔIL = ⎢ OUT ⎥ ⎢1 − OUT ⎥ VIN ⎦ ⎣ f × L ⎦⎣ Having a lower ripple current reduces the ESR losses in the output capacitors and the output voltage ripple. Highest efficiency operation is achieved at low frequency with small ripple current. This, however, requires a large inductor. A reasonable starting point for selecting the ripple current is ΔI = 0.4(IMAX). The largest ripple current occurs at the highest VIN. To guarantee that the ripple current stays below a specified maximum, the inductor value should be chosen according to the following equation : ⎡ VOUT ⎤ ⎡ VOUT ⎤ L=⎢ ⎥ ⎥ ⎢1 − V IN(MAX) ⎦ ⎣ f × ΔIL(MAX) ⎦ ⎣ DS8011/A-00 August 2006 www.richtek.com 11 RT8011/A Different core materials and shapes will change the size/ current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and don't radiate energy but generally cost more than powdered iron core inductors with similar characteristics. The choice of which style inductor to use mainly depends on the price vs. size requirements and any radiated field/EMI requirements. CIN and COUT Selection The input capacitance, C IN, is needed to filter the trapezoidal current at the source of the top MOSFET. To prevent large ripple voltage, a low ESR input capacitor sized for the maximum RMS current should be used. RMS current is given by : V VIN IRMS = IOUT(MAX) OUT −1 VIN VOUT This formula has a maximum at VIN = 2VOUT, where I RMS = I OUT/2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. The selection of COUT is determined by the effective series resistance (ESR) that is required to minimize voltage ripple and load step transients, as well as the amount of bulk capacitance that is necessary to ensure that the control loop is stable. Loop stability can be checked by viewing the load transient response as described in a later section. The output ripple, ΔVOUT, is determined by : ⎡ 1⎤ ΔVOUT ≤ ΔIL ⎢ESR + 8fCOUT ⎥ ⎣ ⎦ The output ripple is highest at maximum input voltage since ΔIL increases with input voltage. Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirements. Dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. Special polymer capacitors offer very low ESR but have lower capacitance density than other types. Tantalum capacitors have the highest capacitance density but it is important to only www.richtek.com 12 use types that have been surge tested for use in switching power supplies. Aluminum electrolytic capacitors have significantly higher ESR but can be used in cost-sensitive applications provided that consideration is given to ripple current ratings and long term reliability. Ceramic capacitors have excellent low ESR characteristics but can have a high voltage coefficient and audible piezoelectric effects. The high Q of ceramic capacitors with trace inductance can also lead to significant ringing. Using Ceramic Input and Output Capacitors Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. However, care must be taken when these capacitors are used at the input and output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN large enough to damage the part. Output Voltage Programming The output voltage is set by an external resistive divider according to the following equation : VOUT = VREF × ⎛1 + R1 ⎞ ⎜ ⎟ ⎝ R2 ⎠ where VREF equals to 0.8V typical. The resistive divider allows the FB pin to sense a fraction of the output voltage as shown in Figure 6. VOUT R1 VFB RT8011/A GND R2 Figure 6. Setting the Output Voltage DS8011/A-00 August 2006 RT8011/A Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as : Efficiency = 100% − (L1+ L2+ L3+ ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses: VDD quiescent current and I2R losses. The VDD quiescent current loss dominates the efficiency loss at very low load currents whereas the I2R loss dominates the efficiency loss at medium to high load currents. In a typical efficiency plot, the efficiency curve at very low load currents can be misleading since the actual power lost is of no consequence. 1. The VDD quiescent current is due to two components : the DC bias current as given in the electrical characteristics and the internal main switch and synchronous switch gate charge currents. The gate charge current results from switching the gate capacitance of the internal power MOSFET switches. Each time the gate is switched from high to low to high again, a packet of charge ΔQ moves from VDD to ground. The resulting ΔQ/Δt is the current out of VDD that is typically larger than the DC bias current. In continuous mode, IGATECHG = f(QT+QB) where QT and QB are the gate charges of the internal top and bottom switches. Both the DC bias and gate charge losses are proportional to VDD and thus their effects will be more pronounced at higher supply voltages. 2. I2R losses are calculated from the resistances of the internal switches, RSW and external inductor RL. In continuous mode the average output current flowing through inductor L is “ chopped” between the main switch and the synchronous switch. Thus, the series resistance looking into the LX pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (D) as follows : RSW = RDS(ON)TOP x D + RDS(ON)BOT x (1"D) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. Thus, to obtain I2R losses, simply add RSW to RL and multiply DS8011/A-00 August 2006 the result by the square of the average output current. Other losses including CIN and COUT ESR dissipative losses and inductor core losses generally account for less than 2% of the total loss. Thermal Considerations In most applications, the RT8011/A does not dissipate much heat due to its high efficiency. But, in applications where the RT8011/A is running at high ambient temperature with low supply voltage and high duty cycles, such as in dropout, the heat dissipated may exceed the maximum junction temperature of the part. If the junction temperature reaches approximately 150°C, both power switches will be turned off and the SW node will become high impedance. To avoid the RT8011/A from exceeding the maximum junction temperature, the user will need to do some thermal analysis. The goal of the thermal analysis is to determine whether the power dissipated exceeds the maximum junction temperature of the part. The temperature rise is given by : TR = PD x θJA Where PD is the power dissipated by the regulator and θJA is the thermal resistance from the junction of the die to the ambient temperature. The junction temperature, TJ, is given by : TJ = TA + TR Where TA is the ambient temperature. As an example, consider the RT8011/A in dropout at an input voltage of 3.3V, a load current of 2A and an ambient temperature of 70°C. From the typical performance graph of switch resistance, the RDS(ON) of the P-Channel switch at 70°C is approximately 121m Ω. Therefore, power dissipated by the part is : PD = (ILOAD)2 (RDS(ON)) = (2A)2 (121mΩ) = 0.484W For the DFN3x3 package, the θJA is 110°C/W. Thus the junction temperature of the regulator is : TJ = 70°C + (0.484W) (110°C/W) = 123.24°C Which is below the maximum junction temperature of 125°C. Note that at higher supply voltages, the junction temperature is lower due to reduced switch resistance (RDS(ON)). Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to ΔILOAD(ESR), where ESR is the effective series www.richtek.com 13 RT8011/A resistance of COUT. ΔILOAD also begins to charge or discharge COUT generating a feedback error signal used by the regulator to return VOUT to its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. The COMP pin external components and output capacitor shown in Typical Application Circuit will provide adequate compensation for most applications. Layout Considerations Follow the PCB layout guidelines for optimal performance of RT8011/A. A ground plane is recommended. If a ground plane layer is not used, the signal and power grounds should be segregated with all small-signal components returning to the GND pin at one point that is then connected to the PGND pin close to the IC. The exposed pad should be connected to GND. Connect the terminal of the input capacitor(s), CIN, as close as possible to the PVDD pin. This capacitor provides the AC current into the internal power MOSFETs. LX node is with high frequency voltage swing and should be kept small area. Keep all sensitive small-signal nodes away from LX node to prevent stray capacitive noise pick-up. Flood all unused areas on all layers with copper. Flooding with copper will reduce the temperature rise of powercomponents. You can connect the copper areas to any DC net (PVDD, VDD, VOUT, PGND, GND, or any other DC rail in your system). Connect the FB pin directly to the feedback resistors. The resistor divider must be connected between VOUT and GND. Figure 8. RT8011A Demo Board (Only WDFN-8E 3x3) Figure 7. RT8011 Demo Board www.richtek.com 14 DS8011/A-00 August 2006 RT8011/A Outline Dimension D2 D L E E2 SEE DETAIL A 1 e A A1 A3 b 2 1 2 1 DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Symbol A A1 A3 b D D2 E E2 e L Dimensions In Millimeters Min 0.700 0.000 0.175 0.180 2.950 2.200 2.950 1.450 0.500 0.350 0.450 Max 0.800 0.050 0.250 0.300 3.050 2.700 3.050 1.750 Dimensions In Inches Min 0.028 0.000 0.007 0.007 0.116 0.087 0.116 0.057 0.020 0.014 0.018 Max 0.031 0.002 0.010 0.012 0.120 0.106 0.120 0.069 W-Type 8E DFN 3x3 Package, 0.5mm Lead Pitch DS8011/A-00 August 2006 www.richtek.com 15 RT8011/A D D2 L E E2 SEE DETAIL A 1 e A A1 A3 b 2 1 2 1 DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Symbol A A1 A3 b D D2 E E2 e L Dimensions In Millimeters Min 0.700 0.000 0.175 0.180 2.950 2.300 2.950 1.500 0.500 0.350 0.450 Max 0.800 0.050 0.250 0.300 3.050 2.650 3.050 1.750 Dimensions In Inches Min 0.028 0.000 0.007 0.007 0.116 0.091 0.116 0.059 0.020 0.014 0.018 Max 0.031 0.002 0.010 0.012 0.120 0.104 0.120 0.069 W-Type 10L DFN 3x3 Package www.richtek.com 16 DS8011/A-00 August 2006 RT8011/A D L E E1 e A A1 b A2 Symbol A A1 A2 b D e E E1 L Dimensions In Millimeters Min 0.810 0.000 0.750 0.170 2.900 0.500 4.800 2.900 0.400 5.000 3.100 0.800 Max 1.100 0.150 0.950 0.270 3.100 Dimensions In Inches Min 0.032 0.000 0.030 0.007 0.114 0.020 0.189 0.114 0.016 0.197 0.122 0.031 Max 0.043 0.006 0.037 0.011 0.122 10-Lead MSOP Plastic Package RICHTEK TECHNOLOGY CORP. Headquarter 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 RICHTEK TECHNOLOGY CORP. Taipei Office (Marketing) 8F-1, No. 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)89191466 Fax: (8862)89191465 Email: marketing@richtek.com DS8011/A-00 August 2006 www.richtek.com 17