RT8026GF

RT8026 1.5MHz, 1A, High Efficiency PWM Step-Down DC/DC Converter General Description Features The RT8026 is a high-efficiency Pulse-Width-Modulated (PWM) step-down DC/DC converter. Capable of delivering 1A output current over a wide input voltage range from 2.7V to 5.5V, the RT8026 is ideally suited for portable electronic devices that are powered from 1-cell Li-ion battery or from other power sources such as cellular phones, PDAs and hand-held devices. z Two operating modes are available including : PWM/LowDropout autoswitch and shut-down modes. The Internal synchronous rectifier with low RDS(ON) dramatically reduces z conduction loss at PWM mode. No external Schottky diode is required in practical application. The RT8026 enters Low-Dropout mode when normal PWM cannot provide regulated output voltage by continuously turning on the upper P-MOSFET. The RT8026 enter shutdown mode and consumes less than 0.1μA when the EN pin is pulled low. The switching ripple is easily smoothed-out by small package filtering elements due to a fixed operating frequency of 1.5MHz. This along with small MSOP-10 package provides small PCB area application. Other features include soft start, lower internal reference voltage with 2% accuracy, over temperature protection, and over current protection. Ordering Information RT8026 Package Type F : MSOP-10 Lead Plating System G : Green (Halogen Free and Pb Free) z z z z z z z z Input Voltage Range : 2.7V to 5.5V Adjustable Output Voltage : 1V to VIN Output Current : 1A High Efficiency : up to 95% No Schottky Diode Required 1.5MHz Fixed Frequency PWM Operation Current Limiting Protection Thermal Shutdown Protection Small MSOP-10 Package RoHS Compliant and Halogen Free Applications z z z z z Mobile Phones Personal Information Appliances Wireless and DSL Modems MP3 Players Portable Instruments Pin Configurations (TOP VIEW) VIN NC GND NC FB 10 2 9 3 8 4 7 5 6 PGND LX EN NC NC MSOP-10 Marking Information For marking information, contact our sales representative directly or through a Richtek distributor located in your area. Note : Richtek products are : ` RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. ` Suitable for use in SnPb or Pb-free soldering processes. DS8026-02 March 2011 www.richtek.com 1 RT8026 Typical Application Circuit 1 VIN 2.7V to 5.5V VIN LX CIN 9 L 2.2µH VOUT C1 RT8026 4.7µF 8 VOUT = VREF x ⎛⎜ 1 + R1 ⎞⎟ ⎝ R2 ⎠ EN PGND 10 FB R1 COUT 5 10µF GND 3 IR2 R2 with R2 = 300kΩ to 60kΩ so the IR2 = 2μA to 10μA, and (R1 x C1) should be in the range between 3x10-6 and 6x10-6 for component selection. Figure 1. Typical Application Circuit for RT8026 Functional Pin Description Pin No. Pin Name Pin Function 1 VIN Power Input. 2, 4, 6, 7 NC No Internal Connection. 3 GND Ground Pin. 5 FB Feedback Input Pin. Receives the feedback voltage from a resistive divider connected across the output. Chip Enable (Active High). It is recommended to add a 100kΩ resistor between EN 8 EN 9 LX Pin for Switching. Connect this pin to the inductor. 10 PGND Power Ground Pin. and GND pin. Function Block Diagram EN VIN RS1 OSC & Shutdown Control Current Limit Detector Slope Compensation Current Sense FB Error Amplifier Control Logic PWM Comparator Current Detector RC COMP UVLO & Power Good Detector PGND www.richtek.com 2 LX Driver RS2 VREF GND DS8026-02 March 2011 RT8026 Absolute Maximum Ratings z z z z z z z z (Note 1) Supply Input Voltage -----------------------------------------------------------------------------------------------------EN, FB Pin Voltage ------------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C MSOP-10 -------------------------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2) MSOP-10, θJA -------------------------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------Storage Temperature Range -------------------------------------------------------------------------------------------Junction Temperature ----------------------------------------------------------------------------------------------------ESD Susceptibility (Note 3) HBM (Human Body Mode) ---------------------------------------------------------------------------------------------MM (Machine Mode) ------------------------------------------------------------------------------------------------------ Recommended Operating Conditions z z z 6.5V −0.3V to VIN 833mW 120°C/W 260°C −65°C to 150°C 150°C 2kV 200V (Note 4) Supply Input Voltage, VIN ------------------------------------------------------------------------------------------------ 2.7V to 5.5V Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics (VIN = 3.6V, VOUT = 2.5V, VREF = 0.6V, L = 2.2μH, CIN = 4.7μF, COUT = 10μF, TA = 25°C unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Quiescent Current IQ IOUT = 0mA, V FB = VREF + 5% -- 50 70 μA Shutdown Current ISHDN EN = GND -- 0.1 1 μA Reference Voltage VREF For Adjustable Output Voltage 0.588 0.6 0.612 V Adjustable Output Range VOUT (Note 6) 1 -- VIN − 0.2V V Output Voltage Accuracy ΔVOUT V IN = VOUT + ΔV to 5.5V 0A < IOUT < 1A (Note 5) −3 -- +3 % FB Input Current IFB VFB = V IN −50 -- 50 nA PMOSFET R ON RDS(ON)_P IOUT = 200mA, VIN = 3.6V -- 0.28 -- Ω NMOSFET RON RDS(ON)_N IOUT = 200mA, VIN = 3.6V -- 0.25 -- Ω P-Channel Current Limit ILIM_P V IN = 2.7V to 5.5 V 1.2 1.5 -- A EN High-Level Input Voltage VEN_H V IN = 2.7V to 5.5V 1.5 -- -- V EN Low-Level Input Voltage VEN_L V IN = 2.7V to 5.5V -- -- 0.4 V Under Voltage Lock Out threshold UVLO -- 1.8 -- V UVLO Hysteresis -- 0.1 -- V 1.2 1.5 1.8 MHz -- 160 -- °C 100 -- -- % Oscillator Frequency fOSC Thermal Shutdown Temperature TSD Max. Duty Cycle DS8026-02 March 2011 V IN = 3.6V, IOUT = 100mA www.richtek.com 3 RT8026 Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. θJA is measured in the natural convection at TA = 25°C on a high effective four layers thermal conductivity test board of JEDEC 51-7 thermal measurement standard. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. ΔV = IOUT x PRDS(ON) Note 6. Guarantee by design. www.richtek.com 4 DS8026-02 March 2011 RT8026 Typical Operating Characteristics Efficiency vs. Output Current Output Voltage vs. Temperature 3.60 100 90 VIN = 5V 3.58 Output Voltage (V) Efficiency (%) 80 VIN = 5.5V 70 60 50 40 30 20 3.55 3.53 3.50 3.48 3.45 3.43 10 VOUT = 3.5V 0 0.001 0.01 0.1 VIN = 5V, IOUT = 0mA 3.40 -50 1 -25 0 75 100 125 Frequency vs. Temperature Frequency vs. Input Voltage 1.50 1.60 1.48 1.55 1.45 1.50 Frequency (MHz) Frequency (MHz) 50 Temperature (°C) Output Current (A) 1.43 1.40 1.38 1.35 1.33 1.45 1.40 1.35 1.30 1.25 VOUT = 3.5V, IOUT = 300mA 1.30 4 4.25 4.5 4.75 5 5.25 VIN = 5V, VOUT = 3.5V, IOUT = 300mA 1.20 5.5 -50 -25 0 Input Voltage (V) 25 50 75 100 125 Temperature (°C) Current Limit vs. Temperature Current Limit vs. Input Voltage 1.8 1.70 1.6 1.65 1.4 Current Limit (A) Current Limit (A) 25 1.60 1.55 1.50 1.2 1.0 0.8 0.6 0.4 1.45 VOUT = 3.5V 1.40 4 4.25 4.5 4.75 5 Input Voltage (V) DS8026-02 March 2011 5.25 5.5 0.2 VIN = 5V, VOUT = 3.5V 0.0 -50 -25 0 25 50 75 100 125 Temperature (°C) www.richtek.com 5 RT8026 UVLO Threshold vs. Temperature EN Threshold vs. Temperature 2.0 1.2 Rising 1.9 EN Voltage (V) Input Voltage (V) 1.7 1.6 Rising 1.1 1.8 Falling 1.5 1.4 1.3 1.0 Falling 0.9 0.8 0.7 0.6 1.2 0.5 1.1 VOUT = 3.5V 1.0 -50 -25 0 25 50 75 100 VOUT = 3.5V 0.4 125 -50 -25 0 Temperature (°C) 50 75 100 125 Temperature (°C) EN Threshold vs. Input Voltage Output Voltage vs. Output Current 3.560 1.20 1.10 Rising 1.00 Falling 0.90 VIN = 5V 3.555 Ouptut Voltage (V) EN Voltage (V) 25 0.80 0.70 VIN = 5.5V 3.550 3.545 3.540 0.60 VOUT = 3.5V 3.535 0.50 4 4.3 4.6 4.9 5.2 0 5.5 0.2 0.4 0.6 Input Voltage (V) Output Current (A) Output Ripple Power On from EN VOUT (10mV/Div) 0.8 1 VEN (5V/Div) VOUT (2V/Div) VLX (5V/Div) I IN (1A/Div) VIN = 5V, VOUT = 3.5V, IOUT = 500mA Time (500ns/Div) www.richtek.com 6 VIN = 5V, VOUT = 3.5V, IOUT = 10mA Time (100μs/Div) DS8026-02 March 2011 RT8026 Power On from EN Power Off from EN VEN (5V/Div) VEN (5V/Div) VOUT (2V/Div) VOUT (2V/Div) I IN (1A/Div) I IN (1A/Div) VIN = 5V, VOUT = 3.5V, IOUT = 1A VIN = 5V, VOUT = 3.5V, IOUT = 1A Time (100μs/Div) Time (100μs/Div) Load Transient Response Load Transient Response IOUT (500mA/Div) IOUT (500mA/Div) VOUT (50mV/Div) VOUT (50mV/Div) VIN = 5V, VOUT = 3.5V, IOUT = 50mA to 500mA Time (50μs/Div) DS8026-02 March 2011 VIN = 5V, VOUT = 3.5V, IOUT = 50mA to 1A Time (50μs/Div) www.richtek.com 7 RT8026 Applications Information The basic RT8026 application circuit is shown in the Typical Application Circuit. External component selection is determined by the maximum load current and begins with the selection of the inductor value and operating frequency followed by CIN and COUT. Inductor Selection For a given input and output voltage, the inductor value and operating frequency determine the ripple current. The ripple current ΔIL increases with higher VIN and decreases with higher inductance. ⎡V ⎤⎡ V ⎤ ΔIL = ⎢ OUT ⎥ ⎢1 − OUT ⎥ VIN ⎦ ⎣ f × L ⎦⎣ Having a lower ripple current reduces the ESR losses in the output capacitors and the output voltage ripple. Highest efficiency operation is achieved at low frequency with small ripple current. This, however, requires a large inductor. A reasonable starting point for selecting the ripple current is ΔIL = 0.4(IMAX). The largest ripple current occurs at the highest VIN. To guarantee that the ripple current stays below a specified maximum, the inductor value should be chosen according to the following equation : VOUT ⎤ ⎡ VOUT ⎤ ⎡ L=⎢ ⎢1 − ⎥ ⎥ ⎣ f × ΔIL(MAX) ⎦ ⎢⎣ VIN(MAX) ⎥⎦ Inductor Core Selection Once the value for L is known, the type of inductor must be selected. High efficiency converters generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite or mollypermalloy cores. Actual core loss is independent of core size for a fixed inductor value but it is very dependent on the inductance selected. As the inductance increases, core losses decrease. Unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. Ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite core material saturates “hard”, which means that inductance collapses abruptly when the peak design current is exceeded. This results in an abrupt increase in www.richtek.com 8 inductor ripple current and consequent output voltage ripple. Do not allow the core to saturate! Different core materials and shapes will change the size/ current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and don’ t radiate energy but generally cost more than powdered iron core inductors with similar characteristics. The choice of which style inductor to use mainly depends on the price vs. size requirements and any radiated field/EMI requirements. CIN and COUT Selection The input capacitance, C IN, is needed to filter the trapezoidal current at the source of the top MOSFET. To prevent large ripple voltage, a low ESR input capacitor sized for the maximum RMS current should be used. RMS current is given by : IRMS = IOUT(MAX) VOUT VIN VIN −1 VOUT This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. The selection of COUT is determined by the effective series resistance (ESR) that is required to minimize voltage ripple and load step transients, as well as the amount of bulk capacitance that is necessary to ensure that the control loop is stable. Loop stability can be checked by viewing the load transient response as described in a later section. The output ripple, ΔVOUT, is determined by : 1 ⎤ ⎡ ΔVOUT ≤ ΔIL ⎢ESR + ⎥ 8fC OUT ⎦ ⎣ The output ripple is highest at maximum input voltage since ΔIL increases with input voltage. Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirements. Dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. Special polymer capacitors offer very low ESR but have lower capacitance DS8026-02 March 2011 RT8026 density than other types. Tantalum capacitors have the highest capacitance density but it is important to only use types that have been surge tested for use in switching power supplies. Aluminum electrolytic capacitors have significantly higher ESR but can be used in cost-sensitive applications provided that consideration is given to ripple current ratings and long term reliability. Ceramic capacitors have excellent low ESR characteristics but can have a high voltage coefficient and audible piezoelectric effects. The high Q of ceramic capacitors with trace inductance can also lead to significant ringing. Using Ceramic Input and Output Capacitors Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. However, care must be taken when these capacitors are used at the input and output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN large enough to damage the part. Output Voltage Programming The resistive divider allows the VFB pin to sense a fraction of the output voltage as shown in Figure 2. VOUT R1 FB RT8026 R2 GND Figure 2. Setting the Output Voltage For adjustable output voltage mode, the output voltage is set by an external resistive divider according to the following equation : VOUT = VREF (1 + R1) R2 where VREF is the feedback reference voltage (0.6V typ.). DS8026-02 March 2011 Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to ΔILOAD (ESR), where ESR is the effective series resistance of COUT. ΔILOAD also begins to charge or discharge COUT generating a feedback error signal used by the regulator to return VOUT to its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as : Efficiency = 100% − (L1+ L2+ L3+ ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses : VIN quiescent current and I2R losses. The VIN quiescent current loss dominates the efficiency loss at very low load currents whereas the I2R loss dominates the efficiency loss at medium to high load currents. In a typical efficiency plot, the efficiency curve at very low load currents can be misleading since the actual power lost is of no consequence. 1. The VIN quiescent current is due to two components : the DC bias current as given in the electrical characteristics and the internal main switch and synchronous switch gate charge currents. The gate charge current results from switching the gate capacitance of the internal power MOSFET switches. Each time the gate is switched from high to low to high again, a packet of charge ΔQ moves from VIN to ground. The resulting ΔQ/Δt is the current out of VIN that is typically larger than the DC bias current. In continuous mode, IGATECHG = f(QT+QB) where QT and QB are the gate charges of the internal top and bottom switches. Both the DC bias and gate charge www.richtek.com 9 RT8026 losses are proportional to VIN and thus their effects will be more pronounced at higher supply voltages. The maximum power dissipation depends on operating ambient temperature for fixed T J(MAX) and thermal 2. I2R losses are calculated from the resistances of the internal switches, RSW and external inductor RL. In continuous mode the average output current flowing through inductor L is “chopped” between the main switch and the synchronous switch. Thus, the series resistance looking into the LX pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (DC) as follows : resistance θJA. For RT8026 packages, the Figure 3 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power allowed. The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. Thus, to obtain I2R losses, simply add RSW to RL and multiply the result by the square of the average output current. Other losses including CIN and COUT ESR dissipative losses and inductor core losses generally account for less than 2% of the total loss. Maximum Power Dissipation (W) RSW = RDS(ON)TOP x DC + RDS(ON)BOT x (1−DC) 1.0 Four Layers PCB 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0 15 30 45 60 75 90 105 120 135 Ambient Temperature (°C) Figure 3. Derating Curves for RT8026 Packages Thermal Considerations For continuous operation, do not exceed absolute maximum operation junction temperature. The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula : Layout Considerations For the best performance of the RT8026, the following guidelines must be strictly followed. ` The input capacitor should be placed as close as possible to the device pins (VIN and GND). ` The LX node is with high frequency voltage swing. It should be kept at a small area. ` Place the feedback components as close as possible to the IC and keep away from the noisy devices. ` The GND and PGND should be connected to a strong ground plane for heat sinking and noise protection. PD(MAX) = ( TJ(MAX) − TA ) / θJA Where T J(MAX) is the maximum operation junction temperature 125°C, TA is the ambient temperature and the θJAis the junction to ambient thermal resistance. For recommended operating conditions specification of RT8026, the maximum junction temperature is 125°C.The junction to ambient thermal resistance θJA is layout dependent. For MSOP-10 packages, the thermal resistance θJA is 120°C/W on the standard JEDEC 51-7 four layers thermal test board. The maximum power dissipation at TA = 25°C can be calculated by following formula : PD(MAX) = (125°C − 25°C) / (120°C/W) = 0.833W for MSOP-10 packages www.richtek.com 10 DS8026-02 March 2011 RT8026 LX should be connected to Inductor by wide and short trace, keep sensitive compontents away from this trace CIN must be placed as close as possible to the IC CIN Output capacitor must be placed near the RT8026 RT8026 VIN 10 PGND NC 2 9 LX GND 3 8 EN NC 4 7 NC FB 5 6 NC R2 R1 L1 COUT VIN CF Place the feedback components as close as possible to the FB pin. Layout note: 1. The distance that CIN connects to VIN is as close as possible (Under 2mm). 2. COUT should be placed near the RT8026. Figure 4. Layout Guide Table 1. Recommended Components for Different Output Voltage Application Component Supplier L1 (μH) COUT (μF) R1 (kΩ) R2 (kΩ) VOUT (V) TAIYO YUDEN TAIYO YUDEN GOTREND GOTREND GOTREND 10 10 2.2 2.2 2.2 10 10 10 10 10 300 120 200 150 100 62 27 62 75 100 3.5 3.3 2.5 1.8 1.2 DS8026-02 March 2011 www.richtek.com 11 RT8026 Outline Dimension D L E1 E e A2 A A1 b Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.810 1.100 0.032 0.043 A1 0.000 0.150 0.000 0.006 A2 0.750 0.950 0.030 0.037 b 0.170 0.270 0.007 0.011 D 2.900 3.100 0.114 0.122 e 0.500 0.020 E 4.800 5.000 0.189 0.197 E1 2.900 3.100 0.114 0.122 L 0.400 0.800 0.016 0.031 10-Lead MSOP Plastic Package Richtek Technology Corporation Richtek Technology Corporation Headquarter Taipei Office (Marketing) 5F, No. 20, Taiyuen Street, Chupei City 5F, No. 95, Minchiuan Road, Hsintien City Hsinchu, Taiwan, R.O.C. Taipei County, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Tel: (8862)86672399 Fax: (8862)86672377 Email: marketing@richtek.com Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek. www.richtek.com 12 DS8026-02 March 2011