®
RT8167A
Dual Single-Phase PWM Controller for CPU Core/GFX
Power Supply
General Description
Features
The RT8167A is a dual single-phase synchronous Buck
PWM controller with integrated gate drivers, compliant
with Intel VR12/IMVP7 specification. A serial VID (SVID)
interface is built-in in the RT8167A to communicate with
Intel VR12/IMVP7 compliant CPU. The integrated
differential remote output voltage sensing function and
built-in high accuracy DAC achieve accurate output voltage
regulation.
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The RT8167A supports VR12/ IMVP7 compatible power
management states and VID on-the-fly function. The
RT8167A operates in two power management states
including DEM in PS2 and Forced-CCM in PS1/PS0.
Richtek's proprietary G-NAVPTM (Green Native AVP) makes
AVP (Active Voltage Positioning) design easier and more
robust. By utilizing the G-NAVPTM topology, DEM and CCM
efficiency can be improved.
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The RT8167A integrates high accuracy ADC for platform
setting functions, such as no-load offset or over current
level. Individual VR ready output signals are provided for
both CORE VR and GFX VR. The IC also features complete
fault protection functions, including over voltage, under
voltage, negative voltage, over current and under voltage
lockout. The RT8167A is available in a WQFN-48L 6x6
small foot print package.
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Applications
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Marking Information
G-NAVPTM (Green Native Active Voltage Positioning)
Topology
Dual Output Controller with Two Built-in Gate
Drivers
Serial VID Interface
0.5% DAC Accuracy
Differential Remote Output Voltage Sensing
Built-in ADC for Platform Programming
Diode Emulation Mode (DEM) at Light Load
Condition
Droop Enable/Disable
Fast Transient Response
VR12/IMVP7 Compatible Power Management
States
VR Ready Indicator
Thermal Throttling Indicator
Current Monitor Output
Switching Frequency up to 1MHz per Phase
Protection : OVP, UVP, NVP, OCP, UVLO
Small 48-Lead WQFN Package
RoHS Compliant and Halogen Free
VR12 / IMVP7 Intel CPU Core Supply
AVP Step-down Converter
Notebook/ Netbook/ Desktop Computer CPU Core
Supply
RT8167AGQW : Product Number
RT8167A
GQW
YMDNN
YMDNN : Date Code
Ordering Information
RT8167A
Package Type
QW : WQFN-48L 6x6 (W-Type)
(Exposed Pad-Option 1)
Lead Plating System
G : Green (Halogen Free and Pb Free)
Note :
Richtek products are :
`
RoHS compliant and compatible with the current
requirements of IPC/JEDEC J-STD-020.
`
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
DS8167A-02 July 2014
Suitable for use in SnPb or Pb-free soldering processes.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
1
®
RT8167A
Pin Configurations
TONSET
BOOT
UGATE
PHASE
LGATE
PVCC
LGATEA
PHASEA
UGATEA
BOOTA
EN
TONSETA
(TOP VIEW)
48 47 46 45 44 43 42 41 40 39 38 37
ISEN1P
ISEN1N
COMP
FB
RGND
IMON
IMONFB
DRPEN
OFS
OFSA
GFXPS2
VCC
1
36
2
35
3
34
4
33
5
32
6
31
GND
7
30
8
29
9
28
49
10
11
27
26
12
25
ISENAP
ISENAN
COMPA
FBA
RGNDA
IMONA
IMONFBA
VCLK
VDIO
ALERT
DRPENA
VRA_READY
SETINIA
SETINI
TMPMAX
ICCMAX
ICCMAXA
TSEN
OCSET
TSENA
OCSETA
IBIAS
VRHOT
VR_READY
13 14 15 16 17 18 19 20 21 22 23 24
WQFN-48L 6x6
Functional Pin Description
Pin No.
Pin Name
Pin Function
1
ISEN1P
Positive Current Sense Input of CORE VR
2
ISEN1N
Negative Current Sense Input of CORE VR
3
COMP
CORE VR Compensation. This pin is the output node of the error amplifier.
4
FB
CORE VR Feedback. This is the negative input node of the error amplifier.
5
RGND
Return Ground for CORE VR. This pin is the negative input for differential remote
voltage sensing.
6
IMON
Current Monitor Output of CORE VR. The output voltage V IMON of this pin is
proportional to the output current. For digital output current reporting, detailed
VIMON is generated by built-in ADC.
7
IMONFB
This pin is used to externally set the current monitor output gain of CORE VR.
Connect this pin with one resistor R IMONFB to CORE VCC_SENSE while IMON pin
is connected to ground with another resistor, RIMON. The current monitor output
gain can be set by the ratio of these two resistors.
8
DRPEN
Droop Enable Mode Setting of CORE VR. An internal 80μA current source is
connected to the DRPEN pin and flows out of this pin for 10μs. Connect this pin to
VCC to enable droop function. Connect this pin to GND to disable droop function.
9
OFS
Output Voltage No-Load Offset Setting of CORE VR. Connect to a resistive voltage
divider from VCC to GND to set the pin voltage V OFS for offset setting. Connect this
pin to GND for no offset setting.
10
OFSA
Output Voltage No-Load Offset Setting of GFX VR. Connect to a resistive voltage
divider from VCC to GND to set the pin voltage V OFSA for offset setting. Connect this
pin to GND for no offset setting.
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
DS8167A-02 July 2014
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
2
®
RT8167A
Pin No.
Pin Name
Pin Function
11
GFXPS2
Forced DEM Enable Setting of GFX VR. Connect to V CC for forced-DEM setting
and connect to GND for following SVID power state command.
12
VCC
5V Power Supply Input of Controller. Bypass this pin to GND with a 1μF or greater
ceramic capacitor.
13
SETINIA
Initial Startup Voltage VINI_GFX Setting of GFX VR. Connect to a resistive voltage
divider from V CC to GND to set the pin voltage VSETINIA for GFX VR initial startup
voltage VINI_GFX setting. Connect this pin to GND for 0V VINI_GFX setting.
14
SETINI
Initial Startup Voltage VINI_CORE Setting of CORE VR. Connect to a resistive
voltage divider from VCC to GND to set the pin voltage VSETINI for CORE VR initial
startup voltage VINI_CORE setting. Connect this pin to GND for 0V V INI_CORE setting.
15
TMPMAX
Maximum Temperature Setting of CORE VR. Connect to a resistive voltage divider
from V CC to GND to set the pin voltage V TMPMAX for TMPMAX setting.
16
ICCMAX
Maximum Current Setting of CORE VR. Connect to a resistive voltage divider from
VCC to GND to set the pin voltage VICCMAX for ICCMAX setting.
17
ICCMAXA
Maximum Current Setting of GFX VR. Connect to a resistive voltage divider from
VCC to GND to set the pin voltage VICCMAXA for ICCMAXA setting.
18
TSEN
Thermal Monitor Sense Pin of CORE VR.
19
OCSET
20
TSENA
21
OCSETA
22
IBIAS
23
VRHOT
Thermal Monitor Output (Active Low). Connect a pull high resistor from VRHOT pin
to 1.05V.
24
VR_READY
Voltage Ready Indicator of CORE VR. Connect a pull high resistor from
VR_READY pin to 1.05V.
25
VRA_READY
Voltage Ready Indicator GFX VR. Connect a pull high resistor from VRA_READY
pin to 1.05V.
26
DRPENA
Droop Enable Mode Setting of GFX VR. An internal 80μA current source is
connected to DRPENA pin and flows out of this pin for 10μs. Connect this pin to
VCC to enable droop function. Connect this pin to GND to disable droop function.
27
ALERT
SVID Alert Pin (Active Low). Connect a 75Ω resistor from ALERT pin to 1.05V.
28
VDIO
29
VCLK
30
IMONFBA
31
IMONA
Over Current Protection Setting of CORE VR. Connect to a resistive voltage divider
from VCC to GND to set the pin voltage VOCSET from 0 to 3.3V for CORE VR over
current protection threshold.
Thermal Monitor Sense Pin of GFX VR.
Over Current Protection Setting of GFX VR. Connect to a resistive voltage divider
from VCC to GND to adjust the pin voltage VOCSETA from 0 to 3.3V for GFX VR over
current protection threshold.
Internal bias current setting. Connect a 53.6kΩ resistor from IBIAS pin to GND.
Controller and CPU Data Transmission Interface. Connecting a 64.9Ω resistor
between VDIO pin to 1.05V.
Synchronous Clock from the CPU. Connect a 64.9Ω resistor from VCLK pin to
1.05V.
This pin is used to externally set the current monitor output gain of GFX VR.
Connect this pin with one resistor RIMONFBA to GFX VCC_SENSE while IMON pin
is connected to ground with another resistor RIMONA. The current monitor output
gain can be set by the ratio of these two resistors.
Current Monitor Output of GFX VR. The output voltage VIMONA of this pin is
proportional to the output current. For digital output current reporting, detailed
VIMONA is generated by built-in ADC.
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
DS8167A-02 July 2014
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
3
RT8167A
Pin No.
Pin Name
Pin Function
32
RGNDA
Return Ground for GFX VR. This pin is the negative input for differential
remote voltage sensing.
33
FBA
GFX VR Feedback. This is the negative input node of the error amplifier.
34
COMPA
GFX VR Compensation. This pin is the output node of the error amplifier.
35
ISENAN
Negative Current Sense Input of GFX VR.
36
ISENAP
Positive Current Sense Input of GFX VR.
37
TONSETA
On-Time Setting of GFX VR. Connect this pin to VIN with one resistor.
38
EN
Chip Enable (Active High).
39
BOOTA
Bootstrap Flying Capacitor Connection for GFX VR. This pin powers the high
side MOSFET drivers. Connect this pin to PHASEA with an external ceramic
capacitor.
40
UGATEA
High Side MOSFET Floating Gate Driver Output for GFX VR. Connect this
pin to the gate of high side MOSFET.
41
PHASEA
42
LGATEA
43
PVCC
44
LGATE
45
PHASE
46
UGATE
47
BOOT
Bootstrap Flying Capacitor Connection for CORE VR. This pin powers the
high side MOSFET drivers. Connect this pin to PHASE with an external
ceramic capacitor.
48
TONSET
On-Time Setting of CORE VR. Connect this pin to VIN with one resistor.
GND
Ground. The exposed pad must be soldered to a large PCB and connected to
GND for maximum power dissipation.
49 (Exposed pad)
Switching Node Connection for GFX VR. PHASEA is also the zero cross
detect input for GFX VR. Connect this pin to the high side MOSFET sources
together with the low side MOSFET drains and the inductor.
Synchronous-Rectifier Gate Driver Output of GFX VR. Connect this pin to the
gate of low side MOSFET.
5V Power Supply of Driver. Bypass this pin to GND with a 1μF or greater
ceramic capacitor.
Synchronous-Rectifier Gate Driver Output of CORE VR. Connect this pin to
the gate of low side MOSFET.
Switching Node Connection for CORE VR. PHASE is the internal lower
supply rail for the UGATE. PHASE is also the zero cross detect input for
CORE VR. Connect this pin to the high side MOSFET sources together with
the low side MOSFET drains and the inductor.
High Side MOSFET Floating Gate Driver Output for CORE VR. Connect this
pin to the gate of high side MOSFET.
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
www.richtek.com
4
is a registered trademark of Richtek Technology Corporation.
DS8167A-02 July 2014
RT8167A
Typical Application Circuit
R1
2.2
5V
RT8167A
VCC
TONSET 48
12
R3
5.1
VIN
5V to 25V
C2
0.1µF
VCC
C1
1µF
BOOT
47
R4
0
Q1
C4
10µF
UGATE 46
VCCP
R6
130
R7
130
R8
150
R9
10k
R10
10k
R5
0
R11
75
29
28
27
25
24
23
VCLK
VDIO
ALERT
VRA_READY
VR_READY
VRHOT
PHASE
VCLK
VDIO
ALERT
VRA_READY
VR_READY
VRHOT
44
LGATE
43
PVCC
26
8
21
19
13
14
R12
Optional
0
5V
IMONFB
FB
C6
330µF
/9m
RNTC1
4.7k
R14 3.9k
R16
2.4k
R15
4.7k
2
C9
Optional R23
10k
7
4
Optional
C11
R24
0
C10
Optional
Optional
C12
CORE VCC_ SENSE
COMP
3
5
RGND
6
IMON
R28 R29 R30 R31 R32 R33
NC NC 10k 10k NC NC
C26
330µF
/9m
C7
ISEN1P 1
ISEN1N
DRPENA
DRPEN
OCSETA
OCSET
SETINIA
SETINI
DCR 7.6m
R13
C8
1µF
VCORE
L1
1µH
Q2
C5
0.068µF
C25
R17 R18 R19 R20 R21 R22
10k 10k 27k 8.7k 10k 10k
C3
0.1µF
45
Optional
VCC
DRPENA
DRPEN
OCSETA
OCSET
SETINIA
SETINI
R2
130k
VCORE
R27
100
R26
10k
R25
71k
CORE VSS_SENSE
IMON
C13
0.1µF
VCC
R34
100
R35
620k
R36
39k
TONSETA
37
TMPMAX
ICCMAX
ICCMAXA
OFSA
OFS
GFXPS2
R37 R38 R39 R40 R41 R42
51k 150k 100k NC NC NC
15
16
17
10
9
11
TMPMAX
ICCMAX
ICCMAXA
OFSA
OFS
GFXPS2
BOTTA
39
R43
R44
VIN
5V to 25
C14
0.1µF
R45
0
Q3
R46
0
PHASEA
C15
0.1µF
41
LGATEA 42
R53
Optional
VCC
RNTC T1
10k
ß = 3380
R71
750
R62
1k
R59
12k
C17
ISENAN
TSENA
18
TSEN
22
IBIAS
R64
53.6k
COMPA
RGNDA
EN
38
EN
IMONA
Optional
C22
R60
10k
R61
0
C21
Optional
Optional
C23
GFX VCC_SENSE
34
32
R65
42k
IMONA
C24
0.1µF
VGFX
R67
100
R66
10k
31
GND
49 (Exposed Pad)
C19
330µF
/15m
R56
1k
35
IMONFBA 30
33
FBA
C27
330µF
/15m
R57
1.2k
C20
Optional
20
RNTCA
1k
R55 11k
C18
0.1µF
RNTCTA
10k
ß = 3380
R72
750
R63
1k
DCR 14.6m
R54
ISENAP 36
VGFX
L2
2µH
Q4
0
R47 R48 R49 R50 R51 R52
0
10k
33k 5.1k 1.6k 0
R58
12k
C16
10µF
UGATEA 40
R69
180k
GFX VSS_SENSE
R68
100
R70
1.8M
Figure 1. Dual Output Application Circuit
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
DS8167A-02 July 2014
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
5
RT8167A
RT8167A
VCC
R1
2.2
5V
12
TONSET 48
VCC
C1
1µF
R2
130k
R3
5.1
BOOT
VCCP
47
R4 0
Q1
UGATE 46
R6
130
R7
130
R8
150
R9
10k
R5 0
R10
75
29
28
27
24
23
VCLK
VDIO
ALERT
VR_READY
VRHOT
PHASE
VCLK
VDIO
ALERT
VR_READY
VRHOT
R17 R18
8.7k 10k
R27
NC
DCR 7.6m
C26
330µF
/9m
R12
5V
C5
0.068µF
C7
RNTC1
4.7k
C6
330µF
/9m
2
R15
2.4k
R14
4.7k
C9
Optional
8
DRPEN
19 OCSET
14
SETINI
DRPEN
OCSET
SETINI
VCORE
R13 3.9k
C25
ISEN1N
L1
1µH
Optional
Q2
44 R11 0
LGATE
43
PVCC
C8
1µF
ISEN1P 1
R16
10k
C4
10µF
C3
0.1µF
45
Optional
VCC
VIN
5V to 25
C2
0.1µF
R28 R29
10k NC
R20
0
R19
10k
7
IMONFB
FB 4
C10
Optional
Optional Optional
CORE VCC_SENSE
COMP
RGND
VCC
R30
51k
R31
150k
IMON
R32
NC
3
5
C11
C12
R21
71k
R22
10k
6
IMON
C13
0.1µF
15
TMPMAX
16
ICCMAX
9
OFS
TMPMAX
ICCMAX
OFS
TONSETA
BOOTA
R33
33k
R34
5.1k
R35
0
VCC
R36
12k
NTCT1
10k
ß = 3380
18
R39
750
R37
1k
22
TSEN
IBIAS
R38
53.6k
EN
38
37
39
UGATEA 40
41
PHASEA
42
LGATEA
25
VRA_READY
10
OFSA
17
ICCMAXA
11
GFXPS2
21
OCSETA
26
DRPENA
36
ISENAP
IMONFBA 30
33
FBA
34
COMPA
31
IMONA
35
ISENAN
20
TSENA
32
RGNDA
13
SETINIA
EN
VCORE
R23
100
R24
620k
CORE VSS_SENSE
R26
100k
R25
39k
GND
Floating
Floating
Floating
Floating
GND
GND
VCC
GND
VCC
GND
VCC
VCC
Floating
Floating
GND
VCC
VCC
GND
GND
GND
49 (Exposed Pad)
Figure 2. Single Output Application Circuit
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
www.richtek.com
6
is a registered trademark of Richtek Technology Corporation.
DS8167A-02 July 2014
RT8167A
OFSA
VREFA
OFS Control
FBA
-
+
-
Offset
Cancellation
+
GFX 0LL VCS
/5
+
10
-
ISENAN
VR_READY
VRA_READY
VRHOT
CORE VR
Protection Signal
CORE VR
VID/OFS Control
GFX VR
Protection Signal
Droop Enabler
DRPENA
GFX VR CCRCOT
PWM Generator
TONSETA
GM
COMPA
ISENAP
GFXPS2
GND
GFX 0LL EN
ERROR
AMP
+
Slew Rate Control
VCC
EN
ICCMAXA
CORE VR Slew
Rate control
GFX VR
Slew Rate control
CORE VR
Operation Mode
GFX VR Slew
Rate control
Control & Protection Logic
GFX VR
VID/OFS Control
DAC
ICCMAX
ADC
SVID XCVR
GFX VR
VID/OFS control
RGNDA
TSEN
TSENA
MUX
GFX VR
Operation Mode
VREFA
GFX 0LL EN
GFX 0LL VCS
SETINI
SETINIA
TMPMAX
ALERT
VDIO
VCLK
UVLO
GFX VR
Current Monitor
CORE 0LL VCS
VREF
CORE 0LL EN
CORE VR
Current Monitor
IMONFBA
IMONA
IMON
IMONFB
Function Block Diagram
GFX 0LL EN
X4.8
VREFA
PWM CMP
BOOTA
GFX VR OCP
Current
Sense AMP
UGATEA
GFX VR
Protection Signal
OCSETA
PHASEA
Driver logic
control
PVCC
GFX VR
OV/UV/NV
OFS
CORE VR
Slew Rate control
DAC
OFS Control
VREF
Slew Rate Control
ERROR
AMP
+
-
FB
CORE 0LL EN
GM
+
-
Offset
Cancellation
+
RGND
COMP
CORE 0LL VCS
ISEN1P
ISEN1N
LGATEA
GFX VR
Operation Mode
CORE VR
VID/OFS Control
+
10
-
/5
VREF
Droop Enabler
DRPEN
CORE VR
CCRCOT
PWM Generator
TONSET
PWM CMP
CORE 0LL EN
X4.8
Current
Sense AMP
BOOT
CORE VR
OCP
UGATE
CORE VR
Protection Signal
OCSET
PHASE
Driver logic
control
PVDD
CORE VR
OV/UV/NV
IBIAS
2.14V
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
DS8167A-02 July 2014
CORE VR
Operation Mode
LGATE
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
7
RT8167A
Table 1. IMVP7/VR12 Compliant VID Table
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
H1
H0
VDAC Voltage
0
0
0
0
0
0
0
0
0
0
0.000
0
0
0
0
0
0
0
1
0
1
0.250
0
0
0
0
0
0
1
0
0
2
0.255
0
0
0
0
0
0
1
1
0
3
0.260
0
0
0
0
0
1
0
0
0
4
0.265
0
0
0
0
0
1
0
1
0
5
0.270
0
0
0
0
0
1
1
0
0
6
0.275
0
0
0
0
0
1
1
1
0
7
0.280
0
0
0
0
1
0
0
0
0
8
0.285
0
0
0
0
1
0
0
1
0
9
0.290
0
0
0
0
1
0
1
0
0
A
0.295
0
0
0
0
1
0
1
1
0
B
0.300
0
0
0
0
1
1
0
0
0
C
0.305
0
0
0
0
1
1
0
1
0
D
0.310
0
0
0
0
1
1
1
0
0
E
0.315
0
0
0
0
1
1
1
1
0
F
0.320
0
0
0
1
0
0
0
0
1
0
0.325
0
0
0
1
0
0
0
1
1
1
0.330
0
0
0
1
0
0
1
0
1
2
0.335
0
0
0
1
0
0
1
1
1
3
0.340
0
0
0
1
0
1
0
0
1
4
0.345
0
0
0
1
0
1
0
1
1
5
0.350
0
0
0
1
0
1
1
0
1
6
0.355
0
0
0
1
0
1
1
1
1
7
0.360
0
0
0
1
1
0
0
0
1
8
0.365
0
0
0
1
1
0
0
1
1
9
0.370
0
0
0
1
1
0
1
0
1
A
0.375
0
0
0
1
1
0
1
1
1
B
0.380
0
0
0
1
1
1
0
0
1
C
0.385
0
0
0
1
1
1
0
1
1
D
0.390
0
0
0
1
1
1
1
0
1
E
0.395
0
0
0
1
1
1
1
1
1
F
0.400
0
0
1
0
0
0
0
0
2
0
0.405
0
0
1
0
0
0
0
1
2
1
0.410
0
0
1
0
0
0
1
0
2
2
0.415
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
www.richtek.com
8
is a registered trademark of Richtek Technology Corporation.
DS8167A-02 July 2014
RT8167A
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
H1
H0
DAC Voltage
0
0
1
0
0
0
1
1
2
3
0.420
0
0
1
0
0
1
0
0
2
4
0.425
0
0
1
0
0
1
0
1
2
5
0.430
0
0
1
0
0
1
1
0
2
6
0.435
0
0
1
0
0
1
1
1
2
7
0.440
0
0
1
0
1
0
0
0
2
8
0.445
0
0
1
0
1
0
0
1
2
9
0.450
0
0
1
0
1
0
1
0
2
A
0.455
0
0
1
0
1
0
1
1
2
B
0.460
0
0
1
0
1
1
0
0
2
C
0.465
0
0
1
0
1
1
0
1
2
D
0.470
0
0
1
0
1
1
1
0
2
E
0.475
0
0
1
0
1
1
1
1
2
F
0.480
0
0
1
1
0
0
0
0
3
0
0.485
0
0
1
1
0
0
0
1
3
1
0.490
0
0
1
1
0
0
1
0
3
2
0.495
0
0
1
1
0
0
1
1
3
3
0.500
0
0
1
1
0
1
0
0
3
4
0.505
0
0
1
1
0
1
0
1
3
5
0.510
0
0
1
1
0
1
1
0
3
6
0.515
0
0
1
1
0
1
1
1
3
7
0.520
0
0
1
1
1
0
0
0
3
8
0.525
0
0
1
1
1
0
0
1
3
9
0.530
0
0
1
1
1
0
1
0
3
A
0.535
0
0
1
1
1
0
1
1
3
B
0.540
0
0
1
1
1
1
0
0
3
C
0.545
0
0
1
1
1
1
0
1
3
D
0.550
0
0
1
1
1
1
1
0
3
E
0.555
0
0
1
1
1
1
1
1
3
F
0.560
0
1
0
0
0
0
0
0
4
0
0.565
0
1
0
0
0
0
0
1
4
1
0.570
0
1
0
0
0
0
1
0
4
2
0.575
0
1
0
0
0
0
1
1
4
3
0.580
0
1
0
0
0
1
0
0
4
4
0.585
0
1
0
0
0
1
0
1
4
5
0.590
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
DS8167A-02 July 2014
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
9
RT8167A
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
H1
H0
DAC Voltage
0
1
0
0
0
1
1
0
4
6
0.595
0
1
0
0
0
1
1
1
4
7
0.600
0
1
0
0
1
0
0
0
4
8
0.605
0
1
0
0
1
0
0
1
4
9
0.610
0
1
0
0
1
0
1
0
4
A
0.615
0
1
0
0
1
0
1
1
4
B
0.620
0
1
0
0
1
1
0
0
4
C
0.625
0
1
0
0
1
1
0
1
4
D
0.630
0
1
0
0
1
1
1
0
4
E
0.635
0
1
0
0
1
1
1
1
4
F
0.640
0
1
0
1
0
0
0
0
5
0
0.645
0
1
0
1
0
0
0
1
5
1
0.650
0
1
0
1
0
0
1
0
5
2
0.655
0
1
0
1
0
0
1
1
5
3
0.660
0
1
0
1
0
1
0
0
5
4
0.665
0
1
0
1
0
1
0
1
5
5
0.670
0
1
0
1
0
1
1
0
5
6
0.675
0
1
0
1
0
1
1
1
5
7
0.680
0
1
0
1
1
0
0
0
5
8
0.685
0
1
0
1
1
0
0
1
5
9
0.690
0
1
0
1
1
0
1
0
5
A
0.695
0
1
0
1
1
0
1
1
5
B
0.700
0
1
0
1
1
1
0
0
5
C
0.705
0
1
0
1
1
1
0
1
5
D
0.710
0
1
0
1
1
1
1
0
5
E
0.715
0
1
0
1
1
1
1
1
5
F
0.720
0
1
1
0
0
0
0
0
6
0
0.725
0
1
1
0
0
0
0
1
6
1
0.730
0
1
1
0
0
0
1
0
6
2
0.735
0
1
1
0
0
0
1
1
6
3
0.740
0
1
1
0
0
1
0
0
6
4
0.745
0
1
1
0
0
1
0
1
6
5
0.750
0
1
1
0
0
1
1
0
6
6
0.755
0
1
1
0
0
1
1
1
6
7
0.760
0
1
1
0
1
0
0
0
6
8
0.765
0
1
1
0
1
0
0
1
6
9
0.770
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
www.richtek.com
10
is a registered trademark of Richtek Technology Corporation.
DS8167A-02 July 2014
RT8167A
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
H1
H0
DAC Voltage
0
1
1
0
1
0
1
0
6
A
0.775
0
1
1
0
1
0
1
1
6
B
0.780
0
1
1
0
1
1
0
0
6
C
0.785
0
1
1
0
1
1
0
1
6
D
0.790
0
1
1
0
1
1
1
0
6
E
0.795
0
1
1
0
1
1
1
1
6
F
0.800
0
1
1
1
0
0
0
0
7
0
0.805
0
1
1
1
0
0
0
1
7
1
0.810
0
1
1
1
0
0
1
0
7
2
0.815
0
1
1
1
0
0
1
1
7
3
0.820
0
1
1
1
0
1
0
0
7
4
0.825
0
1
1
1
0
1
0
1
7
5
0.830
0
1
1
1
0
1
1
0
7
6
0.835
0
1
1
1
0
1
1
1
7
7
0.840
0
1
1
1
1
0
0
0
7
8
0.845
0
1
1
1
1
0
0
1
7
9
0.850
0
1
1
1
1
0
1
0
7
A
0.855
0
1
1
1
1
0
1
1
7
B
0.860
0
1
1
1
1
1
0
0
7
C
0.865
0
1
1
1
1
1
0
1
7
D
0.870
0
1
1
1
1
1
1
0
7
E
0.875
0
1
1
1
1
1
1
1
7
F
0.880
1
0
0
0
0
0
0
0
8
0
0.885
1
0
0
0
0
0
0
1
8
1
0.890
1
0
0
0
0
0
1
0
8
2
0.895
1
0
0
0
0
0
1
1
8
3
0.900
1
0
0
0
0
1
0
0
8
4
0.905
1
0
0
0
0
1
0
1
8
5
0.910
1
0
0
0
0
1
1
0
8
6
0.915
1
0
0
0
0
1
1
1
8
7
0.920
1
0
0
0
1
0
0
0
8
8
0.925
1
0
0
0
1
0
0
1
8
9
0.930
1
0
0
0
1
0
1
0
8
A
0.935
1
0
0
0
1
0
1
1
8
B
0.940
1
0
0
0
1
1
0
0
8
C
0.945
1
0
0
0
1
1
0
1
8
D
0.950
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
DS8167A-02 July 2014
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
11
RT8167A
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
H1
H0
DAC Voltage
1
0
0
0
1
1
1
0
8
E
0.955
1
0
0
0
1
1
1
1
8
F
0.960
1
0
0
1
0
0
0
0
9
0
0.965
1
0
0
1
0
0
0
1
9
1
0.970
1
0
0
1
0
0
1
0
9
2
0.975
1
0
0
1
0
0
1
1
9
3
0.980
1
0
0
1
0
1
0
0
9
4
0.985
1
0
0
1
0
1
0
1
9
5
0.990
1
0
0
1
0
1
1
0
9
6
0.995
1
0
0
1
0
1
1
1
9
7
1.000
1
0
0
1
1
0
0
0
9
8
1.005
1
0
0
1
1
0
0
1
9
9
1.010
1
0
0
1
1
0
1
0
9
A
1.015
1
0
0
1
1
0
1
1
9
B
1.020
1
0
0
1
1
1
0
0
9
C
1.025
1
0
0
1
1
1
0
1
9
D
1.030
1
0
0
1
1
1
1
0
9
E
1.035
1
0
0
1
1
1
1
1
9
F
1.040
1
0
1
0
0
0
0
0
A
0
1.045
1
0
1
0
0
0
0
1
A
1
1.050
1
0
1
0
0
0
1
0
A
2
1.055
1
0
1
0
0
0
1
1
A
3
1.060
1
0
1
0
0
1
0
0
A
4
1.065
1
0
1
0
0
1
0
1
A
5
1.070
1
0
1
0
0
1
1
0
A
6
1.075
1
0
1
0
0
1
1
1
A
7
1.080
1
0
1
0
1
0
0
0
A
8
1.085
1
0
1
0
1
0
0
1
A
9
1.090
1
0
1
0
1
0
1
0
A
A
1.095
1
0
1
0
1
0
1
1
A
B
1.100
1
0
1
0
1
1
0
0
A
C
1.105
1
0
1
0
1
1
0
1
A
D
1.110
1
0
1
0
1
1
1
0
A
E
1.115
1
0
1
0
1
1
1
1
A
F
1.120
1
0
1
1
0
0
0
0
B
0
1.125
1
0
1
1
0
0
0
1
B
1
1.130
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
www.richtek.com
12
is a registered trademark of Richtek Technology Corporation.
DS8167A-02 July 2014
RT8167A
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
H1
H0
DAC Voltage
1
0
1
1
0
0
1
0
B
2
1.135
1
0
1
1
0
0
1
1
B
3
1.140
1
0
1
1
0
1
0
0
B
4
1.145
1
0
1
1
0
1
0
1
B
5
1.150
1
0
1
1
0
1
1
0
B
6
1.155
1
0
1
1
0
1
1
1
B
7
1.160
1
0
1
1
1
0
0
0
B
8
1.165
1
0
1
1
1
0
0
1
B
9
1.170
1
0
1
1
1
0
1
0
B
A
1.175
1
0
1
1
1
0
1
1
B
B
1.180
1
0
1
1
1
1
0
0
B
C
1.185
1
0
1
1
1
1
0
1
B
D
1.190
1
0
1
1
1
1
1
0
B
E
1.195
1
0
1
1
1
1
1
1
B
F
1.200
1
1
0
0
0
0
0
0
C
0
1.205
1
1
0
0
0
0
0
1
C
1
1.210
1
1
0
0
0
0
1
0
C
2
1.215
1
1
0
0
0
0
1
1
C
3
1.220
1
1
0
0
0
1
0
0
C
4
1.225
1
1
0
0
0
1
0
1
C
5
1.230
1
1
0
0
0
1
1
0
C
6
1.235
1
1
0
0
0
1
1
1
C
7
1.240
1
1
0
0
1
0
0
0
C
8
1.245
1
1
0
0
1
0
0
1
C
9
1.250
1
1
0
0
1
0
1
0
C
A
1.255
1
1
0
0
1
0
1
1
C
B
1.260
1
1
0
0
1
1
0
0
C
C
1.265
1
1
0
0
1
1
0
1
C
D
1.270
1
1
0
0
1
1
1
0
C
E
1.275
1
1
0
0
1
1
1
1
C
F
1.280
1
1
0
1
0
0
0
0
D
0
1.285
1
1
0
1
0
0
0
1
D
1
1.290
1
1
0
1
0
0
1
0
D
2
1.295
1
1
0
1
0
0
1
1
D
3
1.300
1
1
0
1
0
1
0
0
D
4
1.305
1
1
0
1
0
1
0
1
D
5
1.310
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
DS8167A-02 July 2014
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
13
RT8167A
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
H1
H0
DAC Voltage
1
1
0
1
0
1
1
0
D
6
1.315
1
1
0
1
0
1
1
1
D
7
1.320
1
1
0
1
1
0
0
0
D
8
1.325
1
1
0
1
1
0
0
1
D
9
1.330
1
1
0
1
1
0
1
0
D
A
1.335
1
1
0
1
1
0
1
1
D
B
1.340
1
1
0
1
1
1
0
0
D
C
1.345
1
1
0
1
1
1
0
1
D
D
1.350
1
1
0
1
1
1
1
0
D
E
1.355
1
1
0
1
1
1
1
1
D
F
1.360
1
1
1
0
0
0
0
0
E
0
1.365
1
1
1
0
0
0
0
1
E
1
1.370
1
1
1
0
0
0
1
0
E
2
1.375
1
1
1
0
0
0
1
1
E
3
1.380
1
1
1
0
0
1
0
0
E
4
1.385
1
1
1
0
0
1
0
1
E
5
1.390
1
1
1
0
0
1
1
0
E
6
1.395
1
1
1
0
0
1
1
1
E
7
1.400
1
1
1
0
1
0
0
0
E
8
1.405
1
1
1
0
1
0
0
1
E
9
1.410
1
1
1
0
1
0
1
0
E
A
1.415
1
1
1
0
1
0
1
1
E
B
1.420
1
1
1
0
1
1
0
0
E
C
1.425
1
1
1
0
1
1
0
1
E
D
1.430
1
1
1
0
1
1
1
0
E
E
1.435
1
1
1
0
1
1
1
1
E
F
1.440
1
1
1
1
0
0
0
0
F
0
1.445
1
1
1
1
0
0
0
1
F
1
1.450
1
1
1
1
0
0
1
0
F
2
1.455
1
1
1
1
0
0
1
1
F
3
1.460
1
1
1
1
0
1
0
0
F
4
1.465
1
1
1
1
0
1
0
1
F
5
1.470
1
1
1
1
0
1
1
0
F
6
1.475
1
1
1
1
0
1
1
1
F
7
1.480
1
1
1
1
1
0
0
0
F
8
1.485
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
www.richtek.com
14
is a registered trademark of Richtek Technology Corporation.
DS8167A-02 July 2014
RT8167A
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
H1
H0
DAC Voltage
1
1
1
1
1
0
0
1
F
9
1.490
1
1
1
1
1
0
1
0
F
A
1.495
1
1
1
1
1
0
1
1
F
B
1.500
1
1
1
1
1
1
0
0
F
C
1.505
1
1
1
1
1
1
0
1
F
D
1.510
1
1
1
1
1
1
1
0
F
E
1.515
1
1
1
1
1
1
1
1
F
F
1.520
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
DS8167A-02 July 2014
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
15
RT8167A
Absolute Maximum Ratings
(Note 1)
VCC to GND ----------------------------------------------------------------------------------------------PVCC to GND --------------------------------------------------------------------------------------------z RGNDx to GND ------------------------------------------------------------------------------------------z TONSETx to GND ---------------------------------------------------------------------------------------z Others ------------------------------------------------------------------------------------------------------z BOOTx to PHASEx -------------------------------------------------------------------------------------z PHASEx to GND
DC -----------------------------------------------------------------------------------------------------------
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