®
RT8172A
Dual Single-Phase PWM Controller for CPU and GPU Core
Power Supply
General Description
The RT8172A is a dual single-phase PWM controller with
integrated MOSFET drivers, compliant with Intel IMVP7
Pulse Width Modulation Specification to support both
CPU core and GPU core power. This part adopts G-NAVPTM
(Green-Native AVP), which is Richtek's proprietary topology
derived from finite DC gain compensator in constant ontime control mode. The G-NAVPTM makes this part an
easy setting PWM controller to meet all Intel AVP (Active
Voltage Positioning) mobile CPU/GPU requirements. The
RT8172A uses SVID interface to control an 8-bit DAC for
output voltage programming. The built-in high accuracy
DAC converts the received VID code into a voltage value
ranging from 0V to 1.52V with 5mV step voltage. The
system accuracy of the controller can reach 0.8%. The
RT8172A operates in continuous conduction mode or
diode emulation mode, according to the SVID command.
The maximum efficiency can reach up to 90% in different
operating modes according to different load conditions.
The droop function (load line) can be easily programmed
by setting the DC gain of the error amplifier. With proper
compensation, the load transient response can achieve
optimized AVP performance.
The output voltage transition slew rate is set via the SVID
interface. The RT8172A supports both DCR and sense
resistor current sensing. The RT8172A provides
VR_READY and thermal throttling output signals for
IMVP7 CPU and GPU core. This part also features
complete fault protection functions including over-voltage,
under-voltage, negative-voltage, over-current and thermal
shutdown.
The RT8172A is available in the WQFN-40L 5x5 small
footprint package.
Features
Dual Single-Phase PWM Controller for CPU Core
and GPU Core Power
IMVP7 Compatible Power Management States
Serial VID Interface
G-NAVPTM Topology
AVP for CPU VR Only
0.5% DAC Accuracy
0.8% System Accuracy
Differential Remote Voltage Sensing
Built-in ADC for Platform Programming
SETINI/SETINIA for CPU/GPU Core VR Initial
Startup Voltage
TMPMAX to Set Platform Maximum Temperature
ICCMAX/ICCMAXA for CPU/GPU Core VR
Maximum Current
Power Good Indicator : VR_READY/VRA_READY for
CPU/GPU Core Power
Thermal Throttling Indicator : VRHOT
Diode Emulation Mode at Light Load Condition
Fast Line/Load Transient Response
Switching Frequency up to 1MHz per Phase
OVP, UVP, NVP, OTP, UVLO, OCP
RoHS Compliant and Halogen Free
Simplified Application Circuit
VR_READY
VRA_READY
VRHOT
VCLK
VDIO
ALERT
RT8172A
VR_READY
VRA_READY PHASE
VRHOT
VCLK
PHASEA
VDIO
ALERT
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS8172A-00 November 2013
MOSFET
VCORE
MOSFET
VGPU
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
1
RT8172A
Applications
Ordering Information
RT8172A
Package Type
QW : WQFN-40L 5x5 (W-Type)
Lead Plating System
G : Green (Halogen Free and Pb Free)
Note :
Richtek products are :
RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.
Suitable for use in SnPb or Pb-free soldering processes.
UGATE1
PHASE1
LGATE1
PVCC
LGATEA
PHASEA
UGATEA
BOOTA
EN
TONSETA
(TOP VIEW)
IMVP7 Intel CPU/GPU Core Power Supply
Laptop Computers
AVP Step-Down Converter
40 39 38 37 36 35 34 33 32 31
BOOT1
TONSET
ISEN1P
ISEN1N
COMP
FB
RGND
GFXPS2
VCC
SETINI
1
30
2
29
3
28
4
27
5
26
GND
25
6
24
7
8
41
23
22
9
21
10
ISENAP
ISENAN
COMPA
FBA
RGNDA
VCLK
VDIO
ALERT
VRA_READY
VR_READY
11 12 13 14 15 16 17 18 19 20
SETINIA
TMPMAX
ICCMAX
ICCMAXA
TSEN
OCSET
TSENA
OCSETA
IBIAS
VRHOT
Pin Configurations
WQFN-40L 5x5
Marking Information
RT8172AGQW : Product Number
RT8172A
GQW
YMDNN
YMDNN : Date Code
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
www.richtek.com
2
is a registered trademark of Richtek Technology Corporation.
DS8172A-00 November 2013
RT8172A
Table 1. IMVP7/VR12 Compliant VID Table
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
H1
H0
VDAC Voltage
0
0
0
0
0
0
0
0
0
0
0.000
0
0
0
0
0
0
0
1
0
1
0.250
0
0
0
0
0
0
1
0
0
2
0.255
0
0
0
0
0
0
1
1
0
3
0.260
0
0
0
0
0
1
0
0
0
4
0.265
0
0
0
0
0
1
0
1
0
5
0.270
0
0
0
0
0
1
1
0
0
6
0.275
0
0
0
0
0
1
1
1
0
7
0.280
0
0
0
0
1
0
0
0
0
8
0.285
0
0
0
0
1
0
0
1
0
9
0.290
0
0
0
0
1
0
1
0
0
A
0.295
0
0
0
0
1
0
1
1
0
B
0.300
0
0
0
0
1
1
0
0
0
C
0.305
0
0
0
0
1
1
0
1
0
D
0.310
0
0
0
0
1
1
1
0
0
E
0.315
0
0
0
0
1
1
1
1
0
F
0.320
0
0
0
1
0
0
0
0
1
0
0.325
0
0
0
1
0
0
0
1
1
1
0.330
0
0
0
1
0
0
1
0
1
2
0.335
0
0
0
1
0
0
1
1
1
3
0.340
0
0
0
1
0
1
0
0
1
4
0.345
0
0
0
1
0
1
0
1
1
5
0.350
0
0
0
1
0
1
1
0
1
6
0.355
0
0
0
1
0
1
1
1
1
7
0.360
0
0
0
1
1
0
0
0
1
8
0.365
0
0
0
1
1
0
0
1
1
9
0.370
0
0
0
1
1
0
1
0
1
A
0.375
0
0
0
1
1
0
1
1
1
B
0.380
0
0
0
1
1
1
0
0
1
C
0.385
0
0
0
1
1
1
0
1
1
D
0.390
0
0
0
1
1
1
1
0
1
E
0.395
0
0
0
1
1
1
1
1
1
F
0.400
0
0
1
0
0
0
0
0
2
0
0.405
0
0
1
0
0
0
0
1
2
1
0.410
0
0
1
0
0
0
1
0
2
2
0.415
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS8172A-00 November 2013
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
3
RT8172A
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
H1
H0
DAC Voltage
0
0
1
0
0
0
1
1
2
3
0.420
0
0
1
0
0
1
0
0
2
4
0.425
0
0
1
0
0
1
0
1
2
5
0.430
0
0
1
0
0
1
1
0
2
6
0.435
0
0
1
0
0
1
1
1
2
7
0.440
0
0
1
0
1
0
0
0
2
8
0.445
0
0
1
0
1
0
0
1
2
9
0.450
0
0
1
0
1
0
1
0
2
A
0.455
0
0
1
0
1
0
1
1
2
B
0.460
0
0
1
0
1
1
0
0
2
C
0.465
0
0
1
0
1
1
0
1
2
D
0.470
0
0
1
0
1
1
1
0
2
E
0.475
0
0
1
0
1
1
1
1
2
F
0.480
0
0
1
1
0
0
0
0
3
0
0.485
0
0
1
1
0
0
0
1
3
1
0.490
0
0
1
1
0
0
1
0
3
2
0.495
0
0
1
1
0
0
1
1
3
3
0.500
0
0
1
1
0
1
0
0
3
4
0.505
0
0
1
1
0
1
0
1
3
5
0.510
0
0
1
1
0
1
1
0
3
6
0.515
0
0
1
1
0
1
1
1
3
7
0.520
0
0
1
1
1
0
0
0
3
8
0.525
0
0
1
1
1
0
0
1
3
9
0.530
0
0
1
1
1
0
1
0
3
A
0.535
0
0
1
1
1
0
1
1
3
B
0.540
0
0
1
1
1
1
0
0
3
C
0.545
0
0
1
1
1
1
0
1
3
D
0.550
0
0
1
1
1
1
1
0
3
E
0.555
0
0
1
1
1
1
1
1
3
F
0.560
0
1
0
0
0
0
0
0
4
0
0.565
0
1
0
0
0
0
0
1
4
1
0.570
0
1
0
0
0
0
1
0
4
2
0.575
0
1
0
0
0
0
1
1
4
3
0.580
0
1
0
0
0
1
0
0
4
4
0.585
0
1
0
0
0
1
0
1
4
5
0.590
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
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is a registered trademark of Richtek Technology Corporation.
DS8172A-00 November 2013
RT8172A
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
H1
H0
DAC Voltage
0
1
0
0
0
1
1
0
4
6
0.595
0
1
0
0
0
1
1
1
4
7
0.600
0
1
0
0
1
0
0
0
4
8
0.605
0
1
0
0
1
0
0
1
4
9
0.610
0
1
0
0
1
0
1
0
4
A
0.615
0
1
0
0
1
0
1
1
4
B
0.620
0
1
0
0
1
1
0
0
4
C
0.625
0
1
0
0
1
1
0
1
4
D
0.630
0
1
0
0
1
1
1
0
4
E
0.635
0
1
0
0
1
1
1
1
4
F
0.640
0
1
0
1
0
0
0
0
5
0
0.645
0
1
0
1
0
0
0
1
5
1
0.650
0
1
0
1
0
0
1
0
5
2
0.655
0
1
0
1
0
0
1
1
5
3
0.660
0
1
0
1
0
1
0
0
5
4
0.665
0
1
0
1
0
1
0
1
5
5
0.670
0
1
0
1
0
1
1
0
5
6
0.675
0
1
0
1
0
1
1
1
5
7
0.680
0
1
0
1
1
0
0
0
5
8
0.685
0
1
0
1
1
0
0
1
5
9
0.690
0
1
0
1
1
0
1
0
5
A
0.695
0
1
0
1
1
0
1
1
5
B
0.700
0
1
0
1
1
1
0
0
5
C
0.705
0
1
0
1
1
1
0
1
5
D
0.710
0
1
0
1
1
1
1
0
5
E
0.715
0
1
0
1
1
1
1
1
5
F
0.720
0
1
1
0
0
0
0
0
6
0
0.725
0
1
1
0
0
0
0
1
6
1
0.730
0
1
1
0
0
0
1
0
6
2
0.735
0
1
1
0
0
0
1
1
6
3
0.740
0
1
1
0
0
1
0
0
6
4
0.745
0
1
1
0
0
1
0
1
6
5
0.750
0
1
1
0
0
1
1
0
6
6
0.755
0
1
1
0
0
1
1
1
6
7
0.760
0
1
1
0
1
0
0
0
6
8
0.765
0
1
1
0
1
0
0
1
6
9
0.770
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS8172A-00 November 2013
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
5
RT8172A
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
H1
H0
DAC Voltage
0
1
1
0
1
0
1
0
6
A
0.775
0
1
1
0
1
0
1
1
6
B
0.780
0
1
1
0
1
1
0
0
6
C
0.785
0
1
1
0
1
1
0
1
6
D
0.790
0
1
1
0
1
1
1
0
6
E
0.795
0
1
1
0
1
1
1
1
6
F
0.800
0
1
1
1
0
0
0
0
7
0
0.805
0
1
1
1
0
0
0
1
7
1
0.810
0
1
1
1
0
0
1
0
7
2
0.815
0
1
1
1
0
0
1
1
7
3
0.820
0
1
1
1
0
1
0
0
7
4
0.825
0
1
1
1
0
1
0
1
7
5
0.830
0
1
1
1
0
1
1
0
7
6
0.835
0
1
1
1
0
1
1
1
7
7
0.840
0
1
1
1
1
0
0
0
7
8
0.845
0
1
1
1
1
0
0
1
7
9
0.850
0
1
1
1
1
0
1
0
7
A
0.855
0
1
1
1
1
0
1
1
7
B
0.860
0
1
1
1
1
1
0
0
7
C
0.865
0
1
1
1
1
1
0
1
7
D
0.870
0
1
1
1
1
1
1
0
7
E
0.875
0
1
1
1
1
1
1
1
7
F
0.880
1
0
0
0
0
0
0
0
8
0
0.885
1
0
0
0
0
0
0
1
8
1
0.890
1
0
0
0
0
0
1
0
8
2
0.895
1
0
0
0
0
0
1
1
8
3
0.900
1
0
0
0
0
1
0
0
8
4
0.905
1
0
0
0
0
1
0
1
8
5
0.910
1
0
0
0
0
1
1
0
8
6
0.915
1
0
0
0
0
1
1
1
8
7
0.920
1
0
0
0
1
0
0
0
8
8
0.925
1
0
0
0
1
0
0
1
8
9
0.930
1
0
0
0
1
0
1
0
8
A
0.935
1
0
0
0
1
0
1
1
8
B
0.940
1
0
0
0
1
1
0
0
8
C
0.945
1
0
0
0
1
1
0
1
8
D
0.950
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
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is a registered trademark of Richtek Technology Corporation.
DS8172A-00 November 2013
RT8172A
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
H1
H0
DAC Voltage
1
0
0
0
1
1
1
0
8
E
0.955
1
0
0
0
1
1
1
1
8
F
0.960
1
0
0
1
0
0
0
0
9
0
0.965
1
0
0
1
0
0
0
1
9
1
0.970
1
0
0
1
0
0
1
0
9
2
0.975
1
0
0
1
0
0
1
1
9
3
0.980
1
0
0
1
0
1
0
0
9
4
0.985
1
0
0
1
0
1
0
1
9
5
0.990
1
0
0
1
0
1
1
0
9
6
0.995
1
0
0
1
0
1
1
1
9
7
1.000
1
0
0
1
1
0
0
0
9
8
1.005
1
0
0
1
1
0
0
1
9
9
1.010
1
0
0
1
1
0
1
0
9
A
1.015
1
0
0
1
1
0
1
1
9
B
1.020
1
0
0
1
1
1
0
0
9
C
1.025
1
0
0
1
1
1
0
1
9
D
1.030
1
0
0
1
1
1
1
0
9
E
1.035
1
0
0
1
1
1
1
1
9
F
1.040
1
0
1
0
0
0
0
0
A
0
1.045
1
0
1
0
0
0
0
1
A
1
1.050
1
0
1
0
0
0
1
0
A
2
1.055
1
0
1
0
0
0
1
1
A
3
1.060
1
0
1
0
0
1
0
0
A
4
1.065
1
0
1
0
0
1
0
1
A
5
1.070
1
0
1
0
0
1
1
0
A
6
1.075
1
0
1
0
0
1
1
1
A
7
1.080
1
0
1
0
1
0
0
0
A
8
1.085
1
0
1
0
1
0
0
1
A
9
1.090
1
0
1
0
1
0
1
0
A
A
1.095
1
0
1
0
1
0
1
1
A
B
1.100
1
0
1
0
1
1
0
0
A
C
1.105
1
0
1
0
1
1
0
1
A
D
1.110
1
0
1
0
1
1
1
0
A
E
1.115
1
0
1
0
1
1
1
1
A
F
1.120
1
0
1
1
0
0
0
0
B
0
1.125
1
0
1
1
0
0
0
1
B
1
1.130
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS8172A-00 November 2013
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
7
RT8172A
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
H1
H0
DAC Voltage
1
0
1
1
0
0
1
0
B
2
1.135
1
0
1
1
0
0
1
1
B
3
1.140
1
0
1
1
0
1
0
0
B
4
1.145
1
0
1
1
0
1
0
1
B
5
1.150
1
0
1
1
0
1
1
0
B
6
1.155
1
0
1
1
0
1
1
1
B
7
1.160
1
0
1
1
1
0
0
0
B
8
1.165
1
0
1
1
1
0
0
1
B
9
1.170
1
0
1
1
1
0
1
0
B
A
1.175
1
0
1
1
1
0
1
1
B
B
1.180
1
0
1
1
1
1
0
0
B
C
1.185
1
0
1
1
1
1
0
1
B
D
1.190
1
0
1
1
1
1
1
0
B
E
1.195
1
0
1
1
1
1
1
1
B
F
1.200
1
1
0
0
0
0
0
0
C
0
1.205
1
1
0
0
0
0
0
1
C
1
1.210
1
1
0
0
0
0
1
0
C
2
1.215
1
1
0
0
0
0
1
1
C
3
1.220
1
1
0
0
0
1
0
0
C
4
1.225
1
1
0
0
0
1
0
1
C
5
1.230
1
1
0
0
0
1
1
0
C
6
1.235
1
1
0
0
0
1
1
1
C
7
1.240
1
1
0
0
1
0
0
0
C
8
1.245
1
1
0
0
1
0
0
1
C
9
1.250
1
1
0
0
1
0
1
0
C
A
1.255
1
1
0
0
1
0
1
1
C
B
1.260
1
1
0
0
1
1
0
0
C
C
1.265
1
1
0
0
1
1
0
1
C
D
1.270
1
1
0
0
1
1
1
0
C
E
1.275
1
1
0
0
1
1
1
1
C
F
1.280
1
1
0
1
0
0
0
0
D
0
1.285
1
1
0
1
0
0
0
1
D
1
1.290
1
1
0
1
0
0
1
0
D
2
1.295
1
1
0
1
0
0
1
1
D
3
1.300
1
1
0
1
0
1
0
0
D
4
1.305
1
1
0
1
0
1
0
1
D
5
1.310
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
www.richtek.com
8
is a registered trademark of Richtek Technology Corporation.
DS8172A-00 November 2013
RT8172A
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
H1
H0
DAC Voltage
1
1
0
1
0
1
1
0
D
6
1.315
1
1
0
1
0
1
1
1
D
7
1.320
1
1
0
1
1
0
0
0
D
8
1.325
1
1
0
1
1
0
0
1
D
9
1.330
1
1
0
1
1
0
1
0
D
A
1.335
1
1
0
1
1
0
1
1
D
B
1.340
1
1
0
1
1
1
0
0
D
C
1.345
1
1
0
1
1
1
0
1
D
D
1.350
1
1
0
1
1
1
1
0
D
E
1.355
1
1
0
1
1
1
1
1
D
F
1.360
1
1
1
0
0
0
0
0
E
0
1.365
1
1
1
0
0
0
0
1
E
1
1.370
1
1
1
0
0
0
1
0
E
2
1.375
1
1
1
0
0
0
1
1
E
3
1.380
1
1
1
0
0
1
0
0
E
4
1.385
1
1
1
0
0
1
0
1
E
5
1.390
1
1
1
0
0
1
1
0
E
6
1.395
1
1
1
0
0
1
1
1
E
7
1.400
1
1
1
0
1
0
0
0
E
8
1.405
1
1
1
0
1
0
0
1
E
9
1.410
1
1
1
0
1
0
1
0
E
A
1.415
1
1
1
0
1
0
1
1
E
B
1.420
1
1
1
0
1
1
0
0
E
C
1.425
1
1
1
0
1
1
0
1
E
D
1.430
1
1
1
0
1
1
1
0
E
E
1.435
1
1
1
0
1
1
1
1
E
F
1.440
1
1
1
1
0
0
0
0
F
0
1.445
1
1
1
1
0
0
0
1
F
1
1.450
1
1
1
1
0
0
1
0
F
2
1.455
1
1
1
1
0
0
1
1
F
3
1.460
1
1
1
1
0
1
0
0
F
4
1.465
1
1
1
1
0
1
0
1
F
5
1.470
1
1
1
1
0
1
1
0
F
6
1.475
1
1
1
1
0
1
1
1
F
7
1.480
1
1
1
1
1
0
0
0
F
8
1.485
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS8172A-00 November 2013
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
9
RT8172A
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
H1
H0
DAC Voltage
1
1
1
1
1
0
0
1
F
9
1.490
1
1
1
1
1
0
1
0
F
A
1.495
1
1
1
1
1
0
1
1
F
B
1.500
1
1
1
1
1
1
0
0
F
C
1.505
1
1
1
1
1
1
0
1
F
D
1.510
1
1
1
1
1
1
1
0
F
E
1.515
1
1
1
1
1
1
1
1
F
F
1.520
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
www.richtek.com
10
is a registered trademark of Richtek Technology Corporation.
DS8172A-00 November 2013
RT8172A
Functional Pin Description
Pin No.
Pin Name
Pin Function
CPU VR Bootstrap Supply for High-Side Gate Driver. This pin powers the
high-side MOSFET drivers. Connect this pin to the PHASE1 pin with a bootstrap
capacitor.
Single-Phase CPU VR On-Time Setting Pin. Connect this pin to VIN with a
resistor to set ripple size in PWM mode.
1
BOOT1
2
TONSET
3
ISEN1P
Positive Current Sense Input of CPU VR.
4
ISEN1N
Negative Current Sense Input of CPU VR.
5
COMP
CPU VR Compensation Node. This pin is the output of the error amplifier.
6
FB
CPU VR Feedback Voltage Input. This pin is the inverting input node of the error
amplifier.
7
RGND
Return Ground for CPU VR. This pin is the inverting input node for differential
remote voltage sensing.
8
GFXPS2
Set Pin for GPU VR Operation Mode. Logic-high on this pin will force the GPU VR
to enter DCM.
9
VCC
Controller Power Supply Input. Connect this pin to GND via a ceramic capacitor
larger than 1F.
10
SETINI
ADC Input for Single-Phase CPU VR VBOOT Voltage Setting.
11
SETINIA
ADC Input for Single-Phase GPU VR VBOOT Voltage Setting.
12
TMPMAX
ADC Input for Single-Phase CPU VR Maximum Temperature Setting.
13
ICCMAX
ADC Input for Single-Phase CPU VR Maximum Current Setting.
14
ICCMAXA
ADC Input for Single-Phase GPU VR Maximum Current Setting.
15
TSEN
Thermal Monitor Sense Input Pin for CPU VR.
16
OCSET
Single-Phase CPU VR Over-Current Protection Threshold Setting.
Connect a resistive voltage divider from VCC to ground, and connect the joint of
the voltage divider to the OCSET pin. The voltage, VOCSET , at this pin sets the
ov er current threshold, ILIMIT, for CPU VR.
17
TSENA
Thermal Monitor Sense Input for GPU VR.
Single-Phase GPU VR Over-Current Protection Threshold Setting.
Connect a resistive voltage divider from VCC to ground, and connect the joint of
the v oltage divider to the OCSETA pin. The voltage, VOCSETA, at this pin sets the
ov er-current threshold, I LIMIT , for GPU VR.
Internal Bias Current Setting. Connect a 53.6k resistor from this pin to GND to
set the internal bias current.
18
OCSETA
19
IBIAS
20
VRHOT
Thermal Monitor Output (Active-Low).
21
VR_READY
CPU VR Voltage Ready Indicator. This pin has an open-drain output.
22
VRA_READY
GPU VR Voltage Ready Indicator. This pin has an open-drain output.
23
ALERT
Alert Line of SVID Interface (active low). This pin has an open drain output.
24
VDIO
Data Transmission Line of SVID Interface.
25
VCLK
Clock Signal Line of SVID Interface.
26
RGNDA
Return Ground for Single-Phase GPU VR.
This pin is the inverting input node for differential remote voltage sensing.
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS8172A-00 November 2013
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
11
RT8172A
Pin No.
Pin Name
Pin Function
27
FBA
GPU VR Feedback Voltage Input. This pin is the inverting input node of the
error amplifier.
28
COMPA
Single-Phase GPU VR Compensation Node. This pin is the output of the error
amplifier.
29
ISENAN
Negative Current Sense Input of Single-Phase GPU VR.
30
ISENAP
Positive Current Sense Input of Single-Phase GPU VR.
31
TONSETA
Single-Phase GPU VR On-Time Setting. Connect this pin to VIN with a resistor
to set ripple size in PWM mode.
32
EN
Voltage Regulator Enable Signal Input Pin.
33
BOOTA
GPU VR Bootstrap Supply for High-Side Gate Driv er. This pin powers the
high-side MOSFET drivers. Connect this pin to the PHASEA pin with a
bootstrap capacitor.
34
UGATEA
High-Side Gate Driver of GPU VR. This pin drives the high-side MOSFET of
GPU VR.
35
PHASEA
Switch Node of GPU VR. This pin is the return node of the high-side MOSFET
driver for GPU VR. Connect this pin to the joint of the Source of high-side
MOSFET, Drain of the low-side MOSFET, and the output inductor.
36
LGATEA
Low-Side Gate Driver of GPU VR. This pin drives the low side MOSFET of
GPU VR.
37
PVCC
MOSFET Driver Power Supply Pin. Connect this pin to GND via a ceramic
capacitor larger than 1F.
38
LGATE1
Low-Side Gate Driver of CPU VR. This pin drives the low-side MOSFET of CPU
VR.
39
PHASE1
Switch Node of CPU VR. This pin is the return node of the high-side driver for
CPU VR. Connect this pin to the joint of the Source of high-side MOSFET,
Drain of the low-side MOSFET, and the output inductor.
40
UGATE1
High-Side Gate Driver of CPU VR. This pin drives the high-side MOSFET of
CPU VR.
GND
Ground of Low-Side MOSFET Driver. The exposed pad must be soldered to a
large PCB and connected to GND for maximum power dissipation.
41 (Exposed Pad)
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
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is a registered trademark of Richtek Technology Corporation.
DS8172A-00 November 2013
RT8172A
VR_READY
VRA_READY
VRHOT
VCC
EN
ICCMAXA
ICCMAX
TSEN
TSENA
SETINI
SETINIA
TMPMAX
ALERT
VDIO
VCLK
Function Block Diagram
UVLO
MUX
From Control Logic
ADC
SVID XCVR
RGNDA
Control & Protection Logic
DAC
Soft-Start & Slew
Rate Control
VREFA
FBA
ERROR
AMP
+
-
PWM CMP
Offset
Cancellation
GFXPS2
TON Time
Generator
+
-
BOOTA
COMPA
UGATEA
Driver Logic
Control
IBIAS
From Control Logic
RGND
TONSETA
LGATEA
To Protection Logic
DAC
OVP/UVP/NVP
OCP
PHASEA
PVCC
10
+
ISENAP
-
ISENAN
OCSETA
Soft-Start & Slew
Rate Control
FB
VREF
ERROR
AMP
+
-
PWM CMP
Offset
Cancellation
+
TON Time
Generator
TONSET
-
COMP
BOOT1
UGATE1
To Protection Logic
ISEN1P
ISEN1N
+
10
-
OCP
OVP/UVP/NVP
Driver Logic
Control
PHASE1
LGATE1
OCSET
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS8172A-00 November 2013
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
13
RT8172A
Operation
The RT8172A adopts the G-NAVPTM (Green Native AVP)
which is Richtek's proprietary topology derived from finite
DC gain of EA amplifier with current mode control, making
it easy to set the droop to meet all Intel CPU requirements
of AVP (Adaptive Voltage Positioning).
The RT8172A adopts the G-NAVPTM controller, which is
one type of current mode constant on-time control with
DC offset cancellation. The approach not only can improve
DC offset problem for increasing system accuracy but also
can have fast transient response for saving BOM. For the
RT8172A, when current feedback signal reaches comp
signal to generate an on-time width to achieve PWM
modulation.
Control & Protection Logic
The registers that save the pin setting data from ADC
output
The control logic also generate the digital code of the
VID that relative to VSET.
Control the on phase of PWM and the on time interval
of PWM according to PWMCMP output.
Control the power on sequence.
Control the protection behavior.
Control the operational phase number.
Offset Cancellation
TON GEN
Cancel the current/voltage ripple issue to get the accurate
VSEN.
Generate the UGATEx pulse according to the phase control
signal from the loop control protection logic.
UVLO
SVID XCVR Interface
Detect the VCC voltage and issue POR signal as VCC is
high enough.
The interface that receive the SVID signal from CPU
and sent the relative signals to Loop Control Protection
logic to execute the action by CPU.
The SVID logic that control the ADC timing.
DAC
Generate a analog signal according the digital code
generated by Control Logic.
Soft-Start & Slew Rate Control
Control the Dynamic VID slew rate of VSET according to
the SetVID fast or SetVID slow.
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
www.richtek.com
14
is a registered trademark of Richtek Technology Corporation.
DS8172A-00 November 2013
RT8172A
Absolute Maximum Ratings
(Note 1)
PVCC, VCC to GND ------------------------------------------------------------------------------------RGNDx to GND ------------------------------------------------------------------------------------------TONSETx to GND ---------------------------------------------------------------------------------------Other Pins -------------------------------------------------------------------------------------------------BOOTx to PHASEx -------------------------------------------------------------------------------------PHASEx to GND
DC -----------------------------------------------------------------------------------------------------------
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