RT8205L/M
High Efficiency, Main Power Supply Controller
for Notebook Computer
General Description
Features
The RT8205L/M is a dual step-down, switch mode power
supply controller generating logic-supply voltages in
battery powered systems. It includes two Pulse-Width
Modulation (PWM) controllers adjustable from 2V to 5.5V,
and also features fixed 5V/3.3V linear regulators. Each
linear regulator provides up to 100mA output current with
automatic linear regulator bootstrapping to the PWM
outputs. An optional external charge pump can be
monitored through SECFB (RT8205M). The RT8205L/M
includes on-board power up sequencing, a power good
output, internal soft-start, and internal soft-discharge
output that prevents negative voltage during shutdown.
z
The constant on-time PWM control scheme operates
without sense resistors and provides 100ns response to
load transient response while maintaining nearly constant
switching frequency. To eliminate noise in audio
applications, an ultrasonic mode is included, which
maintains the switching frequency above 25kHz. Moreover,
the diode-emulation mode maximizes efficiency for light
load applications. The RT8205L/M is available in a
WQFN-24L 4x4 package.
z
z
z
z
z
z
z
z
z
z
z
z
z
z
Constant On-time Control with 100ns Load Step
Response
Wide Input Voltage Range : 6V to 25V
Dual Adjustable Outputs from 2V to 5.5V
Secondary Feedback Input Maintains Charge Pump
Voltage (RT8205M)
Fixed 3.3V and 5V LDO Output : 100mA
2V Reference Voltage
Frequency Selectable via TONSEL Setting
4700ppm/°°C RDS(ON) Current Sensing
Programmable Current Limit Combined with
Enable Control
Selectable PWM, DEM, or Ultrasonic Mode
Internal Soft-Start and Soft-Discharge
High Efficiency up to 97%
5mW Quiescent Power Dissipation
Thermal Shutdown
RoHS Compliant and Halogen Free
Applications
z
z
Notebook and Sub-Notebook Computers
3-Cell and 4-Cell Li+ Battery-Powered Devices
Ordering Information
RT8205
Package Type
QW : WQFN-24L 4x4 (W-Type)
Lead Plating System
G : Green (Halogen Free and Pb Free)
Z : ECO (Ecological Element with
Halogen Free and Pb free)
Pin Function
L : Default
M : With SECFB
Note :
Richtek products are :
`
RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.
`
Suitable for use in SnPb or Pb-free soldering processes.
DS8205L/M-05 June 2011
www.richtek.com
1
RT8205L/M
Marking Information
RT8205LGQW
RT8205MGQW
EM= : Product Code
EM=YM
DNN
EN= : Product Code
YMDNN : Date Code
EN=YM
DNN
RT8205LZQW
RT8205MZQW
EM : Product Code
EM YM
DNN
YMDNN : Date Code
EN : Product Code
YMDNN : Date Code
EN YM
DNN
YMDNN : Date Code
Pin Configurations
VOUT1
PGOOD
BOOT1
UGATE1
PHASE1
LGATE1
VOUT1
PGOOD
BOOT1
UGATE1
PHASE1
LGATE1
(TOP VIEW)
24 23 22 21 20 19
ENTRIP1
FB1
REF
TONSEL
FB2
ENTRIP2
18
2
17
3
16
GND
4
15
25
5
6
14
13
9 10 11 12
ENTRIP1
FB1
REF
TONSEL
FB2
ENTRIP2
1
18
2
17
3
16
GND
4
15
25
5
6
14
13
7
8
SECFB
VREG5
VIN
GND
SKIPSEL
EN
9 10 11 12
VOUT2
VREG3
BOOT2
UGATE2
PHASE2
LGATE2
8
NC
VREG5
VIN
GND
SKIPSEL
EN
VOUT2
VREG3
BOOT2
UGATE2
PHASE2
LGATE2
7
www.richtek.com
2
24 23 22 21 20 19
1
WQFN-24L 4x4
WQFN-24L 4x4
RT8205L
RT8205M
DS8205L/M-05 June 2011
RT8205L/M
Typical Application Circuit
VIN
6V to 25V
R8
3.9
C1
10µF
RT8205L
C10
0.1µF
R4 0
Q1
BSC119
N03S
RBOOT1 0
VOUT1
5V
C3
220µF
C4
PHASE2 11
22 BOOT1
LGATE2 12
19 LGATE1
ENTRIP1 1
24 VOUT1
C18
C19
0.1µF
VOUT2 7
5
FB2
R12
15k
ENTRIP2
VREF
2V
R13
10k
2 FB1
3 REF
C15
0.22µF
GND
Frequency Control
PWM/DEM/Ultrasonic
14 SKIPSEL
13 EN
PGOOD 23
VREG3 8
OFF
C1
10µF
RT8205M
C10
0.1µF
R4 0
RBOOT1 0
VOUT1
5V
C3
220µF
R5
C4
16 VIN
C19
0.1µF
PHASE2 11
22 BOOT1
LGATE2 12
19 LGATE1
R12
15k
2 FB1
D1
C6
0.1µF
BAT254
C7
0.1µF
ON
OFF
C21
R14
6.5k
C20
0.1µF
R15
10k
RILIM2
150k
5V Always On
C9
4.7µF
R6
100k
PGOOD Indicator
3.3V Always On
C16
4.7µF
R10
0
18
ENTRIP2
6
C11
0.1µF
SECFB
REF 3
13 EN
C12
10µF
L2
4.7µH
Q4
BSC119
N03S
VOUT2
3.3V
C17
220µF
R11
C14
R14
6.5k
RILIM1
150k
R15
10k
RILIM2
150k
C21
C20
0.1µF
25 (Exposed Pad)
VREG3 8
R7
39k
C13
10µF
Q2
BSC119
N03S
C9
4.7µF
PGOOD 23
R6
200k
CP
DS8205L/M-05 June 2011
ENTRIP1 1
VREG5 17
D4
C8
0.1µF
C17
220µF
C14
VOUT2 7
5
FB2
GND
C5
0.1µF
D2
D3
VOUT2
3.3V
R11
RILIM1
150k
9 RBOOT2 0
21 UGATE1
20 PHASE1
Q3
BSC119
N03S
R13
10k
UGATE2 10
BOOT2
24 VOUT1
C18
Q4
BSC119
N03S
GND 15
C2
0.1µF
L1
6.8µH
L2
4.7µH
VIN
6V to 25V
R8
3.9
Q1
BSC119
N03S
C11
0.1µF
C12
10µF
25 (Exposed Pad)
VREG5 17
4 TONSEL
ON
6
C13
10µF
Q2
BSC119
N03S
9 RBOOT2 0
21 UGATE1
20 PHASE1
Q3
BSC119
N03S
R5
BOOT2
R10
0
GND 15
C2
0.1µF
L1
6.8µH
UGATE2 10
16 VIN
5V Always On
R6
100k
PGOOD Indicator
C16
4.7µF
C15
0.22µF
3.3V Always On
VREF
2V
TONSEL 4
Frequency Control
SKIPSEL 14
PWM/DEM/Ultrasonic
www.richtek.com
3
RT8205L/M
Functional Pin Description
Pin No.
Pin Name
1
ENTRIP1
2
FB1
3
REF
4
TONSEL
5
FB2
6
ENTRIP2
7
VOUT2
8
VREG3
9
BOOT2
10
UGATE2
11
PHASE2
12
LGATE2
13
EN
14
SKIPSEL
15,
GND
25 (Exposed Pad)
16
VIN
17
VREG5
Pin Function
Channel 1 Enable and Current Limit Setting Input. Connect a resistor to GND to
set the threshold for channel 1 synchronous RDS(ON) sense. The GND − PHASE1
current limit threshold is 1/10th the voltage seen at ENTRIP1 over a 0.515V to 3V
range. There is an internal 10μA current source from VREG5 to ENTRIP1. Leave
ENTRIP1 floating or drive it above 4.5V to shutdown channel 1.
SMPS1 Feedback Input. Connect FB1 to a resistive voltage divider from VOUT1
to GND to adjust output from 2V to 5.5V.
2V Reference Output. Bypass to GND with a minimum 0.22μF capacitor. REF
can source up to 100μA for external loads. Loading REF degrades FBx and
output accuracy according to the REF load regulation error.
Frequency Selectable Input for VOUT1/VOUT2 respectively.
400kHz/500kHz : Connect to VREG5 or VREG3
300kHz/375kHz : Connect to REF
200kHz/250kHz : Connect to GND
SMPS2 Feedback Input. Connect FB2 to a resistive voltage divider from VOUT2
to GND to adjust output from 2V to 5.5V.
Channel 2 Enable and Current Limit Setting Input. Connect a resistor to GND to
set the threshold for channel 2 synchronous RDS(ON) sense. The GND − PHASE2
current limit threshold is 1/10th the voltage seen at ENTRIP2 over a 0.515V to 3V
range. There is an internal 10μA current source from VREG5 to ENTRIP2. Leave
ENTRIP2 floating or drive it above 4.5V to shutdown channel 1.
Bypass Pin for SMPS2. Connect to the SMPS2 output to bypass efficient power
for VREG3 pin. VOUT2 is also for the SMPS2 output soft-discharge.
3.3V Linear Regulator Output.
Boost Flying Capacitor Connection for SMPS2. Connect to an external capacitor
according to the typical application circuits.
Upper Gate Driver Output for SMPS2. UGATE2 swings between PHASE2 and
BOOT2.
Switch Node for SMPS2. PHASE2 is the internal lower supply rail for the
UGATE2 high side gate driver. PHASE2 is also the current sense input for the
SMPS2.
Lower Gate Drive Output for SMPS2. LGATE2 swings between GND and
VREG5.
Master Enable Input. The REF/VREG5/VREG3 are enabled if it is within logic
high level and disabled if it is less than the logic low level.
Operation Mode Selectable Input.
Connect to VREG5 or VREG3 : Ultrasonic Mode
Connect to REF : DEM Mode
Connect to GND : PWM Mode
Ground for SMPS Controller. The exposed pad must be soldered to a large PCB
and connected to GND for maximum power dissipation.
Supply Input for 5V/3.3V LDO and Feed Forward On Time Circuitry.
5V Linear Regulator Output. VREG5 is also the supply voltage for the lower gate
driver and analog supply voltage for the device.
To be continued
www.richtek.com
4
DS8205L/M-05 June 2011
RT8205L/M
Pin No.
18
Pin Name
NC
(RT8205L)
SECFB
(RT8205M)
19
LGATE1
20
PHASE1
21
UGATE1
22
BOOT1
23
PGOOD
24
VOUT1
Pin Function
No Internal Connection.
Charge Pump Control Pin. The SECFB is used to monitor the optional external 14V
charge pump. Connect a resistive voltage divider from the 14V charge pump output to
GND to detect the output. If SECFB drops below the threshold voltage, LGATE1 will
provide 33kHz switching frequency for the charge pump. This will refresh the external
charge pump driven by LGATE1 without over discharging the output voltage.
Lower Gate Drive Output for SMPS1. LGATE1 swings between GND and VREG5.
Switch Node for SMPS1. PHASE1 is the internal lower supply rail for the UGATE1 high
side gate driver. PHASE1 is also the current sense input for the SMPS1.
Upper Gate Driver Output for SMPS1. UGATE1 swings between PHASE1 and BOOT1.
Boost Flying Capacitor Connection for SMPS1. Connect to an external capacitor
according to the typical application circuits.
Power Good Output for Channel 1 and Channel 2. (Logical AND)
Bypass Pin for SMPS1. Connect to the SMPS1 output to bypass efficient power for
VREG5 pin. VOUT1 is also for the SMPS1 output soft-discharge.
Function Block Diagram
TONSEL SKIPSEL
BOOT1
BOOT2
UGATE1
PHASE1
UGATE2
VREG5
VREG5
SMPS1
PWM Buck
Controller
LGATE1
SMPS2
PWM Buck
Controller
LGATE2
VREG5
VREG5
VOUT2
FB2
ENTRIP2
FB1
ENTRIP1
EN
PHASE2
PGOOD
Power-On
Sequence
Clear Fault Latch
SW5 Threshold
GND
SW3 Threshold
VOUT1
Thermal
Shutdown
VREG3
VREG5
VREG5
REF
VREG3
VIN
REF
DS8205L/M-05 June 2011
www.richtek.com
5
RT8205L/M
Absolute Maximum Ratings
(Note 1)
VIN, EN to GND ----------------------------------------------------------------------------------------------PHASEx to GND
DC ---------------------------------------------------------------------------------------------------------------< 20ns ----------------------------------------------------------------------------------------------------------z BOOTx to PHASEx -----------------------------------------------------------------------------------------z ENTRIPx, SKIPSEL, TONSEL, PGOOD to GND -----------------------------------------------------z VREG5, VREG3, FBx , VOUTx, SECFB, REF to GND ---------------------------------------------z UGATEx to PHASEx
DC ---------------------------------------------------------------------------------------------------------------< 20ns ----------------------------------------------------------------------------------------------------------z LGATEx to GND
DC ---------------------------------------------------------------------------------------------------------------< 20ns ----------------------------------------------------------------------------------------------------------z Power Dissipation, PD @ TA = 25°C
WQFN-24L-4x4 -----------------------------------------------------------------------------------------------z Package Thermal Resistance (Note 2)
WQFN-24L-4x4, θJA -----------------------------------------------------------------------------------------WQFN-24L-4x4, θJC -----------------------------------------------------------------------------------------z Lead Temperature (Soldering, 10 sec.) -----------------------------------------------------------------z Junction Temperature ---------------------------------------------------------------------------------------z Storage Temperature Range -------------------------------------------------------------------------------z ESD Susceptibility (Note 3)
HBM (Human Body Mode) ---------------------------------------------------------------------------------MM (Machine Mode) ----------------------------------------------------------------------------------------z
−0.3V to 30V
z
Recommended Operating Conditions
z
z
z
−0.3V to 30V
−8V to 38V
−0.3V to 6V
−0.3V to 6V
−0.3V to 6V
−0.3V to (VREG5 + 0.3V)
−5V to 7.5V
−0.3V to (VREG5 + 0.3V)
−2.5V to 7.5V
1.923W
52°C/W
7°C/W
260°C
150°C
−65°C to 150°C
2kV
200V
(Note 4)
Supply Input Voltage, VIN ----------------------------------------------------------------------------------- 6V to 25V
Junction Temperature Range ------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range ------------------------------------------------------------------------------- −40°C to 85°C
www.richtek.com
6
DS8205L/M-05 June 2011
RT8205L/M
Electrical Characteristics
(VIN = 12V, VEN = 5V, VENTRIP1 = VENTRIP2 = 2V, No Load, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Input Supply
VIN Standby Current
IVIN_SBY
VIN = 6V to 25V, ENTRIPx = GND
--
200
--
μA
VIN Shutdown Supply
Current
IVIN_SHDN
VIN = 6V to 25V,
ENTRIPx = EN = GND
--
20
40
μA
Quiescent Power
Consumption
PVIN
+PPVCC
Both SMPS On, VFBx = 2.1V,
SKIPSEL = REF, VOUT1 = 5V,
VOUT2 = 3.3V (Note 5)
--
5
7
mW
1.975
2
2.025
--
2
--
--
2.032
--
1.92
2
2.08
V
SMPS1, SMPS2
2
--
5.5
V
VOUTx = 0.5V, VENTRIPx = 0V
10
45
--
mA
VOUT1 = 5.05V (200kHz)
1895
2105
2315
VOUT2 = 3.33V (250kHz)
999
1110
1221
VOUT1 = 5.05V (300kHz)
1227
1403
1579
VOUT2 = 3.33V (375kHz)
647
740
833
VOUT1 = 5.05V (400kHz)
895
1052
1209
VOUT2 = 3.33V (500kHz)
475
555
635
200
300
400
ns
SKIPSEL = VREG5 or VREG3
22
33
--
kHz
--
2
--
ms
9.4
10
10.6
μA
--
4700
--
ppm/°C
VENTRIPx = I ENTRIPx x RENTRIPx
0.515
--
3
V
GND − PHASEx, VENTRIPx = 2V
180
200
220
mV
--
3
--
mV
SMPS Output and FB Voltage
DEM Mode
FBx Voltage
VFBx
PWM Mode
(Note 6)
Ultrasonic Mode
SECFB Voltage
Output Voltage Adjust
Range
VOUTx Discharge
Current
On-Time
VSECFB
VOUTx
TONSEL = GND
On-Time Pulse Width
tON
TONSEL = REF
TONSEL =
VREG5
Minimum Off-Time
Ultrasonic Mode
Frequency
Soft-Start
tOFF
Soft-Start Time
tSSx
Internal Soft-Start
IENTRIPx
VENTRIPx = 0.9V
Current Sense
ENTRIPx Source
Current
ENTRIPx Current
Temperature
Coefficient
ENTRIPx Adjustment
Range
Current Limit
Threshold
Zero-Current
Threshold
FBx = 1.9V
TCIENTRIPx In Comparison with 25°C
GND − PHASEx in DEM
(Note 6)
V
ns
To be continued
DS8205L/M-05 June 2011
www.richtek.com
7
RT8205L/M
Parameter
Symbol
Test Conditions
Min
Typ
Max
4.8
5
5.2
4.75
5
5.25
4.75
5
5.25
VOUT2 = GND, IVREG3 < 100mA
3.2
3.33
3.46
VOUT2 = GND, 6.5V < VIN < 25V,
IVREG3 < 100mA
3.13
3.33
3.5
VOUT2 = GND, 5.5V < VIN < 25V,
IVREG3 < 50mA
3.13
3.33
3.5
Unit
Internal Regulator and Reference
VREG5 Output Voltage
VREG3 Output Voltage
VVREG5
VVREG3
VOUT1 = GND, IVREG5 < 100mA
VOUT1 = GND, 6.5V < VIN < 25V,
IVREG5 < 100mA
VOUT1 = GND, 5.5V < VIN < 25V,
IVREG5 < 50mA
V
V
VREG5 Output Current
IVREG5
VVREG5 = 4.5V, VOUT1 = GND
100
175
250
mA
VREG3 Output Current
IVREG3
VVREG3 = 3V, V OUT2 = GND
100
175
250
mA
VREG5 Switchover
Threshold to VOUT1
VSW5
VOUT1 Rising Edge
4.6
4.75
4.9
VOUT1 Falling Edge
4.3
4.4
4.5
VREG3 Switchover
Threshold to VOUT2
VSW3
VOUT2 Rising Edge
2.975
3.125
3.25
VOUT2 Falling Edge
2.775
2.875
2.975
--
1.5
3
Ω
V
V
VREGx Switchover Equivalent
R SWx
Resistance
REF Output Voltage
V REF
No External Load
1.98
2
2.02
V
REF Load Regulation
0 < ILOAD < 100μA
--
10
--
mV
REF Sink Current
UVLO
REF in Regulation
5
--
--
μA
VREG5 Under Voltage
Lockout Threshold
Rising Edge
--
4.20
4.35
Falling Edge
3.7
3.9
4.1
SMPSx off
--
2.5
--
PGOOD Detect, FBx Falling Edge
Hysteresis, Rising Edge with SS
Delay Time
82
85
88
PGOOD Threshold
--
6
--
PGOOD Propagation Delay
Falling Edge, 50mV Overdrive
--
10
--
μs
PGOOD Leakage Current
High State, Forced to 5.5V
--
--
1
μA
PGOOD Output Low Voltage
ISINK = 4mA
--
--
0.3
V
109
112
116
%
FBx = 2.35V
--
5
--
μs
UVP Detect, FBx Falling Edge
49
52
56
%
From ENTRIPx Enable
--
5
--
ms
VREG3 Under Voltage
Lockout Threshold
Power Good
Fault Detection
Over Voltage Protection Trip
V FB_OVP
Threshold
Over Voltage Protection
Propagation Delay
Under Voltage Protection Trip
V FB_UVP
Threshold
UVP Shutdown Blanking Time tSHDN_UVP
VREGx to VOUTx, 10mA
OVP Detect, FBx Rising Edge
V
V
%
To be continued
www.richtek.com
8
DS8205L/M-05 June 2011
RT8205L/M
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
--
150
--
°C
--
10
--
°C
Low Level (PWM Mode)
--
--
0.8
REF Level (DEM Mode)
1.8
--
2.3
High Level (Ultrasonic Mode)
2.7
--
--
Low Level (SMPS Off)
--
--
0.25
On Level (SMPS On)
0.515
--
3
4.5
--
--
Thermal Shutdown
Thermal Shutdown
TSHDN
Thermal Shutdown
Hysteresis
Logic Input
SKIPSEL Input Voltage
ENTRIPx Input Voltage
V ENTRIPx
High Level (SMPS Off)
EN Threshold
Voltage
Logic-High
VIH
1
--
--
Logic-Low
VIL
--
--
0.4
Floating, Default Enable
2.4
3.3
4.2
VEN = 0.2V, Source
1.5
3
5
VEN = 5V, Sink
--
3
8
VOUT1 / VOUT2 = 200kHz / 250kHz
--
--
0.8
VOUT1 / VOUT2 = 300kHz / 375kHz
1.8
--
2.3
VOUT1 / VOUT2 = 400kHz / 500kHz
2.7
--
--
VTONSEL, VSKIPSEL = 0V or 5V
−1
--
1
VSECFB = 0V or 5V
−1
--
1
VREG5 to BOOTx, 10mA
--
40
80
--
4
8
--
1.5
4
LGATEx, High State
--
4
8
LGATEx, Low State
--
1.5
4
LGATEx Rising
--
30
--
UGATEx Rising
--
40
--
EN Voltage
VEN
EN Current
IEN
TONSEL Setting Voltage
Input Leakage Current
V
V
V
V
μA
V
μA
Internal BOOT Switch
Internal Boost Switch
On-Resistance
Ω
Power MOSFET Drivers
UGATEx On-Resistance
LGATEx On-Resistance
Dead Time
DS8205L/M-05 June 2011
UGATEx, High State,
BOOTx to PHASEx Forced to 5V
UGATEx, Low State,
BOOTx to PHASEx Forced to 5V
Ω
Ω
ns
www.richtek.com
9
RT8205L/M
Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θJA is measured in natural convection at TA = 25°C on a high effective four layers thermal conductivity four-layer test
board of JEDEC 51-7 thermal measurement standard. The measurement case position of θJC is on the exposed pad
of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. PVIN + PVREG5
Note 6. Guaranteed by Design.
www.richtek.com
10
DS8205L/M-05 June 2011
RT8205L/M
Typical Operating Characteristics
VOUT1 Efficiency vs. Load Current
VOUT1 Efficiency vs. Load Current
100
100
DEM Mode
90
90
80
70
Efficiency (%)
Efficiency (%)
80
60
DEM Mode
PWM Mode
Ultrasonic Mode
50
40
30
20
70
PWM Mode
60
Ultrasonic Mode
50
40
30
20
10
0
0.001
VIN = 8V, TONSEL = GND, VENTRIP1 = 1.5V,
ENTRIP2 = GND, EN = FLOATING
0.01
0.1
1
VIN = 12V, TONSEL = GND,
VENTRIP1 = 1.5V, ENTRIP2 = GND,
EN = FLOATING
10
0
0.001
10
0.01
0.1
Load Current (A)
100
90
80
70
Efficiency (%)
Efficiency (%)
90
DEM Mode
80
60
PWM Mode
50
Ultrasonic Mode
30
20
0
0.001
0.01
0.1
1
DEM Mode
70
60
PWM Mode
50
40
Ultrasonic Mode
30
20
VIN = 20V, TONSEL = GND,
VENTRIP1 = 1.5V, ENTRIP2 = GND,
EN = FLOATING
10
VIN = 8V, TONSEL = GND,
ENTRIP1 = GND, VENTRIP2 = 1.5V,
EN = FLOATING
10
0
0.001
10
0.01
0.1
90
90
80
80
DEM Mode
Efficiency (%)
Efficiency (%)
100
60
PWM Mode
40
30
Ultrasonic Mode
20
VIN = 12V, TONSEL = GND,
ENTRIP1 = GND, VENTRIP2 = 1.5V,
EN = FLOATING
10
0
0.001
0.01
0.1
Load Current (A)
DS8205L/M-05 June 2011
10
VOUT2 Efficiency vs. Load Current
VOUT2 Efficiency vs. Load Current
100
50
1
Load Current (A)
Load Current (A)
70
10
VOUT2 Efficiency vs. Load Current
VOUT1 Efficiency vs. Load Current
100
40
1
Load Current (A)
1
10
70
DEM Mode
60
50
40
Ultrasonic
Mode
PWM Mode
30
20
VIN = 20V, TONSEL = GND,
ENTRIP1 = GND, VENTRIP2 = 1.5V,
EN = FLOATING
10
0
0.001
0.01
0.1
1
10
Load Current (A)
www.richtek.com
11
RT8205L/M
VOUT1 Switching Frequency vs. Load Current
VOUT1 Switching Frequency vs. Load Current
220
220
Switching Frequency (kHz)1
200
180
160
140
120
100
80
VIN = 8V,
TONSEL = GND,
EN = FLOATING,
VENTRIP1 = 1.5V,
ENTRIP2 = GND
60
40
20
Ultrasonic Mode
DEM Mode
0
0.001
0.01
0.1
1
Switching Frequency (kHz)1
PWM Mode
10
180
160
140
120
100
80
VIN = 20V,
TONSEL = GND,
EN = FLOATING,
VENTRIP1 = 1.5V,
ENTRIP2 = GND
20
DEM Mode
0
0.001
0.01
0.1
1
Switching Frequency (kHz)1
Switching Frequency (kHz)1
PWM Mode
Ultrasonic Mode
10
Load Current (A)
Load Current (A)
www.richtek.com
12
120
100
80
VIN = 12V,
TONSEL = GND,
EN = FLOATING,
VENTRIP1 = 1.5V,
ENTRIP2 = GND
60
40
Ultrasonic Mode
20
0.1
1
10
280
PWM Mode
260
240
220
200
180
160
140
120
100
80
60
Ultrasonic Mode
40
20
DEM Mode
0
0.001
0.01
VIN = 8V,
TONSEL = GND,
EN = FLOATING,
ENTRIP1 = GND,
VENTRIP2 = 1.5V
0.1
1
10
1
VOUT2 Switching Frequency vs. Load Current
Switching Frequency (kHz) 1
Switching Frequency (kHz) 1
VIN = 12V,
TONSEL = GND,
EN = FLOATING,
ENTRIP1 = GND,
VENTRIP2 = 1.5V
0.1
140
Load Current (A)
VOUT2 Switching Frequency vs. Load Current
280
260
PWM Mode
240
220
200
180
160
140
120
100
80
60
Ultrasonic Mode
40
20
DEM Mode
0
0.001
0.01
160
VOUT2 Switching Frequency vs. Load Current
220
40
180
Load Current (A)
VOUT1 Switching Frequency vs. Load Current
60
PWM Mode
DEM Mode
0
0.001
0.01
Load Current (A)
200
200
10
280
260
PWM Mode
240
220
200
180
160
140
120
100
80
60
Ultrasonic Mode
40
20
DEM Mode
0
0.001
0.01
VIN = 20V,
TONSEL = GND,
EN = FLOATING,
ENTRIP1 = GND,
VENTRIP2 = 1.5V
0.1
1
10
Load Current (A)
DS8205L/M-05 June 2011
RT8205L/M
VOUT2 Output Voltage vs. Load Current
3.446
VIN = 12V,
TONSEL = GND,
EN = FLOATING,
VENTRIP1 = 1.5V,
ENTRIP2 = GND
Ultrasonic Mode
3.440
PWM Mode
3.428
3.422
3.416
3.410
PWM Mode
3.404
3.398
3.392
DEM Mode
3.386
DEM Mode
0.01
0.1
1
3.380
0.001
10
0.01
0.1
Load Current (A)
10
VREG3 Output Voltage vs. Output Current
VREG5 Output Voltage vs. Output Current
3.358
5.002
3.354
4.998
Output Voltage (V)
Output Voltage (V)
1
Load Current (A)
5.006
4.994
4.990
4.986
4.982
4.978
4.970
0
10
20
30
40
50
60
70
80
90
3.350
3.346
3.342
3.338
3.334
VIN = 12V, ENTRIP1 = ENTRIP2 = GND,
EN = FLOATING, TONSEL = GND
4.974
VIN = 12V, ENTRIP1 = ENTRIP2 = GND,
EN = FLOATING, TONSEL = GND
3.330
100
0
10
20
Output Current (mA)
30
40
50
60
70
Output Current (mA)
Reference Voltage vs. Output Current
Battery Current vs. Input Voltage
100.0
2.0080
PWM Mode
2.0072
2.0064
Battery Current (mA)
Reference Voltage (V)
VIN = 12V,
TONSEL = GND,
EN = FLOATING,
ENTRIP2 = GND,
VENTRIP1 = 1.5V
Ultrasonic Mode
3.434
Output Voltage (V)
Output Voltage (V)
VOUT1 Output Voltage vs. Load Current
5.090
5.084
5.078
5.072
5.066
5.060
5.054
5.048
5.042
5.036
5.030
5.024
5.018
5.012
5.006
5.000
0.001
2.0056
2.0048
2.0040
2.0032
2.0024
10.0
Ultrasonic Mode
1.0
DEM Mode
2.0016
VIN = 12V, ENTRIP1 = ENTRIP2 = GND,
EN = FLOATING, TONSEL = GND
2.0008
2.0000
-10
0
10
20
30
40
50
60
Output Current (μA)
DS8205L/M-05 June 2011
70
80
90 100
0.1
VENTRIP1 = VENTRIP2 = 0.91V,
TONSEL = GND, EN = FLOATING
6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
Input Voltage (V)
www.richtek.com
13
RT8205L/M
Standby Input Current vs. Input Voltage
Shutdown Input Current vs. Input Voltage
22
249
248
247
246
245
244
243
242
ENTRIP1 = ENTRIP2 = GND,
EN = FLOATING, No Load
241
240
Shutdown Input Current (μA)1
Standby Input Current (μA)1
250
20
18
16
14
12
10
ENTRIP1 = ENTRIP2 = EN = GND, No Load
8
7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
7
9
11
13
15
17
19
21
23
Input Voltage (V)
Input Voltage (V)
Reference Voltage vs. Temperature
VREG5, VREG3 and REF Start Up
2.011
25
ENTRIP1 = ENTRIP2 = GND, EN = FLOATING
Reference Voltage (V)
2.008
VREG5
(5V/Div)
2.005
2.002
1.999
VREG3
(2V/Div)
1.996
1.993
1.990
VIN = 12V, ENTRIP1 = ENTRIP2 = GND,
EN = FLOATING, TONSEL = GND
1.987
1.984
-50
-25
0
25
50
75
100
REF
(2V/Div)
EN
(5V/Div)
VIN = 12V, TONSEL = GND, No Load
Time (400μs/Div)
125
Temperature (°C)
VOUT1 Start Up
VOUT1
(1V/Div)
PGOOD
(5V/Div)
ENTRIP1
(1V/Div)
VOUT2
(1V/Div)
PGOOD
(5V/Div)
VENTRIP1 = 1.5V, ENTRIP2 = GND,
EN = FLOATING, VIN = 12V,
TONSEL = GND, SKIPSEL = GND,
No Load
Time (1ms/Div)
www.richtek.com
14
VOUT2 Start Up
ENTRIP2
(1V/Div)
ENTRIP1 = GND, VENTRIP2 = 1.5V,
EN = FLOATING, VIN = 12V,
TONSEL = GND, SKIPSEL = GND,
No Load
Time (1ms/Div)
DS8205L/M-05 June 2011
RT8205L/M
VOUT1 Delay-Start
CP Start Up
VOUT1
(5V/Div)
CP
(10V/Div)
UGATE
(20V/Div)
LGATE
(10V/Div)
VENTRIP1 = VENTRIP2 = 1.5V, EN = FLOATING,
VIN = 12V, TONSEL = GND, SKIPSEL = REF,
No Load
VOUT1
(2V/Div)
VOUT2
(1V/Div)
ENTRIP1
(2V/Div)
ENTRIP2
(2V/Div)
VIN = 12V, TONSEL = GND,
EN = FLOATING, SKIPSEL = GND,
No Load
Time (2ms/Div)
Time (2ms/Div)
VOUT2 Delay-Start
Power Off from ENTRIP1
VIN = 12V, TONSEL = GND,
SKIPSEL = GND,
EN = FLOATING
VOUT1
(2V/Div)
PGOOD
(5V/Div)
ENTRIP1
(2V/Div)
VOUT1
(2V/Div)
VOUT2
(1V/Div)
ENTRIP1
(2V/Div)
ENTRIP2
(2V/Div)
VIN = 12V, TONSEL = GND,
EN = FLOATING, SKIPSEL = GND,
No Load
LGATE1
(5V/Div)
Time (2ms/Div)
Power Off from ENTRIP2
No Load on VOUT1, VOUT2,
VREG5, VREG3 and REF
Time (4ms/Div)
VOUT1 PWM-Mode Load Transient Response
VOUT1_ac
(50mV/Div)
VOUT2
(2V/Div)
PGOOD
(5V/Div)
ENTRIP2
(2V/Div)
LGATE2
(5V/Div)
Inductor
Current
(5A/Div)
UGATE1
(20V/Div)
VIN = 12V, TONSEL = GND, SKIPSEL = GND,
EN = FLOATING, No Load on VOUT1, VOUT2,
VREG5, VREG3 and REF
Time (4ms/Div)
DS8205L/M-05 June 2011
LGATE1
(5V/Div)
VIN = 12V, TONSEL = GND, SKIPSEL = GND
EN = FLOATING, IOUT1 = 0A to 6A
Time (20μs/Div)
www.richtek.com
15
RT8205L/M
OVP
VOUT2 PWM-Mode Load Transient Response
VOUT2_ac
(50mV/Div)
Inductor
Current
(5A/Div)
UGATE
(20V/Div)
LGATE
(5V/Div)
VOUT1
(2V/Div)
VIN = 12V, TONSEL = GND, SKIPSEL = GND
EN = FLOATING, IOUT2 = 0A to 6A
Time (20μs/Div)
VOUT2
(2V/Div)
PGOOD
(5V/Div)
VIN = 12V, TONSEL = GND, SKIPSEL = REF,
EN = FLOATING, No Load
Time (4ms/Div)
UVP
VOUT1
(2V/Div)
PGOOD
(5V/Div)
UGATE
(20V/Div)
VIN = 12V,
TONSEL = GND,
SKIPSEL = GND,
EN = FLOATING,
No Load
LGATE
(5V/Div)
Time (100μs/Div)
www.richtek.com
16
DS8205L/M-05 June 2011
RT8205L/M
Application Information
The RT8205L/M is a dual, Mach ResponseTM DRVTM dual
ramp valley mode synchronous buck controller. The
controller is designed for low-voltage power supplies for
notebook computers. Richtek's Mach Response TM
technology is specifically designed for providing 100ns
“instant-on” response to load steps while maintaining a
relatively constant operating frequency and inductor
operating point over a wide range of input voltages. The
topology circumvents the poor load-transient timing
problems of fixed-frequency current-mode PWMs while
avoiding the problems caused by widely varying switching
frequencies in conventional constant-on-time and constantoff-time PWM schemes. The DRV TM mode PWM
modulator is specifically designed to have better noise
immunity for such a dual output application. The RT8205L/
M includes 5V (VREG5) and 3.3V (VREG3) linear
regulators. VREG5 linear regulator can step down the
battery voltage to supply both internal circuitry and gate
drivers. The synchronous-switch gate drivers are directly
powered from VREG5. When VOUT1 voltage is above
4.66V, an automatic circuit will switch the power of the
device from VREG5 linear regulator to VOUT1.
PWM Operation
The Mach ResponseTM DRVTM mode controller relies on
the output filter capacitor's Effective Series Resistance
(ESR) to act as a current-sense resistor, so the output
ripple voltage provides the PWM ramp signal. Referring to
the RT8205L/M's function block diagram, the synchronous
high side MOSFET will be turned on at the beginning of
each cycle. After the internal one-shot timer expires, the
MOSFET will be turned off. The pulse width of this one
shot is determined by the converter's input voltage and
the output voltage to keep the frequency fairly constant
over the input voltage range. Another one-shot sets a
minimum off-time (300ns typ.). The on-time one-shot will
be triggered if the error comparator is high, the low side
switch current is below the current limit threshold, and
the minimum off-time one-shot has timed out.
PWM Frequency and On-Time Control
The Mach ResponseTM control architecture runs with
pseudo constant frequency by feed forwarding the input
DS8205L/M-05 June 2011
and output voltage into the on-time one shot timer. The
high side switch on-time is inversely proportional to the
input voltage as measured by VIN, and proportional to the
output voltage. There are two benefits of a constant
switching frequency. First, the frequency can be selected
to avoid noise-sensitive regions such as the 455kHz IF
band. Second, the inductor ripple-current operating point
remains relatively constant, resulting in easy design
methodology and predictable output voltage ripple.
Frequency for the 3V SMPS is set at 1.25 times higher
than the frequency for 5V SMPS. This is done to prevent
audio frequency “beating” between the two sides, which
switches asynchronously for each side. The frequencies
are set by the TONSEL pin connection as shown in Table
1. The on-time is given by :
t ON = K × (VOUT / VIN )
where “K” is set by the TONSEL pin connection (Table
1).
The on-time guaranteed in the Electrical Characteristics
table is influenced by switching delays in the external
high side power MOSFET. Two external factors that
influence switching frequency accuracy are resistive drops
in the two conduction loops (including inductor and PC
board resistance) and the dead time effect. These effects
are the largest contributors to the change frequency with
changing load current. The dead time effect increases the
effective on-time by reducing the switching frequency. It
occurs only in PWM mode (SKIPSEL = GND) when the
inductor current reverses at light or negative load currents.
With reversed inductor current, the inductor's EMF causes
PHASEx to go high earlier than normal, thus extending
the on-time by a period equal to the low-to-high dead time.
For loads above the critical conduction point, the actual
switching frequency is :
f = (VOUT + VDROP1) / (t ON × (VIN + VDROP1 − VDROP2 ))
where VDROP1 is the sum of the parasitic voltage drops in
the inductor discharge path, which includes the
synchronous rectifier, inductor, and PC board resistances.
VDROP2 is the sum of the resistances in the charging path;
and tON is the on-time.
www.richtek.com
17
RT8205L/M
TONSEL
Table 1. TONSEL Connection and Switching Frequency
SMPS 1
SMPS 1
SMPS 2
SMPS 2
K-Factor (μs)
Frequency (kHz)
K-Factor (μs)
Frequency (kHz)
Approximate K-Factor
Error (%)
GND
5
200
4
250
±10
REF
3.33
300
2.67
375
±10
VREG5 or
VREG3
2.5
400
2
500
±10
Operation Mode Selection (SKIPSEL)
The RT8205L/M supports three operation modes: DiodeEmulation Mode, Ultrasonic Mode, and Forced-CCM
Mode. User can set operation mode via the SKIPSEL pin.
Diode-Emulation Mode (SKIPSEL = REF)
In Diode-Emulation Mode, the RT8205L/M automatically
reduces switching frequency at light load conditions to
maintain high efficiency. This reduction of frequency is
achieved smoothly. As the output current decreases from
heavy load condition, the inductor current is also reduced
and eventually comes to the point when its valley touches
zero current, which is the boundary between continuous
conduction and discontinuous conduction modes. By
emulating the behavior of diodes, the low side MOSFET
allows only partial negative current when the inductor free
wheeling current becomes negative. As the load current
is further decreased, it takes longer and longer to discharge
the output capacitor to the level that requires the next
“ON” cycle. The on-time is kept the same as that in the
heavy-load condition. In reverse, when the output current
increases from light load to heavy load, the switching
frequency increases to the preset value as the inductor
current reaches the continuous conduction. The transition
load point to the light load operation as follows (Figure 1) :
IL
Slope = (VIN -VOUT) / L
IL, PEAK
ILoad = IL, PEAK / 2
ILOAD(SKIP) ≈
(VIN − VOUT )
× t ON
2L
where tON is the On-time.
The switching waveforms may appear noisy and
asynchronous when light loading causes Diode-Emulation
Mode operation. However, this is normal and results in
high efficiency. Trade offs in PFM noise vs. light load
efficiency is made by varying the inductor value. Generally,
low inductor values produce a broader efficiency vs. load
curve, while higher values result in higher full load efficiency
(assuming that the coil resistance remains fixed) and less
output voltage ripple. Penalties for using higher inductor
values include larger physical size and degraded load
transient response (especially at low input voltage levels).
Ultrasonic Mode (SKIPSEL = VREG5 or VREG3)
The RT8205L/M activates an unique Diode-Emulation Mode
with a minimum switching frequency of 25kHz, called the
Ultrasonic Mode. The Ultrasonic Mode avoids audiofrequency modulation that would otherwise be present
when a lightly loaded controller automatically skips
pulses. In Ultrasonic Mode, the high side switch gate driver
signal is ORed with an internal oscillator (>25kHz). Once
the internal oscillator is triggered, the controller enters
constant off-time control. When output voltage reaches
the setting peak threshold, the controller turns on the low
side MOSFET until the controller detects that the inductor
current has dropped below the zero crossing threshold.
The internal circuitry provides a constant off-time control,
and it is effective to regulate the output voltage under light
load condition.
Forced CCM Mode (SKIPSEL = GND)
0
tON
t
Figure 1. Boundary Condition of CCM/DEM
www.richtek.com
18
The low noise, Forced CCM mode (SKIPSEL = GND)
disables the zero crossing comparator, which controls
the low side switch on-time. This causes the low side
DS8205L/M-05 June 2011
RT8205L/M
gate driver waveform to become the complement of the
high side gate driver waveform. This in turn causes the
inductor current to reverse at light loads as the PWM loop
to maintain a duty ratio of VOUT/VIN. The benefit of forced
CCM mode is to keep the switching frequency fairly
constant, but it comes at a cost. The no-load battery
current can be from 10mA to 40mA, depending on the
external MOSFETs.
Therefore, the exact current limit characteristic and
maximum load capability are functions of the sense
resistance, inductor value, and battery and output voltage.
IL
IL, peak
ILoad
ILIM
Reference and Linear Regulators (REF, VREGx)
The 2V reference (REF) is accurate within ±1% over the
entire operating temperature range, making REF useful
as a precision system reference. Bypass REF to GND
with a minimum 0.22μF ceramic capacitor. REF can supply
up to 100μA for external loads. Loading REF reduces the
VOUTx output voltage slightly because of the reference
load regulation error.
The RT8205L/M includes 5V (VREG5) and 3.3V (VREG3)
linear regulators. The VREG5 regulator supplies a total of
100mA for internal and external loads, including the
MOSFET gate driver and PWM controller. The VREG3
regulator supplies up to 100mA for external loads. Bypass
VREG5 and VREG3 with a minimum 4.7μF ceramic
capacitor.
When the 5V main output voltage is above the VREG5
switchover threshold (4.75V), an internal 1.5Ω P- MOSFET
switch connects VOUT1 to VREG5, while simultaneously
shutting down the VREG5 linear regulator. Similarly, when
the 3.3V main output voltage is above the VREG3
switchover threshold (3.125V), an internal 1.5Ω
P-MOSFET switch connects VOUT2 to VREG3, while
simultaneously shutting down the VREG3 linear regulator.
It can decrease the power dissipation from the same
battery, because the converted efficiency of SMPS is
better than the converted efficiency of the linear regulator.
0
t
Figure 2. “ Valley” Current Limit
The RT8205L/M uses the on resistance of the synchronous
rectifier as the current sense element and supports
temperature compensated MOSFET RDS(ON) sensing. The
RILIMx resistor between the ENTRIPx pin and GND sets
the current limit threshold. The resistor RILIMx is connected
to a current source from ENTRIPx, which is typically10μA
at room temperature. The current source has a 4700ppm/
°C temperature slope to compensate the temperature
dependency of the RDS(ON). When the voltage drop across
the sense resistor or low side MOSFET equals 1/10 the
voltage across the RILIMx resistor, positive current limit
will be activated. The high side MOSFET will not be turned
on until the voltage drop across the MOSFET falls below
1/10 the voltage across the RILIMx resistor.
Choose a current limit resistor by following equation :
VILIMx = (RILIMx × 10μ A)/10 = IILIMx × RDS(ON)
RILIMx = (IILIMx × RDS(ON) ) × 10 / 10μ A
Carefully observe the PC board layout guidelines to
ensures that noise and DC errors do not corrupt the current
sense signal at PHASEx and GND. Mount or place the IC
close to the low side MOSFET.
Current Limit Setting (ENTRIPx)
Charge Pump (SECFB)
The RT8205L/M has a cycle-by-cycle current limit control.
The current limit circuit employs an unique “Valley” current
sensing algorithm. If the magnitude of the current sense
signal at PHASEx is above the current limit threshold,
the PWM is not allowed to initiate a new cycle (Figure 2).
The actual peak current is greater than the current limit
threshold by an amount equal to the inductor ripple current.
The external 14V charge pump is driven by LGATEx (Figure
3). When LGATEx is low, C1 will be charged by D1 from
VOUT1. C1 voltage is equal to VOUT1 minus a diode drop.
When LGATEx transitions to high, the charges from C1
will transfer to C2 through D2 and charge it to VLGATEX plus
VC1. As LGATEx transitions low on the next cycle, C2
will charge C3 to its voltage minus a diode drop through
DS8205L/M-05 June 2011
www.richtek.com
19
RT8205L/M
D3. Finally, C3 charges C4 through D4 when LGATEx
switches to high. So, VCP voltage is :
VCP = VOUT1+ 2 × VLGATEX − 4 × VD
where VLGATEX is the peak voltage of LGATEx driver and is
equal to the VREG5; VD is the forward diode dropped
across the Schottky.
SECFB in the RT8205M is used to monitor the charge
pump through the resistive divider (Figure 3) to generate
approximately 14V DC voltage and the clock driver uses
VOUT1 as its power supply. In the event when SECFB
drops below its feedback threshold, an ultrasonic pulse
will occur to refresh the charge pump driven by LGATEx.
In the event of an overload on charge pump where SECFB
can not reach more than its feedback threshold, the
controller will enter the ultrasonic mode. Special care
The low side driver is designed to drive high current, low
RDS(ON) N-MOSFET(s). The internal pull down transistor
that drives LGATEx low is robust, with a 1.5Ω typical on
resistance. A 5V bias voltage is delivered from the VREG5
supply. The instantaneous drive current is supplied by an
input capacitor connected between VREG5 and GND.
For high current applications, some combinations of high
and low side MOSFETs might be encountered that will
cause excessive gate drain coupling, which can lead to
efficiency killing, EMI producing shoot through currents.
This can be remedied by adding a resistor in series with
BOOTx, which increases the turn-on time of the high side
MOSFET without degrading the turn-off time (Figure 4).
VIN
BOOTx
should be taken to ensure enough normal ripple voltage
on each cycle as to prevent charge pump shutdown.
Reducing the charge pump decoupling capacitor and
placing a small ceramic capacitor (47 pF to 220pF) (CF of
Figure 3) in parallel with the upper leg of the SECFB
resistor feedback network (RCP1 of Figure 3) will also
increase the robustness of the charge pump.
RBOOT
UGATEx
PHASEx
Figure 4. Reducing the UGATEx Rise Time
Soft-Start
SECFB
RCP2
LGATE1
CF
C3
C1
D2
D1
D3
RCP1
D4
C2
CP
C4
VOUT1
Figure 3. Charge Pump Circuit Connected to SECFB
MOSFET Gate Driver (UGATEx, LGATEx)
The high side driver is designed to drive high current, low
RDS(ON) N-MOSFET(s). When configured as a floating driver,
a 5V bias voltage is delivered from the VREG5 supply.
The average drive current is calculated by the gate charge
at V GS = 5V times the switching frequency. The
instantaneous drive current is supplied by the flying
capacitor between the BOOTx and PHASEx pins. A dead
time to prevent shoot through is internally generated
between the high side MOSFET off to, the low side
MOSFET on, and the low side MOSFET off to the high
side MOSFET on.
www.richtek.com
20
The RT8205L/M provides internal soft-start function to
prevent large inrush current and output voltage overshoot
when the converter starts up. The soft-start (SS)
automatically begins once the chip is enabled. During softstart, the voltage is clamped to the ramping of internal
reference voltage which is compared with FBx signal. The
typical soft-start duration is 2ms. An unique PWM duty
limit control that prevents output over voltage during softstart period is designed specifically for FBx floating.
UVLO Protection
The RT8205L/M features VREG5 under voltage lockout
protection (UVLO). When the VREG5 voltage is lower than
3.9V (typ.) and the VREG3 voltage is lower than 2.5V
(typ.), both switch power supplies are shut off. This is
non-latch protection.
Power Good Output (PGOOD)
PGOOD is an open-drain type output and requires a pullup resistor. PGOOD is actively held low in soft-start,
DS8205L/M-05 June 2011
RT8205L/M
standby, and shutdown. It is released when both output
voltages are above 91% of the nominal regulation point.
The PGOOD goes low if either output turns off or is 15%
below its nominal regulator point.
supplied from VOUTx, while the input voltage on VIN and
the drawing current from VREGx are too high. Even if
VREGx is supplied from VOUTx, large power dissipation
on automatic switches caused by overloading VREGx,
which may also result in thermal shutdown.
Output Over Voltage Protection (OVP)
The output voltage can be continuously monitored for over
voltage. If the output voltage exceeds 12% of its set voltage
threshold, the over voltage protection is triggered and the
LGATEx low side gate drivers are forced high. This
activates the low side MOSFET switch, which rapidly
discharges the output capacitor and pulls the input voltage
downward.
The RT8205L/M is latched once OVP is triggered and can
only be released by toggling EN, ENTRIPx or cycling VIN.
There is a 5μs delay built into the over voltage protection
circuit to prevent false alarm.
Note that the latching LGATEx high causes the output
voltage to dip slightly negative when energy has been
previously stored in the LC tank circuit. For loads that
cannot tolerate a negative voltage, place a power Schottky
diode across the output to act as a reverse polarity clamp.
If the over voltage condition is caused by a short in the
high side switch, completely turning on the low side
MOSFET can create an electrical short between the
battery and GND, which will blow the fuse and disconnect
the battery from the output.
Output Under Voltage Protection (UVP)
The output voltage can be continuously monitored for under
voltage protection. If the output is less than 52% of its set
voltage threshold, under voltage protection will be triggered,
and then both UGATEx and LGATEx gate drivers will be
forced low. The UVP will be ignored for at least 5ms (typ.)
after start up or a rising edge on ENTRIPx. Toggle ENTRIPx
or cycle VIN to reset the UVP fault latch and restart the
controller.
Thermal Protection
The RT8205L/M features thermal shutdown protection to
prevent overheat damage to the device. Thermal shutdown
occurs when the die temperature exceeds 150°C. All
internal circuitry is inactive during thermal shutdown. The
RT8205L/M triggers thermal shutdown if VREGx is not
DS8205L/M-05 June 2011
Discharge Mode (Soft-Discharge)
When ENTRIPx is low and a transition to standby or
shutdown mode occurs, or the output under voltage fault
latch is set, the output discharge mode will be triggered.
During discharge mode, the output capacitors' residual
charge will be discharge to GND through an internal switch.
Shutdown Mode
The RT8205L/M SMPS1, SMPS2, VREG3 and VREG5
have independent enabling control. Drive EN, ENTRIP1
and ENTRIP2 below the precise input falling edge trip level
to place the RT8205L/M in its low power shutdown state.
The RT8205L/M consumes only 20μA of input current while
in shutdown. When shutdown mode is activated, the
reference turns off. The accurate 0.4V falling edge threshold
on the EN pin can be used to detect a specific analog
voltage level as well as to shutdown the device. Once in
shutdown, the 1V rising edge threshold activates, providing
sufficient hysteresis for most applications.
Power Up Sequencing and On/Off Controls
(ENTRIPx)
ENTRIP1 and ENTRIP2 control the SMPS power up
sequencing. When the RT8205L/M is in single channel
mode, ENTRIP1 or ENTRIP2 enables the respective
outputs when ENTRIPx voltage rises above 0.515V.
Since current source form ENTRIPx has 4700ppm/°C
temperature slope, please make sure that ENTRIPx voltage
is high enough to enable the respective output in low
temperature application.
If ENTRIPx pin becomes higher than the enable threshold
voltage while another channel is starting up, soft-start is
postponed until the other channel's soft-start has
completed. If both ENTRIP1 and ENTRIP2 become higher
than the enable threshold voltage simultaneously (within
60μs), both channels will be start up simultaneously. The
timing diagrams of the power sequence is shown below
(Figure 5).
www.richtek.com
21
RT8205L/M
> 60µs
< 60µs
VENTRIPx
0.515V
VENTRIPx
0.515V
VENTRIPy
VENTRIPy
VOUTx
VOUTx
VOUTy
VOUTy
0.515V
(a). Start-Up at the Same Time
0.515V
≈2ms
(b). Delay Start Mode
Figure 5. Time Diagrams of Power Sequence
Table 2. Operation Mode Truth Table
Mode
Power UP
Condition
VREGX < UVLO threshold
EN = high, VOUT1 or VOUT2
enabled
Over Voltage Either output > 111% of the nominal
Protection level.
Under
Either output < 52% of the nominal
Voltage
level after 3ms time out expires and
Protection output is enabled
RUN
Comment
Transitions to discharge mode after a VIN POR and after
REF becomes valid. VREG5, VREG3, and REF remain
active.
Normal Operation.
LGATEx is forced high. VREG3, VREG5 and REF active.
Exited by VIN POR or by toggling EN, ENTRIPx
Both UGATEx and LGATEx are forced low and enter
discharge mode. VREG3, VREG5 and REF are active.
Exited by VIN POR or by toggling EN, ENTRIPx
Either SMPS output is still high in
either standby mode or shutdown
mode
ENTRIPx < startup threshold,
EN = high.
During discharge mode, there is one path to discharge the
outputs capacitor residual charge. That is output capacitor
discharge to GND through an internal switch.
Shutdown
EN = low
All circuitry off.
Thermal
Shutdown
TJ > 150°C
All circuitry off. Exit by VIN POR or by toggling EN, ENTRIPx
Discharge
Standby
www.richtek.com
22
VREG3, VREG5 and REF are active.
DS8205L/M-05 June 2011
RT8205L/M
Table 3. Power Up Sequencing
EN
(V)
ENTRIP1
ENTRIP2
REF
VREG5
VREG3
SMPS1
SMPS2
Low
X
X
Off
Off
Off
Off
Off
X
X
On
On
On
Off
Off
Off
Off
On
On
On
Off
Off
“>1V”
=> High
Off
On
On
On
On
Off
On
“>1V”
=> High
On
(after
ENTRIP2 is
On without
60μs)
On
On
On
On
On
(after SMPS2
is on)
On
“>1V”
=> High
On
Off
On
On
On
On
Off
“>1V”
=> High
On
On
(after ENTRIP1
is On without
60μs)
On
On
On
On
On
(after SMPS1
is on)
“>1V”
=> High
On
On
On
On
On
On
On
“>1V”
=> High
“>1V”
=> High
Output Voltage Setting (FBx)
Output Inductor Selection
Connect a resistor voltage divider at the FBx pin between
VOUTx and GND to adjust the respective output voltage
between 2V and 5.5V (Figure 6). Refering to Figure 5 as
an example, choose R2 to be approximately 10kΩ, and
solve for R1 using the equation :
The switching frequency (on-time) and operating point (%
ripple or LIR) determine the inductor value as shown in
the following equation :
⎛ ⎛ R1 ⎞ ⎞
VOUTx = VFBX × ⎜ 1+ ⎜
⎟⎟
⎝ ⎝ R2 ⎠ ⎠
VIN
VOUTx
UGATEx
PHASEx
VOUTx
FBx
R1
R2
Figure 6. Setting VOUTx with resistor divider
DS8205L/M-05 June 2011
tON × (VIN − VOUTx )
LIR × ILOAD(MAX)
where LIR is the ratio of the peak to peak ripple current to
the average inductor current.
where VFBX is 2V.
LGATEx
L=
Find a low loss inductor having the lowest possible DC
resistance that fits in the allotted dimensions. Ferrite cores
are often the best choice, although powdered iron is
inexpensive and can work well at 200kHz. The core must
be large enough not to saturate at the peak inductor current
(IPEAK) :
IPEAK = ILOAD(MAX) + ⎡⎣(LIR / 2) × ILOAD(MAX) ⎤⎦
The calculation above shall serve as a general reference.
To further improve the transient response, the output
inductance can be reduced even further. This needs to be
considered along with the selection of the output capacitor.
www.richtek.com
23
RT8205L/M
The capacitor value and ESR determine the amount of
output voltage ripple and load transient response. Thus,
the capacitor value must be greater than the largest value
calculated from below equations :
V
(ΔILOAD )2 × L × (K OUTx + t OFF(MIN) )
VIN
VSAG =
⎡ ⎛ V − VOUTx ⎞
⎤
2 × COUT × VOUTx × ⎢K ⎜ IN
⎟ − t OFF(MIN) ⎥
VIN
⎠
⎣ ⎝
⎦
VSOAR =
The maximum power dissipation depends on the operating
ambient temperature for fixed T J (MAX) and thermal
resistance, θJA. For the RT8205L/M package, the derating
curve in Figure 7 allows the designer to see the effect of
rising ambient temperature on the maximum power
dissipation.
2.0
Maximum Power Dissipation (W)1
Output Capacitor Selection
2
(ΔILOAD ) × L
2 × COUT × VOUTx
⎛
⎞
1
VP−P = LIR × ILOAD(MAX) × ⎜ ESR +
⎟
8 × COUT × f ⎠
⎝
where VSAG and VSOAR are the allowable amount of
undershoot voltage and overshoot voltage in the load
transient, Vp-p is the output ripple voltage, tOFF(MIN) is the
minimum off-time, and K is a factor listed in from Table 1.
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications of
the RT8205L/M, the maximum junction temperature is
125°C and TA is the ambient temperature. The junction to
ambient thermal resistance, θJA, is layout dependent. For
WQFN-24L 4x4 packages, the thermal resistance, θJA, is
52°C/W on a standard JEDEC 51-7 four-layer thermal test
board. The maximum power dissipation at TA = 25°C can
be calculated by the following formula :
PD(MAX) = (125°C − 25°C) / (52°C/W) = 1.923W for
WQFN-24L 4x4 package
www.richtek.com
24
1.6
1.2
0.8
0.4
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 7. Derating Curve for the RT8205L/M Package
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
Four-Layer PCB
Layout Considerations
Layout is very important in high frequency switching
converter designs, the PCB could radiate excessive noise
and contribute to the converter instability with improper
layout. Certain points must be considered before starting
a layout using the RT8205L/M.
`
Place the filter capacitor close to the IC, within 12 mm
(0.5 inch) if possible.
`
Keep current limit setting network as close as possible
to the IC. Routing of the network should avoid coupling
to high voltage switching node.
`
Connections from the drivers to the respective gate of
the high side or the low side MOSFET should be as
short as possible to reduce stray inductance. Use 0.65
mm (25 mils) or wider trace.
`
All sensitive analog traces and components such as
VOUTx, FBX, GND, ENTRIPx, PGOOD, and TONSEL
should be placed away from high voltage switching
nodes such as PHASEx, LGATEx, UGATEx, or BOOTx
nodes to avoid coupling. Use internal layer(s) as ground
plane(s) and shield the feedback trace from power traces
and components.
DS8205L/M-05 June 2011
RT8205L/M
`
Place the ground terminal of VIN capacitor(s), VOUTx
capacitor(s), and source of low side MOSFETs as close
as possible. The PCB trace defined as PHASEx node,
which connects to source of high side MOSFET, drain
of low side MOSFET and high voltage side of the
inductor, should be as short and wide as possible.
DS8205L/M-05 June 2011
www.richtek.com
25
RT8205L/M
Outline Dimension
D2
D
SEE DETAIL A
L
1
E
E2
e
b
1
1
2
2
DETAIL A
Pin #1 ID and Tie Bar Mark Options
A
A3
A1
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.180
0.300
0.007
0.012
D
3.950
4.050
0.156
0.159
D2
2.300
2.750
0.091
0.108
E
3.950
4.050
0.156
0.159
E2
2.300
2.750
0.091
0.108
e
L
0.500
0.350
0.020
0.450
0.014
0.018
W-Type 24L QFN 4x4 Package
Richtek Technology Corporation
Richtek Technology Corporation
Headquarter
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
5F, No. 95, Minchiuan Road, Hsintien City
Hsinchu, Taiwan, R.O.C.
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)86672399 Fax: (8862)86672377
Email: marketing@richtek.com
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
www.richtek.com
26
DS8205L/M-05 June 2011
工商网监
湘ICP备2023018690号
