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RT8228AZQW

RT8228AZQW

  • 厂商:

    RICHTEK(台湾立锜)

  • 封装:

    WFQFN12_EP

  • 描述:

    IC REG CTRLR BUCK 12WQFN

  • 数据手册
  • 价格&库存
RT8228AZQW 数据手册
® RT8228A Single Synchronous Buck PWM Controller General Description Features The RT8228A PWM controller provides high efficiency, excellent transient response, and high DC output accuracy needed for stepping down high voltage batteries to generate low voltage CPU core, I/O, and chipset RAM supplies in notebook computers.  The constant on-time PWM control scheme handles wide input/output voltage ratios with ease and provides 100ns “instant-on” response to load transients while maintaining a relatively constant switching frequency. The RT8228A achieves high efficiency at a reduced cost by eliminating the current sense resistor found in traditional current mode PWMs. Efficiency is further enhanced by its ability to drive very large synchronous rectifier MOSFETs and enter diode emulation mode at light load condition. The buck conversion allows this device to directly step down high voltage batteries at the highest possible efficiency. The Audio Skipping Mode (ASM) setting maintains the switching frequency above 25kHz, which eliminates noise in audio applications. The RT8228A is intended for CPU core, chipset, DRAM, or other low voltage supplies as low as 0.5V. The RT8228A is available in a WQFN-12L 2x2 package. Built in 1% 0.5V Reference Voltage Adjustable 0.5V to 3.3V Output Range  Quick Load Step Response within 100ns  4700ppm/° °C Programmable Current Limit by Low Side RDS(ON) Sensing  4.5V to 26V Battery Input Range  Resistor Programmable Frequency  Internal Ramp Current Limit Soft-Start Control  Drives Large Synchronous Rectifier FETs  Integrated Boost Switch  Over/Under Voltage Protection  Thermal Shutdown  Power Good Indicator  RoHS Compliant and Halogen Free  Applications     Notebook Computers CPU Core Supply Chipset/RAM Supply as Low as 0.5V Generic DC/DC Power Regulator Pin Configurations Richtek products are :  PHASE UGATE 2 10 GND 13 3 4 5 6 FB Note : 1 11 VCC Lead Plating System G : Green (Halogen Free and Pb Free) Z : ECO (Ecological Element with Halogen Free and Pb free) LGATE 12 BOOT Package Type QW : WQFN-12L 2x2 (W-Type) CS RT8228A TON Ordering Information GND (TOP VIEW) 9 PGOOD 8 EN MODE 7 WQFN-12L 2x2 RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.  Suitable for use in SnPb or Pb-free soldering processes. Copyright © 2021 Richtek Technology Corporation. All rights reserved. DS8228A-08T00 October 2021 is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT8228A Marking Information RT8228AGQW RT8228AZQW CQ : Product Code CQ : Product Code W : Date Code CQW W : Date Code CQW Part Status Part No Status Package Lead Plating System RT8228AGQW Obsolete  WQFN-12L 2x2 (W-Type) G : Green (Halogen Free and Pb Free) RT8228AZQW Obsolete  WQFN-12L 2x2 (W-Type) Z : ECO (Ecological Element with Halogen Free and Pb free) The part status values are defined as below : Active : Device is in production and is recommended for new designs. Lifebuy : The device will be discontinued, and a lifetime-buy period is in effect. NRND : Not recommended for new designs. Preview : Device has been announced but is not in production. Obsolete : Richtek has discontinued the production of the device.  Typical Application Circuit VIN 4.5V to 26V RTON 11 5 VDDP R2 100k TON RT8228A BOOT 4 VCC C2 4.7µF 9 PGOOD 10 CS PGOOD UGATE 3 R5 0 C3 0.1µF VOUT 1V Q1 L1 Q2 * : Optional R7* C7* R8 10k C5* C6* C1 220µF FB 6 MODE 8 EN GND 7 To 5V : DEM To 2.5V : ASM To GND : FCCM R9 10k 12, 13 (Exposed Pad) Copyright © 2021 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 R4 0 PHASE 2 1 LGATE R6 Chip Enable C4 10µF is a registered trademark of Richtek Technology Corporation. RT8228A-08 October 2021 RT8228A Functional Pin Description Pin No. Pin Name Pin Function 1 LGATE Gate Drive Output for Low Side External MOSFET. 2 PHASE External Inductor Connection Pin for PWM Converter. It behaves as the current sense comparator input for Low Side MOSFET RDS(ON) sensing and reference voltage for on time generation. 3 UGATE 4 BOOT 5 VCC 6 FB 7 MODE 8 EN VOUT Feedback Input. Connect FB to a resistive voltage divider from V OUT to GND to adjust the output from 0.5V to 3.3V Pull Down to GND for Forced CCM Mode. Pull Up to 2.5V for Audio Skipping Mode (ASM). Pull Up to 5V for Diode Emulation Mode (DEM). PWM Chip Enable. Pull low to GND to disable the PWM. 9 PGOOD Open Drain Power Good Indicator. High impedance indicates power is good. 10 CS Current Limit Threshold Setting Input. Connect a setting resistor to GND and the current limit threshold is equal to 1/10 of the voltage at this pin. 11 TON On-time Setting. Connect a resistor between this pin and V IN. Gate Drive Output for High Side External MOSFET. Supply Input for High Side Driver. Connect through a capacitor to the floating node (PHASE) pin. Control Voltage Input. Provides the power for the buck controller, the low side driver and the bootstrap circuit for high side driver. Bypass to GND with a 4.7F ceramic capacitor. 12, GND 13 (Exposed Pad) Ground. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. Function Block Diagram TRIG On-time Compute 1-SHOT TON PHASE BOOT R - COMP PSR S + 125% VREF FB 70% VREF OV Latch S1 Q UV Latch S1 Q - PWM Min. TOFF Q TRIG VCC DRV MODE - PGOOD + POR EN 10µA SS Timer - 90% VREF + Thermal Shutdown CS Copyright © 2021 Richtek Technology Corporation. All rights reserved. RT8228A-08 October 2021 LGATE GND DEM/FCCM/ASM VCC UGATE 1-SHOT + 125% VREF DRV PHASE 0.5V VREF + Q + - X(-1/10) is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT8228A Absolute Maximum Ratings (Note 1) VCC to GND -------------------------------------------------------------------------------------------------------- –0.3V to 6V FB, PGOOD, EN, CS, MODE to GND ----------------------------------------------------------------------- –0.3V to (VCC + 0.3V)  TON to GND -------------------------------------------------------------------------------------------------------- –0.3V to 32V  BOOT to PHASE ------------------------------------------------------------------------------------------------- –0.3V to 6.5V  PHASE to GND DC -------------------------------------------------------------------------------------------------------------------- −0.3V to 32V < 20ns --------------------------------------------------------------------------------------------------------------- −8V to 38V  UGATE to PHASE DC -------------------------------------------------------------------------------------------------------------------- −0.3V to (VCC + 0.3V) < 20ns --------------------------------------------------------------------------------------------------------------- −5V to 7.5V  LGATE to GND DC -------------------------------------------------------------------------------------------------------------------- −0.3V to (VCC + 0.3V) < 20ns --------------------------------------------------------------------------------------------------------------- −2.5V to 7.5V  Power Dissipation, PD @ TA = 25°C WQFN-12L 2x2 ---------------------------------------------------------------------------------------------------- 0.606W  Package Thermal Resistance (Note 2) WQFN-12L 2x2, θJA ---------------------------------------------------------------------------------------------- 165°C/W  Lead Temperature (Soldering, 10 sec.) ---------------------------------------------------------------------- 260°C  Junction Temperature -------------------------------------------------------------------------------------------- 150°C  Storage Temperature Range ------------------------------------------------------------------------------------ −65°C to 150°C  ESD Susceptibility (Note 3) HBM (Human Body Mode) -------------------------------------------------------------------------------------- 2kV MM (Machine Mode) --------------------------------------------------------------------------------------------- 200V   Recommended Operating Conditions     (Note 4) Input Voltage, VIN ------------------------------------------------------------------------------------------------- 4.5V to 26V Control Voltage, VCC --------------------------------------------------------------------------------------------- 4.5V to 5.5V Junction Temperature Range ----------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range ----------------------------------------------------------------------------------- −40°C to 85°C Copyright © 2021 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 is a registered trademark of Richtek Technology Corporation. RT8228A-08 October 2021 RT8228A Electrical Characteristics (VCC = 5V, VIN = 15V, VEN = 5V, VMODE = 5V, RTON = 500kΩ, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit -- 0.5 1.25 mA ----- -30 --- 1 -1 1 A A A A VCC = 4.5V to 5.5V, DEM 495 500 505 mV VFB = 0.5V 1 0.5 0.1 -- 1 3.3 A V PWM Controller VCC Quiescent Supply Current IQ VCC Shutdown Current TON Operating Current TON Shutdown Current CS Shutdown Current FB Error Comparator Threshold Voltage FB Input Bias Current Output Voltage Range ISHDN FB forced above the regulation point, VEN = 5V VCC Current, VEN = 0V RTON = 500k RTON = 500k CS pull to GND On-Time VIN =15V, VPHASE = 1.25V, VMODE = 0V 267 334 401 ns Minimum Off-Time VMODE = 0V, FB = 0.45V 250 400 550 ns Current Sensing Threshold CS Source Current VCS = 0.5V to 2V 9 10 11 A CS Source Current TC On the basis of 25C -- 4700 -- ppm/C Zero Crossing Threshold VMODE > 1.8V, PHASE GND 10 -- 5 mV ASM Min Frequency VMODE = 2.5V -- 25 -- kHz Current Limit Threshold UV Threshold GND PHASE, VCS = 1V UVP Detect, FB Falling Edge 85 60 100 70 115 80 mV % OVP Threshold OVP Detect, FB Rising Edge 120 125 130 % OV Fault Delay VCC Power On Reset (POR) Threshold POR Threshold Hysteresis Current Limit Ramp at Soft-Start UV Blank Time FB forced above OV threshold -- 5 -- s 3.7 3.9 4.2 V -- 100 -- mV -- 900 -- s -- 4.5 -- ms -- 150 -- C -- 10 -- C -- 2.5 5  -- 1.5 3  -- 2.5 5  ---- 0.8 30 30 1.5 ---  Protection Function Thermal Shutdown Rising Edge Enable to current limit threshold = 50mV From EN signal going high TSD Thermal Shutdown Hysteresis TSD Driver On-Resistance UGATE Driver Source UGATE Driver Sink LGATE Driver Source LGATE Driver Sink Dead Time BOOT  PHASE forced to 5V, UGATE High State BOOT PHASE forced to 5V, RUGATEsk UGATE Low State RLGATEsr LGATE High State RUGATEsr RLGATEsk LGATE Low State LGATE Rising (Phase = 1.5V) UGATE Rising Copyright © 2021 Richtek Technology Corporation. All rights reserved. RT8228A-08 October 2021 ns is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT8228A Parameter Symbol Min Typ Max Unit -- -- 80  Logic-High V IH 1.2 -- -- Logic-Low V IL -- -- 0.4 DEM Threshold VCC  0.5 -- -- V ASM Threshold 1.8 -- 2.9 V -- -- 0.4 V 13 10 7 % -- 3 -- % -- 2.5 -- s Internal Boost Charging Switch on Resistance EN Threshold EN Threshold Voltage Test Conditions V CC to BOOT, 10mA V Mode Threshold FCCM Threshold PGOOD (upper side threshold decided by OV threshold) Measured at FB, with respect to Trip Threshold (Falling) reference Trip Threshold Hysteresis Fault Propagation Delay Falling edge, FB forced PGOOD trip threshold below Output Low Voltage ISINK = 1mA -- -- 0.4 V Leakage Current High state, forced to 5V -- -- 1 A Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings, Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. θJA is measured in the natural convection at TA = 25°C on a low effective thermal conductivity test board of JEDEC 513 thermal measurement standard. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Copyright © 2021 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 is a registered trademark of Richtek Technology Corporation. RT8228A-08 October 2021 RT8228A Typical Operating Characteristics Efficiency vs. Load Current Efficiency vs. Load Current 100 100 90 90 DEM Mode 60 50 40 CCM Mode 30 DEM Mode 80 70 Efficiency (%) Efficiency (%) 80 70 60 50 40 CCM Mode 30 20 20 10 10 VIN = 8V, VOUT = 1V 0 0.001 0.01 0.1 1 VIN = 12V, VOUT = 1V 0 0.001 10 0.01 0.1 Switching Frequency vs. RTON Resistance Efficiency vs. Load Current 900 90 800 Switching Frequency (kHz)1 100 Efficiency (%) 80 DEM Mode 60 50 40 30 CCM Mode 20 10 VIN = 20V, VOUT = 1V 0 0.001 700 600 500 400 300 200 100 CCM Mode, VIN = 12V, VOUT = 1V, No Load 0 0.01 0.1 1 10 100 Load Current (A) 300 450 350 400 350 300 250 200 150 100 0 10 12 14 16 18 20 22 24 Input Voltage (V) Copyright © 2021 Richtek Technology Corporation. All rights reserved. RT8228A-08 October 2021 500 600 700 800 VIN = 12V, VOUT = 1V 300 CCM Mode 250 200 150 100 50 DEM Mode CCM Mode, VOUT = 1V, No Load 8 400 Switching Frequency vs. Load Current 400 Switching Frequency (kHz)1 Switching Frequency (kHz)1 Switching Frequency vs. Input Voltage 50 200 RTON Resistance (k Ω ) 500 6 10 Load Current (A) Load Current (A) 70 1 26 0 0.001 0.01 0.1 1 10 Load Current (A) is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 RT8228A Power On from EN Switching Frequency vs. Load Current Switching Frequency (kHz)1 400 VIN = 20V, VOUT = 1V 350 UGATE (20V/Div) 300 250 CCM Mode EN (5V/Div) 200 150 VOUT (500mV/Div) PGOOD (5V/Div) 100 50 0 0.001 DEM Mode 0.01 0.1 1 CCM Mode, VIN = 12V, VOUT = 1V, No Load Time (1ms/Div) 10 Load Current (A) Power On from EN OVP UGATE (20V/Div) UGATE (20V/Div) EN (5V/Div) VOUT (500mV/Div) VOUT (500mV/Div) PGOOD (5V/Div) LGATE (5V/Div) VIN = 12V, VOUT = 1V, No Load DEM Mode, VIN = 12V, VOUT = 1V, No Load Time (1ms/Div) Time (200μs/Div) UVP Load Transient Response UGATE (50V/Div) LGATE (10V/Div) VOUT_ac (50mV/Div) VOUT (500mV/Div) LGATE (5V/Div) IL (10A/Div) IOUT (10A/Div) UGATE (20V/Div) VIN = 12V, VOUT = 1V, No Load Time (20μs/Div) Copyright © 2021 Richtek Technology Corporation. All rights reserved. www.richtek.com 8 CCM Mode, VIN = 12V, VOUT = 1V, EN = VCC Time (100μs/Div) is a registered trademark of Richtek Technology Corporation. RT8228A-08 October 2021 RT8228A Mode Transition CCM to DEM Mode Transition DEM to CCM UGATE (20V/Div) UGATE (20V/Div) MODE (5V/Div) VOUT (200mV/Div) MODE (5V/Div) VOUT (200mV/Div) LGATE (5V/Div) VIN = 12V, VOUT = 1V, No Load Time (1ms/Div) Copyright © 2021 Richtek Technology Corporation. All rights reserved. RT8228A-08 October 2021 LGATE (5V/Div) VIN = 12V, VOUT = 1V, No Load Time (1ms/Div) is a registered trademark of Richtek Technology Corporation. www.richtek.com 9 RT8228A Application Information The RT8228A PWM controller provides high efficiency, excellent transient response, and high DC output accuracy needed for stepping down high voltage batteries to generate low voltage CPU core, I/O, and chipset RAM supplies in notebook computers. Richtek Mach ResponseTM technology is specifically designed for providing 100ns “instant-on” response to load steps while maintaining a relatively constant operating frequency and inductor operating point over a wide range of input voltages. The topology circumvents the poor load transient timing problems of fixed frequency current mode PWMs while avoiding the problems caused by widely varying switching frequencies in conventional constant on-time and constant off-time PWM schemes. The PSR PWM modulator is specifically designed to have better noise immunity for such a single output application. frequency without the need of a clock generator. 7.06p  RTON  VOUT t ON =  33ns (VIN  0.9) where RTON is the resistor connected from the input supply (VIN) to the TON pin. And then the switching frequency is : VOUT Frequency = VIN  tON Mode Selection Operation DEM (Diode Emulation Mode) and ASM (Audio Skipping Mode) operation can be enabled by driving the tri-state MODE pin to a logic high level. The RT8228A can switch operation into DEM when the MODE pin is pulled up to 5V. If MODE is pulled to 2.5V, the controller will switch operation into ASM. Finally, if the pin is pulled to GND, the RT8228A will operate in CCM mode. PWM Operation Diode Emulation Mode The Mach ResponseTM, PSR (Pulse Shaping Regulator) mode controller is suitable for low external component count configuration with appropriate amount of Equivalent Series Resistance (ESR) capacitor(s) at the output. The output ripple valley voltage is monitored at a feedback point voltage. Refer to the function diagrams of the RT8228A, the synchronous high side MOSFET is turned on at the beginning of each cycle. After the internal oneshot timer expires, the MOSFET is turned off. The pulse width of this one shot is determined by the converter's input and output voltages to keep the frequency fairly constant over the entire input voltage range. Another oneshot sets a minimum off-time (400ns typ.). In diode emulation mode, the RT8228A automatically reduces switching frequency at light load conditions to maintain high efficiency. This reduction of frequency is achieved smoothly and without increasing VOUT ripple or load regulation. As the output current decreases from heavy load condition, the inductor current is also reduced, and eventually comes to the point that its valley touches zero current, which is the boundary between continuous conduction and discontinuous conduction modes. By emulating the behavior of diodes, the low side MOSFET allows only partial of negative current when the inductor freewheeling current reach negative. As the load current is further decreased, it takes longer and longer to discharge the output capacitor to the level than requires the next “ON” cycle. The on-time is kept the same as that in the heavy load condition. In reverse, when the output current increases from light load to heavy load, the switching frequency increases to the preset value as the inductor current reaches the continuous condition. The transition load point to the light load operation can be calculated as follows (Figure 1) : On-Time Control The on-time one-shot comparator has two inputs. One input looks at the output voltage, while the other input samples the input voltage and converts it to a current. This input voltage proportional current is used to charge an internal on-time capacitor. The on-time is the time required for the voltage on this capacitor to charge from zero volts to VOUT, thereby making the on-time of the high side switch directly proportional to the output voltage and inversely proportional to the input voltage. The implementation results in a nearly constant switching Copyright © 2021 Richtek Technology Corporation. All rights reserved. www.richtek.com 10 ILOAD   VIN  VOUT   t 2L where tON is On-time. ON is a registered trademark of Richtek Technology Corporation. RT8228A-08 October 2021 RT8228A IL Slope = (VIN -VOUT) / L IPEAK ILOAD = IPEAK / 2 0 tON t Figure 1. Boundary Condition of CCM/DEM waveform to become the complement of the high side gate drive waveform. This in turn causes the inductor current to reverse at light loads as the PWM loop to maintain a duty ratio VOUT/VIN. The benefit of forced-CCM mode is to keep the switching frequency fairly constant, but it comes at a cost. The no load battery current can be up to 10mA to 40mA, depending on the external MOSFETs. Current Limit Setting (OCP) The switching waveforms may appear noisy and asynchronous when light loading causes diode emulation operation, but this is a normal operating condition that results in high light load efficiency. Trade offs in DEM noise vs. light load efficiency is made by varying the inductor value. Generally, low inductor values produce a broader efficiency vs. load curve, while higher values result in higher full load efficiency (assuming that the coil resistance remains fixed) and less output voltage ripple. The disadvantages for using higher inductor values include larger physical size and degrade load transient response (especially at low input voltage levels). supports temperature compensated MOSFET RDS(ON) sensing. The CS pin should be connected to GND through the trip voltage setting resistor, RCS. With the 10μA CS terminal source current, ICS, and the setting resistor, RCS the CS trip voltage, VCS, can be calculated as shown in the following equation. Audio Skipping Mode VCS (mV) = RCS (kΩ) x 10 (μA) x (1 / 10) When the MODE pin is pulled to 2.5V, the controller operates in audio skipping mode with a minimum switching frequency of 25kHz. This mode eliminates audio frequency modulation that would otherwise be present when a lightly loaded controller automatically skips pulses. In audio skipping mode, the low side switch gate driver signal is ORed with an internal oscillator (>25kHz). Once the internal oscillator is triggered, the audio skipping controller pulls LGATE logic high, turning on the low side MOSFET to induce a negative inductor current. After the output voltage rises above VREF, the controller turns off the low Inductor current is monitored by the voltage between the PGND pin and the PHASE pin, so the PHASE pin should be connected to the drain terminal of the low side MOSFET. ICS has positive temperature coefficient to compensate the temperature dependency of the RDS(ON). PGND is used as the positive current sensing node so PGND should be connected to the source terminal of the bottom MOSFET. side MOSFET (LGATE pulled logic low) and triggers a constant on-time operation (UGATE driven logic high). When the on-time operation expires, the controller reenables the low side MOSFET until the inductor current drops below the zero crossing threshold. The RT8228A has cycle-by-cycle current limiting control. The current limit circuit employs a unique “valley” current sensing algorithm. If PHASE voltage plus the current limit threshold is below zero, the PWM is not allowed to initiate a new cycle (Figure 2). In order to provide both good accuracy and a cost effective solution, the RT8228A As the comparison is done during the OFF state, VCS sets the valley level of the inductor current. Thus, the load current at over current threshold, ILOAD_OC, can be calculated as follows. ILOAD_OC = = VCS RDS(ON) VCS IRipple + RDS(ON) 2 +  V  VOUT   VOUT 1  IN 2 x Lf VIN Forced-CCM Mode The low noise, forced-CCM mode (MODE = GND) disables the zero-crossing comparator, which controls the low side switch on-time. This causes the low side gate drive Copyright © 2021 Richtek Technology Corporation. All rights reserved. RT8228A-08 October 2021 is a registered trademark of Richtek Technology Corporation. www.richtek.com 11 RT8228A Power Good Output (PGOOD) IL IPEAK ILOAD ILIM t 0 Figure 2. Valley Current Limit The power good output is an open drain output and requires a pull-up resistor. When the output voltage is 25% above or 10% below its set voltage, PGOOD gets pulled low. It is held low until the output voltage returns to within these tolerances once more. In soft-start, PGOOD is actively held low and is allowed to transition high until soft-start is over and the output reaches 93% of its set voltage. There is a 2.5μs delay built into PGOOD circuitry to prevent false transitions. MOSFET Gate Driver (UGATE, LGATE) The high side driver is designed to drive high current, low RDS(ON) N-MOSFET (s). When configured as a floating driver, 5V bias voltage is delivered from the VDDP supply. The average drive current is proportional to the gate charge at VGS = 5V times switching frequency. The instantaneous drive current is supplied by the flying capacitor between BOOT and PHASE pins. A dead time to prevent shoot through is internally generated between high side MOSFET off to low side MOSFET on and low side MOSFET off to high side MOSFET on. The low side driver is designed to drive high current, low RDS(ON) N-MOSFET (s). The internal pull down transistor that drives LGATE low is robust, with a 0.8Ω typical on resistance. A 5V bias voltage is delivered from the VDDP supply. The instantaneous drive current is supplied by the flying capacitor between VDDP and GND. For high current applications, some combinations of high and low side MOSFETs might be encountered that will cause excessive gate drain coupling, which can lead to efficiency killing, EMI-producing shoot through currents. This is often remedied by adding a resistor in series with BOOT, which increases the turn-on time of the high side MOSFET without degrading the turn-off time (Figure 3). VIN BOOT UGATE PHASE Figure 3. Reducing the UGATE Rise Time Copyright © 2021 Richtek Technology Corporation. All rights reserved. www.richtek.com 12 POR, UVLO and Soft-Start Power On Reset (POR) occurs when VCC rises above to approximately 3.9V, the RT8228A will reset the fault latch and preparing the PWM for operation. Below 3.7V, the VCC Under Voltage Lockout (UVLO) circuitry inhibits switching by keeping UGATE and LGATE low. A built-in soft-start is used to prevent surge current from power supply input after EN is enabled. A current ramping up limit threshold can eliminate the VOUT folded-back in the softstart duration. The typical soft-start duration is 900μs. Output Over Voltage Protection (OVP) The output voltage can be continuously monitored for over voltage protection. When the output voltage exceeds 25% of the set voltage threshold, over voltage protection is triggered and the low side MOSFET is latched on. This activates the low side MOSFET to discharge the output capacitor. The RT8228A is latched once OVP is triggered and can only be released by VCC or EN power on reset. There is a 5μs delay built into the over voltage protection circuit to prevent false transitions. Output Under Voltage Protection (UVP) The output voltage can be continuously monitored for under voltage protection. When the output voltage is less than 70% of the set voltage threshold, under voltage protection is triggered and then both UGATE and LGATE gate drivers are forced low. During soft-start, the UVP blanking time is 4.5ms. Output Voltage Setting (FB) The output voltage can be adjusted from 0.5V to 3.3V by setting the feedback resistor R1 and R2 (Figure 4). Choose is a registered trademark of Richtek Technology Corporation. RT8228A-08 October 2021 RT8228A R2 to be approximately 10kΩ, and solve for R1 using the equation :  R1  VOUT = VREF   1+   R2  where VREF is 0.5V.(typ.) by an external circuit to reduce the jitter level. The required signal level is approximately 15 mV at the comparing point. This generates VRIPPLE = (VOUT / 0.5) x 15mV at the output node. The output capacitor ESR should meet this requirement. VIN Thermal Considerations VOUT UGATE PHASE LGATE R1 FB R2 GND Figure 4. Setting VOUT with a Resistor Divider Output Inductor Selection The switching frequency (on-time) and operating point (% ripple or LIR) determine the inductor value as follows : T   VIN  VOUT  L = ON LIR  ILOAD(MAX) where LIR is the ratio of peak-of-peak ripple current to the maximum average inductor current. Find a low pass inductor having the lowest possible DC resistance that fits in the allowed dimensions. Ferrite cores are often the best choice, although powdered iron is inexpensive and can work well at 200kHz. The core must be large enough and not to saturate at the peak inductor current (IPEAK) :  L   IPEAK = ILOAD(MAX) +  IR   ILOAD(MAX)   2   Output Capacitor Selection The output filter capacitor must have low enough Equivalent Series Resistance (ESR) to meet output ripple and loadtransient requirements, yet have high enough ESR to satisfy stability requirements. The output capacitance must also be high enough to absorb the inductor energy while transitioning from full-load to no-load conditions without tripping the overvoltage fault latch. For continuous operation, do not exceed absolute maximum operation junction temperature. The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula : PD(MAX) = (TJ(MAX) − TA) / θJA where T J(MAX) is the maximum operation junction temperature 125°C, TA is the ambient temperature and the θJA is the junction to ambient thermal resistance. For recommended operating conditions specification of RT8228A, the maximum junction temperature is 125°C and TA is the ambient temperature. The junction to ambient thermal resistance, θJA, is layout dependent. For WQFN12L 2x2 package, the thermal resistance, θJA, is 165°C/ W on a standard JEDEC 51-3 single-layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by the following formula : PD(MAX) = (125°C − 25°C) / (165°CW) = 0.606W for WQFN-12L 2x2 package The maximum power dissipation depends on the operating ambient temperature for fixed T J(MAX) and thermal resistance, θJA. For the RT8228A package, the derating curve in Figure 5 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. Although Mach ResponseTM DRVTM dual ramp valley mode provides many advantages such as ease-of-use, minimum external component configuration, and extremely short response time, due to not employing an error amplifier in the loop, a sufficient feedback signal needs to be provided Copyright © 2021 Richtek Technology Corporation. All rights reserved. RT8228A-08 October 2021 is a registered trademark of Richtek Technology Corporation. www.richtek.com 13 Maximum Power Dissipation (W)1 RT8228A 0.65 0.60 0.55 0.50  Keep current limit setting network as close as possible to the IC. Routing of the network should avoid coupling to high voltage switching node.  Connections from the drivers to the respective gate of the high side or the low side MOSFET should be as short as possible to reduce stray inductance.  All sensitive analog traces and components such as MODE, FB, GND, EN, PGOOD, CS, VCC, and TON should be placed away from high voltage switching nodes such as PHASE, LGATE, UGATE, or BOOT nodes to avoid coupling. Use internal layer (s) as ground plane (s) and shield the feedback trace from power traces and components.  Current sense connections must always be made using Kelvin connections to ensure an accurate signal, with the current limit resistor located at the device.  Power sections should connect directly to ground plane (s) using multiple vias as required for current handling (including the chip power ground connections). Power components should be placed to minimize loops and reduce losses. Single-Layer PCB 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0.00 0 25 50 75 100 125 Ambient Temperature (°C) Figure 5. Derating Curves for RT8228A Packages Layout Considerations Layout is very important in high frequency switching converter design. If the layout is designed improperly, the PCB could radiate excessive noise and contribute to the converter instability. The following points must be followed for a proper layout of RT8228A.  Connect a filter capacitor to VCC, 1μF to 4.7μF range is recommended. Place the filter capacitor close to the IC. Copyright © 2021 Richtek Technology Corporation. All rights reserved. www.richtek.com 14 is a registered trademark of Richtek Technology Corporation. RT8228A-08 October 2021 RT8228A Outline Dimension 1 1 2 2 DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.150 0.250 0.006 0.010 D 1.900 2.100 0.075 0.083 E 1.900 2.100 0.075 0.083 e 0.400 0.016 D2 0.850 0.950 0.033 0.037 E2 0.850 0.950 0.033 0.037 L 0.250 0.350 0.010 0.014 W-Type 12L QFN 2x2 Package Richtek Technology Corporation 14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. RT8228A-08 October 2021 www.richtek.com 15
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