®
RT8299
3A, 24V, 500kHz Synchronous Step-Down Converter
General Description
Features
The RT8299 is a high efficiency, monolithic synchronous
step-down DC-DC converter with internal power MOSFETs.
It achieves 3A of continuous output current over a wide
input supply range from 3V to 24V with excellent load and
line regulation. Current mode operation provides fast
transient response and eases loop stabilization. Cycleby-cycle current limit provides protection against shorted
outputs and soft-start eliminates input current surge during
start-up. Thermal shutdown provides reliable, fault tolerant
operation. The low current shutdown mode provides output
disconnection, enabling easy power management in battery
powered systems.
3V to 24V Input Voltage Range
3A Output Current
Internal N-MOSFETs
Current Mode Control
Fixed Frequency Operation : 500kHz
Output Adjustable from 0.8V to 15V
Up to 95% Efficiency
Stable with Low ESR Ceramic Output Capacitors
Cycle-by-Cycle Over Current Protection
Input Under Voltage Lockout
Output Under Voltage Protection
Thermal Shutdown Protection
SOP-8 (Exposed Pad) and 10-Lead WDFN Packages
RoHS Compliant and Halogen Free
Ordering Information
RT8299
Package Type
SP : SOP-8 (Exposed Pad-Option 1)
QW: WDFN-10L 3x3 (W-Type)
Lead Plating System
G : Green (Halogen Free and Pb Free)
Z : ECO (Ecological Element with
Halogen Free and Pb free)
Note :
Richtek products are :
RoHS compliant and compatible with the current require-
Applications
Industrial and Commercial Low Power Systems
Computer Peripherals
LCD Monitors and TVs
Green Electronics/Appliances
Point of Load Regulation for High Performance DSPs,
FPGAs, and ASICs
Pin Configuration
(TOP VIEW)
ments of IPC/JEDEC J-STD-020.
Suitable for use in SnPb or Pb-free soldering processes.
BOOT
VIN
2
SW
3
GND
4
GND
8
VCC
7
PGOOD
6
EN
5
FB
9
FB
PGOOD
EN
VCC
BOOT
1
2
3
4
5
GND
SOP-8 (Exposed Pad)
11
10
9
8
7
6
GND
SW
SW
VIN
VIN
WDFN-10L 3x3
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1
RT8299
Marking Information
RT8299GSP
RT8299GQW
RT8299GSP : Product Number
RT8299
GSPYMDNN
56= : Product Number
YMDNN : Date Code
YMDNN : Date Code
56=YM
DNN
RT8299ZSP
RT8299ZQW
RT8299ZSP : Product Number
RT8299
ZSPYMDNN
56 : Product Number
YMDNN : Date Code
YMDNN : Date Code
56 YM
DNN
Typical Application Circuit
RT8299
VIN
CIN
10µF x 2
VIN
BOOT
CBOOT
L1
Chip Enable
SW
EN
VCC
CVCC
1µF
GND
VOUT
R1
RT
FB
PGODD
COUT
R2
Power Good
Table 1. Recommended Component Selection
VOUT (V)
1.2
R1 (k) R2 (k) RT (k)
15
30
50
2.5
25.5
12
40
3.6
22 x 2
3.3
16
5.1
30
4.7
22 x 2
5
27
5.1
18
6.8
22 x 2
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2
L (H) COUT (F)
2
22 x 2
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RT8299
Functional Pin Description
Pin No.
Pin Name
SOP-8
WDFN-10L 3x3
(Exposed Pad)
1
5
2
6, 7
3
4, 9
(Exposed Pad)
Pin Function
BOOT
Bootstrap for high-side gate driver. Connect a 0.1F or greater
ceramic capacitor from BOOT to SW pin.
VIN
Power input. The input voltage range is from 3V to 24V after
soft-start is finished. Connect input capacitors between this pin
and GND. It is recommended to use 10F x 2 and a 0.1F
capacitors.
8, 9
SW
10, 11
GND
(Exposed Pad)
5
1
Switch node. Connect to external LC filter.
Ground. The exposed pad must be soldered to a large PCB and
connected to GND for maximum power dissipation.
FB
Feedback input. This pin is connected to the converter output. It
is used to regulate the output of the converter to a desired value
via an internal resistive voltage divider. For an adjustable output,
an external resistive voltage divider is connected to this pin.
6
3
EN
Enable input. A logic high enables the converter; a logic low
forces the RT8299 into shutdown mode, reducing the supply
current to less than 3A. Attach this pin to VIN with a 100k pull
up resistor for automatic startup.
7
2
PGOOD
Power good output. The output of this pin is open drain.
8
4
VCC
Linear regulator output. VCC is the output of the internal 5V linear
regulator powered by VIN. Decouple with a 1F ceramic
capacitor from VCC to ground for normal operation.
Function Block Diagram
VIN
EN
5k
Comparator
+
3V
Current Sense
Amplifier
+
Ramp
Generator
Regulator
BOOT
Oscillator
500kHz
2V
VCC
FB
PGOOD
PGOOD
Generator
+
Error
Amplifier
300k
30pF
1pF
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
DS8299-05 March 2020
Q
R
Q
Driver
+
Reference
S
-
PWM
Comparator
SW
OC Limit
Clamp
GND
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RT8299
Absolute Maximum Ratings
(Note 1)
Supply Input Voltage, VIN ---------------------------------------------------------------------------------- −0.3 to 26V
Switching Voltage, SW ------------------------------------------------------------------------------------ −0.6 to (VIN + 0.3V)
< 20ns ---------------------------------------------------------------------------------------------------------- −5V to 30V
Boot Voltage, BOOT ---------------------------------------------------------------------------------------- (VSW − 0.3V) to (VSW + 6V)
All Other Pins ------------------------------------------------------------------------------------------------ −0.3 to 6V
Power Dissipation, PD @ TA = 25°C
SOP-8 (Exposed Pad) ------------------------------------------------------------------------------------- 1.333W
WDFN-10L 3x3 ----------------------------------------------------------------------------------------------- 1.429W
Package Thermal Resistance (Note 2)
SOP-8 (Exposed Pad), θJA -------------------------------------------------------------------------------- 75°C/W
SOP-8 (Exposed Pad), θJC ------------------------------------------------------------------------------- 15°C/W
WDFN-10L 3x3, θJA ----------------------------------------------------------------------------------------- 70°C/W
WDFN-10L 3x3, θJC ----------------------------------------------------------------------------------------- 8.2°C/W
Lead Temperature (Soldering, 10 sec.) ----------------------------------------------------------------- 260°C
Junction Temperature -------------------------------------------------------------------------------------- 150°C
Storage Temperature Range ------------------------------------------------------------------------------ −65°C to 150°C
ESD Susceptibility (Note 3)
HBM (Human Body Model) --------------------------------------------------------------------------------- 2kV
MM (Machine Model) ---------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions
(Note 4)
Supply Voltage, VIN ----------------------------------------------------------------------------------------- 3V to 24V
Junction Temperature Range ------------------------------------------------------------------------------ −40°C to 125°C
Ambient Temperature Range ------------------------------------------------------------------------------ 40°C to 85°C
Electrical Characteristics
(VIN = 12V, TA = 25°C, unless otherwise specified)
Parameter
Shutdown Current
Symbol
Min
--
Typ
--
Max
3
Unit
A
--
1
--
mA
Upper Switch On Resistance
--
100
--
m
Lower Switch On Resistance
--
100
--
m
V EN = 0V, VSW = 0V or 12V
--
0
10
A
--
5.5
--
A
425
500
575
kHz
--
150
--
kHz
I SHDN
Supply Current
Test Conditions
V EN = 0V
V EN = 3V, VFB = 1V
Switch Leakage
Current Limit
I LIM
V BOOT VSW = 4.8V
Oscillator Frequency
f OSC
V FB = 0.75V
Short Circuit Frequency
V FB = 0V
Maximum Duty Cycle
DMAX
Minimum On-Time
t ON
Feedback Voltage
VFB
Logic-High
EN Input
Threshold Voltage Logic-Low
V FB = 0.8V
--
93
--
%
--
100
--
ns
788
800
812
mV
VIH
2
--
5.5
VIL
--
--
0.4
4.5V VIN 24V
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V
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DS8299-05 March 2020
RT8299
Parameter
Under Voltage Lockout
Threshold
Under Voltage Lockout
Threshold Hysteresis
Symbol
VUVLO
Test Conditions
Min
Typ
Max
Unit
--
2.8
--
V
--
300
--
mV
VOUT Rising, with Respect to VFB
--
90
--
VOUT Falling, with Respect to VFB
--
70
--
--
5
--
V
4
--
4
%
VIN Rising
VUVLO
Power Good Threshold
VCC Regulator
VCC Load Regulation
ICC = 5mA
%
Soft-Start Period
tSS
--
2
--
ms
Thermal Shutdown
TSD
--
150
--
C
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
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RT8299
Typical Operating Characteristics
Efficiency vs. Output Current
Efficiency vs. Output Current
100
100
90
90
80
VIN
VIN
VIN
VIN
VIN
VIN
70
60
50
40
=
=
=
=
=
=
3V
5V
9V
12V
15V
18V
Efficiency (%)
Efficiency (%)
80
30
20
VIN
VIN
VIN
VIN
VIN
VIN
70
60
50
=
=
=
=
=
=
5V
9V
12V
15V
18V
24V
40
30
20
10
10
VOUT = 1.2V
0
VOUT = 3.3V
0
0
0.5
1
1.5
2
2.5
3
0
0.5
1
Output Current (A)
1.208
3.320
1.204
1.196
2.5
=
=
=
=
=
3.310
5V
9V
12V
15V
18V
3.300
VIN
VIN
VIN
VIN
VIN
VIN
3.290
3.280
1.192
3.270
=
=
=
=
=
=
5V
9V
12V
15V
18V
24V
VOUT = 3.3V
VOUT = 1.2V
1.188
3.260
0
0.5
1
1.5
2
2.5
3
0
0.5
1
Output Current (A)
2
2.5
3
Frequency vs. Temperature
570
560
560
550
550
Frequency (kHz)1
570
540
530
520
510
500
490
540
530
520
510
500
VIN
VIN
VIN
VIN
490
480
1.5
Output Current (A)
Frequency vs. Input Voltage
Frequency (kHz)1
3
Output Voltage vs. Output Current
3.330
Efficiency (%)
Output Voltage (V)
Output Voltage vs. Output Current
VIN
VIN
VIN
VIN
VIN
2
Output Current (A)
1.212
1.200
1.5
480
VOUT = 1.2V, IOUT = 0.5A
470
= 23V
= 12VV
= 5V
= 3V
VOUT = 1.2V, IOUT = 0.5A
470
3
5
7
9
11
13
15
17
19
21
Input Voltage (V)
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23
-50
-25
0
25
50
75
100
125
Temperature (°C)
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DS8299-05 March 2020
RT8299
Load Transient Response
Current Limit vs. Temperature
8
Current Limit (A)
7
VOUT
(100mV/Div)
6
5
VIN = 12V
VIN = 5VV
VIN = 3V
4
IOUT
(2A/Div)
3
VIN = 12V, VOUT = 1.2V, IOUT = 0A to 3A
VOUT = 1.2V
2
-50
-25
0
25
50
75
100
Time (100μs/Div)
125
Temperature (°C)
Switching
Load Transient Response
VOUT
(5mV/Div)
VOUT
(100mV/Div)
VSW
(10V/Div)
IOUT
(2A/Div)
VIN = 12V, VOUT = 1.2V, IOUT = 1.5A to 3A
IL
(2A/Div)
Time (100μs/Div)
Time (1μs/Div)
Switching
Power On from VIN
VOUT
(5mV/Div)
VIN
(10V/Div)
VSW
(10V/Div)
VOUT
(1V/Div)
IL
(2A/Div)
IL
(2A/Div)
VIN = 12V, VOUT = 1.2V, IOUT = 1.5A
Time (1μs/Div)
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VIN = 12V, VOUT = 1.2V, IOUT = 3A
VIN = 12V, VOUT =1.2V, IOUT = 3A
Time (2.5ms/Div)
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RT8299
Power On from EN
Power Off from VIN
VIN
(10V/Div)
VEN
(5V/Div)
VOUT
(1V/Div)
VOUT
(1V/Div)
IL
(2A/Div)
IL
(2A/Div)
VIN = 12V, VOUT = 1.2V, IOUT = 3A
Time (2.5ms/Div)
VIN = 12V, VOUT = 1.2V, IOUT = 3A
Time (2.5ms/Div)
Power Off from EN
VEN
(5V/Div)
VOUT
(1V/Div)
IL
(2A/Div)
VIN = 12V, VOUT = 1.2V, IOUT = 3A
Time (2.5ms/Div)
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DS8299-05 March 2020
RT8299
Application Information
The RT8299 is a synchronous high voltage buck converter
that can support the input voltage range from 3V to 24V
and the output current can be up to 3A.
Output Voltage Setting
The resistive divider allows the FB pin to sense the output
voltage as shown in Figure 1.
VOUT
R1
FB
RT8299
R2
GND
Figure 1. Output Voltage Setting
Chip Enable Operation
The EN pin is the chip enable input. Pulling the EN pin
low (2V, < 5.5V) will turn on the
device again. For external timing control (e.g.RC), the EN
pin can also be externally pulled high by adding a REN*
resistor and CEN* capacitor from the VIN pin (see Figure
5).
An external MOSFET can be added to implement digital
control on the EN pin when no system voltage above 2.5V
is available, as shown in Figure 3. In this case, a 100kΩ
pull-up resistor, REN, is connected between VIN and the
EN pin. MOSFET Q1 will be under logic control to pull
down the EN pin.
The output voltage is set by an external resistive voltage
divider according to the following equation :
VOUT
= VFB 1 R1
R2
BOOT
VIN
VIN
REN
100k
CIN
CBOOT
RT8299
Chip Enable
SW
EN
R1
Q1
where VFB is the feedback reference voltage (0.8V typ.).
GND
External Bootstrap Diode
It is recommended to add an external bootstrap diode
between an external 5V and BOOT pin for efficiency
improvement when input voltage is lower than 5.5V or duty
ratio is higher than 65% .The bootstrap diode can be a
low cost one such as IN4148 or BAT54. The external 5V
can be a 5V fixed input from system or a 5V output of the
RT8299. Note that the external boot voltage must be lower
than 5.5V
5V
R2
VCC
VIN
12V
BOOT
VIN
CIN
10µF
RT8299
0.1µF
Figure 2. External Bootstrap Diode
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VOUT
8V
CBOOT
L
SW
R1
REN2
SW
DS8299-05 March 2020
R
100k
To prevent enabling circuit when VIN is smaller than the
VOUT target value, a resistive voltage divider can be placed
between the input voltage and ground and connected to
the EN pin to adjust IC lockout threshold, as shown in
Figure 4. For example, if an 8V output voltage is regulated
from a 12V input voltage, the resistor REN2 can be selected
to set input lockout threshold larger than 8V.
EN
RT8299
PGOOD
Figure 3. Enable Control Circuit for Logic Control with
Low Voltage
REN
100k
BOOT
COUT
FB
VCC
C
Connect a 100nF low ESR ceramic capacitor between
the BOOT pin and SW pin. This capacitor provides the
gate driver voltage for the high-side MOSFET.
VOUT
L
VCC
C
GND
FB
PGOOD
R
100k
VCC
COUT
R2
Figure 4. The Resistors can be Selected to Set IC
Lockout Threshold
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RT8299
Under Voltage Protection
CIN and COUT Selection
Hiccup Mode
For the RT8299, it provides Hiccup Mode Under Voltage
Protection (UVP). When the FB voltage drops below half
of the feedback reference voltage, VFB, the UVP function
will be triggered and the RT8299 will shut down for a period
of time and then recover automatically. The Hiccup Mode
UVP can reduce input current in short-circuit conditions.
Inductor Selection
The inductor value and operating frequency determine the
ripple current according to a specific input and output
voltage. The ripple current ΔIL increases with higher VIN
and decreases with higher inductance.
V
V
IL = OUT 1 OUT
f
L
VIN
Having a lower ripple current reduces not only the ESR
losses in the output capacitors but also the output voltage
ripple. High frequency with small ripple current can achieve
highest efficiency operation. However, it requires a large
inductor to achieve this goal.
For the ripple current selection, the value of ΔIL = 0.24(IMAX)
will be a reasonable starting point. The largest ripple
current occurs at the highest VIN. To guarantee that the
ripple current stays below the specified maximum, the
inductor value should be chosen according to the following
equation :
VOUT
VOUT
L =
1 VIN(MAX)
f
I
L(MAX)
V
IRMS = IOUT(MAX) OUT
VIN
VIN
1
VOUT
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT / 2. This simple worst case condition is
commonly used for design because even significant
deviations do not offer much relief.
Choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to
meet size or height requirements in the design.
For the input capacitor, two 10μF low ESR ceramic
capacitors are recommended.
The selection of COUT is determined by the required ESR
to minimize voltage ripple.
Moreover, the amount of bulk capacitance is also a key
for COUT selection to ensure that the control loop is stable.
Loop stability can be checked by viewing the load transient
response as described in a later section.
The output ripple, ΔVOUT , is determined by :
1
VOUT IL ESR
8fCOUT
The output ripple will be highest at the maximum input
The inductor's current rating (caused a 40°C temperature
rising from 25°C ambient) should be greater than the
maximum load current and its saturation current should
be greater than the short circuit peak current limit. Please
see Table 2 for the inductor selection reference.
Table 2. Suggested Inductors for Typical
Application Circuit
Component
Supplier
Series
Dimensions
(mm)
TDK
VLF10045
10 x 9.7 x 4.5
TDK
TAIYO
YUDEN
SLF12565
12.5 x 12.5 x 6.5
NR8040
8x8x4
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The input capacitance, C IN, is needed to filter the
trapezoidal current at the source of the high-side MOSFET.
To prevent large ripple current, a low ESR input capacitor
sized for the maximum RMS current should be used. The
RMS current is given by :
voltage since ΔIL increases with input voltage. Multiple
capacitors placed in parallel may be needed to meet the
ESR and RMS current handling requirement. Dry tantalum,
special polymer, aluminum electrolytic and ceramic
capacitors are all available in surface mount packages.
Special polymer capacitors offer very low ESR value.
However, it provides lower capacitance density than other
types. Although Tantalum capacitors have the highest
capacitance density, it is important to only use types that
pass the surge test for use in switching power supplies.
Aluminum electrolytic capacitors have significantly higher
ESR. However, it can be used in cost-sensitive applications
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RT8299
for ripple current rating and long term reliability
considerations. Ceramic capacitors have excellent low
ESR characteristics but can have a high voltage coefficient
and audible piezoelectric effects. The high Q of ceramic
capacitors with trace inductance can also lead to significant
ringing.
a load step occurs, VOUT immediately shifts by an amount
equal to ΔILOAD (ESR) also begins to charge or discharge
COUT generating a feedback error signal for the regulator
to return VOUT to its steady-state value. During this
recovery time, VOUT can be monitored for overshoot or
ringing that would indicate a stability problem.
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input, VIN. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to damage the
part.
EMI Consideration
Since parasitic inductance and capacitance effects in PCB
circuitry would cause a spike voltage on SW pin when
high-side MOSFET is turned-on/off, this spike voltage on
SW may impact on EMI performance in the system. In
order to enhance EMI performance, there are two methods
to suppress the spike voltage. One is to place an R-C
snubber between SW and GND and make them as close
as possible to the SW pin (see Figure 5). Another method
is adding a resistor RBOOT* in series with the bootstrap
capacitor, CBOOT. But this method will decrease the driving
capability to the high-side MOSFET. It is strongly
recommended to reserve the R-C snubber during PCB
layout for EMI improvement. Moreover, reducing the SW
trace area and keeping the main power in a small loop will
be helpful on EMI performance. For detailed PCB layout
guide, please refer to the section of Layout Consideration.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
RBOOT*
VIN
REN*
CIN
10µF x 2
BOOT
VIN
CBOOT
L
RT8299
SW
VOUT
EN
RS*
CEN*
R1
CS*
VCC
FB
GND
PGOOD
C
R
100k
COUT
R2
VCC
* : Optional
Figure 5. Reference Circuit with Snubber and Enable Timing Control
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RT8299
Maximum Power Dissipation (W)1
Thermal Considerations
For continuous operation, do not exceed the maximum
operation junction temperature 125°C. The maximum
power dissipation depends on the thermal resistance of
IC package, PCB layout, the rate of surroundings airflow
and temperature difference between junction to ambient.
The maximum power dissipation can be calculated by
following formula :
PD(MAX) = (TJ(MAX) − TA ) / θJA
Where T J(MAX) is the maximum operation junction
temperature , TA is the ambient temperature and the θJA is
the junction to ambient thermal resistance.
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent. For
SOP-8 (Exposed Pad) package, the thermal resistance,
θJA, is 75°C/W on a standard JEDEC 51-7 four-layer
thermal test board. For WDFN-10L 3x3 package, the
thermal resistance, θJA, is 70°C/W on a standard JEDEC
51-7 four-layer thermal test board. The maximum power
dissipation at TA = 25°C can be calculated by the following
formulas :
PD(MAX) = (125°C − 25°C) / (75°C/W) = 1.333W for
SOP-8 (Exposed Pad) package
PD(MAX) = (125°C − 25°C) / (70°C/W) = 1.429W for
WDFN-10L 3x3 package
The maximum power dissipation depends on the operating
ambient temperature for fixed T J(MAX) and thermal
resistance, θJA. The derating curve in Figure 6 allow the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
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1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
Four-Layer PCB
WDFN-10L 3x3
SOP-8 (Exposed Pad)
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 6. Derating Curve of Maximum Power Dissipation
Layout Consideration
Follow the PCB layout guidelines for optimal performance
of the RT8299.
Keep the traces of the main current paths as short and
wide as possible.
Put the input capacitor as close as possible to the device
pins (VIN and GND).
SW node is with high frequency voltage swing and should
be kept at small area. Keep analog components away
from the SW node to prevent stray capacitive noise pickup.
Connect feedback network behind the output capacitors.
Keep the loop area small. Place the feedback
components near the RT8299.
An example of PCB layout guide is shown in Figure 6 for
reference.
is a registered trademark of Richtek Technology Corporation.
DS8299-05 March 2020
RT8299
The CVCC component must be connected
as close to the device as possible.
GND
Input capacitor must
be placed as close
to the IC as possible.
VIN
SW GND
CVCC
CIN
BOOT
VOUT
CS*
VIN
2
SW
3
GND
4
GND
8
VCC
7
PGOOD
6
EN
5
FB
9
RS*
RPG
REN
R1
R2
VOUT
VCC
VIN
The REN component
must be connected to
VIN.
COUT
SW should be connected to inductor by
wide and short trace. Keep sensitive
components away from this trace.
GND
The feedback components
must be connected as close
to the device as possible.
Figure 7. PCB Layout Guide
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
DS8299-05 March 2020
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
13
RT8299
Outline Dimension
H
A
M
EXPOSED THERMAL PAD
(Bottom of Package)
Y
J
X
B
F
C
I
D
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
4.801
5.004
0.189
0.197
B
3.810
4.000
0.150
0.157
C
1.346
1.753
0.053
0.069
D
0.330
0.510
0.013
0.020
F
1.194
1.346
0.047
0.053
H
0.170
0.254
0.007
0.010
I
0.000
0.152
0.000
0.006
J
5.791
6.200
0.228
0.244
M
0.406
1.270
0.016
0.050
X
2.000
2.300
0.079
0.091
Y
2.000
2.300
0.079
0.091
X
2.100
2.500
0.083
0.098
Y
3.000
3.500
0.118
0.138
Option 1
Option 2
8-Lead SOP (Exposed Pad) Plastic Package
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
www.richtek.com
14
is a registered trademark of Richtek Technology Corporation.
DS8299-05 March 2020
RT8299
D2
D
L
E
E2
1
e
SEE DETAIL A
b
2
1
2
1
A
A1
A3
DETAIL A
Pin #1 ID and Tie Bar Mark Options
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.180
0.300
0.007
0.012
D
2.950
3.050
0.116
0.120
D2
2.300
2.650
0.091
0.104
E
2.950
3.050
0.116
0.120
E2
1.500
1.750
0.059
0.069
e
L
0.500
0.350
0.020
0.450
0.014
0.018
W-Type 10L DFN 3x3 Package
Richtek Technology Corporation
14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
DS8299-05 March 2020
www.richtek.com
15
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