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RT8481AGE

RT8481AGE

  • 厂商:

    RICHTEK(台湾立绮)

  • 封装:

    SOT23-6

  • 描述:

    Power Supply Controller Secondary-Side Controller SOT-23-6

  • 数据手册
  • 价格&库存
RT8481AGE 数据手册
® RT8481A SPS Secondary-Side CC/CV Controller General Description Features The RT8481A is a secondary-side CC/CV controller for SPS applications. It integrates a Constant Current (CC) regulating amplifier, a Constant Voltage (CV) regulating amplifier, and 2 precision reference voltages.  Secondary-Side Constant Voltage (CV) and Constant Current (CC) Control  4.75V to 50V Operation Voltage Range ±1% Output Voltage Accuracy at Full Temperature Range 0.6mA Quiescent Current Smooth Transition Between CC and CV Control Loops −5V Negative Voltage Tolerance at CP pin The CC regulating amplifier is featured with an extended input common mode voltage below GND level to insure the performance of low-side current sense, and a very low input offset voltage to guarantee the sensing accuracy. A 60mV reference voltage is internally connected between the inverting input of the CC regulating amplifier and the CP pin. The non-inverting input is the CN pin, at which the voltage will be regulated 60mV higher than that at the CP pin. The inverting input pin CP is equiped with −5V antireverse immunity.     Applications    Battery Chargers AC/DC Adaptors LED Drivers The CV regulating amplifier with low input offset voltage is biased with a 2.5V reference voltage at the inverting input. The non-inverting input is the FB pin, at which the voltage will be regulated with 2.5V from GND. The CC and CV amplifiers share an open-collector output pin to minimize application circuit. The RT8481A is available in the SOT-23-6 package. Simplified Application Circuit VOUT Opto VCC R1 RVC1 CVC1 RT8481A OUT FB CIC1 CP CN GND R2 RIC1 RIC2 RS Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS8481A-00 January 2016 GND is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT8481A Ordering Information Pin Configurations RT8481A (TOP VIEW) Package Type E : SOT-23-6 Lead Plating System G : Green (Halogen Free and Pb Free) VCC OUT CP 6 Note : 4 2 3 CN GND FB Richtek products are :  5 SOT-23-6 RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.  Suitable for use in SnPb or Pb-free soldering processes. Marking Information 3Y= : Product Code 3Y=DNN DNN : Date Code Functional Pin Description Pin No. Pin Name Pin Function 1 CN Non-inverting Input of the CC Regulating Amp. It has 60mV offset from the CP pin. The CN pin should be connected to the “current-in” node of the current sensing resistor, Rs. 2 GND Ground. 3 FB Non-inverting Input of the CV Regulating Amp. The pin should be connected to the mid-point of a resistor divider from “Secondary Side VOUT” (usually the VCC) to GND. 4 CP Inverting Input of the CC Regulating Amp with 60mV offset from CN pin. The CP pin should be connected to the “current-out” node of the current sensing resistor. 5 OUT Common Open-collector Output of CC and CV Regulating Amps. The pin sinks a regulated current and driver the opto-coupler to transmit the error signal to primary-side. 6 VCC Supply Voltage Input. A 0.1F bypass capacitor should be connected between VCC and GND. Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 is a registered trademark of Richtek Technology Corporation. DS8481A-00 January 2016 RT8481A Function Block Diagram & Typical Application Circuit VOUT Opto VCC R1 RVC1 CVC1 RT8481A 2.5V OUT - CV + FB 60mV - CC CIC1 + CP CN GND R2 RIC1 RIC2 RS GND Operation The available input voltage range is from 4.75V to 50V for the RT8481A. An internal 2.5V reference voltage is generated from VCC input power. The RT8481A can be used to monitor the transformer secondary-side output voltage by the CV control loop and regulate the output current by the CC control loop at the same time. The transformer secondary-side output voltage can be monitored by the FB pin voltage. The sensed FB pin voltage is compared with the 2.5V internal reference. When the FB pin voltage is higher than 2.5V, the OUT pin will sink more current at the external opto-coupler and instruct the controller at primary-side to adjust the output voltage. The output current can be regulated by the voltage across the CN and CP pins through the current sense resistor connected between the CN and CP pins. The voltage difference between CN and CP pins is compared with the 60mV internal reference. When the voltage difference between CN and CP pins is greater than 60mV, the OUT pin will sink more current at the external opto-coupler and instruct the controller at primary-side to adjust the output current. Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS8481A-00 January 2016 is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT8481A Absolute Maximum Ratings (Note 1) Supply Input Voltage, VCC ---------------------------------------------------------------------------------------------CP --------------------------------------------------------------------------------------------------------------------------- CN --------------------------------------------------------------------------------------------------------------------------- FB --------------------------------------------------------------------------------------------------------------------------- OUT ------------------------------------------------------------------------------------------------------------------------- OUT Current -------------------------------------------------------------------------------------------------------------- Power Dissipation, PD @ TA = 25°C SOT-23-6 ------------------------------------------------------------------------------------------------------------------ Package Thermal Resistance (Note 2) SOT-23-6, θJA ------------------------------------------------------------------------------------------------------------- Lead Temperature (Soldering, 10 sec.) ----------------------------------------------------------------------------- Junction Temperature --------------------------------------------------------------------------------------------------- Storage Temperature Range ------------------------------------------------------------------------------------------ ESD Susceptibility (Note 3) HBM (Human Body Model) --------------------------------------------------------------------------------------------MM (Machine Model) ---------------------------------------------------------------------------------------------------  Recommended Operating Conditions    −0.3V to 60V −5V to 1V −0.3V to 1V −0.3V to VCC −0.3V to 50V −20mA to 20mA 0.41W 243.3°C/W 260°C 150°C −65°C to 150°C 2kV 200V (Note 4) Supply Input Voltage, VCC (Note 5) -------------------------------------------------------------------------------- 4.75 to 50V Junction Temperature Range ------------------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range ------------------------------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics (VCC = 12V, TA = 25°C, unless otherwise specified) Parameter Symbol Test Condition Min Typ Max Unit Device Supply Quiescent Current ICC CV Close Loop, VCN = VCP = 0V -- 500 600 CV Close Loop, VCN = VCP = 0V, TA = 25°C to 105°C -- -- 800 A Voltage Control Loop OP Amp Transconductance Power Supply Rejection Rate GMv VCC = 4.75V to 45V -- 1 -- S PSRR VCC = 4.75V to 45V -- 60 -- dB FB Voltage VFB VCN = VCP = 0V 2.487 2.5 2.513 VCN = VCP = 0V, TA = 25°C to 105°C 2.475 -- 2.525 FB Line Regulation dVLINE-FB FB Input Bias Current IFB VCN = VCP = 0V, VCC = 4.75V to 45V -- 0.2 -- VFB = 2.4 to 2.6V -- -- 100 VFB = 2.4 to 2.6V, TA = 25°C to 105°C -- -- 200 VCC = 4.75V to 45V -- 6 -- VFB = 2.4V 59 61 63 TA = 25°C to 105°C 58 -- 64 V % nA Current Control Loop Transconductance CN – CP Voltage VCN-CP Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 S mV is a registered trademark of Richtek Technology Corporation. DS8481A-00 January 2016 RT8481A Parameter Symbol Test Condition Min Typ Max Unit -- 0.2 -- %/V Close Loop -- -- 100 Close Loop, TA = 25°C to 105°C -- -- 200 VOUT = 1.5V VOUT = 1.5V, TA = 25°C to 105°C IOUT = 2mA IOUT = 2mA, TA = 25°C to 105°C ----- 8 8 1 -- --1.2 1.5 CN – CP Line Regulation dVLINE-CN-CP VFB = 2.4V, VCC = 4.75V to 45V CN Input Bias Current Output Stage OUT Maximum Sink Current OUT Minimum Voltage ICN IOUTH VOUTL nA mA V Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. RT8481A starts regulation at VCC ≥ 4.5V, and meets all parameter specs at VCC ≥ 4.75V. Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS8481A-00 January 2016 is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT8481A Typical Operating Characteristics Quiescent Current vs. Temperature 520 2.515 500 480 VCC VCC VCC VCC VCC VCC 460 440 420 = = = = = = 2.505 VFB (V) Quiescent Current (μA) VFB vs. Temperature 2.525 540 4.75V 5V 12V 24V 36V 50V VCC VCC VCC VCC VCC VCC 2.495 2.485 = = = = = = 4.75V 5V 12V 24V 36V 50V 2.475 400 -50 -25 0 25 50 75 100 -50 125 -25 0 25 50 75 100 125 Temperature (°C) Temperature (°C) IFB vs. Temperature VOUTL vs. Temperature 120 1.0 0.9 100 0.8 0.7 VOUTL (V) I FB (nA) 80 60 VCC VCC VCC VCC VCC VCC 40 20 = = = = = = 4.75V 5V 12V 24V 36V 50V -25 0 0.6 VCC VCC VCC VCC VCC VCC 0.5 0.4 0.3 0.2 = = = = = = 0.1 0 0.0 -50 25 50 75 100 125 -50 -25 0 Temperature (°C) 25 50 75 100 125 100 125 Temperature (°C) VCN-CP vs. Temperature IOUTH vs. Temperature 16 62.5 14 62.0 12 61.5 VCN-CP (mV) I OUTH (mA) 4.75V 5V 12V 24V 36V 50V 10 VCC VCC VCC VCC VCC VCC 8 6 4 = = = = = = 4.75V 5V 12V 24V 36V 50V 61.0 VCC VCC VCC VCC VCC VCC 60.5 60.0 59.5 2 = = = = = = 4.75V 5V 12V 24V 36V 50V 59.0 0 -50 -25 0 25 50 75 100 Temperature (°C) Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 125 -50 -25 0 25 50 75 Temperature (°C) is a registered trademark of Richtek Technology Corporation. DS8481A-00 January 2016 RT8481A GMi vs. Temperature GMv vs. Temperature 20 10 18 9 GMi (mA/mV) 14 12 10 = = = = = = 4.75V 5V 12V 24V 36V 50V VCC VCC VCC VCC VCC VCC 8 GMv (mA/mV) VCC VCC VCC VCC VCC VCC 16 8 6 7 6 5 4.75V 5V 12V 24V 36V 50V 4 3 4 2 2 1 0 = = = = = = 0 -50 -25 0 25 50 75 100 Temperature (°C) Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS8481A-00 January 2016 125 -50 -25 0 25 50 75 100 125 Temperature (°C) is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 RT8481A Application Information Output Voltage Setting The voltage control loop is controlled via the first transconductance operational amplifier. An optocoupler which is directly connected to the output and an external resistor bridge is connected between the output positive line and the ground reference. The middle point is to be connected to the FB pin of RT8481A, where R2 is the upper resistor and R1 the lower resistor of the bridge. The relationship between R2 and R1 is shown below : VOUT = VFB  R1 = R2  R1 + R2  R2 V  OUT  VFB  VFB where VOUT is the desired maximum output voltage and VFB is the feedback voltage (2.5V typ). When under constant voltage control mode, the output voltage is fixed due to the R1/R2 resistor bridge. To avoid discharge of the load, the resistor bridge R1, R2, should be highly resistive. For this type of application a total value of 100kΩ (or more) would be appropriate for the resistors R1 and R2. As an example, with R1 = 80kΩ and R2 = 20kΩ, VOUT = 12.5V Output Current Setting The current control loop is controlled via the second transconductance operational amplifier. An optocoupler and the sense resistor, Rs, is placed in series on the output negative line. VCN−CP threshold is achieved externally by a resistor bridge tied to the Vref voltage reference. Its middle point is tied to the positive input of the current control operational amplifier and its foot is to be connected to the lower potential point of the sense resistor. The resistors of the bridge are matched to provide the best precision. With VCN−CP and Rs, the expected output current IOUT can be obtained as below equation. IOUT = VCN-CP RS As an example, with RS = 200mΩ VCN−CP = 60mV, IOUT = 300mA where IOUT is the desired maximum output current, and Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 8 VCN−CP the threshold voltage for the current control loop. Note that RSENSE resistor should be chosen taking into account its maximum power dissipation (PLIM) during full load operation. Compensation Both the voltage control trans-conductance amplifier and the current control trans-conductance amplifier can be fully compensated. The output and negative inputs are directly accessible for external compensation components, as shown in the Typical Application Circuit. The typical component values for the compensation network of voltage control loop is CVC1 = 2.2nF and RVC1 = 22kΩ. The typical component values for the compensation network of current control loop is CIC1 = 2.2nF, RIC1 = 22kΩ and RIC2 = 1kΩ. However, in many application conditions, the current control loop can be stable even without compensation network (RIC2 = 0, no CIC1 nor RIC1). When the voltage control loop is used as the voltage limit protection or the current control loop is used as the current limit protection, no compensation network is needed for the protecting control loop. A resistor, ROPT, must be connected in series with the opto-coupler since it is part of the compensation network. Although the value of ROPT is not critical, it's recommended to be in the range from 0.33kΩ to (VOUT − 2) / (0.005) Ω. Thermal Considerations For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : PD(MAX) = (TJ(MAX) − TA) / θJA where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction to ambient thermal resistance. is a registered trademark of Richtek Technology Corporation. DS8481A-00 January 2016 RT8481A For recommended operating condition specifications, the maximum junction temperature is 125°C. The junction to ambient thermal resistance, θJA, is layout dependent. For SOT-23-6 packages, the thermal resistance, θJA, is 243.3°C/W on a standard JEDEC 51-7 four-layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by the following formula : Layout Consideration For the best performance of the RT8481A, the following PCB Layout guidelines must be strictly followed.  Place the RSENSE resistor as close to IC as possible.  Keep the input/output traces as wide and short as possible. PD(MAX) = (125°C − 25°C) / (243.3°C/W) = 0.41W for SOT-23-6 package VOUT Optocoupler The maximum power dissipation depends on the operating ambient temperature for fixed T J(MAX) and thermal resistance, θJA. The derating curve in Figure 1 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. RLED RIC1 LED CIC1 : : : VCC OUT CP 0.5 Maximum Power Dissipation (W)1 R1 RVC1 CVC1 Four-Layer PCB 6 5 4 2 3 0.4 CN 0.3 CN GND OVP RIC2 0.2 R2 RSENSE GND 0.1 GND Figure 2. PCB Layout Guide 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Figure 1. Derating Curve of Maximum Power Dissipation Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS8481A-00 January 2016 is a registered trademark of Richtek Technology Corporation. www.richtek.com 9 RT8481A Outline Dimension H D L C B b A A1 e Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.889 1.295 0.031 0.051 A1 0.000 0.152 0.000 0.006 B 1.397 1.803 0.055 0.071 b 0.250 0.560 0.010 0.022 C 2.591 2.997 0.102 0.118 D 2.692 3.099 0.106 0.122 e 0.838 1.041 0.033 0.041 H 0.080 0.254 0.003 0.010 L 0.300 0.610 0.012 0.024 SOT-23-6 Surface Mount Package Richtek Technology Corporation 14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. www.richtek.com 10 DS8481A-00 January 2016
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