RT8980H
USB Type-C Analog Audio and USB Switch
Features
General Description
Power Supply : VCC = 2.7V to 5.5V
High Absolute Maximum Ratings, 24V of SBU1/2
and GSBU1/2. 20V of DPR/DNL
USB High Speed (480Mbps) Switch RON of
3Typical
Audio Switch RON of 1Typical
Negative Rail Capability : 3V to 3V
THD + N = 110dB; 1VRMS, f = 20Hz to 20kHz, 32
Load
OMTP and CTIA Pinout Support
Support Audio Sense GND Path
The RT8980H is a USB Type-C audio interface switch
IC which supports analog audio headsets for mobile
devices.
The RT8980H provides a general USB Type−C port to
pass USB2.0 data signal (DP, DN), sideband use signal,
analog audio R L signal, and analog microphone signal.
The RT8980H also supports high voltage protection for
USB port and SBU port on USB Type−C receptacle side.
Ordering Information
RT8980H
Applications
Package Type
WSC : WL-CSP-25B 2.21x2.25 (BSC)
Mobile Phones
Tablets
Notebooks/PCs
USB-C Media Players
Note :
Richtek products are :
RoHS compliant and compatible with the current
requirements of IPC/JEDEC J-STD-020.
Suitable for use in SnPb or Pb-free soldering processes.
Simplified Application Circuit
CC CC1
Logic
CC2
RT8980H
GPIO1
ENN
GPIO2
SCL
ADDR
SCL
VCC
VCC
CVCC
SDA
SDA
GPIO3
DET
GPIO4
INT
DNL
L
DPR
AP
DN
DP
CC_IN
USB Type-C
Receptacle
SBU2
CC1
DN
DN
R
DP
GSBU2
GSBU1
DP
CC2 SBU1
SBU1
HPL
HPR
SENSE
MIC
SBU2
SENSE
MIC
Audio Codec
AUX+
SBU2_H
AUX-
SBU1_H
DP Controller
GND
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RT8980H
Marking Information
Pin Configuration
(TOP VIEW)
28 : Product Code
YMDNN : Date Code
28 YM
DNN
A1
A2
A3
A4
A5
SBU1_H
SBU2
SBU1
ENN
VCC
B1
B2
B3
B4
B5
SBU2_H
AGND
AGND
ADDR
GND
C1
C2
C3
C4
C5
MIC
DET
INT
L
R
D1
D2
D3
D4
D5
GSBU1
CC_IN
SCL
DNL
DPR
E1
E2
E3
E4
E5
GSBU2
SENSE
SDA
DN
DP
WL-CSP-25B 2.21x2.25 (BSC)
Functional Pin Description
Pin No.
Pin Name
Pin Function
A1
SBU1_H
A2
SBU2
Sideband use wire 2.
A3
SBU1
Sideband use wire 1.
A4
ENN
Chip enable. Active low, internal pull−down by 470k.
A5
VCC
Power supply. (2.7 to 5.5V)
B1
SBU2_H
B2, B3
AGND
Audio signal ground.
B4
ADDR
I2C slave address pin.
B5
GND
Chip ground.
C1
MIC
Microphone signal.
C2
DET
Push−pull output. When CC_IN > 1.5V, DET is low and CC_IN < 1.2V, DET is high.
C3
INT
I2C Interrupt output, active low. (open drain) Manual mode input.
C4
L
Audio – left channel.
C5
R
Audio – right channel.
D1
GSBU1
Audio sense path 1 to headset jack GND.
D2
CC_IN
Audio accessory attachment detection input.
D3
SCL
I2C interface serial clock input. An external pull-up resistor is required.
D4
DNL
USB/Audio common connector.
D5
DPR
USB/Audio common connector.
E1
GSBU2
Audio sense path 2 to headset jack GND.
E2
SENSE
Audio ground reference output.
E3
SDA
E4
DN
Host side sideband uses wire 1.
Host side sideband uses wire 2.
I2C interface serial data input/output. Open-drain. An external pull-up resistor is required.
USB data. (Differential -)
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RT8980H
Pin No.
Pin Name
E5
DP
Pin Function
USB data. (Differential +)
Functional Block Diagram
SCL
SDA
INT
ENN
ADDR
DET
I/O
Buffer
Digital &
Charge Pumping
Control
Bandgap
IREF
CC Plug-In
Detection
VCC
CC_IN
TVS Diode
DP
DPR
R
OVP
DN
DNL
L
OVP
USB & Audio Switch
GSBU1
GSBU2
SENSE
SENSE GND
Switch
MIC
ESD
Protection
AGND
SBU1
SBU1_H
OVP
SBU2_H
SBU2
SBU Cross-Point Switch
Copyright © 2021 Richtek Technology Corporation. All rights reserved.
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January 2021
ADC for Resistance Detection on
SBU1/SBU2/DPR/DNL/CC_IN
GND
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RT8980H
Absolute Maximum Ratings
(Note 1)
CC_IN/SBU1/SBU2/GSBU1/GSBU2 --------------------------------------------------------------------------- 0.5V to 24V
DPR/DNL -------------------------------------------------------------------------------------------------------------- 3.6V to 20V
R/L ---------------------------------------------------------------------------------------------------------------------- 3.6V to 6.5V
VCC/DP/DN/MIC/SENSE/SBU1_H/SBU2_H/DET/INT ---------------------------------------------------- 0.5V to 6.5V
SCL/SDA/ENN/ADDR ---------------------------------------------------------------------------------------------- 0.5V to 6.5V
Switch I/O Current, (Audio Path) -------------------------------------------------------------------------------- 250mA to 250mA
Switch I/O Current, (USB Path) ---------------------------------------------------------------------------------- 100mA
Switch I/O Current, (MIC to SBUx/SBUx_H to SBUx) ------------------------------------------------------ 50mA
Switch I/O Current, (SENSE to GSBUx) ----------------------------------------------------------------------- 100mA
Switch I/O Current, (AGND to SBUx)--------------------------------------------------------------------------- 500mA
Power Dissipation, PD @ TA = 25C
WL-CSP-25B 2.21x2.25 (BSC) ---------------------------------------------------------------------------------- 4.04W
Package Thermal Resistance
(Note 2)
WL-CSP-25B 2.21x2.25 (BSC), JA ---------------------------------------------------------------------------- 30.9C/W
Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------ 260C
Junction Temperature ---------------------------------------------------------------------------------------------- 150C
Storage Temperature Range ------------------------------------------------------------------------------------- 65C to 150C
ESD Susceptibility
(Note 3)
HBM (Human Body Model)
Connector Side : SBU1, SBU2, DPR, DNL,
GSBU1, GSBU2, CC_IN (Pin to GND) --------------------------------------------------------------------- ±4kV
Power Pins : VCC (Pin to GND) ------------------------------------------------------------------------------ ±2kV
Host Side Pins : The Rest Pins ------------------------------------------------------------------------------- ±2kV
Recommended Operating Conditions
(Note 4)
Supply Input Voltage, VDD ---------------------------------------------------------------------------------------2.7V to 5.5V
USB Switch ----------------------------------------------------------------------------------------------------------- 0V to 3.6V
AUDIO Switch -------------------------------------------------------------------------------------------------------- 3.6V to 3.6V
MIC Switch ------------------------------------------------------------------------------------------------------------ 0V to 3.6V
SENSE Switch ------------------------------------------------------------------------------------------------------- 0V to 3.6V
SBU TO SBUx_H Switch ------------------------------------------------------------------------------------------ 0V to 3.6V
CC_IN Pin ------------------------------------------------------------------------------------------------------------- 0V to 5.5V
Input Voltage High of Control Voltage (ENN/ADDR/SDA/SCL/INT) ------------------------------------ 1.3V to VCC
Input Voltage Low of Control Voltage (ENN/ADDR/SDA/SCL/INT) ------------------------------------- 0V to 0.5V
Ambient Temperature Range------------------------------------------------------------------------------------- 40C to 85C
Junction Temperature Range ------------------------------------------------------------------------------------ 40C to 150C
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is a registered trademark of Richtek Technology Corporation.
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RT8980H
Electrical Characteristics
(VCC = 2.7V to 5.5V, VCC (Typ.) = 3.3V, TA = 40C to 85C and TA (Typ.) = 25C, unless otherwise specified)
Parameter
Min
Typ
Max
Unit
USB switches on, SBUx to
SBUx_H switches on
VCC : 2.7V to 5.5V
--
--
100
A
Audio switches on, MIC switch on
and Audio GND switch on
VCC : 2.7V to 5.5V
--
--
120
A
ENN = L, 04H’b7 = 0
VCC : 2.7V to 5.5V
--
--
7
A
Off Leakage Current of DPR and
IOZ
DNL
DNL, DPR = 3V to 3.6V
VCC : 2.7V to 5.5V
3
--
3
A
Power−Off Leakage Current of
DPR and DNL
DNL, DPR = 0V to 3.6V,
Power off
3
--
3
A
Input OVP Lockout on DPR/DNL VOV_TRIP
Rising edge
VCC : 2.7V to 5.5V
4.5
5
5.3
V
Input OVP Hysteresis of
DPR/DNL
VOV_HYS
VCC : 2.7V to 5.5V
--
0.3
0.55
V
ION
DNL, DPR = −3V to 3V,
DP, DN, R, L = Float
VCC : 2.7V to 5.5V
2.5
--
2.5
A
Supply Current
Quiescent Current
Symbol
ICC
ICCZ
Test Conditions
USB/AUDIO Common Pins : DPR, DNL
IOFF
AUDIO Switch
On Leakage Current of Audio
Switch
Power−Off Leakage Current of L
IOFF
and R
L, R = 0V to 3V; DPR, DNL = Float
Power off
1
--
1
A
AUD Switch On-Resistance
RON
ISW = 100mA, VSW = −3V to 3V
VCC : 2.7V to 5.5V
--
1
2
Pull-Down Resistor on R/L Pin
when Audio Switch is Off
RSHUNT
L = R = 3V
VCC : 2.7V to 5.5V
6
10
14
k
On Leakage Current of USB
Switch
ION
DNL, DPR = 0V to 3.6V;
DP, DN, R, L = Float
VCC : 2.7V to 5.5V
3
--
3
A
Off Leakage Current of DP and
DN
IOZ
DN, DP = 0V to 3.6V
VCC : 2.7V to 5.5V
3
--
3
A
Power−Off Leakage Current of
DP and DN
IOFF
DP, DN = 0V to 3.6V;
Power off
3
--
3
A
USB Switch On-Resistance
RON
ISW = 8mA, VSW = 0.4V
VCC : 2.7V to 5.5V
--
3
5
On Leakage Current of SENSE
Switch
ION
GSBUx = 0V to 1V,
SENSE is floating
VCC : 2.7V to 5.5V
2
--
2
A
Off Leakage Current of SENSE
IOZ
SENSE = 0 V to 1V
VCC : 2.7V to 5.5V
2
--
2
A
USB Switch
SENSE Switch
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January 2021
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RT8980H
Parameter
Off Leakage Current of GSBUx
Symbol
IOZ
Test Conditions
Min
Typ
Max
Unit
GSBUx = 0 V to 1V
VCC : 2.7V to 5.5V
2
--
2
A
GSBUx = 1 V to 3.6V
VCC : 2.7V to 5.5V
3
--
3
A
Power−Off Leakage Current of
SENSE
IOFF
SENSE = 0V to 1V; Power off
2
--
2
A
Power−Off Leakage Current of
GSBUx
IOFF
GSBUx = 0V to 3.6V; Power off
3
--
3
A
SENSE Switch On Resistance
RON
ISW = 100mA, VSW = 1V
VCC : 2.7V to 5.5V
--
300
600
m
Input OVP Lockout on GSBUx
VOV_TRIP
Rising edge
VCC : 2.7V to 5.5V
4.5
5
5.3
V
Input OVP Hysteresis of GSBUx
VOV_HYS
VCC : 2.7V to 5.5V
--
0.3
0.55
V
Off Leakage Current of SBUx
IOZ
SBUx = 0V to 3.6V
VCC : 2.7V to 5.5V
3
--
3
A
Power−Off Leakage Current of
SBUx
IOFF
SBUx = 0 V to 3.6 V, Power off
3
--
3
A
Input OVP Lockout on SBUx
VOV_TRIP
Rising edge
VCC : 2.7V to 5.5V
4.5
5
5.3
V
Input OVP Hysteresis of SBUx
VOV_HYS
VCC : 2.7V to 5.5V
--
0.3
0.55
V
On Leakage Current of MIC
Switch
ION
SBUx = 0V to 3.6V,
MIC = Float
VCC : 2.7V to 5.5V
3
--
3
A
Off Leakage Current of MIC
IOZ
MIC = 0V to 3.6V
VCC : 2.7V to 5.5V
1
--
1
A
Power−Off Leakage Current of
MIC
IOFF
MIC = 0V to 3.6V;
Power off
1
--
1
A
MIC Switch On-Resistance
RON
ISW = 30mA, VSW = 3.6V
VCC : 2.7V to 5.5V
--
3
5
On Leakage Current of SBUx_H
ION
Switch
SBUx = 0V to 3.6V,
SBUx_H = Float
VCC : 2.7V to 5.5V
3
--
3
A
Off Leakage Current of SBUx_H IOZ
SBUx_H = 0V to 3.6V
VCC : 2.7V to 5.5V
1
--
1
A
Power−Off Leakage Current of
SBUx_H
IOFF
SBUx_H = 0V to 3.6V;
Power off
1
--
1
A
SBUx_H Switch On-Resistance
RON
ISW = 30mA, VSW = 3.6V
VCC : 2.7V to 5.5V
--
3
5
SBUX Pins
MIC Switch
SBUX_H Switch
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RT8980H
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
--
50
90
m
AUDIO GROUND Switch : Pin : AGND to SBUX
RON
ISOURCE = 100mA on SBUx,
VCC : 2.7V to 5.5V
Input Low Threshold
VTH_L
VCC : 2.7V to 5.5V
1.03
1.2
1.37
V
Input High Threshold
VTH_H
VCC : 2.7V to 5.5V
1.35
1.5
1.65
V
Input Leakage of CC_IN
VTH_H
CC_IN = 0V to 5.5V
VCC : 2.7V to 5.5V
--
--
1
A
Output High for DET
VOH
IO = 2mA
VCC : 2.7V to 5.5V
1.5
1.8
2
V
Output Low for DET and INT
VOL
IO = 2mA
VCC : 2.7V to 5.5V
--
--
0.4
V
Input High for INT
VIH
VCC : 2.7V to 5.5V
1.5
--
--
V
Input Low for INT
VIL
VCC : 2.7V to 5.5V
--
--
0.45
V
Input voltage High
VIH
VCC : 2.7V to 5.5V
1.3
--
--
V
Input voltage Low
VIL
VCC : 2.7V to 5.5V
--
--
0.45
V
Control Input Leakage
VTH_H
ADDR = 0V to VCC
VCC : 2.7V to 5.5V
1
--
1
A
Input voltage High
VIH
VCC : 2.7V to 5.5V
1.3
--
--
V
Input voltage Low
VIL
VCC : 2.7V to 5.5V
--
--
0.45
V
Internal Pull Down Resistor
RPD
VCC : 2.7V to 5.5V
300
470
630
k
Low−Level Input Voltage
VILI2C
VCC : 2.7V to 5.5V
--
--
0.4
V
High-Level Input Voltage
VIHI2C
VCC : 2.7V to 5.5V
1.2
--
--
V
Input Current of SDA and SCL
Pins
II2C
SCL/SDA = 0 V to 3.6V
VCC : 2.7V to 5.5V
2
--
2
A
Low−Level Output Voltage
VOLSDA
IOL = 2mA
--
--
0.3
V
Low−Level Output Current
IOLSDA
VOLSDA = 0.2V
10
--
--
mA
AGND Switch On-Resistance
CC_IN Pin
INT DET Pins
ADDR Pin
ENN Pin
SDA, SCL Pins
2
VI2C
--
1.8
--
V
2
I C CLK Frequency
f SCL
--
--
400
kHz
I2C Data Hold Time
tDH_I2C
--
--
900
ns
tDS_I2C
100
--
--
ns
I C Work Voltage
2
I C Data Set-Up Time
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RT8980H
AC Electrical Characteristics
(VCC = 2.7V to 5.5V, VCC (Typ.) = 3.3V, TA = 40C to 85C and TA (Typ.) = 25C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
DPR = DNL = 1V, RL = 32
VCC = 3.3V
--
75
--
DPR = DNL = 1V, RL = 32
VCC = 3.3V (Note 5)
--
60
--
Unit
AUDIO Switch
Audio Switch Turn On Delay
Time
tDELAY_AUD
Audio Switch Turn On Rising
Time
tRISE_AUD
DPR = DNL = 1V, RL = 32
VCC = 3.3V (Note 6)
--
200
--
s
Audio Switch Turn Off Time
tOFF_AUD
DPR = DNL = 1V, RL = 32
VCC = 3.3V
--
2.5
5
s
Cross Talk (Adjacent)
XTALK
f = 1kHz, RL = 50, VSW = 1VRMS
--
−100
--
dB
−3dB Bandwidth
BW
RL = 50
--
600
--
MHz
Off Isolation
OIRR
f = 1kHz, RL = 50, VSW = 1VRMS
--
−100
--
dB
RL = 600, f = 20Hz to 20kHz,
VSW = 2VRMS
--
−110
--
dB
RL = 32, f = 20Hz to 20kHz,
VSW = 1VRMS
--
−110
--
dB
RL = 16, f = 20Hz to 20kHz,
VSW = 0.5VRMS
--
−110
--
dB
DPR = DNL = 1.5V, RL = 50
VCC = 3.3V
--
45
--
DPR = DNL = 1.5V, RL = 50
VCC = 3.3V (Note 5)
--
45
--
tOFF_USB
DPR = DNL = 1.5V, RL = 50
VCC = 3.3V
--
3.7
7
BW
RL = 50, VCC = 3.3V
--
850
--
--
850
--
Off Isolation
OIRR
f = 1kHz, RL = 50,
VSW = 1 VRMS, VCC = 3.3V
--
−100
--
dB
DPR and DNL Pins OVP
Response Time
tOVP
VSW = 3.5V to 5.5V
VCC = 3.3V
--
0.5
1
s
SBUx= 1V, RL = 50,
VCC = 3.3V
--
70
--
SBUx= 1V, RL = 50,
VCC = 3.3V (Note 5)
--
65
--
SBUx= 1V, RL = 50,
VCC = 3.3V (Note 6)
--
250
--
Total Harmonic Distortion +
Noise Performance with
A−weighting Filter
THD+N
s
USB Switch
USB Switch Turn−On Time
USB Switch Turn−Off Time
Single Ended −3dB Bandwidth
Differential −3dB Bandwidth
tON_USB
s
s
MHz
MIC/AUDIO Ground Switch
MIC Switch Turn-On Delay Time tDELAY_MIC
MIC Switch Turn-On Rising
Time
tRISE_MIC
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RT8980H
Parameter
AGND Switch Turn-On Delay
Time
Symbol
tDELAY_AGND
Test Conditions
Min
Typ
Max
SBUx pulled up to 0.5V by 16,
AGND connect to GND
VCC = 3.3V
--
40
--
SBUx pulled up to 0.5V by 16,
AGND connect to GND
VCC = 3.3V (Note 5)
--
30
--
Unit
s
AGND Switch Turn-On Rising
Time
tRISE_AGND
SBUx pulled up to 0.5 V by 16,
AGND connect to GND
VCC = 3.3V (Note 6)
--
700
--
s
MIC Switch Turn-Off Time
tOFF_MIC
SBUx = 2.5 V, RL = 50,
VCC = 3.3V
--
3
6
s
GND
SBUx : Isource = 10mA,
clamp to 2.5V
--
3
6
s
BW
RL = 50, VCC = 3.3V
--
50
--
MHz
SBUx = 2.5V, RL = 50,
VCC = 3.3V
--
95
--
SBUx = 2.5V, RL = 50,
VCC = 3.3V (Note 5)
--
3
--
AGND Switch Turn-Off Time
−3dB Bandwidth
tOFF_AUDIO
SBUx_H Switch
SBUx_H Switch Turn-On Time
tON_SBUx_H
s
SBUx_H Switch Turn-Off Time
tOFF_SBUx_H
SBUx = 2.5V, RL = 50,
VCC = 3.3V
--
3
6
s
−3dB Bandwidth
BW
RL = 50, VCC = 3.3V
--
50
--
MHz
VSW = 3.5V to 5.5V,
VCC = 3.3V
--
0.5
1
s
GSBUx = 1V, RL = 50,
VCC = 3.3V
--
110
--
GSBUx = 1V, RL = 50,
VCC = 3.3V (Note 5)
--
110
--
SBUx Pins OVP Response Time tOVP
SENSE Switch
SENSE Switch Turn-On Delay
Time
tON_SENSE
SENSE Switch Turn-On Rising
Time
tRISE_SENSE
GSBUx = 1V, RL = 50,
VCC = 3.3V (Note 6)
--
160
--
s
SENSE Switch Turn-Off Time
tOFF_SENSE
GSBUx = 1 V, RL = 50,
VCC = 3.3V
--
4
8
s
−3dB Bandwidth
BW
RL = 50, VCC = 3.3V
--
150
--
MHz
GSBUx Pins OVP Response
Time
tOVP
VSW = 3.5V to 5.5V,
VCC = 3.3V
--
0.75
1.5
s
Transition from 0V to 1.8V,
VCC = 3.3V
--
6
7
s
Transition from 1.8V to 0V,
VCC = 3.3V
--
6
7
s
s
DET Delay
DET Response Delay
tDELAY_DET
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RT8980H
Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These
are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect
device reliability.
Note 2. JA is measured under natural convection (still air) at TA = 25°C with the component mounted on a high effective-thermalconductivity four-layer test board on a JEDEC 51-7 thermal measurement standard.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. If any switch enable, turn on and turn on delay time will enable faster.
Note 6. Turn-on rising timing can be controlled by I2C register.
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RT8980H
Typical Application Circuit
CC CC1
Logic
CC2
VDDIO 1.8V
VDDIO 1.8V
R1
10k
GPIO1
R2
2.2k
R3
2.2k
A4
ENN
B4
ADDR
D3
SCL
E3
SDA
C2
DET
C3
INT
C4
L
E4
DN
C5
R
E5
DP
GPIO2
SCL
SDA
GPIO3
GPIO4
AP
DN
DP
VCC
3.3V
RT8980H
VCC
CC_IN
DNL
DPR
GSBU2
GSBU1
SBU1
HPL
HPR
SENSE
MIC
SBU2
A5
CVCC
1µF
D2
USB Type-C
Receptacle
D4
SBU2
D5
E1
DN
D1
DP
CC1
CC2 SBU1
A3
A2
E2
SENSE
C1
MIC
Audio Codec
B1
AUX+
A1
AUX-
SBU2_H
SBU1_H
DP Controller
GND
AGND
B2, B3
B5
Table 1. Recommended Components Information
Reference
Q'ty
Part Number
Description
Package
Manufacturer
CVCC
1
TMK107BJ105KA-T
1F/X5R/25V
0603
TAIYO YUDEN
R1
1
WR06X1002FTL
10k
0603
WALSIN
R2, R3
2
WR06X2201FTL
2.2k
0603
WALSIN
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RT8980H
Typical Operating Characteristics
Supply Current - USB On & SBU On
Quiescent Current
1.2
100
85C
80
40C
1.0
85C
0.8
I CCZ (μA) 1
I CC (μA)
90
25C
70
60
25C
40C
0.6
0.4
0.2
0.0
50
2
3
4
5
2
6
3
4
Supply Current AUDIO On & MIC On & AGND On
6
USB Switch RON Flatness
4.4
100
25C : OMTP
85C : OMTP
40C : OMTP
25C : CTIA
85C : CTIA
40C : CTIA
DPR-DP : 85C
3.8
RON (Ω)
90
I CC (μA) 1
5
VCC (V)
VCC (V)
80
DNL-DN : 85C
DNL-DN : 25C
3.2
DPR-DP : 25C
DNL-DN : 40C
2.6
70
DPR-DP : 40C
VCC = 3.3V
2.0
60
2
3
4
5
0.0
6
0.5
1.0
1.5
VCC (V)
AUDIO Switch RON Flatness
2.5
3.0
3.5
4.0
MIC Switch RON Flatness
2.0
5
DNL-L : 25C
DPR-R : 25C
DNL-L : 85C
DPR-R : 85C
SBU1-MIC : 85C
4
RON (Ω)
1.5
RON (Ω)
2.0
VSW (V)
1.0
DNL-L : 40C
DPR-R : 40C
0.5
SBU1-MIC : 25C
3
SBU1-MIC : 40C
SBU2-MIC : 85C
SBU2-MIC : 25C
SBU2-MIC : 40C
2
VCC = 3.3V
VCC = 3.3V
0.0
1
-4
-3
-2
-1
0
1
2
3
VSW (V)
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4
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
VSW (V)
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SBUX_H Switch RON Flatness 1
SBUX_H Switch RON Flatness 2
5
5
4
SBU1-SBU2_H : 85C
4
SBU1-SBU1_H : 85C
RON (Ω)
RON (Ω)
SBU2-SBU2_H : 85C
SBU1-SBU1_H : 25C
3
SBU1-SBU1_H : 40C
SBU2-SBU2_H : 25C
SBU2-SBU1_H : 85C
SBU1-SBU2_H : 25C
3
SBU1-SBU2_H : 40C
SBU2-SBU2_H : 40C
2
SBU2-SBU1_H : 25C
SBU2-SBU1_H : 40C
2
VCC = 3.3V
VCC = 3.3V
1
1
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
VSW (V)
VSW (V)
SENSE Switch RON Flatness
0.5
RON (Ω)
0.4
0.3
0.2
GSBU1-SENSE : 25°C
GSBU2-SENSE : 25°C
GSBU1-SENSE : 85°C
GSBU2-SENSE : 85C
GSBU1-SENSE : 40C
GSBU2-SENSE : 40C
0.1
VCC = 3.3V
0.0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
VSW (V)
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RT8980H
Application Information
MIC Switch Auto−Off Function
Over−Voltage Protection
The RT8980H provides over-voltage protection (OVP)
on Type-C receptacle side pins (DPR, DNL, SBU1,
SBU2, GSBU1 and GSBU2). When the input voltage
exceeds the OVP threshold, switch will be turned off
until OVP event release. If OVP event occurs, the
device will send interrupt by INT signal and OVP-status
will provide information about which pin has OVP event.
Headset Detection
The RT8980H detects the CC_IN voltage, and monitors
headset jack to see if the Type-C plug is inserted. The
headset detection function is always active when the
RT8980H is enabled. The DET will be low when CC_IN
> 1.5V. When CC_IN < 1.2V, the DET will be rise to high.
The MIC auto-off function is active when R, L, Audio
ground switches are under on status, CC_IN > 1.5V and
control enable bit 0x12[2] = 1. The MIC switch will be
turned off and receptacle side pin (SBU1/2) will be
shorted to ground for 50s first. Then it shows high−Z
status when MIC switch is set to on status.
Audio Ground Detection and Configuration
This function is active when control enable bit 0x12[0] =
1 and R, L, AGND switches are turned on. For Type−C
interface analog headset, the audio ground can be the
SBU1 pin or the SBU2 pin. This function automatically
detects two different configurations for headsets with
microphones. Users can adjust current source setting
by 0x1F to optimize configuration.
During detection and configuration, the R, L, MIC,
Device
Disable
Device
Enable
CC_IN < VTH_L = 1.2V
DET = 0
DET = 1
CC_IN > VTH_H = 1.5V
DET = 0
DET = 0
Sense and Audio ground switches will be turned off.
When device detection and configuration is done, R, L,
MIC, Sense and Audio ground switch will turn on
according to detection results and timing control setting.
Audio Jack detection
and configuration Start
REG2 ≥ DATA1
and
REG1 ≥ DATA1
REG2 > REG1 > DATA0
&& REG1 < DATA1
or
REG2 > DATA0 > REG1
REG1 > REG2 > DATA0
&& REG2 < DATA1
or
REG1 > DATA0 > RGE2
DATA0 ≥ REG1
and
DATA0 ≥ REG2
Hold current setting
send INT
MIC to SBU2,
Audio ground to SBU1
Sense to GSBU1
send INT
MIC to SBU1,
Audio ground to SBU2
Sense to GSBU2
send INT
Audio ground to SBU1
Sense to GSBU1
SBU2 switch open
send INT
Resistance Detection
Resistance Detection function is active when control
enable bit 0x12[1] = 1. It will detect foreign object
between receptacle side pins and ground. During RES
detection, the switch which is monitored will be turned
off. It will detect for 1.2ms and the ADC sample time is
0.7ms. The total RES detection timing is 1.9ms. The
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detection result will be saved in the 0x14h resistance
flag register. The CC_IN, SBU1 and SBU2
measurement can be from 1k to 2.32M, and the DPR
and DNL measurement can be from 1k to 1.7M
which is controlled by internal register. The cycling
detection (100ms, 1s or 10s) can be set by register
0x16h.
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RES Detection Start
(0x12[1])
Enable RES
Detection on
DP/R
Enable RES
Detection on
CC_IN
Enable RES
Detection on
SBU2
Enable RES
Detection on
SBU1
Enable RES
Detection on
DN/L
Update RES value register
And compare with threshold
No
If interval reg = 0
> Threshold
Wait timer that set by
interval reg and check
0x12 bit[1] = 1?
Yes
No
Yes
< Threshold
Send INT
Disable resistance
detection
Manual Switch Control
Manual Switch function is active when control enable bit 0x12[4] = 1 and switch setting enable bit 0x04h = FF. During
this setup, the ADDR and INT pins will be set as logic control input. It will provide manual mode control for device.
Table 2. Manual Mode Table
Power ENN ADDR
INT
USB Switch
SBU bypass
Switch
Audio
Switch
MIC
Switch
Audio
Ground
Switch
Sense
Switch
Headset
Detection
OFF
X
X
X
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ON
H
X
X
OFF
OFF
OFF
OFF
OFF
OFF
OFF
0
ON
DPR to DP
DNL to DN
ON :
SBU1 to
SBU1_H
SBU2 to
SBU2_H
OFF
OFF
OFF
OFF
OFF
ON :
SBU1 to
SBU2_H
SBU2 to
SBU1_H
OFF
OFF
OFF
OFF
OFF
ON
L
0
ON
L
0
1
ON
DPR to DP
DNL to DN
ON
L
1
0
OFF
OFF
ON :
DPR to R
DNL to L
ON :
SBU1 to
MIC
ON :
SBU2 to
Audio GND
ON :
GSBU2 to
SESNE
ON
ON
L
1
1
OFF
OFF
ON :
DPR to R
DNL to L
ON :
SBU2 to
MIC
ON :
SBU1 to
Audio GND
ON :
GSBU1 to
SESNE
ON
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RT8980H
4. Switch-On Leakage (lON) (Each switch is tested
Test Diagrams
separately)
1. Turn On/Off Waveforms
Switch ON
Commnand
SCL
Switch OFF
Commnand
STOP
STOP
ION
Float
A
tON 90%
VSW
Select
H
GND
I/O
out
tDELAY
L
tOFF
tRISE
10%
VSEL = 0 or VCC
5. Power-Off Leakage (lOFF) (Each switch is tested
separately)
2. Switch On-Resistance
VON
IOFF
Float
A
VSW
Select
GND
VSW
VCC = 0V
ISW
Select
GND
GND
6. Bandwidth
RON = VON / ISW
RS and RT are function of application environment
(see AC/DC Tables).
3. Switch-Off Leakage (lOZ) (Each switch is tested
Network Analyzer
separately)
RS
VIN
VS
GND
Float
VSEL
IOZ
A
GND
GND
VSW
Select
GND
RT
VOUT
GND
GND
VSEL = 0 or VCC
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RT8980H
7. Channel Off Isolation
9. Total Harmonic Distortion (THD + N)
RS and RT are function of application environment
RS and RT are function of application environment
(see AC/DC Tables).
(see AC/DC Tables).
Audio Precision
Network Analyzer
RS
RS
VCNTRL
VSEL
VIN
RT
GND
GND
GND
RT
GND
VIN
VS
GND
VOUT
VS
VSEL
GND
GND
RT
VOUT
GND
OFF - Isolation = 20 Log(VOUT / VIN)
GND
8. Adjacent Channel CROSSTALK
RS and RT are function of application environment
(see AC/DC Tables).
Audio Precision
RS
VIN
VS
GND
RT
GND
VSEL
GND
RT
RT
CROSSTALK = 20 Log(VOUT / VIN)
GND GND
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RT8980H
I2C Interface
The following table shows the RT8980H unique address as below.
Table 3. The RT8980H Unique AddressRT8980H I2C Slave Address
ADDR
MSB
LSB
R/W bit
R/W
ADDR = L
100001
0
1/0
85/84
ADDR = H
100001
1
1/0
87/86
The I2C interface bus must be connected to a resistor 2.2k to power node and independent connection to processor,
individually. The I2C timing diagrams are listed below.
Read and Write Function
Read single byte of data from Register
Slave Address
Register Address
S
0
Slave Address
A
MSB
A Sr
1
LSB
A
A
Assume Address = m
R/W
Data
P
Data for Address = m
Read N bytes of data from Registers
Slave Address
Register Address
S
0
Slave Address
A
MSB
A Sr
1
MSB
A
Data for Address = m
Data 2
LSB
MSB
Data N
LSB
A
A
S
0
Register Address
A
0
Data
LSB
A
Write N bytes of data to Registers
Slave Address
S
MSB
Assume Address = m
R/W
A P
Data for Address = m
Register Address
A
MSB
Data 1
LSB
A
Assume Address = m
R/W
P
Data for Address = m + N - 1
Data for Address = m + 1
Write single byte of data to Register
Slave Address
LSB
A
Assume Address = m
R/W
Data 1
MSB
Data 2
LSB
A
Data for Address = m
MSB
A
Data for Address = m + 1
Data N
LSB
A P
Data for Address = m + N - 1
Driven by Master,
Driven by Slave, P Stop,
S Start,
Sr Repeat Start
I2C Waveform Information
SDA
tLOW
tF
tSU;DAT
tR
tF
tHD;STA
tSP
tBUF
tR
SCL
tHD;STA
S
tHD;DAT
tHIGH
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tSU;STA
tSU;STO
P
Sr
S
is a registered trademark of Richtek Technology Corporation.
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Thermal Considerations
PD(MAX) = (TJ(MAX) - TA) / JA
where TJ(MAX) is the maximum junction temperature, TA
is the ambient temperature, and JA is the junction-toambient thermal resistance.
For continuous operation, the maximum operating
junction temperature indicated under Recommended
Operating Conditions is 150°C. The junction-to-ambient
thermal resistance, JA, is highly package dependent.
For a WL-CSP-23B 2.21x2.25 (BSC) package, the
thermal resistance, JA, is 30.9°C/W on a standard
JEDEC 51-7 high effective-thermal-conductivity fourlayer test board. The maximum power dissipation at TA
= 25°C can be calculated as below :
Maximum Power Dissipation (W)1
The junction temperature should never exceed the
absolute maximum junction temperature TJ(MAX), listed
under Absolute Maximum Ratings, to avoid permanent
damage to the device. The maximum allowable power
dissipation depends on the thermal resistance of the IC
package, the PCB layout, the rate of surrounding airflow,
and the difference between the junction and ambient
temperatures. The maximum power dissipation can be
calculated using the following formula :
5
Four-Layer PCB
4
3
2
1
0
0
25
50
75
100
125
150
Ambient Temperature (°C)
Figure 1. Derating Curve of Maximum Power
Dissipation
PD(MAX) = (150°C - 25°C) / (30.9°C/W) = 4.04W for a
WL-CSP-23B 2.21x2.25 (BSC) package.
The maximum power dissipation depends on the
operating ambient temperature for the fixed TJ(MAX) and
the thermal resistance, JA. The derating curves in
Figure 1 allows the designer to see the effect of rising
ambient temperature on the maximum power
dissipation.
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RT8980H
I2C Register Table
R : Read only.
RC : Read then Clear.
RW : Read and Wirte.
WC : Write “1” then clear to “0” after this procedure finish.
Register Maps
Address Length
0x00
0x01
1
1
RegName
DEVICE ID
OVP
INTERRUPT
MASK
Bit
Bit Name
Default
Type
7:6
Vendor ID
11
R
Vendor ID
5:3
Version ID
010
R
Device version ID
2:0
Revision ID
110
R
Revision history ID
7
Reserved
0
R
Do not use
6
OVP Interrupt mask
control
0
R/W
OVP interrupt function
enable/disable
0 : Controlled by [5:0] bit
(default)
1 : Mask all connector
side pins OVP interrupt
5
DPR OVP Interrupt
mask control
0
R/W
0 : Do not mask OVP
interrupt (default)
1 : Mask OVP interrupt
4
DNL OVP Interrupt
mask control
0
R/W
0 : Do not mask OVP
interrupt (default)
1 : Mask OVP interrupt
3
SBU1 OVP Interrupt
mask control
0
R/W
0 : Do not mask OVP
interrupt (default)
1 : Mask OVP interrupt
2
SBU2 OVP Interrupt
mask control
0
R/W
0 : Do not mask OVP
interrupt (default)
1 : Mask OVP interrupt
1
GSBU1 OVP Interrupt
mask control
0
R/W
0 : Do not mask OVP
interrupt (default)
1 : Mask OVP interrupt
0
GSBU2 OVP Interrupt
mask control
0
R/W
0 : Do not mask OVP
interrupt (default)
1 : Mask OVP interrupt
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Description
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DS8980H-00
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RT8980H
Address Length
RegName
Bit
Bit Name
Default
Type
7:6
Reserved
00
R
5
4
0x02
1
OVP
INTERRUPT
FLAG
3
2
1
SBU1 OVP
SBU2 OVP
GSBU1 OVP
0
0
0
RC
0 : OVP event has not
occurred (default)
1 : OVP event has
occurred
RC
0 : OVP event has not
occurred (default)
1 : OVP event has
occurred
RC
0 : OVP event has not
occurred (default)
1 : OVP event has
occurred
RC
0 : OVP event has not
occurred (default)
1 : OVP event has
occurred
0 : OVP event has not
occurred (default)
1 : OVP event has
occurred
0
RC
7:6
Reserved
00
R
Do not use
R
0 : OVP event has not
occurred (default)
1 : OVP event has
occurred
R
0 : OVP event has not
occurred (default)
1 : OVP event has
occurred
R
0 : OVP event has not
occurred (default)
1 : OVP event has
occurred
R
0 : OVP event has not
occurred (default)
1 : OVP event has
occurred
R
0 : OVP event has not
occurred (default)
1 : OVP event has
occurred
R
0 : OVP event has not
occurred (default)
1 : OVP event has
occurred
3
ST_OVP_DPR
ST_OVP_DNL
ST_OVP_SBU1
0
0
0
OVP STATUS
2
1
0
ST_OVP_SBU2
ST_OVP_GSBU1
ST_OVP_GSBU2
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0
RC
0 : OVP event has not
occurred (default)
1 : OVP event has
occurred
GSBU2 OVP
4
1
DNL OVP
0
January 2021
Do not use
0
5
0x03
DPR OVP
Description
0
0
0
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RT8980H
Address Length
RegName
Bit
7
6
5
0x04
1
SWITCHING
SETTING
ENABLE
Bit Name
DEVICE_ENABLE
SW_SBU1_H_SBUX
SW_SBU2_H_SBUX
4
SW_DNL
1
0
0
1
Type
RW
RW
0 : Switch disable;
SBU1_H will be high−Z
for positive input (default)
1 : Switch enable
RW
0 : Switch disable;
SBU2_H will be high−Z
for positive input (default)
1 : Switch enable
RW
0 : Switch disable;
DNL,DN will be high−Z for
positive input.
L pull down by 10k
1 : Switch enable (default)
SW_DPR
1
RW
2
SW_SENSE_GSBUX
0
RW
1
SW_MIC_SBUX
0
RW
SW_AGND_SBUX
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0
Description
0 : Device disable; L, R
pull down by 10k and
other switch
nodes will be high−Z for
positive input.
1 : Device enable.
(default)
-----------Device enable =
1 Device enable = 0
ENN = 1 Device disable
Device Disable
ENN = 0 Device enable
Device disable
3
0
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Default
RW
0 : Switch disable;
DPR, DP will be high−Z
for positive input.
R pull down by 10k
1 : Switch enable (default)
0 : Switch disable;
Sense,GSBU1 and
GSBU2 will be high−Z for
positive input (default)
1 : Switch enable
0 : Switch disable : MIC
will be high−Z for positive
input. (default)
1 : Switch enable
0 : Switch disable : AGND
will be high−Z for positive
input. (default)
1 : Switch enable
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RT8980H
Address Length
RegName
Bit
Bit Name
Default
Type
7
Reserved
0
R
6
0x05
1
SWITCH
SELECT
SEL_SBU2_H_SBUX
0
RW
4
SEL_DNL
1
RW
0 : DNL to L switch on
1 : DNL to DN switch on
(default)
3
SEL_DPR
1
RW
0 : DPR to R switch on
1 : DPR to DP switch on
(default)
RW
0 : Sense to GSBU1
switch on (default)
1 : Sense to GSBU2
switch on
RW
0 : MIC to SBU2 switch
on (default)
1 : MIC to SBU1 switch
on
0 : AGND to SBU1 switch
on (default)
1 : AGND to SBU2 switch
on
SEL_SENSE_GSBUX
SEL_MIC_SBUX
0
0
0
SEL_AGND_SBUX
0
RW
7:6
Reserved
00
R
Do not use
R
00 : Sense switch is
open/not connected
(default)
01 : Sense connected to
GSBU1
10 : Sense connected to
GSBU2
11 : Not valid
R
00 : DPR switch open/not
connected (default)
01 : DPR connected to
DP
10 : DPR connected to R
11 : Not valid
R
00 : DNL switch open/not
connected (default)
01 : DNL connected to
DN
10 : DNL connected to L
11 : Not valid
5:4
ST_SENSE_SWITCH
00
SWITCH
STATUS0
3:2
1:0
ST_DPR_SWITCH
ST_DNL_SWITCH
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DS8980H-00
RW
0 : SBU1_H to SBU1
switch on (default)
1 : SBU1_H to SBU2
switch on
5
1
1
0
January 2021
Do not use
0 : SBU2_H to SBU2
switch on (default)
1 : SBU2_H to SBU1
switch on
2
0x06
SEL_SBU1_H_SBUX
Description
00
00
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RT8980H
Address Length
RegName
Bit
Bit Name
Default
Type
7:6
Reserved
00
R
Do not use
R
000 : SBU2 switch is
open/not connected
(default)
001 : SBU2 connected to
MIC
010 : SBU2 connected to
AGND
011 : SBU2 connected to
SBU1_H
100 : SBU2 connected to
SBU2_H
101 : SBU2 connected
both SBU1_H and
SBU2_H
110…111 : Do not use
R
000 : SBU1 switch is
open/not connected
(default)
001 : SBU1 connected to
MIC
010 : SBU1 connected to
AGND
011 : SBU1 connected to
SBU1_H
100 : SBU1 connected to
SBU2_H
101 : SBU1 connected
both SBU1_H and
SBU2_H
110…111 : Do not use
5:3
0x07
1
0x09
0x0A
1
1
1
LEFT SLOW
TURN−ON
7:0
RIGHT SLOW
7:0
TURN-ON
MIC SLOW
TURN-ON
7:0
ST_SBU1_SWITCH
L_SLOW_ON_TIME
R_SLOW_ON_TIME
MIC_SLOW_ON_
TIME
Copyright © 2021 Richtek Technology Corporation. All rights reserved.
www.richtek.com
24
000
SWITCH
STATUS1
2:0
0x08
ST_SBU2_SWITCH
000
00000001
00000001
00000001
Description
RW
00000000 : 100s
00000001 : 200s
(default)
...
11111111 : 25600s
RW
00000000 : 100s
00000001 : 200s
(default)
...
11111111 : 25600s
RW
00000000 : 150s
00000001 : 250s
(default)
00000010 : 350s
...
11111111 : 25650s
is a registered trademark of Richtek Technology Corporation.
DS8980H-00
January 2021
RT8980H
Address Length
0x0B
0x0C
0x0D
0x0E
0x0F
0x10
0x11
1
RegName
Bit
SENSE
SLOW TURN- 7:0
ON
1
AGND SLOW
TURN-ON
1
TIMING
DELAY
BETWEEN
R SWITCH
7:6
ENABLE AND
L SWITCH
ENABLE
1
TIMING
DELAY
BETWEEN
MIC SWITCH 7:0
ENABLE AND
L SWITCH
ENABLE
1
TIMING
DELAY
BETWEEN
SENSE
7:0
SWITCH
ENABLE AND
L SWITCH
ENABLE
1
TIMING
DELAY
BETWEEN
AUDIO
GROUND
7:0
SWITCH
ENABLE AND
L SWITCH
ENABLE
1
AUDIO
ACCESSORY
STATUS
7:0
Bit Name
SENSE_SLOW_ON_
TIME
AGND_SLOW_ON_
TIME
R_L_DELAY_TIME
MIC_L_DELAY_TIME
SENSE_L_DELAY_
TIME
January 2021
00000001
00000001
00000000
00000000
00000000
Type
Description
RW
00000000 : 100s
00000001 : 200s
(default)
...
11111111 : 25600s
RW
00000000 : 700s
00000001 : 1400s
(default)
...
11111111 : 179200s
RW
00000000 : 0s (default)
00000001 : 100s
...
11111110 : 25400s
11111111 : 25500s
RW
00000000 : 0s (default)
00000001 : 100s
...
11111110 : 25400s
11111111 : 25500s
RW
00000000 : 0s (default)
00000001 : 100s
...
11111110 : 25400s
11111111 : 25500s
00000000 : 0s (default)
00000001 : 100s
...
11111110 : 25400s
11111111 : 25500s
AGND_L_DELAY_
TIME
00000000
RW
7:2
Reserved
000000
R
Do not use
1
ST_CC_IN
1
R
0 : CC_IN < 1.2V
1 : CC_IN > 1.5V (default)
0
ST_DET
0
R
0 : DET output is
low .(default)
1 : DET is output is high.
Copyright © 2021 Richtek Technology Corporation. All rights reserved.
DS8980H-00
Default
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
25
RT8980H
Address Length
0x12
1
RegName
FUNCTION
ENABLE
Bit
Bit Name
Default
Type
7
Reserved
0
R
0x14
0x15
1
1
6
DET_IO_EN
0
RW
5
RES_DET_SET
0
RW
0 : 1k to 256k (default)
1: 6.5k / 9k to 1.7M / 2.3M
4
GPIO_CTRL_EN
0
RW
0 : Disable (default)
1 : Enable
3
SLOW_ON_CTRL_EN
1
RW
0 : Disable
1 : Enable (default)
2
MIC_AUTO_OFF_EN
0
RW
0 : Disable (default)
1 : Enable
RW
0 : Disable (default)
1 : Enable; will be
changed to ‘0’ after low
resistance detection.
0 : Disable (default)
1 : Enable; will be
changed to ‘0’ after audio
jack detection and
configuration.
1
RES_DET_EN
AUD_JACK_DET_EN
0
RW
7:3
Reserved
00000
R
7:0
RES
DETECTION 7:0
THRESHOLD
PIN_SEL
RES_DET_VALUE
RES_DET_THD
Copyright © 2021 Richtek Technology Corporation. All rights reserved.
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26
0
0
RES
DETECTION
PIN SETTING 2:0
RES VALUE
Do not use
0 : DET pin is in Push/Pull
Configuration (default)
1 : DET pin is in
Open/Drain Configuration
1
0x13
Description
000
11111111
00010110
RW
Do not use
000 : CC_IN (default)
001 : DPR
010 : DNL
011 : SBU1
100 : SBU2
101 : Reserved
110 : Reserved
111 : Reserved
R
00000000 : R < 1k / 6.5k /
9k
…
11111111 : R > 256k /
1.7M / 2.32M (default)
RW
Selection by 1k per step if
Reg 12h [5] = 0
Selection by 6.5k / 9k per
step if Reg 12h [5] = 1
Default Value = 22k
(default)
00000000 : 1k / 6.5k / 9k
…
11111111 : 256k / 1.7M /
2.32M
is a registered trademark of Richtek Technology Corporation.
DS8980H-00
January 2021
RT8980H
Address Length
0x16
0x17
1
1
RegName
RES
DETECTION
INTERVAL
AUDIO JACK
STATUS
Bit
Bit Name
Default
Type
7:2
Reserved
000000
R
1:0 RES_DET_INTERVAL
0x18
1
January 2021
RES detection interval
00 : Single (default)
01 : 100ms
10 : 1s
11 : 10s
Reserved
0000
R
Do not use
3
POLE4_SBU1_AGND
0
R
0 : Others (default)
1 : 4 pole SBU2 to MIC,
SBU1 to audio ground
2
POLE4_SBU2_AGND
0
R
0 : Others (default)
1 : 4 pole SBU1 to MIC,
SBU2 to audio ground
1
POLE3
0
R
0 : Others (default)
1 : 3 pole
0
NO_AUDIO_ACC
1
R
0 : Audio accessory
attached
1 : No audio accessory
(default)
7:3
Reserved
00000
R
Do not use
INT_AUTO_JACK_
DET
1
INT_RES_DET_LOW
0
INT_RES_DET_
DONE
Copyright © 2021 Richtek Technology Corporation. All rights reserved.
DS8980H-00
RW
Do not use
7:4
2
RES
DETECTION /
AUDIO JACK
DETECTION
INTERRUPT
FLAG
00
Description
0
0
0
RC
0 : Audio jack detection
and configuration has not
occurred. (default)
1 : Audio jack detection
and configuration has
occurred.
RC
0 : Low resistance has not
occurred. (default)
1 : Low resistance has
occurred.
RC
0 : Low resistance has not
occurred. (default)
1 : Low resistance has
occurred.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
27
RT8980H
Address Length
RegName
Bit
Bit Name
Default
Type
7:3
Reserved
00000
R
2
0x19
1
RES
DETECTION /
AUDIO JACK
DETECTION
INTERRUPT
MASK
1
0
M_AUTO_JACK_DET
M_RES_DET_LOW
0
0
Description
Do not use
RW
0 : Do not mask Audio
jack detection and
configuration has
occurred (default)
1: Mask Audio jack
detection and
configuration has
occurred.
RW
0 : Do not mask Low
resistance has occurred.
(default)
1 : Mask Low resistance
has occurred.
0 : Do not mask Low
resistance detection has
occurred. (default)
1 : Mask Low resistance
detection has occurred.
M_RES_DET_DONE
0
RW
0x1A
1
AUDIO JACK
DETECTION 7:0
REG1 VALUE
AUTO_JACK_DET_
REG1
11111111
R
Resistance between
SBU1 to SBU2
10mV per step
0x1B
1
AUDIO JACK
DETECTION 7:0
REG2 VALUE
AUTO_JACK_DET_
REG2
11111111
R
Resistance between
SBU2 to SBU1
10mV per step
1
MIC
DETECTION
7:0
THRESHOLD
DATA0
1
MIC
DETECTION
7:0
THRESHOLD
DATA1
0x1C
0x1D
0x1E
0x1F
1
1
I2C RESET
CURRENT
SOURCE
SETTING
AUTO_JACK_DET_
DATA0
RW
MIC detection threshold
DATA1
Selection by 10mV per
step
11111111 : 2.5V (default)
AUTO_JACK_DET_
DATA1
11111111
RW
7:1
Reserved
0000000
R
Do not use
0
I2C_RESET
0
W
0 : Default (default)
1 : I2C reset
7:4
Reserved
0000
R
Do not use
3:0
AUTO_JACK_DET_
SET
Copyright © 2021 Richtek Technology Corporation. All rights reserved.
www.richtek.com
28
00100000
MIC detection threshold
DATA0
Selection by 10mV per
step
00100000 : 320mV
(default)
0111
RW
0000 : Invalid
0001 : 100A
...
0111 : 700A (default)
...
1111 : 1500A
is a registered trademark of Richtek Technology Corporation.
DS8980H-00
January 2021
RT8980H
Outline Dimension
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
0.500
0.600
0.020
0.024
A1
0.170
0.230
0.007
0.009
b
0.240
0.300
0.009
0.012
D
2.210
2.290
0.087
0.090
D1
E
1.600
2.170
0.063
2.250
0.085
0.089
E1
1.600
0.063
e
0.400
0.016
25B WL-CSP 2.21x2.25 Package (BSC)
Copyright © 2021 Richtek Technology Corporation. All rights reserved.
DS8980H-00
January 2021
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
29
RT8980H
Footprint Information
Package
Footprint Dimension (mm)
Number of
Type
Pin
WL-CSP2.21x2.25-25(BSC)
25
NSMD
SMD
e
0.400
A
B
0.240
0.340
0.270
0.240
Tolerance
±0.025
Richtek Technology Corporation
14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume
responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable.
However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
Copyright © 2021 Richtek Technology Corporation. All rights reserved.
www.richtek.com
30
is a registered trademark of Richtek Technology Corporation.
DS8980H-00
January 2021
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