0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
RT9004AGQV

RT9004AGQV

  • 厂商:

    RICHTEK(台湾立绮)

  • 封装:

  • 描述:

    RT9004AGQV - 300mA, Low Noise, Ultra-Fast CMOS Triple LDOs Regulator - Richtek Technology Corporatio...

  • 数据手册
  • 价格&库存
RT9004AGQV 数据手册
Preliminary RT9004 300mA, Low Noise, Ultra-Fast CMOS Triple LDOs Regulator General Description The RT9004 is designed for portable RF and wireless applications with demanding performance and space requirements. The RT9004 performance is optimized for battery-powered systems to deliver ultra low noise and low quiescent current. Regulator ground current increases only slightly in dropout, further prolonging the battery life. The RT9004 also works with low-ESR ceramic capacitors, reducing the amount of board space necessary for power applications, critical in hand-held wireless devices. The RT9004 consumes less than 0.01uA in shutdown mode and has fast turn-on time less than 50us. RT9004 is short circuit thermal folded back protected. RT9004 lowers its OTP trip point from 165°C to 110°C when output short circuit occurs (VOUT < 0.4V) providing maximum safety to end users. The other features include ultra low dropout voltage, high output accuracy, current limiting protection, and high ripple rejection ratio. Available in the VDFN-10L 3x3 and WDFN-10L 3x3 packages, the RT9004 also offers custom voltage, range of 1.5V to 3.5V with 0.1V per step. Features Short Circuit Thermal Folded Back Protection Low-Noise for RF Application Fast Response in Line/Load Transient Quick Start-Up (Typically 50us) Low Dropout : 220mV @ 300mA Wide Operating Voltage Ranges : 2.5V to 5.5V TTL-Logic-Controlled Shutdown Input Low Temperature Coefficient Thermal Shutdown Protection Only 1uF Output Capacitor Required for Stability High Power Supply Rejection Ratio Custom Voltage Available Small 10-Lead VDFN and WDFN Packages RoHS Compliant and 100% Lead (Pb)-Free Applications CDMA/GSM Cellular Handsets Battery-Powered Equipment Laptop, Palmtops, Notebook Computers Hand-Held Instruments PCMCIA Cards Portable Information Appliances Ordering Information RT9004 Package Type QV : VDFN-10L 3x3 (V-Type) QW : WDFN-10L 3x3 (W-Type) Operating Temperature Range P : Pb Free with Commercial Standard G : Green (Halogen Free with Commercial Standard) Voltage Version : VOUT1/VOUT2/VOUT3 A : 2.8V/2.5V/1.8V B : 3.0V/2.5V/1.8V C : 2.8V/2.8V/1.8V D : 2.8V/1.8V/1.8V E : 3.3V/2.8V/1.8V F : 3.3V/2.8V/2.8V G : 2.5V/2.8V/2.5V H : 2.8V/2.8V/1.5V J : 1.5V/3.3V/3.3V K : 3.0V/3.0V/1.8V Pin Configurations (TOP VIEW) VOUT1 VOUT2 GND VOUT3 EN3 1 2 3 4 5 11 10 9 GND VIN1 EN1 8 VIN2 7 EN2 VIN3 V/WDFN-10L 3x3 Marking Information For marking information, contact our sales representative directly or through a Richtek distributor located in your area, otherwise visit our website for detail. Note : Richtek Pb-free and Green products are : RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. Suitable for use in SnPb or Pb-free soldering processes. 100% matte tin (Sn) plating. DS9004-00 February 2008 9 www.richtek.com 1 RT9004 Typical Application Circuit VIN CIN 2.2uF Chip Enable Chip Shutdown Preliminary RT9004 VIN1 VOUT1 VIN2 VIN3 EN1 EN2 EN3 VOUT2 VOUT3 COUT 1uF VOUT1 VOUT2 VOUT3 GND VIN1 VIN2 VIN3 Chip Enable Chip Shutdown CIN 1uF RT9004 VIN1 VOUT1 VIN2 VIN3 VOUT2 VOUT3 COUT 1uF VOUT1 VOUT2 VOUT3 EN1 EN2 EN3 GND Functional Pin Description Pin Number 1 2 3 Exposed Pad (11) 4 5 6 7 8 9 10 Pin Nam e VOUT1 VOUT2 GND VOUT3 EN3 VIN3 EN2 VIN2 EN1 VIN1 O utput Voltage 1. O utput Voltage 2. G round. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. O utput Voltage 3. Chip Enable 3 (Active High). Note that this pin is high impedance. There should be a pull low 100k Ω r esistor connected to GND when the control signal is floating. Input Voltage 3. Chip Enable 2 (Active High). Note that this pin is high impedance. There should be a pull low 100k Ω r esistor connected to GND when the control signal is floating. Input Voltage 2. Chip Enable 1 (Active High). Note that this pin is high impedance. There should be a pull low 100k Ω r esistor connected to GND when the control signal is floating. Input Voltage 1. Pin Function www.richtek.com 2 DS9004-00 February 2008 Preliminary Function Block Diagram EN1 Shutdown and Logic Control VREF + Error Amplifier RT9004 VIN1 MOS Driver VOUT1 Current-Limit and Thermal Protection GND EN2 Shutdown and Logic Control VREF + Error Amplifier VIN2 MOS Driver VOUT2 Current-Limit and Thermal Protection EN3 Shutdown and Logic Control VREF + Error Amplifier VIN3 MOS Driver VOUT3 Current-Limit and Thermal Protection DS9004-00 February 2008 www.richtek.com 3 RT9004 Absolute Maximum Ratings Preliminary (Note 1) 6.0V 0.952 W 105°C/W 150°C 260°C −65°C to 125°C 2kV 200V Supply Input Voltage -----------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C V/WDFN-10L 3x3 ---------------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 4) V/WDFN-10L 3x3, θJA ---------------------------------------------------------------------------------------------------Junction Temperature ----------------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10sec.) -------------------------------------------------------------------------------Storage Temperature Range -------------------------------------------------------------------------------------------ESD Susceptibility (Note 2) HBM (Human Body Mode) ---------------------------------------------------------------------------------------------MM (Machine Mode) ------------------------------------------------------------------------------------------------------ Recommended Operating Conditions (Note 3) Supply Input Voltage ------------------------------------------------------------------------------------------------------ 2.5V to 5.5V Operation Ambient Temperature Range ------------------------------------------------------------------------------ −40°C to 85°C Operation Junction Temperature Range ------------------------------------------------------------------------------ −40°C to 125°C Electrical Characteristics (VIN = VOUT + 1V, CIN = COUT = 1μF, TA = 25°C, unless otherwise specified) Parameter Output Voltage Accuracy Current Limit Quiescent Current Dropout Voltage (Note 4) Line Regulation Load Regulation Standby Current EN Input Bias Current EN Threshold Power Supply Rejection Rate Logic-Low Voltage Symbol ΔVOUT ILIM IQ VDROP ΔVLINE Test Conditions IOUT = 1mA RLOAD = 1Ω VEN >= 1.2V, IOUT = 0mA IOUT = 200mA IOUT = 300mA VIN = (VOUT + 1V) to 5.5V, IOUT = 1mA Min −2 360 --------1.2 ------ Typ -400 90 170 220 --0.01 0 --−60 −30 165 30 110 Max +2 ----0.3 0.6 1 100 0.4 ------- Units % mA μA mV % % μA nA V ΔVLOAD 1mA < IOUT < 300mA ISTBY IIBSD VIL VEN = GND, Shutdown VEN = GND or VIN VIN = 3V to 5.5V, Shutdown VIN = 3V to 5.5V, Start-Up COUT = 1μF, IOUT = 100mA Logic-High Voltage VIH f = 100Hz f = 10kHz PSRR TSD ΔTSD ΔTTFB dB °C °C °C Thermal Shutdown Temperature Thermal Shutdown Hysteresis Thermal Folded Back Temperature www.richtek.com 4 DS9004-00 February 2008 Preliminary RT9004 Note 1. Stresses listed as the above “ Absolute Maximum Ratings” may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. Devices are ESD sensitive. Handling precaution is recommended. Note 3. The device is not guaranteed to function outside its operating conditions. Note 4. θJA is measured in the natural convection at TA = 25°C on a low effective thermal conductivity test board (single-later, 1s) of JEDEC 51-3 thermal measurement standard. DS9004-00 February 2008 www.richtek.com 5 RT9004 Preliminary Typical Operating Characteristics Output Voltage vs. Temperature 2 Quiesent Current vs. Temperature 100 95 VIN = 5V CIN = COUT = 1uF VIN = 3.3V VOUT = 1.5V CIN = COUT = 1uF Quiescent Current (uA) Output Voltage (V) 1.9 90 85 80 75 70 65 1.8 No Load 1.7 1.6 -50 -25 0 25 50 75 100 125 60 -50 -25 0 25 50 75 100 125 Temperature (°C) Temperature (°C) EN Pin Shutdown Threshold vs. Temperature 1.5 Current Limit vs. Input Voltage 600 550 EN Pin Threshold Voltage (V) 1.25 VIN = 3.3V VOUT = 1.5V CIN = COUT = 1uF VOUT = 1.5V CIN = COUT = 1uF Current Limit (mA) 500 450 400 350 300 1 0.75 0.5 0.25 -50 -25 0 25 50 75 100 125 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 Temperature (°C) Input Voltage (V) Dropout Voltage vs. Load Current 300 250 200 150 VOUT = 3.3V CIN = COUT = 1uF 20 PSRR VOUT = 2.5V CIN = COUT = 1uF, X7R TJ = 125°C 0 Dropout Voltage (mV) PSRR (dB) TJ = 25°C -20 TJ = -40°C 100 50 0 0 0.05 0.1 0.15 0.2 0.25 0.3 -40 ILOAD = 100mA -60 ILOAD = 10mA -80 10 0.01 100 0.1 11 K 10K 10 1100 00K 1M 1000 Load Current (A) Frequency (kHz) (Hz) www.richtek.com 6 DS9004-00 February 2008 Preliminary RT9004 Line Transient Response Line Transient Response Input Voltage Deviation (V) 5 4 3 Input Voltage Deviation (V) CIN = COUT = 1uF ILOAD = 50mA CIN = COUT = 1uF 5 4 3 ILOAD = 250mA Output Voltage Deviation (mV) 20 0 -20 Output Voltage Deviation (mV) 50 0 -50 Time (100μs/Div) Time (100μs/Div) Load Transient Response Load Current (mA) 100 50 0 Load Transient Response Load Current (mA) 400 200 0 VIN = 3.3V CIN = COUT = 1uF VOUT = 1.5V ILOAD = 1mA to 250mA VIN = 3.3V CIN = COUT = 1uF VOUT = 1.5V ILOAD= 1mA to 50mA Output Voltage Deviation (mV) 50 0 -50 Output Voltage Deviation (mV) 50 0 -50 Time (100μs/Div) Time (100μs/Div) Start Up VIN = 3.3V, CIN = 2.2μF Start Up VIN = 3.3V, CIN = 2.2μF EN (2V/Div) VOUT1 (2V/Div) VOUT2 (2V/Div) VOUT3 (200mV/Div) Time (10μs/Div) EN (2V/Div) VOUT1 (2V/Div) VOUT2 (2V/Div) VOUT3 (2V/Div) Time (25μs/Div) DS9004-00 February 2008 www.richtek.com 7 RT9004 Noise VOUT = 2.8V, ILOAD = 150mA 600 400 Preliminary Noise VOUT = 2.5V, ILOAD = 150mA 600 400 Noise (uV/Div) 200 0 -200 -400 -600 Noise (uV/Div) 200 0 -200 -400 -600 Time (1ms/Div) Time (1ms/Div) Noise VOUT = 1.8V, ILOAD = 150mA 600 400 Noise (uV/Div) 200 0 -200 -400 -600 Time (1ms/Div) www.richtek.com 8 DS9004-00 February 2008 Preliminary Applications Information Like any low-dropout regulator, the external capacitors used with the RT9004 must be carefully selected for regulator stability and performance. Using a capacitor whose value is > 2.2μF on the RT9004 input and the amount of capacitance can be increased without limit. The input capacitor must be located a distance of not more than 0.5 inch from the input pin of the IC and returned to a clean analog ground. Any good quality ceramic or tantalum can be used for this capacitor. The capacitor with larger value and lower ESR (equivalent series resistance) provides better PSRR and line-transient response. The output capacitor must meet both requirements for minimum amount of capacitance and ESR in all LDOs application. The RT9004 is designed specifically to work with low ESR ceramic output capacitor in space-saving and performance consideration. Using a ceramic capacitor whose value is at least 1μF with ESR is > 20mΩ on the RT9004 output ensures stability. The RT9004 still works well with output capacitor of other types due to the wide stable ESR range. Figure 1 shows the curves of allowable ESR range as a function of load current for various output capacitor values. Output capacitor of larger capacitance can reduce noise and improve load transient response, stability, and PSRR. The output capacitor should be located not more than 0.5 inch from the VOUT pin of the RT9004 and returned to a clean analog ground. Enable Function RT9004 The RT9004 features an LDO regulator enable/disable function. To assure the LDO regulator will switch on, the EN turn on control level must be greater than 1.2 volts. The LDO regulator will go into the shutdown mode when the voltage on the EN pin falls below 0.4 volts. For to protecting the system, the RT9004 have a quick-discharge function. If the enable function is not needed in a specific application, it may be tied to VIN to keep the LDO regulator in a continuously on state. Thermal Considerations Thermal protection limits power dissipation in RT9004. When the operation junction temperature exceeds 165°C, the OTP circuit starts the thermal shutdown function and turns the pass element off. The pass element turn on again after the junction temperature cools by 30°C. RT9004 lowers its OTP trip level from 165°C to 110°C when output short circuit occurs (VOUT < 0.4V) as shown in Figure 2. This limits IC case temperature under 100°C and provides maximum safety to end users when output short circuit occurs. VOUT Short to GND 0.4V VOUT Region of Stable COUT ESR vs. Load Current 100.00 100 IOUT 10 10.00 Instable TSD C OUT ESR (Ω) 1.00 1 COUT = 1uF 165 °C 110 °C OTP Trip Point 110 °C IC Temperature 80 °C 0.10 Stable 0.01 COUT = 1μF, X7R 0.00 0 50 100 Instable 150 200 250 300 Load Current (mA) Figure 2. Short Circuit Thermal Folded Back Protection when Output Short Circuit Occurs Figure 1 DS9004-00 February 2008 www.richtek.com 9 RT9004 Preliminary 1500 Maximum Power Dissipation (mW) (m Ω ) For continuous operation, do not exceed absolute maximum operation junction temperature 125°C. The power dissipation definition in device is : PD = (VIN-VOUT) x IOUT + VIN x IQ The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula : PD(MAX) = ( TJ(MAX) - TA ) /θJA Where T J(MAX) i s the maximum operation junction temperature 125°C, TA is the ambient temperature and the θJA is the junction to ambient thermal resistance. For recommended operating conditions specification of RT9004, where T J(MAX) i s the maximum junction temperature of the die (125°C) and TA is the maximum ambient temperature. The junction to ambient thermal resistance θJA is layout dependent. For VDFN-10L 3x3 and WDFN-10L 3x3 packages, the thermal resistance θJA is 105°C/W on the standard JEDEC 51-3 single-layer 1s thermal test board and 70°C/W on the standard JEDEC 51-7 4-layers 2S2P thermal test board. The maximum power dissipation at TA = 25°C can be calculated by following formula : PD(MAX) = ( 125°C - 25°C ) / 105 = 0.952 W for single-layer 1s board PD(MAX) = ( 125°C - 25°C ) / 70 = 1.428 W for 4-layers 2S2P board The maximum power dissipation depends on operating ambient temperature for fixed T J(MAX) and thermal resistance θJA. For RT9004 packages, the Figure 3 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power allowed. 1350 1200 1050 900 750 600 450 300 150 0 0 25 50 75 100 125 4-Layers Board Single-Layer Board Ambient Temperature (°C) Figure 3. Derating Curves for RT9004 Package www.richtek.com 10 DS9004-00 February 2008 Preliminary Outline Dimension D2 RT9004 D L E E2 SEE DETAIL A 2 1 2 1 1 e A A1 A3 b DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Symbol A A1 A3 b D D2 E E2 e L Dimensions In Millimeters Min 0.800 0.000 0.175 0.180 2.950 2.300 2.950 1.500 0.500 0.350 0.450 Max 1.000 0.050 0.250 0.300 3.050 2.650 3.050 1.750 Dimensions In Inches Min 0.031 0.000 0.007 0.007 0.116 0.091 0.116 0.059 0.020 0.014 0.018 Max 0.039 0.002 0.010 0.012 0.120 0.104 0.120 0.069 V-Type 10L DFN 3x3 Package DS9004-00 February 2008 www.richtek.com 11 RT9004 Preliminary D D2 L E E2 SEE DETAIL A 2 1 2 1 1 e A A1 A3 b DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Symbol A A1 A3 b D D2 E E2 e L Dimensions In Millimeters Min 0.700 0.000 0.175 0.180 2.950 2.300 2.950 1.500 0.500 0.350 0.450 Max 0.800 0.050 0.250 0.300 3.050 2.650 3.050 1.750 Dimensions In Inches Min 0.028 0.000 0.007 0.007 0.116 0.091 0.116 0.059 0.020 0.014 0.018 Max 0.031 0.002 0.010 0.012 0.120 0.104 0.120 0.069 W-Type 10L DFN 3x3 Package Richtek Technology Corporation Headquarter 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Richtek Technology Corporation Taipei Office (Marketing) 8F, No. 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)89191466 Fax: (8862)89191465 Email: marketing@richtek.com www.richtek.com 12 DS9004-00 February 2008
RT9004AGQV 价格&库存

很抱歉,暂时无法提供与“RT9004AGQV”相匹配的价格&库存,您可以联系我们找货

免费人工找货