RT9026
DDR Termination Regulator
General Description
Features
RT9026 is a 3A sink/source tracking termination regulator.
It is specifically designed for low-cost and low-external
component count systems. The RT9026 possesses a high
speed operating amplifier that provides fast load transient
response and only requires 20μF of ceramic output
capacitance. The RT9026 supports remote sensing
functions and all features required to power the DDRI/II/III
and low-power DDRIII/DDRIV VTT bus termination
according to the JEDEC specification. In addition, the
RT9026 includes integrated sleep-state controls placing
VTT in High-Z in S3 (suspend to RAM) and soft-off for VTT
and VTTREF in S5 (shutdown). The RT9026 is available
in the thermal efficient package SOP-8 (Exposed Pad),
MSOP-10 (Exposed Pad) and WDFN-10L 3x3.
z
z
z
z
z
z
z
z
z
z
z
DDRI/II/III and Low-Power DDRIII/DDRIV Memory
Termination
SSTL-2, SSTL-18
HSTL Termination
Ordering Information
RT9026
Package Type
SP : SOP-8 (Exposed Pad-Option 1)
FP : MSOP-10 (Exposed Pad)
QW : WDFN-10L 3x3 (W-Type)
Lead Plating System
P : Pb Free
G : Green (Halogen Free and Pb Free)
Note :
Richtek products are :
`
RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.
`
Suitable for use in SnPb or Pb-free soldering processes.
Source/Sink 3A for DDRI and DDRII
` Source/Sink 2A for DDRIII
` Source/Sink 1.5A for Low-Power DDRIII
` Source/Sink 1.2A for Low-Power DDRIV
Input Voltage Range : 3.15V to 5.5V
VLDOIN Voltage Range : 1.2V to 3.3V
Requires Only 20μ
μF Ceramic Output Capacitance
Supports High-Z in S3 and Soft-Off in S5
Integrated Divider Tracks 1/2 VDDQSNS for Both VTT
and VTTREF
Remote Sensing (VTTSNS)
±20mV Accuracy for VTT and VTTREF
10mA Buffered Reference (Sourcing/Sinking)
(VTTREF)
Built-In Soft-Start
Over Current Protection
Thermal Shutdown Protection
SOP-8 (Exposed Pad), MSOP-10 (Exposed Pad) and
10-Lead WDFN Package
RoHS Compliant and Halogen Free
`
Applications
z
Support DDRI, DDRII, DDRIII, Low-Power DDRIII and
DDRIV Requirement
z
z
z
z
z
Pin Configurations
(TOP VIEW)
8
GND
S3
2
VTTSNS
3
7
GND
6
9
4
5
VTTREF
VTT
VLDOIN
VIN
VDDQSNS
SOP-8 (Exposed Pad)
VDDQSNS
VLDOIN
VTT
PGND
VTTSNS
10
2
3
4
5
9
GND
8
11 7
6
VIN
S5
GND
S3
VTTREF
MSOP-10 (Exposed Pad)
1
2
3
4
5
GND
11
10
9
8
7
9
VDDQSNS
VLDOIN
VTT
PGND
VTTSNS
VIN
S5
GND
S3
VTTREF
WDFN-10L 3x3
DS9026-06 August 2011
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1
RT9026
Marking Information
RT9026PSP
RT9026PFP
RT9026PSP : Product Code
RT9026
PSPYMDNN
A0- : Product Code
YMDNN : Date Code
YMDNN : Date Code
A0-YM
DNN
RT9026GSP
RT9026GFP
RT9026GSP : Product Code
RT9026
GSPYMDNN
A0= : Product Code
YMDNN : Date Code
YMDNN : Date Code
A0=YM
DNN
RT9026PQW
E6- : Product Code
YMDNN : Date Code
E6-YM
DNN
RT9026GQW
E6= : Product Code
YMDNN : Date Code
E6=YM
DNN
Typical Application Circuit
RT9026
7
VLDOIN
C1
10µF
3.3V or 5V
C2
1µF
RT9026
1 VDDQSNS VIN 10
VLDOIN
VLDOIN
VTTREF 4
5
VDDQSNS
3
VTTSNS
6 VIN
8
VTT
2
S3
GND
VTTREF
C3
0.1µF
S3
VTT
C4
10µF x 2
1, 9 (Exposed Pad)
Figure 1. For SOP-8 (Exposed Pad) Package
C1
10µF
2
C4
10µF x 2
3 VTT
VTTREF 6
5 VTTSNS
9
S5
4 PGND
S3 7
VTT
VLDOIN
3.3V or 5V
GND 8, 11 (Exposed Pad)
S5
S3
C3
0.1µF
C2
1µF
VTTREF
Figure 2. For MSOP-10 (Exposed Pad) / WDFN-10L 3x3
Package
Functional Pin Description
Pin No.
Pin Name
Pin Function
RT9026□FP
RT9026□SP
RT9026□QW
Ground. The exposed pad must be soldered to a large PCB and
1,
8,
GND
connected to GND for maximum power dissipation.
9 (Exposed Pad) 11 (Exposed Pad)
2
7
S3
Active Low Suspend to RAM Mode Control Pin, VTT is turned
off and left High-Z, VTTREF is active.
3
5
VTTSNS
VTT Voltage Sense Input Pin. Connect to plus terminal of the
output capacitor.
To be Continued
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2
DS9026-06 August 2011
RT9026
Pin No.
RT9026□FP
RT9026□SP
RT9026□QW
Pin Function
Pin Name
Buffered output
VDDQSNS/2.
that
is
a
reference
output,
equal
to
4
6
VTTREF
5
1
VDDQSNS VLDOIN Sense Input Pin.
6
10
VIN
7
2
VLDOIN
8
3
VTT
--
4
PGND
Power Ground of the VTT Output.
--
9
S5
Active low shutdown control pin, both VTT and VTTREF are
turned off and discharged to ground.
Analog Input Pin (to control loop).
Power supply of the VTT and VTTREF output stage (to power
MOS).
Output voltage for connection to termination resistors, equal to
VDDQSNS/2.
Function Block Diagram
VDDQSNS
+
VLDOIN
Half DDQ
+
-
VTTREF
-
GND
VIN
ENREF
+
2.32V/
2.2V
+
VIN OK
VTT
-
ENVTT
ENVTT
S3
5V(10%)
+
S5
ENREF
PGND
+
-
+
PGOOD
+
-5V(10%)
VTTSNS
Table 1. S3 and S5 Control Table
State
S3
S5
Normal
High
High
Standby
Low
High
Shutdown
Low
Low
Shutdown
High
Low
DS9026-06 August 2011
VTT
VREF
1.25V/0.9V/0.75V 1.25V/0.9V/0.75V
/0.675V/0.6V
/0.675V/0.6V
12mV/6mV
1.25V/0.9V/0.75V
(High-Z)
/0.675V/0.6V
0V (Discharge)
0V (Discharge)
0V (Discharge)
0V (Discharge)
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3
RT9026
Absolute Maximum Ratings
l
l
l
l
l
l
l
l
(Note 1)
Supply Input Voltage, VIN ---------------------------------------------------------------------------------------------- 6V
Supply Input Voltage, VLDOIN, VDDQSNS ------------------------------------------------------------------------ 3.6V
Power Dissipation, PD @ TA = 25°C
SOP-8 (Exposed Pad) -------------------------------------------------------------------------------------------------- 1.333W
MSOP-10 (Exposed Pad) ---------------------------------------------------------------------------------------------- 1.163W
WDFN-10L 3x3 ----------------------------------------------------------------------------------------------------------- 1.429W
Package Thermal Resistance (Note 2)
SOP-8 (Exposed Pad), θJA -------------------------------------------------------------------------------------------- 75°C/W
SOP-8 (Exposed Pad), θJC -------------------------------------------------------------------------------------------- 28°C/W
MSOP-10 (Exposed Pad), θJA ---------------------------------------------------------------------------------------- 86°C/W
MSOP-10 (Exposed Pad), θJC ---------------------------------------------------------------------------------------- 30°C/W
WDFN-10L 3x3, θJA ------------------------------------------------------------------------------------------------------ 70°C/W
WDFN-10L 3x3, θJC ----------------------------------------------------------------------------------------------------- 8.2°C/W
Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------ 260°C
Junction Temperature --------------------------------------------------------------------------------------------------- 150°C
Storage Temperature Range ------------------------------------------------------------------------------------------- −65°C to 150°C
ESD Susceptibility (Note 3)
HBM (Human Body Mode) --------------------------------------------------------------------------------------------- 2kV
MM (Machine Mode) ---------------------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions
l
l
l
l
(Note 4)
Supply Input Voltage, VIN ---------------------------------------------------------------------------------------------- 3.15V to 5.5V
Supply Input Voltage, VLDOIN, VDDQSNS ------------------------------------------------------------------------ 1.2V to 3.3V
Junction Temperature Range ------------------------------------------------------------------------------------------ −40°C to 125°C
Ambient Temperature Range ------------------------------------------------------------------------------------------ −40°C to 85°C
Electrical Characteristics
(VIN = 5V, VLDOIN = VDDQSNS = 2.5V, C1=10µF, C2=1µF, C3=0.1µF, C4=10µFx2, TA = 25°C, S5 function only for RT9026PFP
and RT9026PQW, unless otherwise specified)
Parameter
Min
Typ
Max
Unit
VIN = 5V, No Load, S5 = S3 = 5V
--
--
2
mA
IVINSTB
VIN = 5V, No Load, S5 = 5V, S3 = 0V
--
--
300
µA
IVINSHDN
VIN = 5V, No Load, S5 = S3 = 0V
(Only for RT9026PFP and RT9026PQW)
--
--
1
µA
IVLDOIN
VIN = 5V, No Load, S5 = S3 = 5V
--
--
2
mA
IVLDOINSTB
VIN = 5V, No Load, S5 = 5V, S3 = 0V
Symbol
VIN (to control loop) Supply
IVIN
Current
VIN Standby Current
VIN Shutdown Current
VLDOIN (to power MOS)
Supply Current
VLDOIN Standby Current
Test Conditions
--
--
10
µA
VLDOIN Shutdown Current IVLDOINSHDN VIN = 5V, No Load, S5 = S3 = 0V
VDDQSNS Input Current
IVDDQSNS
VIN = 5V, S5 = S3 = 5V
--
--
1
µA
--
--
50
µA
VTTSNS Input Current
IVTTSNS
VIN = 5V, S5 = S3 = 5V
--
--
1
µA
VDDQSNS = VLDOIN = 2.5V
--
1.25
--
VTT Output Voltage
VTT
VDDQSNS = VLDOIN = 1.8V
--
0.9
--
VDDQSNS = VLDOIN = 1.5V
--
0.75
--
V
To be Continued
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4
DS9026-06 August 2011
RT9026
Parameter
VTT Output Voltage
VTTREF, VTT Output
Tolerance
Symbol
VTT
VVTTTOL
Test Conditions
Min
Typ
Max
VDDQSNS = VLDOIN = 1.35V
--
0.675
--
VDDQSNS = VLDOIN = 1.2V
--
0.6
--
VDDQSNS = VLDOIN =
2.5V/1.8V/1.5V/1.35V/1.2V,
∣IVTT∣= 0A
−20
--
20
VDDQSNS = VLDOIN = 1.2V,
∣IVTT∣= 1.2A
−30
--
30
VDDQSNS = VLDOIN =
2.5V/1.8V/1.5V/1.35V,
∣IVTT∣= 1.5A
VDDQSNS = VLDOIN = 2.5V/1.8V,
∣IVTT∣= 3A
Unit
V
mV
−30
--
30
−40
--
40
VTT Source Current Limit
IVTTOCLsr
VTT = 0V
3
4
--
A
VTT Sink Current Limit
IVTTOCLsk
VTT = VDDQSNS
3
4
--
A
VTT Discharge Current
IDSCHRG
VDDQSNS = 0V, VTT = 1.25V,
S5 = S3 = 0V
10
17
--
mA
VTTREF Output Voltage
VVTTREF
V
VVTTREF = VDDQSNS
2
--
1.25/0.9/
0.75/
0.675/0.6
--
V
VDDQSNS/2, VTTREF
Output Voltage Tolerance
VLDOIN = VDDQSNS =
VVTTREFTOL 2.5V/1.8V/1.5V/1.35V/1.2V,
I VTTREF < 10mA
−20
--
20
mV
20
40
60
mA
Rising
--
--
2.7
Hysteresis
--
0.2
--
VTTREF Source Current Limit IVTTREFOCL VVTTREF = 0V
UVLO Threshold Voltage
VUVLO
V
Logic-High
VIH
S5, S3 pin
1.6
--
--
Logic-Low
VIL
S5, S3 pin
--
--
0.4
IILK
S5, S3 pin
--
--
1
µA
--
160
--
°C
--
20
--
°C
Input Voltage
Logic Input Leakage Current
V
Thermal Shutdown Protection TSD
Thermal Shutdown Hysteresis ∆TSD
Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θJA is measured in the natural convection at TA = 25°C on a high effective four-layers thermal conductivity test board of
JEDEC 51-7 thermal measurement standard. The case point of θJC is on the exposed pad for SOP-8 (Exposed Pad)
, MSOP-10 (Exposed Pad) and WDFN-10L 3x3 package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
DS9026-06 August 2011
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5
RT9026
Typical Operating Characteristics
VDDQSNS = VLDOIN, C1 = 10μF, C2 = 1μF, C3 = 0.1μF, C4 = 10μF x 2 unless otherwise specified.
1.25VTT Output Voltage vs. Temperature
0.9VTT Output Voltage vs. Temperature
1.30
0.95
1.28
0.93
VIN = 3.3V
1.26
VIN = 5V
1.24
Output Voltage (V)
Output Voltage (V)
0.94
0.92
0.91
VIN = 3.3V
0.90
VIN = 5V
0.89
0.88
1.22
0.87
0.86
VLDOIN = 2.5V
1.20
VLDOIN = 1.8V
0.85
-50
-25
0
25
50
75
100
125
-50
-25
0
Temperature (°C)
0.79
0.715
0.78
0.705
0.77
VIN = 3.3V
0.76
0.75
VIN = 5V
0.74
0.73
Output Voltage (V)
Output Voltage (V)
0.725
100
125
0.695
VIN = 3.3V
0.685
0.675
VIN = 5V
0.665
0.655
0.635
VLDOIN = 1.5V
VLDOIN = 1.35V
0.625
0.70
-50
-25
0
25
50
75
100
-50
125
-25
0
25
50
75
100
125
Temperature (°C)
Temperature (°C)
0.6VTT Output Voltage vs. Temperature
VIN Supply Current vs. Temperature
0.65
1000
0.64
0.62
VIN = 3.3V
0.61
0.60
VIN = 5V
0.59
0.58
0.57
VIN Supply Current (µA)
950
0.63
Output Voltage (V)
75
0.645
0.72
0.56
50
0.675VTT Output Voltage vs. Temperature
0.75VTT Output Voltage vs. Temperature
0.80
0.71
25
Temperature (°C)
VIN = 5V, VLDOIN = 2.5V
VLDOIN = 1.8V
900
850
800
VIN = 5V, VLDOIN = 1.5V
VLDOIN = 1.35V
VLDOIN = 1.2V
VIN = 3.3V, VLDOIN = 2.5V
VLDOIN = 1.8V
VLDOIN = 1.5V
VLDOIN = 1.35V
VLDOIN = 1.2V
750
700
650
VLDOIN = 1.2V
0.55
600
-50
-25
0
25
50
Temperature (°C)
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75
100
125
-50
-25
0
25
50
75
100
125
Temperature (°C)
DS9026-06 August 2011
RT9026
VIN Standby Current vs. Temperature
1.25VTT @ 3A Transient Response
250
Source
VIN Standby Current (µA)
VIN = 5V, VLDOIN = 2.5V
VIN = 5V, VLDOIN
VLDOIN
VLDOIN
VLDOIN
VLDOIN
230
210
= 2.5V
= 1.8V
= 1.5V
= 1.35V
= 1.2V
VTT
(20mV/Div)
190
VIN = 3.3V, VLDOIN
VLDOIN
VLDOIN
VLDOIN
VLDOIN
170
= 2.5V
= 1.8V
= 1.5V
= 1.35V
= 1.2V
IVTT
(2A/Div)
150
-50
-25
0
25
50
75
100
Time (500μs/Div)
125
Temperature (°C)
0.75VTT @ 2A Transient Response
0.9VTT @ 3A Transient Response
VIN = 5V, VLDOIN = 1.8V
Source
Source
VIN = 5V, VLDOIN = 1.5V
VTT
(20mV/Div)
VTT
(20mV/Div)
IVTT
(2A/Div)
IVTT
(1A/Div)
Time (500μs/Div)
Time (500μs/Div)
0.675VTT @ 1.5A Transient Response
0.6VTT @ 1.2A Transient Response
VIN = 5V, VLDOIN = 1.35V
Source
VTT
(20mV/Div)
VTT
(20mV/Div)
IVTT
(1A/Div)
IVTT
(1A/Div)
Time (400μs/Div)
DS9026-06 August 2011
Source
VIN = 5V, VLDOIN = 1.2V
Time (400μs/Div)
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7
RT9026
0.9VTT @ 3A Transient Response
1.25VTT @ 3A Transient Response
VIN = 5V, VLDOIN = 2.5V
Sink
VIN = 5V, VLDOIN = 1.8V
Sink
VTT
(20mV/Div)
VTT
(20mV/Div)
IVTT
(2A/Div)
IVTT
(2A/Div)
Time (500μs/Div)
Time (500μs/Div)
0.75VTT @ 2A Transient Response
0.675VTT @ 1.5A Transient Response
VIN = 5V, VLDOIN = 1.5V
Sink
VTT
(20mV/Div)
VIN = 5V, VLDOIN = 1.35V
Sink
VTT
(20mV/Div)
IVTT
(1A/Div)
IVTT
(1A/Div)
Time (500μs/Div)
Time (400μs/Div)
0.6VTTREF @ 1.2A Transient Response
0.9VTTREF @ 10mA Transient Response
VIN = 5V, VLDOIN = 1.2V
Source
VTTREF
(10mV/Div)
VTT
(20mV/Div)
IVTT
(1A/Div)
IVTTREF
(10mA/Div)
Time (400μs/Div)
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8
VIN = 5V, VLDOIN = 1.8V
Sink
Time (1ms/Div)
DS9026-06 August 2011
RT9026
0.9VTTREF @ 10mA Transient Response
VIN = 5V, VLDOIN = 1.8V
VTTREF
(10mV/Div)
Sink
Start Up
S3
(5V/Div)
S5
(5V/Div)
VTTREF
(1V/Div)
IVTTREF
(10mA/Div)
VTT
(1V/Div)
S3 = 0V, C3 = 0.1μF, S5 : Low to High
Time (1ms/Div)
Time (2.5μs/Div)
Start Up
Start Up
S3
(5V/Div)
S3
(5V/Div)
S5
(5V/Div)
S5
(5V/Div)
VTTREF
(1V/Div)
VTT
(1V/Div)
S3 = 0V, C3 = 1μF, S5 : Low to High
Time (10μs/Div)
VTTREF
(1V/Div)
VTT
(1V/Div)
S3 = 0V, S5 = 5V, S3 : Low to High
Time (10μs/Div)
Power Off
S3
S3
(5V/Div)
S5
S5
V TTREF
(5V/Div)
VTTREF
(1V/Div)
VTT
(1V/Div)
V TT
S3 = 0V, C3 = 0.1μF, S3 and S5 : High to Low
Time (1ms/Div)
DS9026-06 August 2011
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9
RT9026
Application Information
RT9026 is a 3A sink/source tracking termination regulator.
It is specifically designed for low-cost and low-external
component count system such as notebook PC
applications. The RT9026 possesses a high speed
operating amplifier that provides fast load transient response
and only requires a 10μF ceramic input capacitor and two
10μF ceramic output capacitor.
For stable operation, the total capacitance of the cerarnic
capcitor at the VTT output terminal must not be larger
than 30μF. The RT9026 is designed specifically to work
with low ESR ceramic output capacitor in space saving
and performance consideration. Larger output capacitance
can reduce the noise and improve load transient response,
stability and PSRR. The output capacitor should be located
near the VTT output terminal pin as close as possible.
VTTREF Regulator
VTTREF is a reference output voltage with source/sink
current capability up to 10mA. To ensure stable operation
0.1μF ceramic capacitor between VTTREF and GND is
recommended.
S3, S5 Logic Control
The S3 and S5 terminals should be connected to SLP_S3
and SLP_S5 signals respectively. Both VTTREF and VTT
are turned on at normal state (S3 = High, S5 = High). In
standby state (S3 = Low, S5 = High) VTTREF is kept
alive while VTT is turned off and left high impedance. Both
VTT and VTTREF outputs are turned off and discharged
to ground through internal MOSFETs during shutdown
state (S5 = low).
Table 2. S3 and S5 Control
STATE
S3
S5
VTTREF
VTT
Normal
H
H
ON
ON
Standby
L
H
ON
OFF(high-Z)
Shutdown L
L
OFF
(discharge)
OFF
(discharge)
Capacitor Selection
Good bypassing is recommended from VLDOIN to GND
to help improve AC performance. A 10μF or greater input
capacitor located as close as possible to the IC is
recommended. The input capacitor must be located at a
distance of less than 0.5 inches from the VLDOIN pin of
the IC.
Adding a ceramic capacitor 1μF close to the VIN pin and
it should be kept away from any parasitic impedance from
the supply power.
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10
Thermal Considerations
For continuous operation, do not exceed absolute
maximum operation junction temperature. The maximum
power dissipation depends on the thermal resistance of
IC package, PCB layout, the rate of surroundings airflow
and temperature difference between junction to ambient.
The maximum power dissipation can be calculated by
following formula :
PD(MAX) = ( TJ(MAX) − TA ) / θJA
Where T J(MAX) is the maximum operation junction
temperature, TA is the ambient temperature and the θJA is
the junction to ambient thermal resistance.
For recommended operating conditions specification of
the RT9026, the maximum junction temperature is 125°C.
The junction to ambient thermal resistance θJA is layout
dependent. The thermal resistance θJA for WDFN-10L 3x3
is 70°C/W, for SOP-8 (Exposed Pad) is 75°C/W and for
MSOP-10 (Exposed Pad) is 86°C/W on the standard
JEDEC 51-7 four layers thermal test board. The maximum
power dissipation at TA = 25°C can be calculated by
following formula :
PD(MAX) = (125°C − 25°C) / (70°C/W) = 1.429W for
WDFN-10L 3x3 packages
PD(MAX) = (125°C − 25°C) / (75°C/W) = 1.333W for
SOP-8 (Exposed Pad) packages
PD(MAX) = (125°C − 25°C) / (86°C/W) = 1.163W for
MSOP-10 (Exposed Pad) packages
The maximum power dissipation depends on operating
ambient temperature for fixed T J(MAX) and thermal
resistance θJA. For RT9026 packages, the Figure 3 of
derating curves allows the designer to see the effect of
rising ambient temperature on the maximum power
allowed.
DS9026-06 August 2011
Maximum Power Dissipation (W)1
RT9026
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
Four-Layers PCB
WDFN-10L 3x3
SOP-8 (Exposed Pad)
MSOP-10 (Exposed Pad)
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 3. Derating Curves for the RT9026 Packages
DS9026-06 August 2011
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11
RT9026
Outline Dimension
H
A
M
EXPOSED THERMAL PAD
(Bottom of Package)
Y
J
B
X
F
C
I
D
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
4.801
5.004
0.189
0.197
B
3.810
4.000
0.150
0.157
C
1.346
1.753
0.053
0.069
D
0.330
0.510
0.013
0.020
F
1.194
1.346
0.047
0.053
H
0.170
0.254
0.007
0.010
I
0.000
0.152
0.000
0.006
J
5.791
6.200
0.228
0.244
M
0.406
1.270
0.016
0.050
X
2.000
2.300
0.079
0.091
Y
2.000
2.300
0.079
0.091
X
2.100
2.500
0.083
0.098
Y
3.000
3.500
0.118
0.138
Option 1
Option 2
8-Lead SOP (Exposed Pad) Plastic Package
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12
DS9026-06 August 2011
RT9026
D
L
EXPOSED THERMAL PAD
(Bottom of Package)
U
E
V
E1
e
A2
A
A1
b
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
0.810
1.100
0.032
0.043
A1
0.000
0.100
0.000
0.004
A2
0.750
0.950
0.030
0.037
b
0.170
0.270
0.007
0.011
D
2.900
3.100
0.114
0.122
e
0.500
0.020
E
4.800
5.000
0.189
0.197
E1
2.900
3.100
0.114
0.122
L
0.400
0.800
0.016
0.031
U
1.300
1.700
0.051
0.067
V
1.500
1.900
0.059
0.075
10-Lead MSOP (Exposed Pad) Plastic Package
DS9026-06 August 2011
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13
RT9026
D2
D
L
E
E2
1
SEE DETAIL A
2
e
A
A1
1
2
1
b
DETAIL A
Pin #1 ID and Tie Bar Mark Options
A3
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.180
0.300
0.007
0.012
D
2.950
3.050
0.116
0.120
D2
2.300
2.650
0.091
0.104
E
2.950
3.050
0.116
0.120
E2
1.500
1.750
0.059
0.069
e
L
0.500
0.350
0.020
0.450
0.014
0.018
W-Type 10L DFN 3x3 Package
Richtek Technology Corporation
Richtek Technology Corporation
Headquarter
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
5F, No. 95, Minchiuan Road, Hsintien City
Hsinchu, Taiwan, R.O.C.
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)86672399 Fax: (8862)86672377
Email: marketing@richtek.com
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
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DS9026-06 August 2011
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