RT9045ZSP

® RT9045 Cost-Effective, 1.8A Sink/Source Bus Termination Regulator General Description Features The RT9045 is a simple, cost-effective and high-speed linear regulator designed to generate termination voltage in Double Data Rate (DDR) memory system to comply with the devices requirements. The regulator is capable of actively sinking or sourcing up to 1.8A while regulating an output voltage to within 20mV. The output termination voltage can be tightly regulated to track VDDQ / 2 by two  external voltage divider resistors or the desired output voltage can be programmed by externally forcing the REFEN pin voltage. The RT9045 also incorporates a high-speed differential amplifier to provide ultra-fast response in line/load transient. Other features include extremely low initial offset voltage, excellent load regulation, current limiting in bi-directions and on-chip thermal shutdown protection. Ordering Information RT9045 Package Type SP : SOP-8 (Exposed Pad-Option 2) Note : Lead Plating System G : Green (Halogen Free and Pb Free) Z : ECO (Ecological Element with Halogen Free and Pb free) Sink and Source Current :   DDRII 1.8A Sink/Source @ VIN = 1.8V   DDRIII 1.5A Sink/Source @ VIN = 1.5V   LPDDRIII 1.2A Sink/Source @ VIN = 1.35V   DDRIV 1.2A Sink/Source @ VIN = 1.2V  Integrated Power MOSFETs  Generate Termination Voltage for DDR Memory Interfaces  Stable with Output Ceramic Capacitor  High Accuracy Output Voltage at Full-Load  Output Adjustment by Two External Resistors  Low External Component Count  Shutdown for Suspend to RAM (STR) Functionality with High Impedance Output  Current Limiting Protection  On-Chip Thermal Protection  RoHS Compliant  Applications     Richtek products are :  RoHS compliant and compatible with the current require-  Suitable for use in SnPb or Pb-free soldering processes. Ideal for DDR VTT Applications   Desktop PCs, Notebooks, and Workstations Graphics Card Memory Termination Set Top Boxes, Digital TVs, Printers Embedded Systems Active Termination Buses DDR Memory Systems ments of IPC/JEDEC J-STD-020. Pin Configurations (TOP VIEW) Marking Information RT9045GSP RT9045GSP : Product Number RT9045 GSPYMDNN YMDNN : Date Code 8 VIN GND 2 REFEN 3 VOUT 7 GND 6 9 4 5 NC NC VCNTL NC SOP-8 (Exposed Pad) RT9045ZSP RT9045ZSP : Product Number RT9045 ZSPYMDNN YMDNN : Date Code Copyright © 2014 Richtek Technology Corporation. All rights reserved. DS9045-05 April 2014 is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT9045 Typical Application Circuit R3 2.2 VCNTL = 5V VIN = 1.8V/1.5V/1.35V/1.2V RTT VCNTL VIN R1 CCNTL CIN RT9045 EN VOUT REFEN 2N7002 R2 CSS GND COUT RDUMMY R1 = R2 = 100kΩ, RTT = 50Ω / 33Ω / 25Ω RDUMMY = 1kΩ as for VOUT discharge when VIN is not presented but VCNTL is presented COUT = 10μF (Ceramic) under the worst case testing condition CIN = 10μF, CCNTL = 1μF, CSS = 1nF to 0.1μF Test Circuit VIN = 1.8V/1.5V/1.35V/1.2V VCNTL = 5V VIN VCNTL RT9045 REFEN 0.9V/0.75V/0.675V/0.6V VOUT VOUT GND IL COUT V Figure 1. Output Voltage Tolerance, ΔVLOAD VIN = 1.8V/1.5V/1.35V/1.2V VCNTL = 5V A VIN VCNTL RT9045 0.9V/0.75V/0.675V/0.6V REFEN VOUT VOUT 0.9V 0V GND 0.15V RL COUT Figure 2. Current in Shutdown Mode, ISTBY Copyright © 2014 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 V RL and COUT Time delay is a registered trademark of Richtek Technology Corporation. DS9045-05 April 2014 RT9045 VIN = 1.8V/1.5V/1.35V/1.2V VCNTL = 5V VIN VCNTL RT9045 0.9V/0.75V/0.675V/0.6V REFEN VOUT VOUT GND A COUT IL V Figure 3. Current Limit for High Side, ILIM Power Supply with Current Limit VCNTL = 5V VIN = 1.8V1.5V/1.35V/1.2V VIN A VCNTL IL RT9045 0.9V/0.75V/0.675V/0.6V REFEN VOUT VOUT GND COUT V Figure 4. Current Limit for Low Side, ILIM VCNTL = 5V VIN = 1.8V/1.5V/1.35V/1.2V VIN VCNTL RT9045 0.9V/0.75V/0.675V/0.6V REFEN VREFEN 0.15V VOUT VOUT GND RL COUT V 0.9V/0.75V VOUT 0V VOUT would be low if VREFEN < 0.15V VOUT would be high if VREFEN > 0.4V RL and COUT Time delay Figure 5. REFEN Pin Shutdown Threshold, VIH & VIL Copyright © 2014 Richtek Technology Corporation. All rights reserved. DS9045-05 April 2014 is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT9045 Function Block Diagram VCNTL VIN Current Limit Thermal Protection REFEN + EA - VOUT GND Functional Pin Description VIN REFEN Input voltage which supplies current to the output pin. Connect this pin to a well-decoupled supply voltage. To prevent the input rail from dropping during large load transient, a large, low ESR capacitor is recommended to use. The capacitor should be placed as close as possible to the VIN pin. Reference voltage input and active low shutdown control pin. Two resistors dividing down the VIN voltage on this pin to create the regulated output voltage. Pulling this pin to ground turns off the device by an open-drain, such as 2N7002, signal N-MOSFET. VOUT GND (Exposed Pad) Common Ground. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. VCNTL VCNTL supplies the internal control circuitry and provides the drive voltage. The driving capability of output current is proportioned to the VCNTL. Connect this pin to 5V bias supply to handle large output current with at least 1μF capacitor from this pin to GND. An important note is that VIN should be kept lower or equal to VCNTL. Copyright © 2014 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 Regulator output. VOUT is regulated to REFEN voltage that is used to terminate the bus resistors. It is capable of sinking and sourcing current while regulating the output rail. To maintain adequate large signal transient response, typical value of 10μF ceramic capacitors are recommended to reduce the effects of current transients on VOUT. is a registered trademark of Richtek Technology Corporation. DS9045-05 April 2014 RT9045 Absolute Maximum Ratings           (Note 1) Input Voltage, VIN ------------------------------------------------------------------------------------------------------------ −0.3V to 6V Control Voltage, VCNTL ----------------------------------------------------------------------------------------------------- −0.3V to 6V Reference Input Voltage, VREFEN ----------------------------------------------------------------------------------------- −0.3V to 6V Output Voltage, VOUT ------------------------------------------------------------------------------------------------------- −0.3V to 6V Power Dissipation, PD @ TA = 25°C SOP-8 (Exposed Pad) ----------------------------------------------------------------------------------------------------- 2.51W Package Thermal Resistance (Note 2) SOP-8 (Exposed Pad), θJA ------------------------------------------------------------------------------------------------ 39.8°C/W SOP-8 (Exposed Pad), θJC ----------------------------------------------------------------------------------------------- 10.1°C/W Junction Temperature ------------------------------------------------------------------------------------------------------- 150°C Lead Temperature (Soldering, 10 sec.) --------------------------------------------------------------------------------- 260°C Storage Temperature Range ---------------------------------------------------------------------------------------------- −65°C to 150°C ESD Susceptibility (Note 3) HBM (Human Body Model) ------------------------------------------------------------------------------------------------ 2kV MM (Machine Model) ------------------------------------------------------------------------------------------------------- 200V Recommended Operating Conditions     (Note 4) Input Voltage, VIN ------------------------------------------------------------------------------------------------------------ 1V to 5.5V Control Voltage, VCNTL ----------------------------------------------------------------------------------------------------- 5V ± 5% Junction Temperature Range ---------------------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range ---------------------------------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics (VIN = 1.8V / 1.5V, VCNTL = 5V, VREFEN = 0.9V / 0.75V, COUT = 10μF (Ceramic), TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Input VCNTL Operation Current ICNTL IOUT = 0A -- 0.7 2.5 mA VCNTL Power on Reset VPOR VCNTL Rising -- 3.6 -- V VREFEN  0.2V (Shutdown), RLOAD = 180 -- 20 90 A 13 -- 13 mV 13 -- 13 mV 1.8 -- 3.5 A 1.8 -- 3.5 A Standby Current (Note 5) ISTBY Output Output Offset Voltage (Note 6) VOS IOUT = 0A VIN = 1.8V, VREFEN = 0.9V, IOUT = 1.8A Load Regulation (Note 7) VLOAD VIN = 1.5V, VREFEN = 0.75V, IOUT = 1.5A VIN = 1.35V, VREFEN = 0.675V, IOUT = 1.2A VIN = 1.2V, VREFEN = 0.6V, IOUT = 1.2A Protection Source ILIMITsr Sink ILIMITsk Current Limit VIN = 1.8V, VREFEN = 0.9V VIN = 1.5V, VREFEN = 0.75V VIN = 1.8V, VREFEN = 0.9V VIN = 1.5V, VREFEN = 0.75V Copyright © 2014 Richtek Technology Corporation. All rights reserved. DS9045-05 April 2014 is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT9045 Parameter Symbol VIN = 1.8V / 1.5V / 1.35V / 1.2V, VOUT < 0.2V Short Circuit Current Thermal Shutdown Temperature Thermal Shutdown Hysteresis Shutdown Threshold Min Typ Max Unit -- 1.5 -- A TSD VCNTL = 5V 125 170 -- C TSD VCNTL = 5V -- 35 -- C VIN = 1.8V / 1.5V / 1.35V / 1.2V, VOUT < 0.2V -- 1.5 -- A Short Circuit Current Thermal Shutdown Temperature Thermal Shutdown Hysteresis REFEN Shutdown Test Conditions TSD VCNTL = 5V 125 170 -- C TSD VCNTL = 5V -- 35 -- C VIH Enable 0.4 -- -- VIL Shutdown -- -- 0.15 V Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured in the natural convection at TA = 25°C on a high effective thermal conductivity test board (4 Layers, 2S2P) of JEDEC 51-7 thermal measurement standard. The case point of θJC is on the exposed pad for package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. Standby current is the input current drawn by a regulator when the output voltage is disabled by a shutdown signal on REFEN pin (VIL < 0.15V). It is measured with VIN = 1.8V, VCNTL = 5V. Note 6. VOS offset is the voltage measurement defined as VOUT subtracted from VREFEN. Note 7. Regulation is measured at constant junction temperature by using a 5ms current pulse. Devices are tested for load regulation in the load range from 0A to 1.8A peak. Copyright © 2014 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 is a registered trademark of Richtek Technology Corporation. DS9045-05 April 2014 RT9045 Typical Operating Characteristics DDR III Output Voltage vs. Temperature 0.754 0.903 0.753 Output Voltage (V) Output Voltage (V) DDR II Output Voltage vs. Temperature 0.904 0.902 0.901 0.900 0.899 0.752 0.751 0.750 0.749 VIN = 1.8V, VREFEN = 0.9V, VCNTL = 5V, IOUT = 0A 0.898 -50 -25 0 25 50 75 100 VIN = 1.5V, VREFEN = 0.75V, VCNTL = 5V, IOUT = 0A 0.748 125 -50 -25 0 Temperature (°C) Low-V DDR III Output Voltage vs. Temperature 75 100 125 REFEN Threshold Voltage vs. Temperature 0.40 0.599 0.598 0.597 VIN = 1.2V, VREFEN = 0.6V, VCNTL = 5V, IOUT = 0A REFEN Threshold Voltage (V)1 Output Voltage (V) 50 Temperature (°C) 0.600 0.596 0.35 Rising 0.30 Falling 0.25 0.20 VCNTL = 5V, IOUT = 0A 0.15 -50 -25 0 25 50 75 100 125 -50 -25 0 Temperature (°C) 25 50 75 100 125 Temperature (°C) VCNTL Current vs. Temperature Source Current Limit vs. Temperature 2.6 0.8 DDR III DDR II 0.7 Low-V DDR III 0.7 0.6 0.6 VCNTL = 5V, IOUT = 0A Source Current Limit (A) 0.8 VCNTL Current (mA) 25 2.4 DDR III 2.2 DDR II 2.0 1.8 1.6 0.5 -50 -25 0 25 50 75 100 Temperature (°C) Copyright © 2014 Richtek Technology Corporation. All rights reserved. DS9045-05 April 2014 125 -50 -25 0 25 50 75 100 125 Temperature (°C) is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 RT9045 0.9VTT @ 1.8A Transient Response Sink Current Limit vs. Temperature Output Voltage (mV) 2.4 2.2 DDR III Output Current (A) Sink Current Limit (A) 2.6 2.0 DDR II 1.8 1.6 VIN = 1.8V, VREF/EN = 0.9V, VCNTL = 5V 20 0 -20 2 1 0 -1 -2 -50 -25 0 25 50 75 100 125 Time (250μs/Div) Temperature (°C) VIN = 1.5V, VREF/EN = 0.75V, VCNTL = 5V 20 0 -20 0.6VTT @ 1.2A Transient Response Output Voltage (mV) Output Voltage (mV) 0.75VTT @ 1.5A Transient Response 1 0 -1 -2 Time (250μs/Div) Copyright © 2014 Richtek Technology Corporation. All rights reserved. www.richtek.com 8 0 -20 2 Output Current (A) Output Current (A) 2 VIN = 1.2V, VREF/EN = 0.6V, VCNTL = 5V 20 1 0 -1 -2 Time (250μs/Div) is a registered trademark of Richtek Technology Corporation. DS9045-05 April 2014 RT9045 Application Information Output Voltage Setting Shutdown Control The RT9045 is a high-speed linear regulator designed to generate termination voltage in Double Data Rate (DDR) memory system. Besides, the RT9045 could also serves as a general linear regulator. The RT9045 accepts an external reference voltage at the REFEN pin and provides an output voltage regulated to this reference voltage level as shown in Figure 6, where Refer to the “Typical Application Circuit”. Make sure the current sinking capability of pull-down N-MOSFET is enough for the chosen voltage divider to pull-down the voltage at REFEN pin below 0.15V to shutdown the device. VOUT = VIN x R2 / (R1 + R2) Soft-Start VIN 5V VIN R1 VCNTL RT9045 REFEN VREFEN R2 VOUT VOUT GND In addition, the capacitor CSS and voltage divider form the low-pass filter. The RT9045 builds in an internal soft-start circuit to prevent inrush current during start-up. The internal soft-start time depends on REFEN voltage. For DDRIII application (REFEN = 0.75V), soft-start time is around 100μs. Current Limit & Short Circuit Protection Figure 6. RT9045 Operating as a Linear Regulator General Regulator Like other linear regulator, dropout voltage and thermal issue should be specially considered. Figure 7 shows the RDS(ON) vs. Temperature curve of RT9045. The minimum dropout voltage could be obtained by the product of RDS(ON) and output current. For thermal consideration, please refer to the relative section. RDS(ON) vs. Temperature 0.50 The RT9045 implements the current limit and output short protection circuit against the unexpected applications. The current limit circuit monitors and controls the pass transistor's gate voltage, providing the load current up to at least 1.8A. If the load current exceeds the current limit trip point, RT9045 will soon reduce the load current to around 1.5A constantly, refer to Figure 8. If the output voltage is abruptly pulled down to less than 0.2V, the short circuit protection is triggered and then maintains the load current at 1.5A. It prevents RT9045 from being damaged in case an output short to ground event occurs. Output Voltage vs. Output Current 0.45 0.40 1.05 0.35 0.90 DDR II 0.30 0.25 VCNTL = 5V 0.20 -50 -25 0 25 50 75 100 Temperature (°C) Figure 7. RDS(ON) vs. Temperature 125 Output Voltage (V) RDS(ON) (Ω) (Ω) 1.20 DDR III 0.75 0.60 Low - VDDR III 0.45 0.30 0.15 VCNTL = 5V 0.00 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 Output Current (A) Figure 8. Output Voltage vs. Output Current Copyright © 2014 Richtek Technology Corporation. All rights reserved. DS9045-05 April 2014 is a registered trademark of Richtek Technology Corporation. www.richtek.com 9 Input Capacitor and Layout Consideration Place the input bypass capacitor as close as possible to the RT9045. A low ESR capacitor larger than 20μF is recommended for the input capacitor. Use short and wide traces to minimize parasitic resistance and inductance. Inappropriate layout may result in large parasitic inductance and cause undesired oscillation between the RT9045 and the proceeding power converter. Thermal Consideration RT9045 regulators have internal thermal limiting circuitry designed to protect the device during overload conditions. For continued operation, do not exceed absolute maximum operation junction temperature of 125°C. The power dissipation definition in device is : Maximum Power Dissipation (W) 1 RT9045 3.5 Four-Layer PCB 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Figure 9. Derating Curve of Maximum Power Dissipation PD = (VIN − VOUT) x IOUT + VIN x IQ The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula : PD(MAX) = ( TJ(MAX) − TA ) / θJA TJ(MAX) is the maximum operation junction temperature 125°C, TA is the ambient temperature and the θJA is the junction to ambient thermal resistance. The junction to ambient thermal resistance for SOP-8 (Exposed Pad) package is 39.8°C/W on the standard JEDEC 51-7 (4 layers, 2S2P) thermal test board. The maximum power dissipation at TA = 25°C can be calculated by following formula : PD(MAX) = (125°C − 25°C) / (39.8°C/W) = 2.51W Copyright © 2014 Richtek Technology Corporation. All rights reserved. www.richtek.com 10 is a registered trademark of Richtek Technology Corporation. DS9045-05 April 2014 RT9045 Outline Dimension H A M EXPOSED THERMAL PAD (Bottom of Package) Y J X B F C I D Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 4.700 5.100 0.185 0.200 B 3.800 4.000 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.510 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.170 0.254 0.007 0.010 I 0.000 0.152 0.000 0.006 J 5.790 6.200 0.228 0.244 M 0.400 1.270 0.016 0.050 X 2.000 2.300 0.079 0.091 Y 2.000 2.300 0.079 0.091 X 2.100 2.513 0.083 0.099 Y 3.000 3.500 0.118 0.138 Option 1 Option 2 8-Lead SOP (Exposed Pad) Plastic Package Richtek Technology Corporation 14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. DS9045-05 April 2014 www.richtek.com 11