RT9081A-1AGQZA(2)

® RT9081A 500mA, 5.5V, Ultra Low Dropout Linear Regulator General Description Features The RT9081A is a high performance positive voltage regulator with separated bias voltage (VBIAS), designed  Input Voltage Range : 0.8V to 5.5V  for applications requiring low input voltage and ultra low dropout voltage, output current up to 500mA. The feature of ultra low dropout voltage is ideal for applications where output voltage is very close to input voltage. The input voltage can be as low as 0.8V and the output voltage is adjustable by an external resistive divider. The RT9081A features very low quiescent current consumption for portable applications. The device is available in the ZADFN6L 1.2x1.2 package.  Bias Voltage Range : 2.4V to 5.5V Output Voltage Fixed and Adjustable Versions  0.9V to 1.8V (Fixed)  0.8V to 3.6V (Adjustable) Accurate Output Voltage Accuracy (1.5%) Over Line, Load @ 25°°C Ultra Low Dropout Voltage : 140mV at 500mA Low Bias Input Current  80μ μA in Operating Mode  0.5μ μA in Shutdown Mode Enable Control Output Active Discharge Function RoHS Compliant and Halogen Free      Pin Configuration  (TOP VIEW) 1 2 3 6 GND VOUT ADJ/IC EN 7 5 4 VIN GND BIAS Applications   ZADFN-6L 1.2x1.2  Battery Powered Systems Portable Electronic Device Digital Set Top Boxes Ordering Information Product No. Nominal Output Voltage RT9081A-09GQZA(2) 0.90V RT9081A-10GQZA 1.00V RT9081A-1KGQZA 1.05V RT9081A-11GQZA 1.10V RT9081A-1AGQZA(2) 1.15V RT9081A-12GQZA 1.20V RT9081A-1BGQZA(2) 1.25V RT9081A-13GQZA(2) 1.30V RT9081A-15GQZA(2) 1.50V RT9081A-18GQZA(2) 1.80V RT9081AGQZA(2) Lead Plating System Package ZADFN-6L 1.2x1.2 (Z-Type) G : Green (Halogen Free and Pb Free) Pin 1 Orientation (2): Quadrant 2 Follow EIA-481-D ***Empty means Pin1 orientation is Quadrant 1 Adjustable   Copyright © 2021 Richtek Technology Corporation. All rights reserved. DS9081A-03 March 2021 is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT9081A Marking Information For marking information, contact our sales representative directly or through a Richtek distributor located in your area. Typical Application Circuit 6 VIN 1.5V CIN 1µF VOUT 1 VOUT 1.2V/500mA *COUT 4.7µF 3 Enable 4 VBIAS 3.3V RT9081A VIN EN IC 2 BIAS CBIAS 0.1µF GND 5, 7 (Exposed Pad) Figure 1. Fixed Voltage Regulator VIN 1.5V 6 CIN 1µF RT9081A VIN VOUT 1 R1 10k Enable 3 VBIAS 3.3V 4 EN ADJ VOUT 1.2V/500mA 2 R2 20k BIAS CBIAS 0.1µF *COUT 4.7µF GND 5, 7 (Exposed Pad) Figure 2. Adjustable Voltage Regulator Table 1. Recommended External components Component Description Vendor P/N CBIAS 0.1F, 16V, X5R, 0402 CGA2B2X5R1C104M050BA (TDK) GRM155R61C104MA88J (Murata) CIN 1F, 10V, X5R, 0402 GRM155R61A105KE15 (Murata) *COUT 4.7F, 6.3V, X5R, 0402 GRM155R60J475ME47(Murata) C1005X5R0J475M050BC(TDK) Table 2. Suggested Component Values VOUT (V) R1 (k) R2 (k) * COUT (F) 1.2 10 20 4.7 1.8 10 8 10 2.5 10 4.7 10 3.3 10 3.16 10 * : Considering the effective capacitance derated with biased voltage level, the COUT component needs satisfy the effective capacitance range from 2.2F to 10F at targeted output level for stable and normal operation. Copyright © 2021 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 is a registered trademark of Richtek Technology Corporation. DS9081A-03 March 2021 RT9081A Functional Pin Description Pin No. Pin Name 1 Pin Function VOUT Regulator output pin. Output capacitor should be placed directly at this pin. IC Test pin. Internal pull down by 2A. This pin should be floating or connected to ground. 2 (Adj) ADJ Adjustable output voltage feedback input pin. 3 EN Chip enable pin. Pulling this pin below 0.54V turns the regulator off, reducing the quiescent current to a fraction of its operating value. 4 BIAS Power supply input pin for the LDO control circuit. Mandatory to power up VBIAS before VEN and VIN for the output soft start procedure works intended. The VBIAS must be higher than 2.4V and ensure VBIAS  VOUT + 1.6V for normal operation. 2 (Fixed) 5, 7 (Expose pad) GND 6 VIN Ground. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. Regulator input pin. Input capacitor should be placed directly at this pin. Functional Block Diagram VOUT Fixed Version VOUT VIN EN Enable Logic VREF + Driver BIAS UVLO Current Limit Thermal Shutdown 150  GND VOUT Adjustable Version VOUT VIN EN Enable Logic BIAS UVLO VREF + - Driver Thermal Shutdown Current Limit 150  GND ADJ Copyright © 2021 Richtek Technology Corporation. All rights reserved. DS9081A-03 March 2021 is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT9081A Operation The RT9081A is using N-MOSFET pass transistor for output voltage regulation from VIN voltage. The separated bias voltage (VBIAS) power the low current internal control circuit for applications requiring low input voltage and ultra low dropout voltage. In steady-state operation, the feedback voltage is regulated to the reference voltage by the internal regulator. When the feedback voltage signal is less than the reference, the output current passes through the power MOSFET will be increased. The extra amount of the current is sent to the output until the voltage level of FB pin returns to the reference. On the other hand, if the feedback voltage is higher than the reference, the power MOSFET current is decreased. The excess charge at the output can be released by the loading current. Chip Enable and Shutdown The RT9081A provides an EN pin, as an external chip enable control, to enable or disable the device. VEN below 0.54V turns the regulator off and enters the shutdown mode, while VEN above 0.88V turns the regulator on. When the regulator is shutdown, the ground current is reduced to a maximum of 1μA. Output Active Discharge When the RT9081A is operating at shutdown mode, the device has an internal active pull down circuit that connects the output to GND through a 150Ω resistor for output discharging purpose. Current Limit The RT9081A continuously monitors the output current to protect the pass transistor against abnormal operations. When an overload or short circuit is encountered, the current limit circuitry controls the pass transistor's gate voltage to limit the output within the predefined range. Over-Temperature Protection (OTP) The RT9081A has an over-temperature protection. When the device triggers the OTP, the device shuts down until the temperature back to normal state. Copyright © 2021 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 is a registered trademark of Richtek Technology Corporation. DS9081A-03 March 2021 RT9081A Absolute Maximum Ratings         (Note 1) Supply Input Voltage, VIN ----------------------------------------------------------------------------------------------- −0.3V to 6V All Other Pins -------------------------------------------------------------------------------------------------------------- −0.3V to 6V Power Dissipation, PD @ TA = 25°C ZADFN-6L 1.2x1.2 --------------------------------------------------------------------------------------------------------- 0.73W Package Thermal Resistance (Note 2) ZADFN-6L 1.2x1.2, θJA --------------------------------------------------------------------------------------------------- 136.5°C/W ZADFN-6L 1.2x1.2, θJC --------------------------------------------------------------------------------------------------- 0.98°C/W Junction Temperature ----------------------------------------------------------------------------------------------------- 150°C Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------- 260°C Storage Temperature Range -------------------------------------------------------------------------------------------- −65°C to 150°C ESD Susceptibility (Note 3) HBM (Human Body Model) ------------------------------------------------------------------------------------------------ 2kV CDM (Charged Device Model) -------------------------------------------------------------------------------------------- 1kV Recommended Operating Conditions    (Note 4) Supply Input Voltage, VIN ----------------------------------------------------------------------------------------------- 0.8V to 5.5V Supply Input Voltage, VBIAS -------------------------------------------------------------------------------------------------------------------------------------- 2.4V to 5.5V Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C Electrical Characteristics (V BIAS ≥ 2.4V and V BIAS ≥ V OUT + 1.6V, V IN = V OUT(NOM) + 0.3V, I OUT = 1mA, V EN = 1V, C IN = 1μF, C OUT = 4.7μF, T A = 25°C, unless otherwise specified). Parameter (Note 6) Symbol Test Conditions Min Typ Max Unit Operating Input Voltage Range VIN 0.8 -- 5.5 V Operating Bias Voltage Range VBIAS 2.4 -- 5.5 V Under Voltage Lock-Out VUVLO VBIAS rising -- 1.6 -- V Hysteresis -- 0.2 -- V Reference Voltage (Adj devices only) VREF -- 0.8 -- V Output Voltage Accuracy VOUT VOUT = 0.8V, no load 0.5 -- 0.5 % Output Voltage Accuracy VOUT (Note 5) 1. VOUT(NOM) + 0.3V  VIN  VOUT(NOM) + 1V 2. VBIAS  2.4V and VOUT(NOM) + 1.6V  VBIAS  5.5V 3. 1mA  IOUT  500mA 1.5 -- 1.5 % VIN Line Regulation VLINE_VIN VOUT(NOM) + 0.3V  VIN  5V -- 0.01 -- %/V VBIAS Line Regulation VLINE_BIAS VBIAS  2.4V and VOUT(NOM) + 1.6V  VBIAS  5.5V -- 0.01 -- %/V Copyright © 2021 Richtek Technology Corporation. All rights reserved. DS9081A-03 March 2021 is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT9081A Parameter Symbol Test Conditions Min Typ Max Unit IOUT = 1mA to 500mA -- 1.5 -- mV IOUT = 150mA (Note 7) -- 37 75 mV IOUT = 500mA (Note 7) -- 140 250 mV Load Regulation VLOAD VIN Dropout Voltage VDROP_VIN VBIAS Dropout Voltage VDROP_BIAS IOUT = 500mA, VIN = VBIAS (Note 7, Note 8) -- 1.1 1.5 V Output Current Limit ILIM VOUT = 90% of VOUT(NOM) 600 800 1000 mA ADJ Pin Operating Current (ADJ devices only) IADJ -- 0.1 0.5 A Bias Pin Operating Current IBIAS VBIAS = 2.7V -- 80 110 Bias Pin Shutdown Current IBIAS(DIS) VEN  0.4 V -- 0.5 1 A A VIN Pin Shutdown Current IVIN(DIS) VEN  0.4 V -- 0.5 1 A Enable Threshold Voltage H-Level VENH 0.68 0.78 0.88 L-Level VENL 0.54 0.65 0.75 V EN Pull Down Current IEN VEN = 5.5V, VBIAS = 5.5V -- 1 -- A Turn-On Time tON From assertion of VEN to VOUT = 90% of VOUT(NOM), VOUT(NOM) = 1V -- 150 -- s PSRR_VIN VIN to VOUT, f = 1kHz, IOUT = 150mA, VIN  VOUT + 0.5V -- 70 -- dB PSRR_VBIAS VBIAS to VOUT, f = 1kHz, IOUT = 150mA, VIN  VOUT + 0.5V -- 80 -- dB Output Noise Voltage (Fixed Volt.) eNO_FIXED VIN = VOUT + 0.5 V, VOUT(NOM) = 1V, f = 10Hz to 100kHz -- 40 -- VRMS Output Noise Voltage (Adj devices) eNO_ADJ VIN = VOUT + 0.5V, f = 10Hz to 100kHz -- 50 x VOUT -- VRMS Power Supply Rejection Ratio Thermal Shutdown Threshold Temperature increasing -- 160 -- C Temperature decreasing -- 140 -- C Output Discharge Pull-Down RDISCHG VEN  0.4V, VOUT = 0.5V -- 150 --  Copyright © 2021 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 is a registered trademark of Richtek Technology Corporation. DS9081A-03 March 2021 RT9081A Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured under natural convection (still air) at TA = 25°C with the component mounted on a two-layer Richtek Evaluation Board. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. Adjustable devices tested at 0.8V; external resistor tolerance is not taken into account. Note 6. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at TA = 25°C. Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible. Note 7. Dropout voltage is characterized when VOUT falls 3% below VOUT(Normal). Note 8. For output voltages below 0.9V, VBIAS dropout voltage does not apply due to a minimum Bias operating voltage of 2.4V. Copyright © 2021 Richtek Technology Corporation. All rights reserved. DS9081A-03 March 2021 is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 RT9081A Typical Operating Characteristics Enable Voltage Threshold vs. Temperature 1.0 1.9 0.9 Enable Voltage (V) BIAS Voltage (V) BIAS Voltage UVLO vs. Temperature 2.0 1.8 Logic-High 1.7 1.6 Logic-Low 1.5 Logic-High 0.8 0.7 Logic-Low 0.6 0.5 0.4 1.4 VIN = 1.5V, VOUT = 1.2V, IOUT = 1mA 1.3 -50 -25 0 25 50 75 100 VIN = 1.5V, VOUT = 1.2V, VBIAS = 5V, IOUT = 1mA 0.3 -50 125 -25 0 Temperature (°C) 50 75 100 125 Temperature (°C) VIN Dropout Voltage vs. (VBIAS - VOUT) Reference Voltage vs. Temperature 400 0.810 125°C 85°C 25°C 0°C −40°C 350 300 0.805 VIN - VOUT (mV) Reference Voltage (V) 25 0.800 250 200 150 100 0.795 50 IOUT = 500mA VIN = 1.45V, IOUT = 1mA 0.790 -50 -25 0 25 50 75 100 0 1 125 1.5 2 (VIN - VOUT) Dropout Voltage (mV) 160 140 125°C 85°C 25°C −40°C 100 80 60 40 20 VIN = 1.5V 0 0 100 200 300 400 Output Current (mA) Copyright © 2021 Richtek Technology Corporation. All rights reserved. www.richtek.com 8 500 Output Spectral Noise Density (μV/Hz) Dropout Voltage vs. Output Current 180 120 2.5 3 3.5 4 4.5 VBIAS - VOUT (V) Temperature (°C) Output Spectral Noise Density 10.00 IOUT = 1mA IOUT = 500mA 1.00 RMS Noise (100Hz to 100kHz) 42μVRMS (IOUT = 1mA) 44.5μVRMS (IOUT = 500mA) VIN = 1.8V, VOUT = 1.2V VBIAS = 3.8V, COUT = 4.7μF CIN = 1μF 0.10 0.01 10 100 1k 10k 100k Frequency (Hz) is a registered trademark of Richtek Technology Corporation. DS9081A-03 March 2021 RT9081A Power Off from EN Power On from EN VEN (2V/Div) VEN (2V/Div) VOUT (500mV/Div) VOUT (500mV/Div) IOUT (500mA/Div) IOUT (500mA/Div) VIN = 1.5V, VOUT = 1.2V, VBIAS = 5V Time (50μs/Div) VIN = 1.5V, VOUT = 1.2V, VBIAS = 5V Time (10μs/Div) Output Current Limit Protection VIN (500mV/Div) VOUT (500mV/Div) IOUT (400mA/Div) VBIAS = 3V, VIN = 1.5V, VOUT = 1.2V, COUT = 4.7μF Time (1ms/Div) Copyright © 2021 Richtek Technology Corporation. All rights reserved. DS9081A-03 March 2021 is a registered trademark of Richtek Technology Corporation. www.richtek.com 9 RT9081A Application Information The RT9081A is a low voltage, low dropout linear regulator with input voltage VIN from 0.8V to 5.5V, VBIAS from 2.4V to 5.5V and adjusted output voltage from 0.8V to (VIN − VDROP). Output Voltage Setting For the RT9081A, the voltage on the ADJ pin sets the output voltage and is determined by the values of R1 and R2. The values of R1 and R2 can be calculated for any voltage using the formula given in Equation : VOUT  0.8V   R1 + R2   R2  Using lower values for R1 and R2 is recommended to reduces the noise injected from the FB pin. Note that R1 is connected from VOUT pin to ADJ pin, and R2 is connected from ADJ to GND. BIAS Pin Input The VBIAS supply rail that powers the LDO control circuit sinks very low current (approximately the quiescent current of the LDO), which must be higher than 2.4V and higher than the output voltage of 1.6V for normal operation. Dropout Voltage The dropout voltage refers to the voltage difference between the VIN and VOUT pins while operating at specific output current. The dropout voltage VDROP also can be expressed as the voltage drop on the pass-FET at specific output current (IRATED) while the pass-FET is fully operating at ohmic region and the pass-FET can be characterized as an resistance RDS(ON). Thus the dropout voltage can be defined as (VDROP = VIN − VOUT = RDS(ON) x IRATED). For normal operation, the suggested LDO operating range is (VIN > VOUT + VDROP) for good transient response and PSRR ability. Vice versa, while operating at the ohmic region will degrade the performance severely. CIN and COUT Selection The RT9081A is designed specifically to work with low ESR ceramic output capacitor for space saving and performance consideration. Using a ceramic capacitor with effective capacitance range from 2.2μF to 10μF on the RT9081A output ensures stability. The input capacitor must Copyright © 2021 Richtek Technology Corporation. All rights reserved. www.richtek.com 10 be located at a distance of no more than 0.5 inch from the input pin of the chip. However, a capacitor with larger value and lower ESR (Equivalent Series Resistance) is recommended since it will provide better PSRR and line transient response. Any good quality ceramic capacitor can be used, CIN = 1μF and CBIAS = 0.1μF or greater are recommended. Sequencing Requirements The RT9081A supports power on the input VIN, VBIAS, and EN pins in any order without damage the device. However, for the output soft start procedure works as intended, it is mandatory to ensure VBIAS ≥ VOUT + 1.6V before VIN ≥ VOUT + 0.3V, the device enabled by VEN (VEN > VENH) eventually. The BIAS pin supplies voltage for the LDO control circuit, and powering up VBIAS first will ensure turn on time (t ON) and output voltage accuracy to follow datasheet spec. Thermal Considerations The junction temperature should never exceed the absolute maximum junction temperature TJ(MAX), listed under Absolute Maximum Ratings, to avoid permanent damage to the device. The maximum allowable power dissipation depends on the thermal resistance of the IC package, the PCB layout, the rate of surrounding airflow, and the difference between the junction and ambient temperatures. The maximum power dissipation can be calculated using the following formula : PD(MAX) = (TJ(MAX) − TA) / θJA where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction-to-ambient thermal resistance. For continuous operation, the maximum operating junction temperature indicated under Recommended Operating Conditions is 125°C. The junction-to-ambient thermal resistance, θJA, is highly package dependent. For a ZADFN-6L 1.2x1.2 package, the thermal resistance, θJA, is 136.5°C/W on a two-layer Richtek evaluation board. The maximum power dissipation at TA = 25°C can be calculated as below : is a registered trademark of Richtek Technology Corporation. DS9081A-03 March 2021 RT9081A PD(MAX) = (125°C − 25°C) / (136.5°C/W) = 0.73W for a ZADFN-6L 1.2x1.2 package. Layout Considerations For best performance of the RT9081A, the PCB layout suggestions below are highly recommend. The maximum power dissipation depends on the operating ambient temperature for the fixed TJ(MAX) and the thermal resistance, θJA. The derating curves in Figure 1 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. Maximum Power Dissipation (W)1 1.0 Two-Layer Richtek EVB 0.9  All circuit components placed on the same side and as near to the respective LDO pin as possible, place the ground return path connection to the input and output capacitor.  The ground plane connected by a wide copper surface for good thermal dissipation.  Using vias and long power traces for the input and output capacitors connection is discouraged and have negatively affects on performance. 0.8 0.7 0.6 0.5 Figure 4 shows an example for the layout reference that reduce conduction trace loop, helping inductive parasitic minimize, load transient reduction and good circuit stability. 0.4 0.3 0.2 0.1 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Figure 3. Derating Curve of Maximum Power Dissipation GND Plane CIN, COUT should be as near to the LDO as possible COUT VOUT Plane R1 CIN VOUT 1 ADJ/IC 2 EN 3 GND 7 6 VIN 5 GND 4 BIAS VIN Plane VBIAS source input CBIAS R2 GND Plane Enable signal input Add vias for thermal consideration and reduce the loop impedance of ground plane Figure 4. PCB Layout Guide Copyright © 2021 Richtek Technology Corporation. All rights reserved. DS9081A-03 March 2021 is a registered trademark of Richtek Technology Corporation. www.richtek.com 11 RT9081A Outline Dimension 2 1 2 1 DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Symbol Dimensions In Millimeters Dimensions In Inches Min. Max. Min. Max. A 0.280 0.320 0.011 0.013 A1 0.000 0.010 0.000 0.000 0.060 A3 0.002 b 0.130 0.230 0.005 0.009 D 1.100 1.300 0.043 0.051 D2 0.990 1.040 0.039 0.041 E 1.100 1.300 0.043 0.051 E2 0.350 0.400 0.014 0.016 0.400 e L 0.170 0.016 0.270 0.007 0.011 Z-Type 6L ADFN 1.2x1.2 Package Copyright © 2021 Richtek Technology Corporation. All rights reserved. www.richtek.com 12 is a registered trademark of Richtek Technology Corporation. DS9081A-03 March 2021 RT9081A Footprint Information Footprint Dimension (mm) Package Number of Pin P A B C D Sx Sy M U/X/ZADFN1.2*1.2-6 6 0.400 2.000 0.760 0.620 0.180 1.015 0.375 0.980 Tolerance ±0.050 Richtek Technology Corporation 14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. DS9081A-03 March 2021 www.richtek.com 13