®
RT9085A
1A, 5.5V, Ultra Low Dropout Linear Regulator
General Description
Features
The RT9085A is a high performance positive voltage
regulator with separated bias voltage (VBIAS), designed
Input Voltage Range : 0.8V to 5.5V
for applications requiring low input voltage and ultra low
dropout voltage, output current up to 1A. The feature of
ultra low dropout voltage is ideal for applications where
output voltage is very close to input voltage. The input
voltage can be as low as 0.8V and the output voltage is
adjustable by an external resistive divider. The RT9085A
features very low quiescent current consumption for
portable applications. The device is available in the WLCSP-6B 0.8x1.2 (BSC) package.
Bias Voltage Range : 3V to 5.5V
Available in Fixed and Adjustable (0.5V to 3V)
Ultra Low Dropout Voltage : 60mV at 1A
Accurate Output Voltage Accuracy (1%) Over Line,
Load @ 25°°C
Low Bias Input Current
Typ 35μ
μA in Operating Mode
Typ 0.5μ
μA in Shutdown Mode
Output Active Discharge Function
Enable Control
Stable with a 10μ
μF Output Ceramic Capacitor
RoHS Compliant and Halogen/Pb Free
Pin Configuration
(TOP VIEW)
VOUT A1
ADJ/SNS
GND
B1
C1
A2
VIN
B2
EN
C2
Applications
BIAS
Battery Powered Systems
Portable Electronic Device
Digital Set Top Boxes
WL-CSP-6B 0.8x1.2 (BSC)
Marking Information
For marking information, contact our sales representative
directly or through a Richtek distributor located in your
area.
Simplified Application Circuit
A2
VIN
RT9085A
VIN
VOUT
A1
CIN
Enable
REN
VOUT
R1
B2
EN
ADJ
*CFF
COUT
B1
CEN
VBIAS
RB
CBIAS
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December 2020
R2
C2 BIAS
GND
C1
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RT9085A
Ordering Information
Product No.
Nominal Output
Voltage
RT9085A-07WSC
0.70V
RT9085A-0GWSC
0.75V
RT9085A-08WSC
0.80V
RT9085A-0HWSC
0.85V
RT9085A-09WSC
0.90V
RT9085A-0JWSC
0.95V
RT9085A-10WSC
1.00V
RT9085A-1KWSC
1.05V
RT9085A-11WSC
1.10V
RT9085A-1AWSC
1.15V
RT9085A-12WSC
1.20V
RT9085A-1BWSC
1.25V
RT9085A-13WSC
1.30V
RT9085A-15WSC
1.50V
RT9085A-18WSC
1.80V
RT9085AWSC
Adjustable
Package
WL-CSP-6B 0.8x1.2 (BSC)
Functional Pin Description
Pin No.
Pin Name
Pin Function
A1
VOUT
Regulator output pin. A 10F capacitor should be placed directly at this pin.
A2
VIN
Regulator input pin. A 4.7F capacitor should be placed directly at this pin.
ADJ (ADJ devices)
Adjustable output voltage feedback input pin.
B1
SNS (Fix Vlot devices) Output voltage sensing input, connect to the output terminal on the PCB.
B2
EN
Chip enable pin. Pulling this pin below 0.54V turns the regulator off,
reducing the quiescent current to a fraction of its operating value. This pin
must not be left unconnected, connect to the RC filter after BIAS if not being
used. If EN is an external signal, it suggest connect RC filter for operation.
Keep VEN < VBIAS + 0.5V to prevent malfunction.
C1
GND
Ground pin. This pin must be connected to ground.
BIAS
Supply VBIAS ripple should be less than 30mV (5mV/s) to secure safe
stabilization of internal control circuitry. Apply RC filter consists of (500 to
1k) + 1F at the pin input. The VBIAS must be higher than 3V and ensure
VBIAS VOUT + 1.6V for normal operation.
C2
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DS9085A-04
December 2020
RT9085A
Functional Block Diagram
VOUT Fixed Version
VOUT
VIN
SNS
Enable
Logic
EN
VREF
+
Driver
BIAS
UVLO
Current
Limit
Thermal
Shutdown
150
GND
VOUT Adjustable Version
VOUT
VIN
EN
Enable
Logic
BIAS
UVLO
VREF
+
-
Driver
Thermal
Shutdown
Current
Limit
150
GND
ADJ
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December 2020
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RT9085A
Operation
The RT9085A is using N-MOSFET pass transistor for
output voltage regulation from VIN voltage. The separated
bias voltage (VBIAS) power the low current internal control
circuit for applications requiring low input voltage and ultra
low dropout voltage.
In steady-state operation, the feedback voltage is
regulated to the reference voltage by the internal regulator.
When the feedback voltage signal is less than the
reference, the output current passes through the power
MOSFET will be increased. The extra amount of the
current is sent to the output until the voltage level of ADJ
pin returns to the reference. On the other hand, if the
feedback voltage is higher than the reference, the power
MOSFET current is decreased. The excess charge at the
output can be released by the loading current.
Chip Enable and Shutdown
The RT9085A provides an EN pin, as an external chip
enable control, to enable or disable the device. VEN below
0.54V turns the regulator off and enters the shutdown
mode, while VEN above 0.93V turns the regulator on. When
the regulator is shutdown, the ground current is reduced
to a maximum of 1μA.
Output Active Discharge
When the RT9085A is operating at shutdown mode, the
device has an internal active pull down circuit that connects
the output to GND through a 150Ω resistor for output
discharging purpose.
Current Limit
The RT9085A continuously monitors the output current
to protect the pass transistor against abnormal operations.
When an overload or short circuit is encountered, the
current limit circuitry controls the pass transistor's gate
voltage to limit the output within the predefined range.
Over-Temperature Protection (OTP)
The RT9085A has an over-temperature protection. When
the device triggers the OTP, the device shuts down until
the temperature back to normal state.
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is a registered trademark of Richtek Technology Corporation.
DS9085A-04
December 2020
RT9085A
Absolute Maximum Ratings
(Note 1)
Supply Input Voltage, VIN -------------------------------------------------------------------------------------- −0.3V to 6V
Enable Input Voltage, EN --------------------------------------------------------------------------------------- −0.3V to (BIAS + 0.5V)
All Other Pins ----------------------------------------------------------------------------------------------------- −0.3V to 6V
Power Dissipation, PD @ TA = 25°C
WL-CSP-6B 0.8x1.2 (BSC) (Note 2) ----------------------------------------------------------------------- 1.29W
WL-CSP-6B 0.8x1.2 (BSC) (Note 3) ----------------------------------------------------------------------- 1.25W
Package Thermal Resistance (Note 2)
WL-CSP-6B 0.8x1.2 (BSC), θJA (Note 2) ---------------------------------------------------------------- 77°C/W
WL-CSP-6B 0.8x1.2 (BSC), θJA (Note 3) ---------------------------------------------------------------- 80°C/W
Junction Temperature -------------------------------------------------------------------------------------------- 150°C
Lead Temperature (Soldering, 10 sec.) ---------------------------------------------------------------------- 260°C
Storage Temperature Range ----------------------------------------------------------------------------------- −65°C to 150°C
ESD Susceptibility (Note 4)
HBM (Human Body Model) ------------------------------------------------------------------------------------- 2kV
Recommended Operating Conditions
(Note 5)
Supply Input Voltage, VIN -------------------------------------------------------------------------------------- 0.8V to 5.5V
Supply Input Voltage, BIAS ------------------------------------------------------------------------------------ 3V to 5.5V
Junction Temperature Range ----------------------------------------------------------------------------------- −40°C to 125°C
Electrical Characteristics
(VBIAS ≥ 3V, and VBIAS ≥ VOUT + 1.6V, VIN = VOUT(NOMl) + 0.3V, IOUT = 1mA, VEN = 1V, CIN = 4.7μF, COUT = 10μF, CBIAS = 1μF, TA =
25°C, unless otherwise specified).
Parameter
(Note 7)
Symbol
Operating Input
Voltage Range
VIN
Operating Bias
Voltage Range
VBIAS
Under-Voltage
Lockout
VUVLO
Reference Voltage
(Adj devices only)
VREF
Test Conditions
Min
Typ
Max
Unit
0.8
--
5.5
V
3
--
5.5
V
VBIAS rising
--
1.6
--
V
Hysteresis
--
0.2
--
V
0.49
0.5
0.51
V
0.5
--
0.5
%
1
--
1
%
--
0.01
--
%/V
--
0.01
--
%/V
Output Voltage
VOUT
Accuracy (Note 6)
VOUT = 0.5V, no load
Output Voltage
VOUT
Accuracy (Note 6)
1. VOUT(NOM) + 0.3V VIN VOUT(NOM) + 1V
2. VBIAS 3V and VOUT(NOM) + 1.6V VBIAS
5.5V
3. 1mA IOUT 1A
VIN Line Regulation
VLINE_VIN VOUT(NOM) + 0.3V VIN 5V
VBIAS Line
Regulation
VBIAS_VIN
VBIAS 3V and VOUT(NOM) + 1.6V VBIAS
5.5V
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RT9085A
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Load Regulation
VLOAD
IOUT = 1mA to 1A
--
2
--
mV
VIN Dropout Voltage
VDROP_VIN
IOUT = 1A
(Note 10)
--
60
75
mV
VBIAS Dropout Voltage
VDROP_BIAS
IOUT = 1A, VIN = VBIAS
(Note 8, Note 9)
--
1.05
1.5V
V
Output Current Limit
ILIM
VOUT = 90% of VOUT(NOM)
--
2000
--
mA
ADJ Pin Operating Current
(ADJ devices only)
IADJ
--
0.1
0.5
A
Bias Pin Quiescent Current
IBIAS
VBIAS = 3V
--
35
50
Bias Pin Shutdown Current
IBIAS(DIS)
VEN 0.4 V
--
0.5
1
A
A
VIN Pin Shutdown Current
IVIN(DIS)
VEN 0.4 V
--
0.5
1
A
Enable Threshold H-Level
Voltage
L-Level
VENH
0.69
0.81
0.93
VENL
0.54
0.68
0.87
EN Pull Down Current
IEN
VEN = 5.5V, VBIAS = 5.5V
--
0.3
--
A
Turn-On Time
tON
From assertion of VEN to VOUT =
90% of VOUT(NOM). VOUT(NOM) = 1V
--
150
--
s
PSRR_VIN
VIN to VOUT, f = 1kHz,
IOUT = 150mA, VIN VOUT + 0.5V
--
70
--
dB
PSRR_VBIAS
VBIAS to VOUT, f = 1kHz,
IOUT = 150mA, VIN VOUT + 0.5V
--
70
--
dB
Output Noise Voltage (Fixed
eNO_FIXED
Volt.) (Note 11)
VIN = VOUT +0.5 V, VOUT(NOM) = 1V,
f = 10Hz to 100kHz
--
60
--
VRMS
Output Noise Voltage (Adj
devices)
(Note 11)
eNO_ADJ
VIN = VOUT + 0.5V, f = 10Hz to
100kHz
--
30 x
VOUT/
VREF
--
VRMS
Thermal Shutdown
Threshold
TSD
Shutdown temperature
--
160
--
C
Thermal Shutdown
Hysteresis
TSD
--
20
--
C
Output Discharge
Pull- Down
RDISCH
--
150
--
Power Supply Rejection
Ratio (Note 11)
VEN 0.4V, VOUT = 0.5V
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DS9085A-04
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RT9085A
Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
These are stress ratings only, and functional operation of the device at these or any other conditions beyond those
indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions may affect device reliability.
Note 2. θJA = 77°C/W is measured under natural convection (still air) at TA = 25°C with the component mounted on a high
effective-thermal-conductivity four-layer test board on a JEDEC thermal measurement standard.
Note 3. θJA = 80°C/W is measured under natural convection (still air) at TA = 25°C with the component mounted on a twolayer Richtek Evaluation Board.
Note 4. Devices are ESD sensitive. Handling precaution is recommended.
Note 5. The device is not guaranteed to function outside its operating conditions.
Note 6. Adjustable devices tested at 0.5V; external resistor tolerance is not taken into account.
Note 7. Performance guaranteed over the indicated operating temperature range by design and/or characterization.
Production tested at TA = 25°C. Low duty cycle pulse techniques are used during the testing to maintain the
junction temperature as close to ambient as possible.
Note 8. Dropout voltage is characterized when VOUT falls 3% below VOUT(Normal).
Note 9. For output voltages below 0.9V, VBIAS dropout voltage does not apply due to a minimum Bias operating voltage of 3V.
Note 10. For adjustable devices, VIN dropout voltage tested at VOUT(NOM) = 2 x VREF.
Note 11. Guaranteed by design.
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December 2020
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RT9085A
Typical Application Circuit
A2
VIN
CIN
4.7µF
Enable
REN
B2
RT9085A
VIN
VOUT
EN
SNS
A1
VOUT
1.2V/1A
COUT
10µF
B1
CEN
RB
VBIAS
3.3V
C2 BIAS
510
GND
C1
CBIAS
1µF
Figure 1. Fixed Voltage Regulator
A2
VIN
CIN
4.7µF
Enable
REN
RT9085A
VIN
VOUT
A1
VOUT
R1
B2
EN
ADJ
*CFF
B1
**COUT
10µF
CEN
VBIAS
RB
R2
C2 BIAS
510
CBIAS
1µF
GND
C1
Figure 2. Adjustable Voltage Regulator
Table 1. Recommended External components
Component
Description
Vendor P/N
CBIAS
1F, 16V, X5R, 0402
CGB2A1X5R1C105M033BC(TDK)
GRM155R61C105MA12D(Murata)
CIN
4.7F, 10V, X5R, 0603
C1608X5R1A475K080AE(TDK)
GRM155R61A475MEAA(Murata)
**COUT
10F, 6.3V, X5R, 0603
GRM185R60J106ME15(Murata)
0603X106M6R3(WASLIN)
** : Considering the effective capacitance derated with biased voltage level, the COUT component needs satisfy the
effective capacitance at least 4.7F or above at targeted output level for stable and normal operation.
Table 2. Suggested Component Values
VOUT (V)
R1 (k)
R2 (k)
* CFF (pF)
0.75
20
40
120
1
20
20
120
1.8
20
7.69
120
2.5
20
5
--
* : The feedforward capacitor CFF is optional for the optimization of transient response by increasing bandwidth and
acceptable phase margin.
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RT9085A
Typical Operating Characteristics
VIN PSRR vs. Frequency
120
VIN PSRR vs. Frequency
80
VBIAS = 3V, VIN = 1.5V,
VOUT = 1V, COUT = 10μF
100
VBIAS = 3V, VOUT = 1V,
IOUT = 1A, COUT = 10μF
70
80
60
PSRR (dB)
PSRR (dB)
60
IOUT = 10mA
IOUT = 50mA
IOUT = 150mA
IOUT = 500mA
IOUT = 1000mA
40
20
VIN
VIN
VIN
VIN
VIN
40
30
=
=
=
=
=
1.7V
1.5V
1.4V
1.3V
1.2V
20
10
0
0
10
100
1K
10K
100K
1M
10
10M
100
1K
10K
100K
1M
10M
Frequency (Hz)
Frequency (Hz)
Output Spectral Noise Density
BIAS pin Quiescent Current vs. Output Current
100
55
VBIAS = 3V, VIN = 1.5V, VOUT = 1V,
COUT = 10μF, RMS Noise (10Hz to 100kHz)
30.1μVRMS (IOUT = 1mA)
31.8μVRMS (IOUT = 1A)
10
50
45
I BIAS (μA)
Output Spectral Noise Density (μV /Hz)
50
1
0.1
IOUT = 1mA
IOUT = 1A
0.01
VBIAS = 5V
VBIAS = 4V
VBIAS = 3V
40
35
30
25
VIN = 1.5V, VOUT = 0.5V
20
0.001
10
100
1K
10K
0
100K
200
400
Frequency (Hz)
Enable Voltage Threshold vs. Temperature
800
1000
VIN Dropout Voltage vs. (VBIAS - VOUT)
1.0
120
0.9
Logic-High
100
0.8
0.6
VIN - VOUT (mV)
0.7
VEN (V)
600
I OUT (mA)
Logic-Low
0.5
0.4
0.3
0.2
80
60
40
85°C
25°C
−40°C
20
0.1
VIN = 0.9V, VOUT = 0.5V, IOUT = 1mA, VBIAS = 4V
0.0
VIN = 1.4V, IOUT = 1A
0
-50
-25
0
25
50
75
100
Temperature (°C)
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December 2020
125
1
1.5
2
2.5
3
3.5
4
4.5
5
VBIAS - VOUT (V)
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RT9085A
VOUT Start Up with EN
(VIN - VOUT) Dropout Voltage (mV)
Dropout Voltage vs. Output Current
80
VOUT = 2.5V
70
VOUT = 1.8V
60
VOUT = 1.2V
85°C
25°C
−40°C
50
VOUT = 0.5V
40
VOUT
(0.5V/Div)
30
20
10
VIN = 1.5V
VEN
(2V/Div)
VIN = VOUT + 0.3V, VBIAS = 5V,
COUT = 10μF, IOUT = 1A
0
0
250
500
750
Time (50μs/Div)
1000
I OUT (mA)
Load Transient Response
Output Current Limit Protection
VIN
(500mV/Div)
VOUT
(500mV/Div)
VOUT
offset 1.2V
(100mV/Div)
IOUT
(0.5A/Div)
VIN = VOUT + 0.3V, VOUT = 1.2V, VBIAS = 3V,
COUT = 10μF, IOUT = 0.1A to 1A (TR = TF = 1μs)
Time (50μs/Div)
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IOUT
(1A/Div)
VBIAS = 3V, VIN = 1.5V,
VOUT = 1V, COUT = 10μF
Time (2ms/Div)
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December 2020
RT9085A
Application Information
The RT9085A is a low voltage, low dropout linear regulator
with input voltage VIN from 0.8V to 5.5V, VBIAS from 3V to
5.5V and adjusted output voltage from 0.5V to (VIN −
VDROP). Keep VEN < VBIAS + 0.5V to prevent malfunction.
Output Voltage Setting
For the RT9085A, the voltage on the ADJ pin sets the
output voltage and is determined by the values of R1 and
R2. The values of R1 and R2 can be calculated for any
voltage using the formula given in Equation :
VOUT 0.5V R1 + R2
R2
Using lower values for R1 and R2 is recommended to
reduces the noise injected from the ADJ pin. Note that R1
is connected from VOUT pin to ADJ pin, and R2 is
connected from ADJ to GND.
BIAS Pin Input
The VBIAS supply rail that powers the LDO control circuit
sinks very low current (approximately the quiescent
current of the LDO), which must be higher than 3V and
ensure VBIAS ≥ VOUT + 1.6V for normal operation.
Dropout Voltage
The dropout voltage refers to the voltage difference between
the VIN and VOUT pins while operating at specific output
current. The dropout voltage VDROP also can be expressed
as the voltage drop on the pass-FET at specific output
current (IRATED) while the pass-FET is fully operating at
ohmic region and the pass-FET can be characterized as
an resistance RDS(ON). Thus the dropout voltage can be
defined as (VDROP = VIN − VOUT = RDS(ON) x IRATED). For
normal operation, the suggested LDO operating range is
(VIN > VOUT + VDROP) for good transient response and
PSRR ability. Vice versa, while operating at the ohmic
region will degrade the performance severely.
be located at a distance of no more than 0.5 inch from the
input pin of the chip. However, a capacitor with larger value
and lower ESR (Equivalent Series Resistance) is
recommended since it will provide better PSRR and line
transient response. Any good quality ceramic capacitor
can be used, CIN = 4.7μF or greater is recommended.
VBIAS pin is suggested connecting with a 510Ω resistor
and CBIAS = 1μF as a low-pass filter for good noise
immunity.
Feedback Network with Feed-forward Capacitor
The feed-forward capacitor (CFF) introduced one zero and
one pole within the feedback loop, which is optional for
the optimization of transient response by increasing
bandwidth and acceptable phase margin. The RT9085A is
designed to be stable without the external feed-forward
capacitor. However, an external feed-forward capacitor also
can be used, adding a 120pF external feed-forward
capacitor optimizes the transient, noise, and PSRR
performances.
Sequencing Requirements
The RT9085A supports power on the input VIN, VBIAS, and
EN pins in any order without damage the device. However,
for the output soft start procedure works as intended, it is
mandatory to ensure VIN ≥ VOUT + 0.1V before VBIAS ≥
VOUT + 1.6V, the device enabled by VEN (VEN > VENH)
eventually. The BIAS pin supplies voltage for the LDO
control circuit, and powering up VBIAS first will ensure turn
on time (tON) and output voltage accuracy to follow
datasheet spec.
Figure 3 also shows the use of an RC-delay circuit that
hold off VEN until VBIAS has ramped up to target value.
This technique can also be used to drive VEN from VIN. An
external control signal can also be used to enable the
device after VIN and VBIAS are present.
CIN and COUT Selection
The RT9085A is designed specifically to work with low
ESR ceramic output capacitor for space saving and
performance consideration. Using a ceramic capacitor with
effective capacitance range from 4.7μF to 22μF on the
RT9085A output ensures stability. The input capacitor must
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RT9085A
CIN
4.7µF
VOUT
EN
ADJ
C
VBIAS
RB
510
VOUT
COUT
10µF
B1
R2
C2
CBIAS
1µF
A1
R1
B2
Enable
VIN
BIAS
GND
C1
Figure 3. Soft-Start Delay Using an RC Circuit to
Enable the Device
Thermal Considerations
The junction temperature should never exceed the
absolute maximum junction temperature TJ(MAX), listed
under Absolute Maximum Ratings, to avoid permanent
damage to the device. The maximum allowable power
dissipation depends on the thermal resistance of the IC
package, the PCB layout, the rate of surrounding airflow,
and the difference between the junction and ambient
temperatures. The maximum power dissipation can be
calculated using the following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction-to-ambient
thermal resistance.
For continuous operation, the maximum operating junction
temperature indicated under Recommended Operating
Conditions is 125°C. The junction-to-ambient thermal
resistance, θJA, is highly package dependent. For a WLCSP-6B 0.8x1.2 (BSC) package, the thermal resistance,
θJA, is 77°C/W on a standard JEDEC high effective-thermalconductivity four-layer test board and the thermal
resistance. θ JA, is 80°C/W on a two-layer Richtek
resistance, θJA. The derating curves in Figure 4 allows
the designer to see the effect of rising ambient temperature
on the maximum power dissipation.
2.0
Maximum Power Dissipation (W)1
A2
VIN
RT9085A
1.8
1.6
JEDEC Four-layer board
1.4
1.2
1.0
0.8
Two-layer Richtek EVB
0.6
0.4
0.2
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 4. Derating Curve of Maximum Power Dissipation
Layout Considerations
For best performance of the RT9085A, the PCB layout
suggestions below are highly recommend.
All circuit components placed on the same side and as
near to the respective LDO pin as possible, place the
ground return path connection to the input and output
capacitor.
The ground plane connected by a wide copper surface
for good thermal dissipation.
Using vias and long power traces for the input and output
capacitors connection is discouraged and have
negatively affects on performance.
Figure 5 shows an example for the layout reference that
reduce conduction trace loop, helping inductive parasitic
minimize, load transient reduction and good circuit stability.
evaluation board. The maximum power dissipation at TA =
25°C can be calculated as below :
PD(MAX) = (125°C − 25°C) / (77°C/W) = 1.29W for a
standard JEDEC four-layer test board.
PD(MAX) = (125°C − 25°C) / (80°C/W) = 1.25W for a
two-layer Richtek evaluation board.
The maximum power dissipation depends on the operating
ambient temperature for the fixed TJ(MAX) and the thermal
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
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12
is a registered trademark of Richtek Technology Corporation.
DS9085A-04
December 2020
RT9085A
GND Plane
CIN, COUT should be placed
as close to the LDO as
possible.
COUT
CIN
VOUT Plane
R1
VOUT A1
A2
VIN
ADJ
B1
B2
EN
GND
C1
C2
BIAS
VIN Plane
CEN
R2
CBIAS
Add via for thermal consideration
and reduce the loop impedance
of ground plane.
REN
Enable signal input
RB
VBIAS source input
GND Plane
Figure 5. PCB Layout Guide
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
DS9085A-04
December 2020
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
13
RT9085A
Outline Dimension
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
0.500
0.600
0.020
0.024
A1
0.170
0.230
0.007
0.009
b
0.240
0.300
0.009
0.012
D
1.160
1.240
0.046
0.049
D1
E
0.800
0.760
0.031
0.840
0.030
0.033
E1
0.400
0.016
e
0.400
0.016
6B WL-CSP 0.8x1.2 Package (BSC)
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
www.richtek.com
14
is a registered trademark of Richtek Technology Corporation.
DS9085A-04
December 2020
RT9085A
Footprint Information
Package
Number of
Pin
WL-CSP0.8*1.2-6(BSC)
6
Type
NSMD
SMD
Footprint Dimension (mm)
e
0.400
A
B
0.240
0.340
0.270
0.240
Tolerance
±0.025
Richtek Technology Corporation
14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
DS9085A-04
December 2020
www.richtek.com
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