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RT9149ZQW

RT9149ZQW

  • 厂商:

    RICHTEK(台湾立绮)

  • 封装:

    TDFN8_3X3MM_EP

  • 描述:

    IC OPAMP GP 12MHZ RRO 8WDFN

  • 数据手册
  • 价格&库存
RT9149ZQW 数据手册
® RT9148/9 20V, 350mA, Rail-to-Rail Operational Amplifier General Description Features The RT9148/9 consists of a low power, high slew rate, single supply rail-to-rail input and output operational amplifier. The RT9148 contains a single amplifier and RT9149 contains two amplifiers in one package.  Rail-to-Rail Output Swing  Supply Voltage : 6V to 20V Peak Output Current : 350mA High Slew Rate : 35V/μ μs Unity Gain Stable RoHS Compliant and Halogen Free The RT9148/9 has a high slew rate (35V/μs), 350mA peak output current and offset voltage below 15mV. The RT9148/9 is ideal for Thin Film Transistor Liquid Crystal Displays (TFT-LCD). The RT9148 is available in the WDFN-6L 2x2, TSOT-23-5 and UDFN-6L 2x2 packages. The RT9149 is available in the WDFN-8L 3x3 package. The RT9148/9 are specified for operation over the full temperature range from −40°C to 85°C. Marking Information     Applications     TFT LCD Panels Notebook Computers Monitors LCD TVs Ordering Information RT9148 Package Type QW : WDFN-6L 2x2 (W-Type) RT9148ZQW 0E : Product Code 0EW Lead Plating System Z : ECO (Ecological Element with Halogen Free and Pb free) W : Date Code RT9148 RT9148GJ5 Package Type J5 : TSOT-23-5 QU : UDFN-6L 2x2 (U-Type) 00 : Product Code 00=DNN DNN : Date Code Lead Plating System G : Green (Halogen Free and Pb Free) RT9148GQU 2D : Product Code 2DW RT9149 W : Date Code Package Type QW : WDFN-8L 3x3 (W-Type) Lead Plating System Z : ECO (Ecological Element with Halogen Free and Pb free) RT9149ZQW 86 YM DNN 86 : Product Code Note : YMDNN : Date Code Richtek products are :  RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.  Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9148/9-04 October 2013 Suitable for use in SnPb or Pb-free soldering processes. is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT9148/9 Pin Configurations 1 NC VS+ 2 5 3 7 4 6 VS+ VIN- 5 4 VIN+ VINVOUT 2 VOUTA VINAVINA+ VS- 3 1 8 2 7 3 VS- VS- VS- (TOP VIEW) 6 4 9 5 VS+ VOUTB VINBVINB+ VOUT VS- VIN+ WDFN-6L 2x2 / UDFN-6L 2x2 TSOT-23-5 WDFN-8L 3x3 RT9148 RT9148 RT9149 Typical Application Circuit VS+ VS+ VINx+ VINx- + RS* VOUTx - TFT-LCD Capacitance VS- * : RS may be needed for some applications. Function Block Diagram VS+ VIN+ VIN- - VOUT + VS- WDFN-6L 2x2 / UDFN-6L 2x2 RT9148 VS+ VIN+ VIN- + - VOUT VS- TSOT-23-5 RT9148 VOUTA VOUTB VINA- - - VINB- VINA+ VS+ + + VINB+ VS- WDFN-8L 3x3 RT9149 Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 is a registered trademark of Richtek Technology Corporation. DS9148/9-04 October 2013 RT9148/9 Functional Pin Description RT9148 Pin No. Pin Name WDFN-6L 2x2, TSOT-23-5 UDFN-6L 2x2 Pin Function 1, 7 (Exposed Pad) 2 VS Negative Supply Input. 2 -- NC No Internal Connection. 3 5 VS+ Positive Supply Input. 4 1 VOUT Output. 5 4 VIN Negative Input. 6 3 VIN+ Positive Input. RT9149 Pin No. Pin Name 1 VOUTA Output of Amplifier A. 2 VINA Negative Input of Amplifier A. 3 VINA+ Positive Input of Amplifier A. VS Negative Supply Input. 5 VINB+ Positive Input of Amplifier B. 6 VINB Negative Input of Amplifier B. 7 VOUTB Output of Amplifier B. 8 VS+ Positive Supply Input. 4, 9 (Exposed Pad) Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9148/9-04 Pin Function October 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT9148/9 Absolute Maximum Ratings (Note 1) Supply Voltage, (VS+ to VS−) ------------------------------------------------------------------------------------------- 24V VINx+, VINx− to VS− ------------------------------------------------------------------------------------------------------- −0.3V to 24V  VINx+ to VINx− -------------------------------------------------------------------------------------------------------------- ±5V  Power Dissipation, PD @ TA = 25°C WDFN-6L 2x2 ---------------------------------------------------------------------------------------------------------------- 2.1W TSOT-23-5 --------------------------------------------------------------------------------------------------------------------- 0.43W UDFN-6L 2x2 ----------------------------------------------------------------------------------------------------------------- 2.09W WDFN-8L 3x3 ---------------------------------------------------------------------------------------------------------------- 3.22W  Package Thermal Resistance (Note 2) WDFN-6L 2x2, θJA ----------------------------------------------------------------------------------------------------------- 47.5°C/W TSOT-23-5, θJA --------------------------------------------------------------------------------------------------------------- 230.6°C/W UDFN-6L 2x2, θJA ------------------------------------------------------------------------------------------------------------ 47.7°C/W WDFN-8L 3x3, θJA ----------------------------------------------------------------------------------------------------------- 31°C/W WDFN-8L 3x3, θJC ----------------------------------------------------------------------------------------------------------- 8°C/W  Lead Temperature (Soldering, 10 sec.) --------------------------------------------------------------------------------- 260°C  Junction Temperature ------------------------------------------------------------------------------------------------------- 150°C  Storage Temperature Range ---------------------------------------------------------------------------------------------- −65°C to 150°C  ESD Susceptibility (Note 3) HBM (Human Body Model) ------------------------------------------------------------------------------------------------ 2kV MM (Machine Model) ------------------------------------------------------------------------------------------------------- 200V   Recommended Operating Conditions    (Note 4) Supply Voltage, VS− = 0V, VS+ ----------------------------------------------------------------------------------------- 6V to 20V Junction Temperature Range ---------------------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range ---------------------------------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics (VS+ = 16V, VS− = 0V, VINx+ = VOUTx = VS+ / 2, RL = 10kΩ and CL = 10pF, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Input Characteristics Input Offset Voltage VOS VCM = VS+ / 2 -- 2 15 mV Input Bias Current IB VCM = VS+ / 2 -- 2 50 nA Load Regulation VLOAD IL = 0 to 80mA -- 0.1 -- IL = 0 to 80mA -- 0.1 -- 0.5 -- VS+ 0.5 V Common Mode Input Range Common Mode Rejection Ratio Open Loop Gain CMIR CMRR 0.5V  VOUTx  VS+  0.5V -- 95 -- dB AVOL 0.5V  VOUTx  VS+  0.5V -- 118 -- dB Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 mV/mA is a registered trademark of Richtek Technology Corporation. DS9148/9-04 October 2013 RT9148/9 Parameter Symbol Test Conditions Min Typ Max Unit Output Characteristics Output Swing Low VOL IL = 50mA -- 0.6 1.5 V Output Swing High VOH IL = 50mA VS+ 1.5 VS+ 0.3 -- V Transient Peak Output Current IPK 300 350 400 mA Power Supply Power Supply Rejection Ratio Quiescent Current PSRR VS+ = 6V to 20V, VCM = VOUTx = VS+ / 2 -- 96 -- dB IDD No Load -- 4 -- mA SR 4V step, 20% to 80%, AV = 1 -- 35 -- V/s Setting to ±0.1% (AV = 1) tS AV = 1, VOUTx = 2V step RL = 10k, CL = 10pF -- 270 -- ns 3dB Bandwidth BW RL = 10k, CL = 10pF -- 16 -- MHz Gain-Bandwidth Product GBWP RL = 10k, CL = 10pF -- 12 -- MHz Phase Margin PM RL = 10k, CL = 10pF -- 50 -- -- Dynamic Performance Slew Rate Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is measured at the exposed pad of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9148/9-04 October 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT9148/9 Typical Operating Characteristics Supply Current / Amplifier vs. Supply Voltage Supply Current / Amplifier vs. Temperature 5 Supply Current (mA) Supply Current (mA) 5 4 3 2 4 3 2 1 Unity Gain, One OP, VINx+ = VS+ / 2, VS+ = 6V to 20V, VS− = 0V Unity Gain, One OP, VINx+ = 8V, VS+ = 16V, VS− = 0V 1 0 6 8 10 12 14 16 18 20 -50 -25 0 Supply Voltage (V) Input Offset Voltage vs. Supply Voltage 50 75 100 125 Input Offset Voltage vs. Temperature 0.5 2 Input Offset Voltage (mV) Input Offset Voltage (mV) 25 Temperature (°C) 0.0 -0.5 1 0 -1 Unity Gain, VINA+ = VS+ / 2, VS+ = 6V to 20V, VS− = 0V Unity Gain, VINA+ = 8V, VS+ = 16V, VS− = 0V -1.0 -2 6 8 10 12 14 16 18 20 -50 -25 0 25 50 Supply Voltage (V) Temperature (C) Output Voltage Swing vs. Supply Voltage Rail to Rail 75 100 125 Output Voltage Swing (V) 0.4 Unity Gain, f = 10kHz Swing Low, VINA+ = 0V, VINA− = 3V, ILOAD = −50mA 0.2 0.0 Swing High, VINA+ = 3V, VINA− = 0V, ILOAD = 50mA -0.2 VINA+ (2.8V/Div) VOUTA (2.8V/Div) -0.4 VS+ = 6V to 20V, VS− = 0V VINA+ = 0.5V to 15.5V, VS+ = 16V, VS− = 0V -0.6 6 8 10 12 14 16 18 20 Time (25μs/Div) Supply Voltage (V) Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 is a registered trademark of Richtek Technology Corporation. DS9148/9-04 October 2013 RT9148/9 Small Signal Response Large Signal Response VINA+_ac coupled (100mV/Div) VINA+_ac coupled (2V/Div) VOUTA_ac coupled (100mV/Div) VOUTA_ac coupled (2V/Div) Unity Gain, VINA+ = 7.9V to 8.1V, VS+ = 16V, VS− = 0V, f = 100kHz Unity Gain, VINA+ = 6V to 10V, VS+ = 16V, VS− = 0V, f = 100kHz Time (2.5μs/Div) Time (2.5μs/Div) Slew Rate Slew Rate Falling Rising VINA+ (5V/Div) VINA+ (5V/Div) VOUTA (5V/Div) VOUTA (5V/Div) Unity Gain, VINA+ = 4V to 8V, VS+ = 16V, VS− = 0V, f = 10kHz Time (50ns/Div) Time (50ns/Div) −3dB Bandwidth Gain Bandwidth Product Unity Gain, VINA+ = 8V, VS+ = 16V, VS− = 0V, RL = 10kΩ, CL = 10pF Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9148/9-04 Unity Gain, VINA+ = 8V to 4V, VS+ = 16V, VS− = 0V, f = 10kHz October 2013 Unity Gain, VINA+ = 8V, VS+ = 16V, VS− = 0V, RL = 10kΩ, CL = 10pF is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 RT9148/9 Applications Information The RT9148/9 is a high performance operational amplifier capable of driving large loads for different applications. A high slew rates, rail-to-rail input and output capability, and low power consumption are the features which make the RT9148/9 ideal for LCD applications. The RT9148/9 also has wide bandwidth and phase margin to drive a load with 10kΩ resistance and 10pF capacitance. Operating Voltage The RT9148/9 total supply voltage range is guaranteed from 6V to 20V. The specifications are stable over both the full supply range and operating temperatures from −40°C to 85°C. The output swing of the RT9148/9 typically extends to within 1.5V of positive/negative supply rails with 50mA load current source/sink. Decreasing the load current will obtain an output swing even closer to the supply rails. Short Circuit Condition For recommended operating condition specifications, the maximum junction temperature is 125°C. The junction to ambient thermal resistance, θJA, is layout dependent. For WDFN-6L 2x2 packages, the thermal resistance, θJA, is 47.5°C/W on a standard JEDEC 51-7 four-layer thermal test board. For TSOT-23-5 packages, the thermal resistance, θJA, is 230.6°C/W on a standard JEDEC 51-7 four-layer thermal test board. For UDFN-6L 2x2 packages, the thermal resistance, θJA, is 47.7°C/W on a standard JEDEC 51-7 four-layer thermal test board. For WDFN-8L 3x3 packages, the thermal resistance, θJA, is 31°C/W on a standard JEDEC 51-7 four-layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by the following formula : PD(MAX) = (125°C − 25°C) / (47.5°C/W) = 2.1W for WDFN-6L 2x2 package PD(MAX) = (125°C − 25°C) / (230.6°C/W) = 0.43W for TSOT-23-5 package An internal short circuit protection is implemented to protect the device from output short circuit. The RT9148/9 limits the short circuit current to ±350mA if the output is directly shorted to positive/negative supply rails. PD(MAX) = (125°C − 25°C) / (47.7°C/W) = 2.09W for WDFN-6L 2x2 package LCD Panel Applications The maximum power dissipation depends on the operating ambient temperature for fixed T J(MAX) and thermal resistance, θJA. The derating curve in Figure 1 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. The RT9148/9 is mainly designed for LCD V-com buffer. The operational amplifier has 350mA instantaneous source/ sink peak current. P D(MAX) = (125°C − 25°C) / (31°C/W) = 3.22W for WDFN-8L 3x3 package Thermal Considerations PD(MAX) = (TJ(MAX) − TA) / θJA where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction to ambient thermal resistance. Maximum Power Dissipation (W)1 For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : 4.0 Four-Layer PCB 3.6 WDFN 8L 3x3 3.2 2.8 2.4 UDFN 6L 2x2 2.0 WDFN 6L 2x2 1.6 1.2 0.8 TSOT-23-5 0.4 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Figure 1. Derating Curve of Maximum Power Dissipation Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 8 is a registered trademark of Richtek Technology Corporation. DS9148/9-04 October 2013 RT9148/9 Layout Consideration PCB layout is very important for designing power converter circuits. The following layout guidelines should be strictly followed for best performance of the RT9148/9.  Place the power components as close to the IC as possible. The traces should be wide and short, especially for the high current loop.  A series resistance may be needed at the output for some applications.  Connect a 0.1μF capacitor from VINx+ to ground and place it as close to the IC as possible for better performance.  The exposed pad of the chip should be connected to a large PCB plane for maximum thermal consideration. Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9148/9-04 October 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 9 RT9148/9 Outline Dimension D2 D L E E2 1 e b A A1 SEE DETAIL A 2 1 2 1 A3 DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.200 0.350 0.008 0.014 D 1.950 2.050 0.077 0.081 D2 1.000 1.450 0.039 0.057 E 1.950 2.050 0.077 0.081 E2 0.500 0.850 0.020 0.033 e L 0.650 0.300 0.026 0.400 0.012 0.016 W-Type 6L DFN 2x2 Package Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 10 is a registered trademark of Richtek Technology Corporation. DS9148/9-04 October 2013 RT9148/9 H D L B C b A A1 e Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 0.700 1.000 0.028 0.039 A1 0.000 0.100 0.000 0.004 B 1.397 1.803 0.055 0.071 b 0.300 0.559 0.012 0.022 C 2.591 3.000 0.102 0.118 D 2.692 3.099 0.106 0.122 e 0.838 1.041 0.033 0.041 H 0.080 0.254 0.003 0.010 L 0.300 0.610 0.012 0.024 TSOT-23-5 Surface Mount Package Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9148/9-04 October 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 11 RT9148/9 2 1 2 1 DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Symbol Dimensions In Millimeters Dimensions In Inches Min. Max. Min. Max. A 0.500 0.600 0.020 0.024 A1 0.000 0.050 0.000 0.002 A3 0.100 0.175 0.004 0.007 b 0.200 0.300 0.008 0.012 D 1.900 2.100 0.075 0.083 D2 1.350 1.450 0.053 0.057 E 1.900 2.100 0.075 0.083 E2 0.750 0.850 0.030 0.033 e L 0.650 0.300 0.026 0.400 0.012 0.016 U-Type 6L DFN 2x2 Package Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 12 is a registered trademark of Richtek Technology Corporation. DS9148/9-04 October 2013 RT9148/9 D2 D L E E2 1 e SEE DETAIL A b 2 1 2 1 A A1 A3 DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.200 0.300 0.008 0.012 D 2.950 3.050 0.116 0.120 D2 2.100 2.350 0.083 0.093 E 2.950 3.050 0.116 0.120 E2 1.350 1.600 0.053 0.063 e L 0.650 0.425 0.026 0.525 0.017 0.021 W-Type 8L DFN 3x3 Package Richtek Technology Corporation 14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. DS9148/9-04 October 2013 www.richtek.com 13
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