RT9194PE

RT9194 Low-Dropout Linear Regulator Controller with PGOOD Indication General Description The RT9194 is a low-dropout voltage regulator controller with a specific PGOOD indicating scheme, it acts as a power supervisor of the power regulated. The part could drive an external N-Channel MOSFET for various applications accordingly; especially, the part is operated with VCC power ranging from 4.5V to 13.5V. With such a topology, it's with advantages of flexible and cost-effective. The part comes to a small footprint package of SOT-23-6. Features 4.5V to 13.5V Operation Voltage High Accuracy ± 2% 0.8V Voltage Reference Quick Transient Response Power Good Indicator with Delay Enable Control Compliant with Intel “Grantsdale Chipset Platform Design Guide” Specification Small Footprint Package SOT-23-6 RoHS Compliant and 100% Lead (Pb)-Free Ordering Information RT9194 Package Type E : SOT-23-6 Operating Temperature Range P : Pb Free with Commercial Standard G : Green (Halogen Free with Commercial Standard) Applications S pecial Designed for Intel ® G rantsdale platform FSB_VTT power regulation Processor Power-Up Sequening Notebook and laptop PC Other Power regulation with Power Good indication. Note : RichTek Pb-free and Green products are : RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. Suitable for use in SnPb or Pb-free soldering processes. 100%matte tin (Sn) plating. Pin Configurations (TOP VIEW) VCC 6 1 DRI PGOOD 5 2 GND 4 3 FB Marking Information EN For marking information, contact our sales representative directly or through a RichTek distributor located in your area, otherwise visit our website for detail. SOT-23-6 Note : There is no pin1 indicator on top mark for SOT-23-6 type, and pin 1 will be lower left pin when reading top mark from left to right. Typical Application Circuit VCC VIN Ccc 1 2 3 EN GND FB RT9194 VCC DRI 6 5 4 RPGOOD CIN Q1 VOUT Chip Enable PGOOD R1 PGOOD COUT R2 VOUT DS9194-08 March 2007 R1+ R2 = 0.8 × R2 www.richtek.com 1 RT9194 Test Circuit VCC 12V VIN Chip Enable EN GND FB RT9194 VCC DRI Ccc 1uF CIN 100uF Q1 PHD3055 VOUT R1 1k COUT 100uF 100k PGOOD RPGOOD PGOOD VOUT R1+ R2 = 0.8 × R2 R2 2k Figure 1. Typical Test Circuit VCC 12V Chip Enable 5V EN GND VFB CFB VFB = 1V for current sink at DRI FB RT9194 VCC DRI Ccc 1uF A VDRI PGOOD VFB = 0.6V for current source at DRI Figure 2. DRI Source/Sink Current Test Circuit www.richtek.com 2 DS9194-08 March 2007 RT9194 Functional Pin Description Pin Name EN GND FB PGOOD DRI VCC Pin No. 1 2 3 4 5 6 Pin Function Chip Enable (Active High) Ground Output Voltage Feedback Power Good Open Drain Output Driver Output Power Supply Input Function Block Diagram EN VCC Reference 0.8V Voltage 0.7V PGOOD 3ms Delay GND + + - DRI Driver DS9194-08 March 2007 - FB www.richtek.com 3 RT9194 Absolute Maximum Ratings (Note 1) Supply Input Voltage, VCC ------------------------------------------------------------------------------------------- 15V Enable Voltage --------------------------------------------------------------------------------------------------------- 7V Power Good Output Voltage ---------------------------------------------------------------------------------------- 7V Power Dissipation, PD @ TA = 25°C SOT-23-6 ---------------------------------------------------------------------------------------------------------------- 0.4W Package Thermal Resistance SOT-23-6, θJA ----------------------------------------------------------------------------------------------------------- 250°C/W Lead Temperature (Soldering, 10 sec.) --------------------------------------------------------------------------- 260°C Junction Temperature ------------------------------------------------------------------------------------------------- 150°C Storage Temperature Range ---------------------------------------------------------------------------------------- −65°C to 150°C ESD Susceptibility (Note 2) HBM (Human Body Mode) ------------------------------------------------------------------------------------------ 2kV MM (Machine Mode) -------------------------------------------------------------------------------------------------- 200V Recommended Operating Conditions (Note 3) Supply Input Voltage, VCC ------------------------------------------------------------------------------------------- 4.5V to 13.5V Enable Voltage --------------------------------------------------------------------------------------------------------- 0V to 5.5V Junction Temperature Range ---------------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range ---------------------------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics (VCC = 5V/12V, TA = 25°C, unless otherwise specified) Parameter VCC Operation Voltage Range POR Threshold POR Hysteresis VCC Supply Current Driver Source Current Driver Sink Current Reference Voltage (VFB) Reference Line Regulation (VFB) Amplifier Voltage Gain PSRR at 100Hz, No Load Power Good Rising Threshold Hysteresis Sink Capability Delay Time Falling Delay Symbol Test Conditions VCC input range VCC rising VCC falling VCC = 12V VCC = 12V, VDRI = 6V VCC = 12V, VDRI = 6V VCC = 12V, VDRI = 5V VCC = 4.5V to 15V VCC = 12V, no load VCC = 12V, no load VCC = 12V VCC = 12V VCC = 12V @ 1mA VCC = 12V VCC = 12V Min 4.5 4.0 --5 5 0.784 --50 Typ -4.2 0.2 0.3 --0.8 3 70 -- Max 13.5 4.5 -0.8 --0.816 6 --- Units V V V mA mA mA V mV dB dB ---1 -- 90 15 0.2 3 15 --0.4 10 -- % % V ms us To be Continued www.richtek.com 4 DS9194-08 March 2007 RT9194 Parameter Chip Enable EN Rising Threshold EN Hysteresis Standby Current VCC = 12V VCC = 12V VCC = 12V, VEN = 0V ---0.7 30 ---5 V mV uA Test Conditions Min Typ Max Units Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. Devices are ESD sensitive. Handling precaution recommended. Note 3. The device is not guaranteed to function outside its operating conditions. DS9194-08 March 2007 www.richtek.com 5 RT9194 Typical Operating Characteristics Quiescent Current vs. Temperature 0.5 Feedback Voltage vs. Temperature 0.9 Refer to Test Circuit Figure 1 Quiescent Current (mA) Feedback Voltage (V) 0.49 0.85 0.48 0.8 0.47 0.75 0.46 VIN = 1.5V, VCC = 12V, RPGOOD = 100k CIN = COUT = 100uF, R1 = 1k, R2 = 2k 0.45 -50 -25 0 25 50 75 100 VIN = 1.5V, VCC = 12V, RPGOOD = 100k CIN = COUT = 100uF, R1 = 1k, R2 = 2k 0.7 -50 -25 0 25 50 75 100 125 125 Temperature (°C) Temperature (°C) DRI Source Current vs. Temperature 60 DRI Sink Current vs. Temperature 30 Refer to Test Circuit Figure 2 DRI Source Current (mA) DRI Sink Current (mA) 55 27 24 21 18 15 50 45 40 VFB = 1V, VCC = 12V, VDRI = 6V 35 -50 -25 0 25 50 75 100 125 VFB = 0.6V, VCC = 12V, VDRI = 6V 12 -50 -25 0 25 50 75 100 125 Temperature (°C) Temperature (°C) Sink Current vs. DRI Voltage 25 4 PGOOD Delay Time vs. Temperature Refer to Test Circuit Figure 2 Refer to Test Circuit Figure 1 50 75 100 125 PGOOD Delay Time (ms) 20 3.5 VIN = 1.5V, VCC = 12V RPGOOD = 100k R1 = 1k, R2 = 2k Sink Current (mA) 15 3 10 2.5 5 2 TA = 25°C 0 0 0.5 1 1.5 2 2.5 3 1.5 -50 -25 0 25 DRI Voltage (V) Temperature (°C) www.richtek.com 6 DS9194-08 March 2007 Refer to Test Circuit Figure 2 Refer to Test Circuit Figure 1 RT9194 PGOOD Delay Time VCC = 12V, CIN = COUT = 100uF, ILOAD = 100mA PGOOD Delay Time Refer to Test Circuit Figure 1 Refer to Test Circuit Figure 1 Refer to Test Circuit Figure 1 Refer to Test Circuit Figure 1 VCC = 12V, ILOAD = 1A CIN = COUT = 100uF V OUT ILoad (A) VPGOOD V OUT VPGOOD VEN (V) VEN (V) Time (500us/Div) Time (500us/Div) PGOOD Off Refer to Test Circuit Figure 1 V OUT Enable Threshold Voltage vs. Temperature 1 Enable Threshold Voltage (V) VCC = 12V CIN = COUT = 100uF 0.95 0.9 0.85 0.8 0.75 0.7 0.65 0.6 VIN = 1.5V, VCC = 12V, RPGOOD = 100kΩ CIN = COUT = 100uF, R1 = 1k, R2 = 2k Turn on ILoad (A) Turn off VPGOOD VEN (V) Time (50us/Div) -50 -25 0 25 50 75 100 125 Temperature (°C) Load Transient Response Refer to Test Circuit Figure 1 FB Voltage Deviation (mV) VIN = 2.5V, VOUT = 1.2V CIN = COUT = 100uF 20 0 -20 Line Transient Response FB Voltage Deviation (mV) VIN = 1.5V to 2.5V, ILOAD = 100mA CIN = 2.2uF, COUT = 100uF 10 0 -10 5 0 Input Voltage Deviation (V) Load Current(A) 2.5 1.5 Time (250us/Div) Time (100us/Div) DS9194-08 March 2007 www.richtek.com 7 RT9194 Application Information Capacitors Selection Careful selection of the external capacitors for RT9194 is highly recommended in order to remain high stability and performance. Regarding the supply voltage capacitor, connecting a capacitor which is 1μF between VCC and ground is a must. The capacitor improves the supply voltage stability to provide chip normally operating. Regarding the input capacitor, connecting a capacitor which 100μF between VIN and ground is recommended to increase stability. With large value of capacitance could result in better performance for both PSRR and line transient response. When driving external pass element, connecting a capacitor 100 μ F between V OUT and ground is recommended for stability. With larger capacitance can reduce noise and improve load transient response and PSRR. Output Voltage Setting The RT9194 develop a 0.8V reference voltage; especially suit for low voltage application. As shown in application circuit, the output voltage could easy set the output voltage by R1 & R2 divider resistor. Power Good Function The RT9194 has the power good function with delay. The power good output is an open drain output. Connect a 100kΩ pull up resistor to VOUT to obtain an output voltage. When the output voltage arrive 90% of normal value the power good will output voltage with 3ms delay time. When the output voltage falling arrive 75% of normal value the power good will turn off with less than 1ms delay time. But, there are two exceptions. One is the enable pull low the power good will turn off quickly. The second is the VCC falling arrive POR value (4V typ.) the power good also will turn off quickly. Chip Enable Operation Pull the EN pin low to drive the device into shutdown mode. During shutdown mode, the standby current drops to 5μA(MAX). The external capacitor and load current determine www.richtek.com 8 the output voltage decay rate. Drive the EN pin high to turn on the device again. Under Voltage Protection RT9194 equips the VOUT under-voltage (UV) protection function. The UV protection circuits will start monitoring the power status after the PGOOD pin goes high. If the output voltage drops to below 75% of its setting value, the PGOOD and DRI pins will be pulled low and latch RT9194. The UV latch status will be released only when VCC or Enable pin goes low and returns high again, which will also cause RT9194 to re-activate. MOSFET Selection The RT9194 are designed to driver external N-Channel MOSFET pass element. MOSFET selection criteria include threshold voltage V GS ( V TH ), maximum continuous drain current ID, on-resistance R DS(ON) ,maximum drain-to-source voltage VDS and package thermal resistance θ(JA). The most critical specification is the MOSFET RDS(ON). Calculate the required RDS(ON) from the following formula: V − VOUT NMOSFET RDS(ON) = IN ILOAD For example, the MOSFET operate up to 2A when the input voltage is 1.5V and set the output voltage is 1.2V, R ON = ( 1.5V-1.2V) / 2A = 150m Ω , the MOSFET's RON have to select lower than 150mΩ. A Philip PHD3055E MOSFET with an RDS(ON) of 120mΩ(typ.) is a close match. And carry on consider the thermal resistance from junction to ambient θ(JA) of the MOSFET's package. The power dissipation calculate by : PD = (VIN − VOUT) x ILOAD The thermal resistance from junction to ambient θ(JA) calculate by : (T − T ) θ (JA) = J A PD In this example, PD = (1.5V − 1.2V) x 2A = 0.6W. The PHD3055E's θ(JA) is 75°C/W for its D-PAK package, which translates to a 45°C temperature rise above ambient. The package provides exposed backsides that directly transfer heat to the PCB board. DS9194-08 March 2007 RT9194 PNP Transistor Selection The RT9194 could driver the PNP transistor to sink output current. PNP transistor selection criteria include DC current gain hFE, threshold voltage VEB, collector-emitter voltage VCE, maximum continues collector current IC, package thermal resistance θ(JA). For example, the PNP transistor operates sink current up to 0.5A when the input voltage is 1.5V and set the output voltage is 1.2V. As show in Figure 3. A KSB772 PNP transistor, the VCE = 1.2V, VBE = -1V, IC = 0.5A, IB = 0.5/160 ] 3.125mA, when the DRI pin voltage is 0.2V could sink 6.8mA(MAX) is a close match. Sink Current vs. DRI Voltage VIN 25 PGOOD VCC VCC Ccc GND DRI PGOOD RT9194 FB Q2 RPGOOD Q1 VOUT R1 COUT Sink Current (mA) CIN 20 15 Chip Enable EN 10 5 R2 TA = 25°C 0 0 0.5 1 1.5 2 2.5 3 Figure 3 DRI Voltage (V) Figure 4 Layout Considerations There are three critical layout considerations. One is the divider resistors should be located to RT9194 as possible to avoid inducing any noise. The second is capacitors place. The CIN and COUT have to put at near the NMOS for improve performance. The third is the copper area for pass element. We have to consider when the pass element operating under high power situation that could rise the junction temperature. In addition to the package thermal resistance limit, we could add the copper area to improve the power dissipation. As show in Figure 5 and Figure 6. VIN VIN PGOOD CIN + VCC VCC Ccc GND DRI PGOOD RT9194 FB RPGOOD Q1 VOUT GND Chip Enable EN VCC R1 COUT + PGOOD VOUT EN FB + R2 GND Figure 5 DS9194-08 March 2007 Figure 6 www.richtek.com 9 RT9194 Outline Dimension H D L C B b A A1 e Symbol A A1 B b C D e H L Dimensions In Millimeters Min 0.889 0.000 1.397 0.250 2.591 2.692 0.838 0.080 0.300 Max 1.295 0.152 1.803 0.560 2.997 3.099 1.041 0.254 0.610 Dimensions In Inches Min 0.031 0.000 0.055 0.010 0.102 0.106 0.033 0.003 0.012 Max 0.051 0.006 0.071 0.022 0.118 0.122 0.041 0.010 0.024 SOT-23-6 Surface Mount Package Richtek Technology Corporation Headquarter 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Richtek Technology Corporation Taipei Office (Marketing) 8F, No. 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)89191466 Fax: (8862)89191465 Email: marketing@richtek.com www.richtek.com 10 DS9194-08 March 2007