RT9199GSP

® RT9199 Cost-Effective, 2A Peak Sink/Source Bus Termination Regulator General Description Features The RT9199 is a simple, cost-effective and high-speed linear regulator designed to generate termination voltage in Double Data Rate (DDR) memory system to comply with the devices requirements. The regulator is capable of actively sinking or sourcing up to peak 2A for DDRII or 1.5A for DDRIII while regulating an output voltage to within 20mV. The output termination voltage can be tightly regulated to track 1/2VDDQ by two external voltage divider  resistors or the desired output voltage can be pro-grammed by externally forcing the REFEN pin voltage. The RT9199 also incorporates a high-speed differential amplifier to provide ultra-fast response in line/load transient. Other features include extremely low initial offset voltage, excellent load regulation, current limiting in bi-directions and on-chip thermal shut-down protection. The RT9199 are available in both SOP-8 and SOP-8 (Exposed Pad) surface mount packages. Sink and Source Current :   Peak 2A for DDRII   Peak 1.5A for DDRIII  Integrated Power MOSFETs  Generate Termination Voltage for DDR Memory Interfaces  High Accuracy Output Voltage at Full-Load  Output Adjustment by Two External Resistors  Low External Component Count  Shutdown for Suspend to RAM (STR) Functionality with High-Impedance Output  Current Limiting Protection  On-Chip Thermal Protection  RoHS Compliant and Halogen Free  Applications  Ordering Information RT9199 Package Type S : SOP-8 SP : SOP-8 (Exposed Pad-Option 2) Lead Plating System P : Pb Free G : Green (Halogen Free and Pb Free) Z : ECO (Ecological Element with Halogen Free and Pb free) Ideal for DDRII / DDRIII VTT Applications      Desktop PCs, Notebooks, and Workstations Graphics Card Memory Termination Set Top Boxes, Digital TVs, Printers Embedded Systems Active Termination Buses DDR/II Memory Systems Pin Configurations (TOP VIEW) Note : Richtek products are :  RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.  Suitable for use in SnPb or Pb-free soldering processes. 8 VCNTL GND 2 7 VCNTL REFEN 3 6 VOUT 4 5 VCNTL VCNTL 8 NC VIN SOP-8 VIN GND 2 REFEN 3 VOUT 7 GND 6 9 4 5 NC VCNTL NC SOP-8 (Exposed Pad) Copyright © 2014 Richtek Technology Corporation. All rights reserved. DS9199-11 April 2014 is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT9199 Marking Information RT9199xS RT9199xSP RT9199xS : Product Number RT9199 xSYMDNN RT9199xSP : Product Number RT9199 xSPYMDNN x : P or G or Z YMDNN : Date Code x : P or G or Z YMDNN : Date Code Typical Application Circuit VCNTL = 5V VIN = 1.8V/1.5V RTT R1 VIN 2N7002 EN VCNTL CCNTL CIN RT9199 REFEN VOUT CSS R2 GND COUT RDUMMY R1 = R2 = 100kΩ, RTT = 50Ω / 33Ω / 25Ω COUT(MIN) = 10μF (Ceramic) + 1000μF under the worst case testing condition RDUMMY = 1kΩ as for VOUT discharge when VIN is not presented but VCNTL is presented CSS = 1μF, CIN = 470μF (Low ESR), CCNTL = 47μF Test Circuit VIN = 1.8V/1.5V VIN 0.9V/0.75V VCNTL = 5V VCNTL RT9199 REFEN VOUT VOUT GND COUT V IL Figure 1. Output Voltage Tolerance, ΔVLOAD Copyright © 2014 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 is a registered trademark of Richtek Technology Corporation. DS9199-11 April 2014 RT9199 VCNTL = 5V A VIN = 1.8V/1.5V VIN VCNTL RT9199 REFEN VOUT 0.9V/0.75V VOUT 0.9V 0V GND 0.15V COUT RL V RL and COUT Time deleay Figure 2. Current in Shutdown Mode, ISTBY VCNTL = 5V VIN = 1.8V/1.5V VIN 0.9V/0.75V VCNTL RT9199 REFEN VOUT VOUT A GND COUT V IL Figure 3. Current Limit for High Side, ILIM Power Supply with Current Limit VCNTL = 5V VIN = 1.8V/1.5V VIN 0.9V/0.75V A VCNTL IL RT9199 REFEN VOUT VOUT GND COUT V Figure 4. Current Limit for Low Side, ILIM VCNTL = 5V VIN = 1.8V/1.5V VIN 0.9V/0.75V VREFEN VCNTL RT9199 REFEN VOUT GND 0.15V VOUT RL COUT V 0.9V/0.75V VOUT 0V VOUT would be low if V REFEN < 0.15V VOUT would be high if V REFEN > 0.6V RL and COUT Time deleay Figure 5. REFEN Pin Shutdown Threshold, VIH & VIL Copyright © 2014 Richtek Technology Corporation. All rights reserved. DS9199-11 April 2014 is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT9199 Functional Pin Description VIN REFEN Input voltage which supplies current to the output pin. Connect this pin to a well-decoupled supply voltage. To prevent the input rail from dropping during large load transient, a large, low ESR capacitor is recommended to use. The capacitor should be placed as close as possible to the VIN pin. Reference voltage input and active low shutdown control pin. Two resistors dividing down the VIN voltage on the pin to create the regulated output voltage. Pulling the pin to ground turns off the device by an open-drain, such as 2N7002, signal N-MOSFET. VOUT GND (Exposed Pad) Regulator output. VOUT is regulated to REFEN voltage that is used to terminate the bus resistors. It is capable of sinking and sourcing current while regulating the output rail. To maintain adequate large signal transient response, typical value of 1000μF Al electrolytic capacitor with 10μF ceramic capacitors are recommended to reduce the effects of current transients on VOUT. Common Ground. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. VCNTL VCNTL supplies the internal control circuitry and provides the drive voltage. The driving capability of output current is proportioned to the VCNTL. Connect this pin to 5V bias supply to handle large output current with at least 1μF capacitor from this pin to GND. An important note is that VIN should be kept lower or equal to VCNTL. Function Block Diagram VCNTL VIN Current Limit Thermal Protection + REFEN VOUT EA GND Copyright © 2014 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 is a registered trademark of Richtek Technology Corporation. DS9199-11 April 2014 RT9199 Absolute Maximum Ratings         (Note 1) Input Voltage, VIN ---------------------------------------------------------------------------------------------------------Control Voltage, VCNTL --------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C SOP-8 ----------------------------------------------------------------------------------------------------------------------SOP-8 (Exposed Pad) -------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2) SOP-8, θJA -----------------------------------------------------------------------------------------------------------------SOP-8, θJC -----------------------------------------------------------------------------------------------------------------SOP-8 (Exposed Pad), θJA ---------------------------------------------------------------------------------------------SOP-8 (Exposed Pad), θJC --------------------------------------------------------------------------------------------Junction Temperature ----------------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------Storage Temperature Range -------------------------------------------------------------------------------------------ESD Susceptibility (Note 3) HBM (Human Body Model) ---------------------------------------------------------------------------------------------MM (Machine Model) ----------------------------------------------------------------------------------------------------- Recommended Operating Conditions    6V 6V 0.909W 2.33W 110°C/W 60°C/W 42.9°C/W 12.6°C/W 125°C 260°C –65°C to 150°C 2kV 200V (Note 4) Input Voltage, VIN ---------------------------------------------------------------------------------------------------------- 1.4V to 5.5V Control Voltage, VCNTL --------------------------------------------------------------------------------------------------- 5V ± 5% Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C Electrical Characteristics (VIN = 1.8V/1.5V, VCNTL = 5V, VREFEN = 0.9V/0.75V, COUT = 10μF (Ceramic), TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Input VCNTL Operation Current I CNTL I OUT = 0A -- 1 2.5 mA Standby Current I STBY VREFEN  0.2V (Shutdown), RLOAD = 180 -- 2 90 A I OUT = 0A 10 -- 10 mV VIN = 1.8V, VREFIN = 0.9V, IOUT = 1.8A 20 -- 20 VIN = 1.5V, VREFIN = 0.75V, I OUT = 1.4A 10 -- 10 2 -- 3.5 VIN = 1.5V, VREFIN = 0.75V 1.5 -- 3.5 VCNTL = 5V 125 170 -- C TSD VCNTL = 5V -- 35 -- C V IH Enable 0.6 -- -- V IL Shutdown -- -- 0.15 (Note 5) Output (DDR II) Output Offset Voltage Load Regulation (Note 6) V OS (Note 7) VLOAD mV Protection Current limit I LIMIT Thermal Shutdown Temperature T SD Thermal Shutdown Hysteresis VIN = 1.8V, VREFIN = 0.9V A REFEN Shutdown Shutdown Threshold Copyright © 2014 Richtek Technology Corporation. All rights reserved. DS9199-11 April 2014 V is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT9199 Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured in the natural convection at TA = 25°C on a high effective thermal conductivity test board (4 Layers, 2S2P) of JEDEC 51-7 thermal measurement standard. The case point of θJC is on the exposed pad for package. Note 3. Devices are ESD sensitive. Handling precaution recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. Standby current is the input current drawn by a regulator when the output voltage is disabled by a shutdown signal on REFEN pin (VIL < 0.15V). It is measured with VIN = VCNTL = 5V. Note 6. VOS offset is the voltage measurement defined as VOUT subtracted from VREFEN. Note 7. Regulation is measured at constant junction temperature by using a 5ms current pulse. Devices are tested for load regulation in the load range from 0A to 2A peak. Copyright © 2014 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 is a registered trademark of Richtek Technology Corporation. DS9199-11 April 2014 RT9199 Typical Operating Characteristics Output Voltage vs. Temperature 0.920 VCNTL Pin Current vs. Temperature 0.6 VIN = 1.8V, VCNTL = 5V VIN = 1.8V, VCNTL = 5V Vcntl Pin Current (mA) Output Voltage (V) 0.915 0.910 0.905 0.900 0.895 0.890 0.5 0.4 0.3 0.2 0.885 0.1 0.880 -50 -25 0 25 50 75 100 -50 125 -25 0 Source Current Limit (A) Source Current Limit (A) 3.5 VIN = 1.8V, VCNTL = 5V 3.0 2.5 2.0 1.5 1.0 0.5 0.0 100 125 VIN = 1.8V, VCNTL = 5V 3.0 2.5 2.0 1.5 1.0 0.5 -25 0 25 50 75 100 125 -50 -25 0 Temperature (°C) 25 50 75 100 125 Temperature (°C) Shutdown Threshold vs. Temperature VIN Current vs. Temperature 0.60 Shutdown Threshold (V) VIN = 1.8V, VCNTL = 5V 2.5 VIN Current (mA) 75 0.0 -50 3.0 50 Sink Current Limit vs. Temperature Source Current Limit vs. Temperature 3.5 25 Temperature (°C) Temperature (°C) 2.0 1.5 1.0 0.5 RT9199SP, VCNTL = 5V 0.55 0.50 Turn On 0.45 0.40 0.35 Turn Off 0.30 0.25 0.20 0.0 -50 -25 0 25 50 75 100 Temperature (°C) Copyright © 2014 Richtek Technology Corporation. All rights reserved. DS9199-11 April 2014 125 -50 -25 0 25 50 75 100 125 Temperature (°C) is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 RT9199 Output Short-Circuit Protection Sink Output Short-Circuit Protection VIN = 1.8V, VCNTL = 5V Sink 10 8 6 4 2 0 6 4 2 Time (1ms/Div) Output Short-Circuit Protection Output Short-Circuit Protection Source VIN = 1.8V, VCNTL = 5V VIN = 2.5V, VCNTL = 5V 12 Output Short Circuit (A) Output Short Circuit (A) 8 Time (1ms/Div) Source 10 8 6 4 2 10 8 6 4 2 0 0 Time (1ms/Div) Time (1ms/Div) 0.9VTT @ 1.8A Transient Response 1.25VTT @ 1.8A Transient Response VIN = 1.8V, VCNTL = 5V, VOUT = 0.9V 50 Swing Frequency : 10kHz 0 -50 Output Voltage Transient (mV) Output Voltage Transient (mV) 10 0 12 2 1 0 -1 -2 0 -50 1 0 -1 -2 Time (25μs/Div) Copyright © 2014 Richtek Technology Corporation. All rights reserved. www.richtek.com 8 VIN = 2.5V, VCNTL = 5V, VOUT = 1.25V 50 Swing Frequency : 10kHz 2 Output Current (A) Output Current (A) VIN = 2.5V, VCNTL = 5V 12 Output Short Circuit (A) Output Short Circuit (A) 12 Time (25μs/Div) is a registered trademark of Richtek Technology Corporation. DS9199-11 April 2014 RT9199 Application Information Consideration while designing the resistance of voltage divider Refer to the “Typical Application Circuit”. Make sure the current sinking capability of pull-down NMOS is enough for the chosen voltage divider to pull-down the voltage at REFEN pin below 0.15V to shutdown the device. As other linear regulator, dropout voltage and thermal issue should be specially considered. Figure 7 shows the RDS(ON) over temperature of RT9199. The minimum dropout voltage could be obtained by the product of RDS(ON) and output current. For thermal consideration, please refer to the relative sections. VREFEN In addition, the capacitor CSS and voltage divider form the low-pass filter. There are two reasons doing this design; one is for output voltage soft-start while another is for noise immunity. RT9199 VOUT REFEN How to reduce power dissipation on Notebook PC or the dual channel DDR SDRAM application? R2 GND In notebook application, using RichTek's Patent Bus Terminator Topology” with choosing RichTek's product is encouraged. “ Distributed Figure 6 RDS(ON) vs. Temperature 0.48 Distributed Bus Terminating Topology Terminator Resistor 0.46 R0 VOUT R2 R3 R4 REFEN R5 BUS(2) BUS(3) BUS(4) RT9199 R7 R8 R9 R(2N) R(2N+1) 0.4 0.38 0.36 0.34 BUS(5) 0.32 BUS(6) 0.3 BUS(7) 0.28 R6 VOUT 0.42 R DS(ON) (Ω) RT9199 VCNTL = 5V, VREFEN = 1V 0.44 BUS(0) R1 BUS(1) -50 BUS(8) BUS(9) VIN VCNTL R1 -25 0 25 50 75 100 125 Temperature (°C) Figure 7 Input Capacitor and Layout Consideration BUS(2N) BUS(2N+1) General Regulator The RT9199 could also serves as a general linear regulator. The RT9199 accepts an external reference voltage at REFEN pin and provides output voltage regulated to this reference voltage as shown in Figure 6, where Place the input bypass capacitor as close as possible to the RT9199. A low ESR capacitor larger than 470uF is recommended for the input capacitor. Use short and wide traces to minimize parasitic resistance and inductance. Inappropriate layout may result in large parasitic inductance and cause undesired oscillation between RT9199 and the preceding power converter. VOUT = VREFEN x R2/(R1+R2) Copyright © 2014 Richtek Technology Corporation. All rights reserved. DS9199-11 April 2014 is a registered trademark of Richtek Technology Corporation. www.richtek.com 9 RT9199 Ambient Molding Compound Gold Line Thermal Consideration RT9199 regulators have internal thermal limiting circuitry designed to protect the device during overload conditions. For continued operation, do not exceed absolute maximum operation junction temperature 125°C. The power dissipation definition in device is : PD = (VIN - VOUT) x IOUT + VIN x IQ The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula : PD(MAX) = (TJ(MAX) − TA) / θJA Where T J(MAX) is the maximum operation junction temperature 125°C, TA is the ambient temperature and the θJA is the junction to ambient thermal resistance. The junction to ambient thermal resistance for SOP-8 package (Exposed Pad) is 42.9°C/W, on standard JEDEC 51-7 (4 layers, 2S2P) thermal test board. The maximum power dissipation at TA = 25°C can be calculated by following formula : Lead Frame Die Pad PCB Case (Exposed Pad) Figure 8. SOP-8 (Exposed Pad) Package Sectional Drawing RGOLD-LINE RLEAD FRAME RPCB path 1 Junction RDIE RDIE-ATTACH RDIE-PAD path 2 RPCB Case (Exposed Pad) Ambient RMOLDING-COMPOUND path 3 Figure 9. Thermal Resistance Equivalent Circuit PD(MAX) = (125°C − 25°C) / 42.9°C/W = 2.33W Figure 8 shows the package sectional drawing of SOP-8 (Exposed Pad). Every package has several thermal dissipation paths. As show in Figure 9, the thermal resistance equivalent circuit of SOP-8 (Exposed Pad). The path 2 is the main path due to these materials thermal conductivity. We define the exposed pad is the case point of the path 2. Copyright © 2014 Richtek Technology Corporation. All rights reserved. www.richtek.com 10 is a registered trademark of Richtek Technology Corporation. DS9199-11 April 2014 RT9199 Outline Information H A M J B F C I D Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 4.801 5.004 0.189 0.197 B 3.810 3.988 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.508 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.170 0.254 0.007 0.010 I 0.050 0.254 0.002 0.010 J 5.791 6.200 0.228 0.244 M 0.400 1.270 0.016 0.050 8-Lead SOP Plastic Package Copyright © 2014 Richtek Technology Corporation. All rights reserved. DS9199-11 April 2014 is a registered trademark of Richtek Technology Corporation. www.richtek.com 11 RT9199 H A M EXPOSED THERMAL PAD (Bottom of Package) Y J B X F C I D Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 4.801 5.004 0.189 0.197 B 3.810 4.000 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.510 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.170 0.254 0.007 0.010 I 0.000 0.152 0.000 0.006 J 5.791 6.200 0.228 0.244 M 0.406 1.270 0.016 0.050 X 2.000 2.300 0.079 0.091 Y 2.000 2.300 0.079 0.091 X 2.100 2.500 0.083 0.098 Y 3.000 3.500 0.118 0.138 Option 1 Option 2 8-Lead SOP (Exposed Pad) Plastic Package Richtek Technology Corporation 14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. www.richtek.com 12 DS9199-11 April 2014