RT9204CS

Preliminary RT9204 Dual Regulator - Standard Buck PWM DC-DC and Linear Power Controller General Description The RT9204 is a dual power controllers designed for high performance graphics cards and computer applications. The IC integrates a standard buck controller, a linear regulator driver and protection functions into a small 8-pin package. The RT9204 uses a internal compensated voltage mode PWM control for simple application design. An internal 0.8V reference allows the output voltage to be precisely regulated to low voltage requirement. A fixed 600kHz oscillator reduce the component size for saving board area. The RT9204 protects the converter and regulator by monitoring the output under voltage. Features Operate from 5V 0.8V Internal Reference Voltage Mode PWM Control Fast Transient Response Fixed 600kHz Oscillator Frequency Full 0~100% Duty Cycle Internal Soft Start Internal PWM Loop Compensation Pin Configurations Part Number RT9204CS (Plastic SOP-8) Pin Configurations TOP VIEW GND 1 VCC 2 DRV 3 FBL 4 8 UGATE 7 BOOT 6 SD 5 FB Applications Motherboard Power Regulation for Computers Subsystems Power Supplies Cable Modems, Set Top Box, and DSL Modems DSP and Core Communications processor Supplies Memory Power Supplies Personal Computer Peripherals Industrial Power Supplies 5V-Input DC-DC Regulators Low Voltage Distributed Power Supplies Ordering Information RT9204 Package type S : SOP-8 Operating temperature range C : Commercial standard DS9204-00 February 2002 www.richtek-ic.com.tw 1 RT9204 Typical Application Circuit R1 10 VAUX 3.3V Q1 2D1802 R4 100 R5 100 1 2 3 4 C5 1µF GND VCC DRV FBL Preliminary 5V UGATE BOOT SD FB 8 7 6 5 VOUT1 2.5V C3 MU 0.1µF L1 5µH + C4 1000µF R3 250 C7 10nF D1 C2 1µF + C1 470µF RT9204 VOUT2 1.6V C6 220µF + R2 120 Fig.1 RT9204 powered from 5V only R1 C5 1µF VAUX 3.3V 1 2 Q1 R4 100 R5 100 3 4 C7 1µF 8 7 6 5 VOUT1 2.5V L1 5µH + C4 1000 µF R3 250 C3 10nF D1 10 12V 5V GND VCC DRV FBL UGATE BOOT MU C2 1µF RT9204 SD FB VOUT2 1.6V C6 220µF + + C1 470µF R2 120 Fig.2 RT9204 powered from 12V www.richtek-ic.com.tw DS9204-00 February 2002 2 Preliminary MU +C OUT 1000µF RT9204 D L 5 µH G S C1 1 µF + C2 470 µ F CVCC 1 µF GND VCC BOOT CBOOT 0.1µ F Diode RT9204 GND Return Layout Placement Layout Notes 1. Put C1 & C2 to be near the MU drain and ML source nodes. 2. Put RT9204 to be near the COUT 3. Put CBOOT as close as to BOOT pin 4. Put CVCC as close as to VCC pin Function Block Diagram 6.0V Regulator Power on Reset DRV FBL 0.8V Reference _ UVP LDO VCC BOOT ++ _ Soft Start + 1V _ _ OVP + 0.5V 0.8V FB + 35dB UVP Control Logic ++ UGATE + SS PWM Error Amp GND 600kHz Oscillator DS9204-00 February 2002 _ _ www.richtek-ic.com.tw 3 RT9204 Absolute Maximum Ratings Supply Voltage VCC BOOT & UGATE to GND Input, Output or I/O Voltage Power Dissipation, PD @ TA = 25°C SOP-8 Package Thermal Resistance SOP-8, θJA Ambient Temperature Range Junction Temperature Range Storage Temperature Range Lead Temperature (Soldering, 10 sec.) CAUTION: Preliminary 7V 15V GND−0.3V ~ 7V 0.625W 160°C/W 0°C ~ +70°C -40°C ~ +125°C -65°C ~ +150°C 260°C Stresses beyond the ratings specified in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Electrical Characteristics (VCC = 5V, TA = 25°C, Unless otherwise specified.) Parameter Symbol VCC Supply Current Nominal Supply Current VCC Regulated Voltage Power-On Reset Rising VCC Threshold VCC Threshold Hysteresis Reference Reference Voltage Oscillator Free Running Frequency Ramp Amplitude PWM Error Amplifier DC Gain PWM Controller Gate Driver Upper Drive Source Upper Drive Sink Linear Regulator DRV Driver Source Protection FB Over-Voltage Trip FB & FBL Under-Voltage Trip Soft-Start Interval SD Pin Threshold SD pin Sink Current www.richtek-ic.com.tw Test Conditions Min --3.75 -- Typ 3 6 4.1 0.5 0.8 600 1.75 35 7 5 -1 0.5 1 1.5 40 Max --4.35 -0.816 650 ----------- Units mA V V V V KHz VP-P dB Ω Ω mA V V mS V µA ICC VCC UGATE, LGATE open VBOOT=12V Both FB & FBL 0.784 550 ∆ VOSC --- RUGATE RUGATE VBOOT = 12V; VBOOT - VUGATE = 1V VUGATE = 1V VDRV = 2V FB Rising FB & FBL Falling VCC = 5V VCC = 5V --100 ------ DS9204-00 February 2002 4 Preliminary Typical Operating Charateristics Power On VCC = 5V VOUT = 2.2V VCC VCC RT9204 Power Off VCC = 5V VOUT = 2.2V VOUT1 VOUT2 VOUT1 VOUT2 Time Time Load Transient UGATE Load Transient UGATE VOUT VOUT VCC = 5V VOUT = 2.2V COUT = 3000µF VCC = 5V VOUT = 2.2V COUT = 3000µF Time Time Short Hiccup VCC = 5V VOUT = 2.2V Reference (V) Reference vs. Temperature 0.803 0.802 0.801 0.800 0.799 0.798 0.797 0.796 VOUT UGATE Time -50 0 50 100 150 Temperature ( °C) DS9204-00 February 2002 www.richtek-ic.com.tw 5 RT9204 Preliminary 4.3 4.2 4.1 POR (Rising/Falling) vs. Temperature 315 630 Oscillator Frequency vs. Temperature 310 620 305 610 Rising Frequency (kHz) 300 600 295 590 290 580 285 570 280 560 275 550 POR (V) 4.0 3.9 3.8 Falling 3.7 3.6 -50 0 50 100 150 Temperature (° C) 540 270 -50 0 50 100 150 Temperature (° C) www.richtek-ic.com.tw DS9204-00 February 2002 6 Preliminary Functional Pin Description GND (Pin 1) Signal and power ground for the IC. All voltage levels are measured with respect to this pin. VCC (Pin 2) This is the main bias supply for the RT9204. This pin also provides the gate bias charge for the lower MOSFETs gate. The voltage at this pin monitored for power-on reset (POR) purpose. This pin is also the internal 6.0V regulator output powered from BOOT pin when BOOT pin is directly powered from ATX 12V. DRV (Pin 3) This pin is linear regulator output driver. Connect to external bypass NPN transistor base or NMOSFET gate terminal. FBL (Pin 4) This pin is connected to the linear regulator output divider. This pin also connects to internal linear regulator error amplifier inverting input and protection monitor. FB (Pin 5) This pin is connected to the PWM converter’s output divider. This pin also connects to internal PWM error amplifier inverting input and protection monitor. SD (Pin 6) Active low design with a 40µA pull low current source. Pull this pin to VCC to shutdown both PWM and linear regulator. BOOT (Pin 7) This pin provides ground referenced bias voltage to the upper MOSFET driver. A bootstrap circuit is used to create a voltage suitable to drive a logic-level Nchannel MOSFET when operating at a single 5V power supply. This pin also could be powered from ATX 12V, in this situation, an internal 6.0V regulator will supply to VCC pin for internal voltage bias. UGATE (Pin 8) Connect UGATE pin to the PWM converter’s upper MOSFET gate. This pin provides the gate drive for the upper MOSFET. RT9204 DS9204-00 February 2002 www.richtek-ic.com.tw 7 RT9204 Functional Description Preliminary The RT9204 operates at either single 5V power supply with a bootstrap UGATE driver or 5V/12V dual-power supply form the ATX SMPS. The dualpower supply is recommended for high current application, the RT9204 can deliver higher gate driving current while operating with ATX SMPS based on dual-power supply. The Bootstrap Operation In a single power supply system, the UGATE driver of RT9204 is powered by an external bootstrap circuit, as the Fig.1. The boot capacitor, CBOOT, generates a floating reference at the PHASE node. Typically a 0.1µF CBOOT is enough for most of MOSFETs used with the RT9204. The voltage drop between BOOT and PHASE node is refreshed to a voltage of VCC – diode drop (VD) while the low side MOSFET turning on. R1 VCC 6.0V Regulator BOOT C1 1µ F R1 10 12V 5V + UGATE C2 1µ F RT9204 Fig.2 Dual Power Supply Operation Power On Reset The Power-On Reset (POR) monitors the supply voltage (normal +5V) at the VCC pin and the input voltage at the OCSET pin. The VCC POR level is 4.1V with 0.5V hysteresis and the normal level at OCSET pin is 1.5V (see over-current protection). The POR function initiates soft-start operation after all supply voltages exceed their POR thresholds. C2 1µ F VCC BOOT UGATE D1 0.1 µF + 5V Soft Start A built-in soft-start is used to prevent surge current from power supply input during power on. The softstart voltage is controlled by an internal digital counter. It clamps the ramping of reference voltage at the input of error amplifier and the pulse-width of the output driver slowly. The typical soft-start duration is 2mS. PHASE RT9204 Fig.1 Single 5V power Supply Operation Dual Power Operation The RT9204 was designed to regulate a 6.0V at VCC pin automatically when BOOT pin is powered by 12V. In a system with ATX 5V/12V power supply, the RT9204 is ideal for higher current application due to the higher gate driving capability, VUGATE = 7V. A RC (10Ω/1µF) filter is also recommended at BOOT pin to prevent the ringing induced from fast power on, as shown in Fig.2. Under Voltage and Over Voltage Protection The voltage at FB pin is monitored and protected against OC (over current), UV (under voltage), and OV (over voltage). The UV threshold is 0.5V and OVthreshold is 1.0V. Both UV/OV detection have 30µS triggered delay. When OC or UV trigged, a hiccup restart sequence will be initialized, as shown in Fig.3. Only 3 times of trigger are allowed to latch off. Hiccup is disabled during soft-start interval. www.richtek-ic.com.tw DS9204-00 February 2002 8 Preliminary COUNT = 1 COUNT = 2 Internal SS 4V 2V 0V FB or FBL Voltage OVERLOAD APPLIED COUNT = 3 RT9204 Shutdown Pulling high the SD pin by a small single transistor can shutdown the RT9204 PWM controller as shown in typical application circuit. Normally SD pin can be floating because an internal 40µA current source will pull low the SD shutdown pin voltage. T0T1 T2 TIME T3 L VL VI D C R VO Fig. 3 Q Applications Information Inductor Selection The RT9204 was designed for VIN = 5V, step-down application mainly. Fig.4 shows the typical topology and waveforms of step-down converter. The ripple current of inductor can be calculated as follows: ILRIPPLE = (5V - VOUT)/L × TON Because operation frequency is fixed at 600kHz, TON = 3.33 × VOUT/5V The VOUT ripple is VOUT RIPPLE = ILRIPPLE × ESR ESR is COUT capacitor equivalent series resistor Table 1 shows the ripple voltage of VOUT: VIN = 5V C.C.M. TS Table 1 TON VI VL TOFF - VO - VO iL µ IL µQ IL = I O iQ *Refer to Sanyo low ESR series (CE, DX, PX…) The suggested L and C are as follows: 2µH with ≥ 1500µF COUT 5µH with ≥ 1000µF COUT Fig.4 VOUT Inductor 1000µF (ESR = 53mΩ) 1500µF (ESR = 33mΩ) 3000µF (ESR = 21mΩ) 2µH 100mV 62mV 40mV 3.3V 5µH 40mV 25mV 16mV 2µH 110mV 68mV 43mV 2.5V 5µH 44mV 28mV 18mV 2µH 93mV 58mV 37mV 1.5V 5µH 37mV 23mV 15mV iD IQ ID DS9204-00 February 2002 www.richtek-ic.com.tw 9 RT9204 Input / Output Capacitor Preliminary High frequency/long life decoupling capacitors should be placed as close to the power pins of the load as physically possible. Be careful not to add inductance to the PCB trace, as it could eliminate the performance from utilizing these low inductance components. Consult with the manufacturer of the load on specific decoupling requirements. The output capacitors are necessary for filtering output and stabilizing the close loop (see the PWM loop stability). For powering advanced, high-speed processors, capacitors it with is required low to meet with the are requirement of fast load transient, high frequency ESR/ESL capacitors recommended. Another concern is high ESR induced ripple may trigger UV or OV protections. Linear Regulator Driver The linear regulator of RT9204 was designed to drive bipolar NPN or MOSFET pass transistor. For MOSFET pass transistor, normally DRV need to provide minimum VOUT2+VT+gate-drive voltage to keep VOUT2 as setting voltage. When driving MOSFET operating at 5V power supply system, the gate-drive will be limited at 5V. In this situation shown in Fig. 5, low VT threshold MOSFET (VT = 1V) and Vout2 setting below 2.5V were suggested. In VBOOT = 12V operation condition as Fig. 6, VCC is regulated as higher to 6V providing more gate-drive for pass MOSFET transistor, VOUT2 can be set as ≤ 3.3V. 30 40 VOUT = 3.3V COUT = 1500µF(33mΩ) L=2µH VOUT = 1.5V VOUT = 2.5V VOUT = 3.3V PO = 2.9kHz ZO = 3.2kHz VOUT2 ≤ 3.3V VBOOT = 1 2V 6V DRV BOOT FBL VCC RT9204 R4 R4 < 1K R3 + Fig. 6 PWM Loop Stability The RT9204 is a voltage mode buck controller designed for 5V step-down applications. The gain of error amplifier is fixed at 35dB for simplified design. The output amplitude of ramp oscillator is 1.6V, the loop gain and loop pole/zero are calculated as follows: DC loop gain GA = 35dB × 5 0.8 × 1.6 VOUT 1 LC filter pole PO = × π × LC 2 Error Amp pole PA = 300kHz ESR zero ZO = 1 × π × ESR × C 2 The RT9204 Bode plot as shown Fig.7 is stable in most of application conditions. VOUT2 ≤ 2.5V DRV BOOT FBL VCC = 5V VCC RT9204 R4 R4 < 1K R3 + 20 Loop Gain 10 100 1k 10k 100k 1M Fig. 7 Fig. 5 www.richtek-ic.com.tw DS9204-00 February 2002 10 Preliminary Reference Voltage Because RT9204 use a low 35dB gain error amplifier, shown in Fig. 8. The voltage regulation is dependent on VIN & VOUT setting. The FB reference voltage of 0.8V were trimmed at VIN = 5V & VOUT = 2.5V condition. In a fixed VIN = 5V application, the FB reference voltage vs. VOUT voltage can be calculated as Fig. 9. I3 56K 1K REP 0.8V _ FB I2 EA + _ + PWM RT9204 VIN L VOUT1 + C OUT R1 C1 DRV RT9204 FB FBL R2 R2 < 1K R4 R4 < 1K R3 + VOUT2 R1 ) R2 R3 VOUT2 = 0.8 V × (1 + ) R4 VOUT1 = 0.8 V × (1 + + _ Fig. 10 PWM Layout Considerations MOSFETs switch very fast and efficiently. The speed with which the current transitions from one device to another causes voltage spikes across the interconnecting impedances and parasitic circuit RAMP 1.75V Fig. 8 0.82 0.81 FB (V) 0.8 0.79 0.88 0.5 VIN = 5V elements. The voltage spikes can degrade efficiency and radiate noise, that results in ocer-voltage stress on devices. Careful component placement layout and printed circuit design can minimize the voltage spikes induced in the converter. Consider, as an example, the turn-off transition of the upper MOSFET prior to 1 1.5 2 2.5 VOUT (V) 3 3.5 4 4.5 turn-off, the upper MOSFET was carrying the full load current. During turn-off, current stops flowing in the upper MOSFET and is picked up by the low side MOSFET or Schottky diode. Any inductance in the switched current path generates a large voltage spike during the switching interval. Careful component selections, layout of the critical components, and use shorter and wider PCB traces help in minimizing the magnitude of voltage spikes. There are two sets of critical components in a DC-DC converter using the RT9204. The switching power components are most critical because they switch large amounts of energy, and as such, they tend to generate equally large amounts of noise. The critical small signal components are those connected to sensitive nodes or those supplying critical bypass current. Fig. 9 Feedback Divider The reference of RT9204 is 0.8V. Both the PWm and LDO output voltages can be set using a resistor based divider as shown in Fig.9. Put the R1&R2 and R3&R4 as close as possible to FB pin and R2&R4 should be less than 1 kΩ to avoid noise coupling. The C1 capacitor is a speed-up capacitor for reducing output ripple to meet with the requirement of fast transient load. Typically a 1nF ~ 0.1µF is enough for C1. DS9204-00 February 2002 www.richtek-ic.com.tw 11 RT9204 Preliminary IQ1 5V + Q1 IQ2 PHASE + IL VOUT + The power components and the PWM controller should be placed firstly. Place the input capacitors, especially the high-frequency ceramic decoupling capacitors, close to the power switches. Place the output inductor and output capacitors between the MOSFETs and the load. Also locate the PWM controller near by MOSFETs. A multi-layer printed circuit board is recommended. Fig.11 shows the connections of the critical components in the converter. Note that the capacitors CIN and COUT each of them represents numerous physical capacitors. Use a dedicated grounding plane and use vias to ground all critical components to this layer. Apply another solid layer as a power plane and cut this plane into smaller islands of common voltage levels. The power plane should support the input power and output power nodes. Use copper filled polygons on the top and bottom circuit layers for the PHASE node, but it is not necessary to oversize this particular island. Since the PHASE node is subjected to very high dV/dt voltages, the stray capacitance formed between these island and the surrounding circuitry will tend to couple switching noise. Use the remaining printed circuit layers for small signal routing. The PCB traces between the PWM controller and the gate of MOSFET and also the traces connecting source of MOSFETs should be sized to carry 2A peak currents. Fig. 11 UGATE VCC GND RT9204 FB GND LOAD www.richtek-ic.com.tw DS9204-00 February 2002 12 Preliminary Package Information H A M RT9204 JB F C D I Symbol A B C D F H I J M Dimensions In Millimeters Min 4.801 3.810 1.346 0.330 1.194 0.178 0.102 5.791 0.406 Max 5.004 3.988 1.753 0.508 1.346 0.254 0.254 6.198 1.270 Dimensions In Inches Min 0.189 0.150 0.053 0.013 0.047 0.007 0.004 0.228 0.016 Max 0.197 0.157 0.069 0.020 0.053 0.010 0.010 0.244 0.050 DS9204-00 February 2002 www.richtek-ic.com.tw 13 RT9204 Preliminary RICHTEK TECHNOLOGY CORP. Headquarter 6F, No. 35, Hsintai Road, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5510047 Fax: (8863)5537749 RICHTEK TECHNOLOGY CORP. Taipei Office (Marketing) 8F-1, No. 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)89191466 Fax: (8862)89191465 Email: marketing@richtek-ic.com.tw www.richtek-ic.com.tw DS9204-00 February 2002 14