Preliminary
RT9205/A
Dual Regulators - Synchronous Buck PWM DC-DC and Linear Controller
General Description
The RT9205/A is a dual-output power controllers designed for high performance graphics cards and personal computers. The IC integrates a synchronous buck controller, a linear controller and protection functions into a small 14-pin package. The RT9205/A uses an internal compensated voltage mode PWM control for simplying design. An internal 0.8V reference allows the output voltage to be precisely regulated to meet low output voltage requirement. A fixed 300kHz oscillation frequency reduces the component size for saving board area. The RT9205/A also features over voltage protection (OVP) and under voltage lock-out (UVLO).
Features
Operates at 5V 0.8V Internal Reference Drives Two N-channel MOSFET Voltage Mode PWM Control Fast Transient Response Fixed 300kHz Oscillator Frequency Dynamic 0~100% Duty Cycle Internal PWM Loop Compensation Internal Soft-Start Adaptive Non-overlapping Gate Driver Over-voltage Protection Uses Lower MOSFET
Pin Configurations
Part Number RT9205/ACS (Plastic SOP-14) Pin Configurations TOP VIEW
LGATE 1 PGND 2 GND 3 VCC 4 DRV 5 FBL 6 NC 7
14 13 12 11 10 9 8
Applications
PC Motherboard Cable Modems, Set-Top-Box, and XDSL Modems DSP and Core Communications Processor Supplies Memory Power Supplies Personal Computer Peripherals Industrial Power Supplies 5V Input DC-DC Regulators Low Voltage Distributed Power Supplies Graphic Cards
UGATE BOOT NC NC NC FB NC
Ordering Information
RT9205/A Package Type S : SOP-14 Operating Temperature Range C : Commercial Standard UVP : Hiccup Mode UVP : Latch Mode
DS9205/A-03 May 2003
www.richtek.com
1
2
5V 5V L1 1µ H Be Careful during La you t pha se C1 1µ F
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4 VCC 5 DRV UGATE
0.8V D1 1N5819
RT9205/A
Typical Application Circuit
5V
+ CE1
100 µF
Q1 2SD180 2
BOOT 14 G1 S2 G2
R3 200 R4 200 C7 10n F VOUT1 = 0.8V*(1+R3/R4)
13 2 D1 D2 D2 5
pha se
C3 0.1µF
1 S1 7 6
C2 1µ F
PHKD6N02LT
D1
8
+
R1 390
CE2 680 µF L2 5µ H
VOUT1 1.6V
Preliminary
6 FBL LGATE 1 4 9
VOUT2 3.4V VOUT2 = 0.8*(1+R1/R2) R2 120
3
Fig.1 RT9205/A powered form 5V
RT9205/A FB
PGND GND 3 2 R2 < 1K
R4 < 1K C5 1µ F
C6 1µ F
+
CE5 470 µF
C4 10n F
+
CE3 680 µF LE SR
+
CE4 680 µF LE SR
Pull FB tra ce out after C OUT
DS9205/A-03 May 2003
DS9205/A-03 May 2003
5V 12V 5V R5 2.2 R6 10 L1 1uH
Be Careful dur ing Layout
3.3V
+
CE 1 100uF 4 VCC 13 BOOT
C1 1uF C2 0.1uF
+
+
Q1 2SD5706 5 DRV UGATE 14
PHB66NQ03LT
C3 1uF
CE2 1000uF
CE3 L2 1000uF 5uH C5 1uF
CE5 1000uF LESR
VOU T1 1.7V
Suggest use Transistor
+
CE4
+
+
R1 0.8V 6 430 FB RT9205/A C4 10nF R3 200 R4 200 C7 10nF
VO UT 1 = 0 .8V*(1+R3/R4)
Preliminary
V OUT2 = 0.8V*(1+R1/R2)
VOUT2 2.5V 9 GND 3
FBL
LGATE
1
PHB108NQ03LT
Phase
+
C6 1uF
CE7
CE5 CE4 1000uF LESR 1000uF LESR
Pull FB tr ace out after COUT
Fig.2 RT9205/A powered from 12V
PGND R2 200 R2
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