RT9206

RT9206 High Efficiency, Synchronous Buck with Dual Linear Controllers General Description The RT9206 is a low cost, combo power controller, which integrates a synchronous step-down voltage-mode PWM and two HV linear controllers. Directly drive external N-MOSFET makes it easy to implement a high efficiency and cost attractive power solution. Voltage mode control loop and constant operation frequency with external compensation network provide better stability in wide operation range. Adjustable operation frequency up to 600kHz can minimize the inductor size and PCB space. It is particularly suitable in wide input voltage range (from 4.75V to 28V) and multi-output applications. Linear controller features flexible linear power design. Delivered power can be simply decided by external N-MOSFET selection. Output voltage level is chosen via external resistor divider. The 0.8V internal reference can satisfy most of the applications. Under voltage lockout provide cost effective protection of output. RT9206 provides complete safety protection function: soft start, over current protection, over voltage and under voltage protection. Set current limit by choosing different MOSFET. Synchronous Buck control mode provides excellent over voltage protection by turning on low side MOSFET to prevent any damage of end device from abnormal voltage stress as over voltage condition occurs. Features l l l l l l l l l l Wide Input Range (4.75V to 28V) 0.8V Internal Reference High Efficiency Synchronous Buck Topology Integrate two HV Linear Controllers Low cost N-MOSFET Design Duty Cycle from 0% to 90%. Adjustable switching frequency from 200kHz to 600kHz, Default 200kHz Sense OCP by low Side MOSFET RDS(ON) Power Good Signal Output RoHS Compliant and 100% Lead (Pb)-Free Applications l l l l l LCD Monitor Desk Note IEEE1394 Client Desktop IA Broadband Pin Configurations (TOP VIEW) LDRV1 VDD LDRV2 LFB2 COMP FB PGOOD SS/EN 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 LFB1 BOOT UGATE PHS VINT LGATE GND RT Ordering Information RT9206 Package Type S : SOP-16 Operating Temperature Range P : Pb Free with Commercial Standard G : Green (Halogen Free with Commercial Standard) Note : RichTek Pb-free and Green products are : }RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. }Suitable for use in SnPb or Pb-free soldering processes. }100%matte tin (Sn) plating. SOP-16 DS9206-11 March 2007 www.richtek.com 1 RT9206 Typical Application Circuit R1 10 C1 1uF C15 500pF R2 11k VOUT1 VOUT2 3.3V Q3 C16 500pF C6 10uF VOUT3 2.5V C7 10uF Q4 R3 11k R11 5.6k C14 33nF R12 4.3K 390pF C13 R4 3.3k D11N4148 15 RBOOT 0 R13 C2 1uF C3 220uF VIN 12V 1 2 3 4 5 6 7 8 R10 51k 16 LDRV1 LFB1 RT9206CS 15 VDD BOOT 14 LDRV2 UGATE 13 LFB2 PHS 12 COMP VINT 11 FB LGATE 10 PGOOD GND 9 SS/EN RT Q5 EN C9 1uF Si4800BDY C10 Q1 L1 1000uF 4.7uH Q2 C17 1000uF C11 1uF VOUT1 5V C8 4.7uF 0 R14 RRT R8 3k R9 560 1uF CSS PGOOD Figure 1. Typical Application for 12V Input R1 10 C1 1uF C15 500pF R2 11k Q3 C16 500pF C6 10uF V OUT3 2.5V C7 10uF Q4 R3 11k R11 5.6k C14 33nF R12 8.2K 220pF C13 R4 3.3k D11N4148 15 RBOOT 0 R13 C2 1uF C3 220uF VIN 24V VOUT1 VOUT2 3.3V 1 2 3 4 5 6 7 8 R10 51k 16 LDRV1 LFB1 RT9206CS 15 VDD BOOT 14 LDRV2 UGATE 13 LFB2 PHS 12 VINT COMP 11 FB LGATE 10 PGOOD GND 9 RT SS/EN Q5 EN C9 1uF Si4800BDY Q1 L1 C10 1000uF 33uH Q2 C11 1uF VOUT1 5V C8 4.7uF 0 R14 RRT R8 3k R9 560 4.7uF CSS PGOOD Figure 2. Typical Application for 24V Input Note : R BOOT is a must to suppress ringing spike. www.richtek.com 2 DS9206-11 March 2007 RT9206 Function Block Diagram LFB1 0.8V LFB2 VDD 0.6V + UV 0.6V 0.6V COMP 0.8V FB + GM RAMP Generator + OVP PG + OSC RT + PWM - CP Soft Start 0.8V LCTR2 + + + + LCTR1 LDRV1 LDRV2 6.0V Reg Thermal Protection + UV + UV Driver Control Logic VINT BOOT UGATE PHS VINT LGATE GND SS/EN 8uA PGOOD 1V 0.72V DS9206-11 March 2007 www.richtek.com 3 RT9206 Operation Introduction The RT9206 is a combo controller, which integrates an adjustable frequency, voltage mode synchronous step down controller and two HV linear controllers. The synchronous step down controller consists of an internal precision reference, an internal oscillator, an error amplifier, a PWM comparator, control logic and floating gate driver, a programmable soft-start, a power good indicator, an over voltage protection, an over temperature protection and short circuit protection. The output voltage of the synchronous converter is set and controlled by the output of the error amplifier, which is the amplified error signal from the sensed output voltage and the voltage on non-inverting input, which is connected with internal 0.8V reference voltage. The amplified error signal is compared to a fixed frequency linear sawtooth ramp and generates fixed frequency pulse of variable dutycycle, which drivers the two N-Channel external MOSFETs. The timing of the synchronous converter is provide through an internal oscillator circuit and can be programmed between 200kHz to 600kHz via an external resistor connected between RT pin and ground. Soft-Start RT9206 has a programmable soft-start to control the output voltage rise time and limit the current surge at the startup. The soft-start will begin while VDD rises above POR threshold for correct start-up. Soft-start function operates by an internal sourcing current to charge an external capacitor to around the voltage of VINT. The soft-start signal, SS pin, is the third input non-inverting input of the PWM comparator. Before soft-start signal reach the bottom of the sawtooth ramp, inverting input of the PWM comparator, the soft-start current is twice of the normal soft-start current. Once the soft-start signal reach the bottom of the ramp, the soft-start current became normal, and start to increase duty cycle from zero to the point the feedback loop takes control. Power On Reset (POR) The power on reset circuit assures that the MOSFET driver outputs remain in the off state whenever the VDD supply voltages lower than the POR threshold. Over-Current Protection Whenever the over-current is occurred in soft-start or in normal operation period, It will shut down PWM signal, the MOSFET driver outputs remain in the off state, and latch soft-start signal low until restart VDD supply voltage. Over-Voltage Protection Once over-voltage protection occurred, it will turn on low side MOSFET and latch soft-start signal low to prevent end device form abnormal voltage stress. Restart VDD supply voltage will release the protection. Power Good Indicator The power good indicator is an open drain output to show whether the synchronous converter output ready or not. The power good indicator is available after soft-start end. Short-Circuit Protection The short-circuit phenomenon is sensed by the drop of output voltage, synchronous converter and two linear controller. Once the short-circuit occurred, the drop of output voltage lower than the under voltage threshold, 0.6V on feedback, the PWM signal will shut down and both of the external MOSFET will turn off and soft-start signal latch low. Soft-start signal, SS, is also connected to two linear controller error amplifier non-inverting input. Therefore, whenever the drop of output of the synchronous converter or two linear controllers lower than under voltage threshold, all MOSFET drivers will turn off. www.richtek.com 4 DS9206-11 March 2007 RT9206 Pin Description LDRV1(Pin 1) Linear controller 1 (LCTR1) driver. Connect to the gate of external N-Channel MOSFET pass transistor to form a positive linear regulator VDD (Pin 2) Input supply voltage LDRV2 (Pin 3) Linear controller 2 (LCTR2) driver. Connect to the gate of external N-Channel MOSFET pass transistor to form a positive linear regulator LFB2 (Pin 4) LDO2 feedback input. The feedback set point is 0.8V. Connect to a resistive divider between the positive linear regulator output and GND to adjust the output voltage. COMP (Pin 5) Switching regulator compensation pin. FB (Pin 6) Switching regulator feedback input. The feedback set point is 0.8V. Connect to a resistive divider between the switching regulator output and GND to adjust the output voltage. PGOOD (Pin 7) Open drain power good indicator. PGOOD is low when switching regulator output voltage is lower than 10% of its regulation voltage. Connect a pull high resistor between PGOOD and switching regulator output for pull high logic level voltage. SS/EN (Pin 8) Soft start input with 8uA sourcing current and IC enable control. RT (Pin 9) Operational frequency setting. Connect a resistor between RT and GND to set operational frequency. The operational frequency will nominally run at 200kHz when open. BOOT (Pin 15) High side floating driver supply with (+) terminal bootstrap flying capacitor connection. Voltage swing is from a diode drop below VINT to VIN+VINT LFB1 (Pin 16) LDO1 feedback input. The feed back set point is 0.8V. Connect to a resistive divider between the positive linear regulator output and GND to adjust the output voltage. PHS (Pin 13) Inductor connection with (-) terminal bootstrap flying capacitor connection. UGATE (Pin 14) High side gate driver. Drives high side N-Channel MOSFET with a voltage swing between BOOT and PHS LGATE (Pin 11) Low side gate driver. Drives low side N-MOSFET with a voltage swing between VINT and GND VINT (Pin 12) Internal 6.0V regulator output. The low side gate driver and control circuit and external bootstrap diode are powered by this voltage. Decouple this pin to power ground with a 4.7uF or greater ceramic capacitor close to the VINT pin. GND (Pin 10) Ground The formula between resistor setting and operational frequency are as follows: RRT = 62 × 10 8 3 FOSC - 200 × 10 DS9206-11 March 2007 www.richtek.com 5 RT9206 Absolute Maximum Ratings l l l l l l l l l (Note 1) l l l l l l Supply Voltage (VIN) ------------------------------------------------------------------------------------------------ −0.3 to 30V PHS --------------------------------------------------------------------------------------------------------------------- − 0.6V to 30V PHS (PHS Transient Time Interval < 50ns) --------------------------------------------------------------------- − 5V BOOT, UG to PHS --------------------------------------------------------------------------------------------------- − 0.3V to 7V BOOT to GND -------------------------------------------------------------------------------------------------------- − 0.3V to 35V LDRI1, LDRI2 --------------------------------------------------------------------------------------------------------- − 0.3V to 30V Power Good Voltage ------------------------------------------------------------------------------------------------- − 0.3V to 7V The other pins -------------------------------------------------------------------------------------------------------- − 0.3V to 7V Power Dissipation, PD @ TA = 25°C SOP-16 ---------------------------------------------------------------------------------------------------------------- 0.625W Package Thermal Resistance SOP-16, θJA --------------------------------------------------------------------------------------- 90°C/W Junction Temperature ----------------------------------------------------------------------------------------------- 150°C Lead Temperature (Soldering, 10 sec.) -------------------------------------------------------------------------- 260°C Operation Temperature Range ------------------------------------------------------------------------------------- − 20°C to 85°C Storage Temperature Range --------------------------------------------------------------------------------------- − 65°C to 150°C ESD Susceptibility (Note 2) HBM (Human Body Mode) ----------------------------------------------------------------------------------------- 2kV MM (Machine Mode) ------------------------------------------------------------------------------------------------ 200V (Note 3) Recommended Operating Conditions l l Ambient Temperature Range -------------------------------------------------------------------------------------- 0°C to 70°C Junction Temperature Range -------------------------------------------------------------------------------------- 0°C to 125°C Electrical Characteristics (VIN = 12V, FADJ left floating, TA = 25° C, Unless Otherwise specification) Parameter System Supply Input Operation voltage Range Power On Reset Power On Reset Hysteresis Supply Current Shut Down Current Power Good under Threshold PG Fault Condition Soft Start Soft start Current Normal Operation Voltage Shut down Voltage Symbol Test Condition Min Typ Max Units VDD POR (Note 4) 4.75 3.8 200 -- 28 4.7 V V mV mA mA % V -1.3 1 --- 600 4 3.5 92 0.2 IDD IDD VFB VPG VDD=30V, VSS=VINT VDD=30V, VSS300mV, the current limit function will be activated and latch the controller. So the current limit function can be set by MOSFETs selection. The relation of maximum inductor current IL(LIM) and on-state resistance of MOSFET (RDS(ON)) is described as : -3 300 × 10 (Ω ) (11) RDS(ON) = IL(LIM) Setting the Output voltage The output voltage is set by external voltage divider and reference voltage. The feedback pin (FB, LFB1, and LFB2) is connected to the inverting input of error amplifier and is referenced to 0.8V reference voltage at non-inverting input as shown in Figure 3.The output voltage is set by the following equation. VOUT = (1+ Ra Rb DS9206-11 March 2007 The effective soft-start time (TSS) during that output voltage ramps up from zero to set voltage is calculated as : VOUT VIN TSS = (320 × ) × 10 × CSS 6 (ms) (14) Besides, appropriate soft-start capacitor should be selected so that the start-up current will not trigger the current limit function. And make sure that the input power source could supply the soft-start current. The total time from input voltage applied to power good signal pull-high (TPGOOD) is calculated as : TPG = 640 × CSS × 10 6 (ms) (15) ) × 0.8 (12) www.richtek.com 15 RT9206 VDD VSS Boost Component Selection The booststrap gate drive circuit is used to drive high side N-channel MOSFET. The boost capacitor should be a good quality and can operate in high frequency. The value of boost capacitor depends on the total gate charge (QHg) to turn on the MOSFETs. Assuming steady state operation, the following equation can be used to calculate the capacitance value to achieve the targeted ripple voltage ∆VBOOT . CBOOT = QHg ΔVBOOT VOUT TVR PGOOD TSS TPGOOD (F) Figure 4. The soft-stat timing diagram of RT9206 For the example of CSS = 1µF, VIN = 12V, VOUT = 5V, then TVR = 57ms, TSS = 133ms and TPGOOD = 640ms. Shutdown The power stage can be shutdown by pulling soft-start pin below 0.7V. During shutdown, both of high side MOSFET (S1) and low side MOSFET (S2) are turned off. Setting the switching frequency The switching frequency can be set by a resistor (RRT ) connecting between RT and GND pins. Equation (16) describes the relationship of RRT and switching frequency. As RT open the normally operated frequency is 200kHz. 62 × 10 8 3 The capacitor in the range of 0.1uF to 1uF is generally adequate for most applications. The VINT pin bypass capacitor CINT needs to charge the boost capacitor, to drive the low side MOSFET, and to power the RT9206. CINT should locate near VINT and GND pins with short and wide traces. Generally, a 4.7uF high frequency ceramic capacitor is recommended. Feedback Compensation The RT9206 is a voltage mode controller. The control loop is a single voltage feedback loop including a transconductance error amplifier and a PWM comparator. To achieve fast transient response and accurate output regulation, appropriate feedback compensation is necessary. The goal of the compensation network is to provide a closed loop transfer function with the highest 0dB crossing frequency and adequate phase margin. Generally, the phase margin in a range of 45° ~ 60° is desirable. Figure 4 shows the simplified diagram of synchronous buck converter and control loop. RRT = fS - 200 × 10 (Ω ) (16) RRT Connecting Between RT and GND Pins fS(kHz) 250 300 350 400 450 500 550 600 www.richtek.com 16 RRT (kΩ) 120 55 37.5 30.6 24.4 22.5 19.3 16.8 DS9206-11 March 2007 RT9206 iS1 L + VL S1 S2 iS2 + VOR + VOC iL iC rC RL + IOUT + Next, deriving the transfer function d(s)/vC (s) of the direct duty ratio pulse-width modulator (PWM Generator). The transfer function Tm(s) of the modulator is given by Tm(S) = d(S) 1 = VC(S) Vr (19) VIN VOUT COUT - where, Vr is the amplitude of ramp-waveform which is listed in datasheet. Sensor Gain Compensator d + PWM Generator VC Cc2 Rc1 Cc1 + gm - VREF For simplification, the transfer function of PWM generator and Buck converter can is combined. The resulting is shown in equation (20) G(S) = VOUT(S) = VC(S) VIN 1 + rc x CO x S x L Vr S x L + CO x S( + rc x CO) + 1 RL (20) 2 Ra Rb The transfer function of Equation (20) is a second order system and Bode plot is shown in Figure 7. Gain Figure 5. The simplified diagram for synchronous Buck converter and control loop. From control system point of view, the block diagram of Figure 5 is shown in Figure 6. VIN/Vr fp G(S) Compensator VREF + C(s) Vc(s) PWM Generator 1/Vr d(s) BUCK Converter Gp(s) VOUT f fz Phase 0° Rb Ra+Rb Sensor Gain H (s) f -90° -180° Figure 6. The control block diagram of synchronous Buck converter Figure 7. The Bode plot of Buck power stage First, deriving the accurate small-signal models of power stage, the equation (18) is the transfer function of vO (s)/d(s) , which be obtained by space averaging technique. VOUT(S) GP(S) = = d(S) 1 + rc x CO x S x VIN L S 2 x L x CO + S( + rc x CO) + 1 RL (18) In Figure 7, the resonance of the output LC filter produces a double pole and −40dB/decade slop. The resonance frequency is expressed as follows : fP = 1 2π x L x CO (Hz) (21) DS9206-11 March 2007 www.richtek.com 17 RT9206 The effective series resistance (ESR) of capacitor and capacitance introduces one zero into system, the zero is given as : 1 (Hz) (22) fZ = 2π x rc x CO In the voltage-mode Buck converter shown in Figure 5, the loop gain of system is 1 TL(S) = C(S) x x GP(S) x H(S) = C(S) x G(S) x H(S) (23) Vr The desired loop gain and phase margin is show in the Bode plot of Figure 8. Where the f C is zero crossover frequency defined as the frequency when the loop gain equals unity. Typically, fC be chosen in range 1/10 ~ 1/20 of switching frequency. f C determines how fast the dynamic load response is. The higher f C with the faster dynamic response, and the phase margin in the range of 45° ~ 60° is desirable. So, the transfer function of compensator C(s) must be designed to meet these requirements. In many applications, use an electrolytic capacitor as the output capacitor, if the zero (f Z) caused by effective series resistance (ESR) of capacitor is a few kHz and smaller than 8 times f P, the type 2 (PI) can be used to get desired compensation. Figure 9 shows the typical type 2 trans-conductance error amplifier and the Bode plot is also shown in Figure 10. VOUT Power stage VIN/Vr G(s) Gain VREF Ra + gm - Vc Rc1 Rb fp f fz Cc2 Cc1 TL(s) Desired loop gain Figure 9. The typical type 2 trans-conductance error amplifier. fc f Gain(dB) Phase gmRc1 0° f f Phase fcz fcp -90 ° Phase -180 ° margin Boost -90 f Figure 8. The Bode plot of desired loop gain and phase margin Figure 10. The Bode plot of type 2 trans-conductance error amplifier www.richtek.com 18 DS9206-11 March 2007 RT9206 The design procedure as following : (1). Selecting the zero crossover frequency f C is 1/10 ~ 1/20 switching frequency. Then according equation (24) set the resistor RC1 to determine the zero crossover frequency. Vr × L × f C V OUT (Ω) (24) R C1 ≈ × V IN × gm × r C V REF (2). Place the zero of compensator is 70% fp that is resonance frequency of power stage. The compensator capacitor Cc1 can be selected to set the zero. The equation is shown in following : L × CO 0.7 × RC1 Step2. Determine the zero crossover frequency and compensated type. Select desired zero-crossover frequency : fC ≤ fS/10 ~ fS/20 Select f C = 20kHz Step3. Determine desired location of poles and zeros for type2 compensator. Select: fCZ = 0.7 × fP = 0.7 × 1.34kHz = 938Hz Assume fCP = fS 2 = 100kHz CC1 = (F) (25) Step4. Calculate the real parameters-resistor and capacitors for type2 compensator. From equation (21), the RC1 is calculated as following : f C × L × Vr rC × V IN × gm V OUT V REF × 5V 0.8V = 8.4k Ω (3). Set a second pole to suppress the switching noise. Assume the pole is one half of switching frequency f s, which results in capacitor Cc2 as shows in following: CC2 = 1 π × RC1 × fs 1 CC1 ≈ 1 π × RC1 × fs RC1 = × (F) (26) = 20kH z × 15 µ H × 1.9 22m Ω × 12V × 1.6m s Design example Design example of type 2 compensator: the schematic is shown in Figure 4, where the parameters as following: V IN =12V, V OUT =5V, I OUT =5A, switching frequency=200kHz, L=15µH, CO=940µF, rC=22mΩ, the parameters of RT9206 as following: gm=1.6ms, ramp amplitude=1.9V,and reference voltage Vref=0.8V. Step1. Determine the power stage poles and zeros. The pole caused by the output inductor and output capacitor is calculated as : fP = 1 2π L × CO 1 2π × rC × CO = 1 2π 15 µ × 940 µ 1 2π × 22mΩ × 940 µF = 1.34kHz Select RC1 = 8.2kΩ Calculate CC1 f rom equation (25) CC1 = L × CO 0.7 × RC1 = 15 µ × 940 µ 0.7 × 8.2k = 20.7nF Select CC1 = 22nF Second capacitor CC2 can be calculated using equation (26) CC2 = 1 1 = = 194pF π × R C1 × fS π × 8.2kΩ × 200kHz fZ = = = 7.7kHz Select CC2 = 220pF DS9206-11 March 2007 www.richtek.com 19 RT9206 Linear Regulator Output Capacitor Selection Solid tantalum capacitors are recommended for use on the output capacitors of LDO because their typical ESR is very close to the ideal value required for loop compensation. Tantalums also have good temperature stability: a good quality tantalum will typically show a capacitance value that varies less than 10-15% across the full temperature range of 125°C to -40°C. ESR will vary only about 2X going from the high to low temperature limits. Linear Regular MOSFETs Selection The main consideration of pass MOSFETs of linear regulator is package selection for efficient removal of heat. The power dissipation of a linear regulator is Plinear = (VIN - VOUT) × IOUT (W) (26) (1). The IC needs a bypassing ceramic capacitor C1 as a R-C filter to isolate the pulse current from power stage and supply to IC, so the ceramic capacitor C1 should be placed adjacent to the IC. (2). Place the high frequency ceramic decoupling close to the power MOSFETs. (3). The feedback part should be placed as close to IC as possible and keep away from the inductor and all noise sources. (4). The components of bootstraps (C8, C9 and D1) should be closed to each other and close to MOSFETs. (5).The PCB trace from UGATE and LGATE of controller to MOSFETs should be as short as possible and can carry 1A peak current. (6). Place all of the components as close to IC as possible. Figure 11 shows the typical PCB layout of synchronous Buck converter with RT9206 controller The criterion for selection of package is the junction temperature below the maximum desired temperature with the maximum expected ambient temperature. Layout Consideration Layout is very important in high frequency switching converter design. If designed improperly, the PCB could radiate excessive noise and contribute to the converter instability. First, place the PWM power stage components. Mount all the power components and connections in the top layer with wide copper areas. The MOSFETs of Buck, inductor, and output capacitor should be as close to each other as possible. This can reduce the radiation of EMI due to the high frequency current loop. If the output capacitors are placed in parallel to reduce the ESR of capacitor, equal sharing ripple current should be considered. Place the input capacitor directly to the drain of high-side MOSFET. The MOSFETs of linear regulator should have wide pad to dissipate the heat. In multilayer PCB, use one layer as power ground and have a separate control signal ground as the reference of the all signal. To avoid the signal ground is effect by noise and have best load regulation, it should be connected to the ground terminal of output. Furthermore, follows below guidelines can get better performance of IC: Figure 11. The PCB layout of synchronous Buck converter with RT9206 controller www.richtek.com 20 DS9206-11 March 2007 RT9206 Outline Dimension A H M J B F C I D Symbol A B C D F H I J M Dimensions In Millimeters Min 9.804 3.810 1.346 0.330 1.194 0.178 0.102 5.791 0.406 Max 10.008 3.988 1.753 0.508 1.346 0.254 0.254 6.198 1.270 Dimensions In Inches Min 0.386 0.150 0.053 0.013 0.047 0.007 0.004 0.228 0.016 Max 0.394 0.157 0.069 0.020 0.053 0.010 0.010 0.244 0.050 16-Lead SOP Plastic Package Richtek Technology Corporation Headquarter 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Richtek Technology Corporation Taipei Office (Marketing) 8F, No. 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)89191466 Fax: (8862)89191465 Email: marketing@richtek.com DS9206-11 March 2007 www.richtek.com 21