RT9426
System Side Single Cell Fuel Gauge
General Description
Features
The RT9426 Li-Ion / Li-Polymer battery fuel gauge is a
microcontroller peripheral that provides fuel gauging for
single-cell battery packs. The RT9426 resides within
the battery pack or on the system's main board and
manages a non-removable battery or removable
battery pack.
The RT9426 reports StateOfCharge, StateOfHealth,
FullChargeCapacity, TimeToEmpty and CycleCount
based on the Voltaic Gauge with Current Sensing
(VGCS) algorithm by using the voltage difference
between battery voltage and OCV to calculate the
increasing or decreasing SOC, with current sensing
compensation to report battery SOC.
Voltaic Gauge with Current Sensing algorithm can
support smoothly SOC and does not accumulate error
with time and current. That is an advantage compared
to coulomb counter which suffer from SOC drift caused
by current sense error and battery self-discharge.
The RT9426 provides complete battery status monitor
with interrupt alarm function. It could alert to host
processor actively when condition of battery
over/under-voltage
and
over-temperature
in
charge/discharge. Especially for high C-rate battery
charging application, it can measure battery voltage by
kelvin sense connection to eliminate the IR drop effect
for optimal charging profile and safety. More useful
alarm functions are Under SOC alert, SOC Change
and battery presence status change.
Marking Information
Support System Side Fuel Gauging
Battery Fuel Gauge for 1-Series (1sXp)
Li-Ion/Li-Polymer Applications
State of Charge (SOC) Calculated by
VoltaicGaugeTM with Current Sensing (VGCS)
No Accumulation Error on Capacity Calculation
Battery SOC, SOH, FCC, TTE and Cycle Count
Report
Voltage Measurement : ±7.5mV
Current Measurement : ±1%
Battery Temperature Measurement: ±3°C
Battery monitor with alert indicator for Voltage,
Current, Temperature, SOC and Presence
High C-Rate Battery Charging Compliance
Low Power Consumption
Low-Value Sense Resistor (2.5 to 20m, typical
10m)
12 Pin WDFN Package with 0.4mm Pitch
9 Bump WL-CSP Package with 0.5mm Pitch
I2C Controlled Interface
Applications
Smartphones
Tablet PC
Wearable Device
Digital Still Cameras
Digital Video Cameras
Handheld and Portable Applications
Ordering Information
RT9426
Package Type
QW : WDFN-12L 2.5x4 (W-Type)
WSC : WL-CSP-9B 2.29x1.74 (BSC)
RT9426GQW
01 : Product Code
W : Date Code
01W
Lead Plating System
G : Green (Halogen Free and Pb Free)
(For WDFN-12L 2.5x4 Only)
RT9426WSC
71 : Product Code
W : Date Code
71W
Note :
Richtek products are :
RoHS compliant and compatible with the current
requirements of IPC/JEDEC J-STD-020.
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
DS9426-01
October
2019
Suitable for use in SnPb or Pb-free soldering.
is a registered trademark of Richtek Technology Corporation.
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1
RT9426
Pin Configuration
(TOP VIEW)
A1
A2
ALERT SDA
NC
VBATG
VDD
VBATS
VPTS
VSS
1
2
3
4
5
6
GND
13
12
11
10
9
8
7
ALERT
SCL
SDA
TS
CSN
CSP
WDFN-12L 2.5x4
A3
SCL
B1
B2
B3
TS
VSS
VPTS
C1
C2
C3
CSN
CSP
VBAT
WL-CSP-9B 2.29x1.74 (BSC)
Simplified Application Circuit
For WDFN-12L 2.5x4
Single-Cell
Li-ion / Li-Polymer
Battery Pack
Host System
Charger+/VSYSTEM
PACK+
RT9426
VDD
VBATS
VPTS
ALERT
SCL
TS
System
Processor
SDA
Protection
Module
VBATG
CSP
CSN
PACK-
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
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2
VSS
Charger-/SYSTEM GND
is a registered trademark of Richtek Technology Corporation.
DS9426-01
October
2019
RT9426
For WL-CSP-9B 2.29x1.74 (BSC)
Single-Cell
Li-ion / Li-Polymer
Battery Pack
Host System
PACK+
Charger+/VSYSTEM
RT9426
VBAT
VPTS
ALERT
SCL
System
Processor
TS
T
SDA
Protection
Module
VSS
CSP
PACK-
CSN
Charger-/SYSTEM GND
Functional Pin Description
Pin No.
WDFN-12L
2.5x4
WL-CSP-9B
2.29x1.74 (BSC)
Pin Name
1
--
NC
2
--
VBATG
3
C3
VDD/VBAT
Power supply input and battery voltage sensing input for
WL-CSP package.
4
--
VBATS
Battery voltage sensing positive input. Connect to battery
connector with kelvin connection.
5
B3
VPTS
Power reference output pin for temperature measurement.
6
B2
VSS
Device ground.
7
C2
CSP
Battery current sensing positive input. Connect a 10m sense
resistor with kelvin connection.
8
C1
CSN
Battery current sensing negative input. Connect a 10m
sense resistor with kelvin connection.
9
B1
TS
10
A2
SDA
Serial data input. Slave I2C serial communications data line for
communication with system. Open-drain I/O.
11
A3
SCL
Serial cock input. Slave I2C serial communications clock line
for communication with system. Open-drain I/O.
12
A1
ALERT
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
DS9426-01
October
2019
Pin Function
No connection. Please keep floating.
Battery voltage sensing negative input. Connect to battery
connector with kelvin connection.
Temperature measurement input.
Alert open-drain indicator output.
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3
RT9426
Functional Block Diagram
VDD
VPTS
VREF
VGCS Engine
ALERT
Communication
TS
Voltaic GaugeTM
SDA
SCL
VBATS
VBATG
ADC
CSP
Controller
Current Sensing
Compensation
CSN
VSS
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is a registered trademark of Richtek Technology Corporation.
DS9426-01
October
2019
RT9426
Absolute Maximum Ratings
(Note 1)
Voltage on CSN Pin to CSP -------------------------------------------------------------------------------- 0.3V to 2V
Voltage on VBATS, VBATG, VPTS, TS to VSS ------------------------------------------------------- 0.3V to (VDD + 0.3V)
Voltage on VDD Pin Relative to VSS ---------------------------------------------------------------------0.3V to 6V
Voltage on All Other Pins Relative to VSS --------------------------------------------------------------0.3V to 6V
Power Dissipation, PD @ TA = 25C
WDFN-12L 2.5x4 ---------------------------------------------------------------------------------------------- 3.25W
WL-CSP-9B 2.29x1.74 (BSC) ------------------------------------------------------------------------------ 1.65W
Package Thermal Resistance
(Note 2)
WDFN-12L 2.5x4, JA ---------------------------------------------------------------------------------------- 30.7C/W
WDFN-12L 2.5x4, JC ---------------------------------------------------------------------------------------- 4C/W
WL-CSP-9B 2.29x1.74 (BSC), JA ------------------------------------------------------------------------ 60.3C/W
Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------ 260C
Junction Temperature ---------------------------------------------------------------------------------------- 150C
Storage Temperature Range ------------------------------------------------------------------------------- 65C to 150C
ESD Susceptibility
(Note 3)
HBM (Human Body Model) --------------------------------------------------------------------------------- 2kV
Recommended Operating Conditions
(Note 4)
Supply Voltage, VDD ---------------------------------------------------------------------------------------- 2.5V to 5.5V
Ambient Temperature Range------------------------------------------------------------------------------ 40C to 85C
Junction Temperature Range ----------------------------------------------------------------------------- 40C to 125C
Electrical Characteristics
(2.5V VDD 5.5V, TA = 25C, unless otherwise specified)
Parameter
Symbol
Operation Voltage
Test Conditions
VDD - VSS
Min
Typ
Max
Unit
2.5
--
5.5
V
Active Current
IACTIVE
Active mode, VDD = 3.8V,
BD_PRES_EN = 0 and not including
external temp. measurement current.
--
14
20
A
Sleep Current
ISLEEP
Sleep mode, VDD = 3.8V,
BD_PRES_EN = 0 and not including
external temp. measurement current.
--
5
7
A
Shutdown Current
ISHUTDOWN VDD = 3.8V
--
0.5
1
A
2.5
--
VDD
V
VBATS = 4V, VBATG = 0V
7.5
--
7.5
mV
VCSP - VCSN
125
--
125
mV
Voltage Measurement Range
Voltage Measurement Error
VERR
Current Measurement Range
Current Measurement Error
IERR
Current = 1A, RSENSE = 10m
1
--
1
%
Temperature Measurement
Error
ExtTGERR
TA = 25°C
3
--
3
°C
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
DS9426-01
October
2019
(Note 5)
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5
RT9426
Parameter
Symbol
Min
Typ
Max
Unit
40
--
85
°C
--
3
--
°C
Input Impedance :
VBATS, VBATG, TS
15
--
--
M
Input Impedance : CSN, CSP
1
--
--
M
Internal Temperature
Measurement Range
Internal Temperature
Measurement Error
Test Conditions
(Note 6)
IntTGERR
TA = 25°C
Battery Presence Detect
Threshold
0.91x 0.94x 0.97x
VDD VDD VDD
V
Battery Presence Detect Pull
High Resistor
--
150
--
k
Battery Insertion Detection
Time
--
--
25
ms
Battery Removal Detection
Time
--
--
1.1
ms
1.146
1.2
1.254
V
VPTS Output Drive
IOUT = 0.5mA
Input Logic-High :
SCL, SDA, ALERT
VIH
Reference to VSS
1.4
--
--
V
Input Logic-Low :
SCL, SDA, ALERT
VIL
Reference to VSS
--
--
0.5
V
Output Logic-Low :
SDA, ALERT
VOL
IOL = 3mA (Reference to VSS)
--
--
0.4
V
Pulldown Current :
SCL, SDA, ALERT
IPDN
VDD = 4.5V, VSCL, SDA, ALERT = 0.4V
0.05
0.2
0.4
A
Min
Typ
Max
Unit
10
--
400
kHz
1.3
--
--
s
0.6
--
--
s
Low Period of the SCL Clock tLOW
1.3
--
--
s
High Period of the SCL
Clock
tHIGH
0.6
--
--
s
Setup Time for a Repeated
START Condition
tSU:STA
0.6
--
--
s
Data Hold Time
tHD:DAT
(Note 8, 9)
0.2
--
0.9
s
Data Setup Time
tSU:DAT
(Note 8)
100
--
Clock Data Rise Time
tR
20
--
300
ns
Clock Data Fall Time
tF
20
--
300
ns
Electrical Characteristics : I2C Interface
(2.5V VDD 4.5V, TA = 25C, unless otherwise specified)
Parameter
Clock Operating Frequency
Symbol
f SCL
Test Conditions
(Note 7)
Bus Free Time Between a
tBUF
STOP and START Condition
Hold Time After START
Condition
tHD:STA
(Note 7)
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6
ns
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DS9426-01
October
2019
RT9426
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
0.6
--
--
s
Set-up Time for STOP
Condition
tSU:STO
Spike Pulse Widths
Suppressed by Input Filter
tSP
(Note 10)
0
--
50
ns
Capacitive Load for Each
Bus Line
CB
(Note 11)
--
--
400
pF
SCL, SDA Input
Capacitance
CBIN
--
--
60
pF
Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These
are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect
device reliability.
Note 2. JA is measured under natural convection (still air) at TA = 25°C with the component mounted on a high
effective-thermal-conductivity four-layer test board on a JEDEC 51-7 thermal measurement standard.JC is measured
at the top of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. The thermistor is use 10k NTC and beta 3435k, default is SEMITEC 103KT1608T.
Note 6. Specifications are 100% tested at TA = 25°C. Limits over the operating range are guaranteed by design and
characterization.
Note 7. fSCL must meet the minimum clock low time plus the rise/fall times.
Note 8. The maximum tHD:DAT has only to be met if the device does not stretch the low period (t LOW ) of the SCL signal.
Note 9. This device internally provides a hold time of at least 75ns for the SDA signal (referred to the VIHMIN) of the SCL signal)
to bridge the undefined region of the falling edge of SCL.
Note 10. Filters on SDA and SCL suppress noise spikes at the input buffers and delay the sampling instant.
Note 11. CB – total capacitance of one bus line in pF.
I2C Timing Diagram
SDA
tF
tSU:DAT
tSP
tF
tR
tLOW
tBUF
tR
tHD:STA
SCL
tHD:STA
S
tSU:STA
tHD:DAT
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
DS9426-01
October
2019
tSU:STO
Sr
P
S
is a registered trademark of Richtek Technology Corporation.
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7
RT9426
Typical Application Circuit
For WDFN-12L 2.5x4
Charger+ / VSYSTEM
C2
0.1µF
PACK+
IO
Power
3
VDD
RT9426
+
4
VBATS
ALERT
5
C3
10nF
NTC
VPTS
SCL
C1
1µF
9
Battery
Protection
Module
2
TS
SDA
VBATG
VSS
R1
10kΩ
(optional)
CSP
12
SYSTEM
Processor
11
10
6
CSN
RS
10mΩ
PACK-
Charger- / SYSTEM GND
For WL-CSP-9B 2.29x1.74 (BSC)
(optional high-side sensing)
Charger+ / VSYSTEM
RS
10mΩ
PACK+
+
Removeable
Battery Peak
IO
Power
RT9426
C2
CSP
C1
C3
CSN
ALERT
VBAT
SDA
Battery
Protection
Module
B3
T
R1
10kΩ
(optional)
VPTS
SCL
C1
1µF
C2
10nF
NTC
B1
B2
A1
SYSTEM
Processor
A2
A3
TS
VSS
CSP
CSN
C2
C1
Charger- / SYSTEM GND
PACK-
RS
10mΩ
* Both WL-CSP and WDFN can option High/Low Side NTC
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is a registered trademark of Richtek Technology Corporation.
DS9426-01
October
2019
RT9426
Typical Operating Characteristics
* : Sample accuracy with custom parameter into the IC.
Voltage ADC Error vs. Temperature
Current ADC Error vs. Temperature
10
10
40C
8
6
Current ADC Error (mA)
85C
4
2
0
25C
-2
-4
-6
-8
40C
6
4
2
85C
0
25C
-2
-4
-6
-8
-10
-2000 -1500 -1000 -500
4500
4300
4100
3900
3700
3500
3300
3100
2900
2700
2500
-10
500 1000 1500 2000
Current (mA)
Voltage (mV)
Temperature Measurement Error vs. Temperature
SOC Accuracy*
5
100
4
90
3
80
2
70
1
SOC (%)
Temperature Measurement Error (°C)1
0
0
-1
-2
SOC_VGCS
Reference_SOC
SOC_Error_VGCS
-3
-4
4
C/4 DCHG
60
2
50
0
C/4 CHG
40
-2
C/2 CHG
20
-4
-6
1.5C CHG
C/2 DCHG
10
-5
-8
0
-40
-20
0
20
25
45
65
Temperature (°C)
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
DS9426-01
October
2019
8
6
30
VDD = 2.5V
VDD = 3.5V
VDD = 4.5V
10
SOC Error (%)
Voltage ADC Error (mV)
8
85
-10
0
1
2
3
4
5
6
7
8
9
10
Time (h)
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9
RT9426
Application Information
The RT9426 reports temperature to Temperature
register by measuring battery temperature or chip
ADC for Voltage, Current and Temperature
Battery voltage is measured at the VBATS pin input
with respect to VBATG over a 2.5 to 5.5V range with
resolutions of 1mV. The ADC calculates the first cell
voltage for a period of 250ms after IC POR and then for
a period of 1s for every cycle afterwards. The Voltage
temperature. When measuring battery temperature, an
external NTC resistor will be used.
register requires 1s to update after exiting Sleep mode.
The result is placed in the Voltage register at the end of
each conversion period.
The VGCS algorithm is based on the battery voltage
and the dynamic difference of battery voltage and
battery current measurement, by iterating battery
voltage information and compensating with current
information to increase or decrease delta SOC, then
The RT9426 Fuel Gauge measures battery current in
charging and discharging and reports it to Current
register. The measurement range is 10A (RS = 10m),
and the resolution is 1mA.
Input
VoltaicGauge™ with Current Sensing (VGCS)
Algorithm
integrate to SOC. The below figure is for VGCS
functional block.
VGCS Algorithm
OCV Table Lookup
Output
StateOfCharge
StateOfHealth
Voltage
TM
VoltaicGauge
with Current Sensing
Current
FullChargeCapacity
CycleCount
Temperature
Battery Capacity
Compensation
TimetoEmpty
DesignCapacity
The RT9426 got battery voltage information then using
Design Capacity
OCV table and iterate calculation with current
correction to calculate delta SOC, then using design
capacity and battery capacity as a reference to
optimize result and output final SOC result. VGCS also
support high C-RATE charging technology.
The DesignCapacity register should be set with proper
value after IC POR, Design Capacity is the expected
capacity when cell has been made and it’s not been
changed when VGCS active. Design Capacity is used
as a reference input for VGCS algorithm. The
The coulomb counter based fuel gauge suffers from
SOC drift due to current-sense error and cell
self-discharge. Even there is a very small current
sensing error, the coulomb counter accumulates the
error from time to time, VGCS is based on voltage
resolution of Design Capacity is 1mAh and default
value is 0x07D0 (2000mAh).
iteration algorithm to reach stable SOC behavior and
only using current information to fine tune result for
getting good transient state response. VGCS does not
accumulate current and suffer SOC drift issue like
traditional coulomb counter.
displays the state of charge of the cell as calculated by
the VGCS algorithm. The result is displayed as a
percentage of the cell’s full capacity. This register
automatically adapts to variation in battery size since
the Fuel Gauge naturally recognize relative SOC. The
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10
SOC Report
The StateOfCharge register is a read-only register that
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DS9426-01
October
2019
RT9426
units of SOC is %. The reported SOC also includes
residual capacity, which might not be available to the
actual application because of early termination voltage
Power Mode Switching
POR
requirements. When SOC = 0, typical applications have
no remaining capacity. The first update occurs in
250ms after POR of the IC.
Active
1. Exit shutdown command
2
2. I C pull high
Power Mode
There are three power mode for the RT9426. Each
power mode could be applied on different application
for different power consumption considering. The three
power modes are Active mode, Sleep mode and
Shutdown mode.
Disable Sleep Mode &
1. Exit sleep command or
2. FG self-detected exit
Enable Shutdown Mode &
1. Entry shutdown command or
2
2. SHDN_LOW_EN = 1 & I C pull low
Shutdown
Enable Sleep Mode &
1. Entry sleep command or
2. FG self-detected entry
Sleep
1. Exit shutdown command
2
2. I C pull high
*: Exit shutdown or sleep mode method must be follow as entry method last time.
Ex: Entry sleep mode by command, it must also use command to exit sleep mode.
Active Mode
The active mode is recommended and it is the default
power mode after POR. In active mode, the Voltage,
Current,
Temperature,
AverageVoltage,
AverageCurrent and AverageTemperature will be
Controller
updated every second.
The controller takes care of the control flow of system
routine, ADC measurement flow, algorithm calculation
and alert determined.
Sleep Mode
Power Up Sequence
The sleep mode behavior is same as the active mode
but it has the longer measurement period. The period in
When the RT9426 is power on, the Fuel Gauge (FG)
measures the battery voltage and then predicts the first
SOC according to the voltage for a period of 250ms.
the sleep mode is programmable. The minimum period
is 2 times of active mode and the maximum period is 16
times of active mode. The default period is 4 times of
active mode. When sleep mode function is enabled, it
could be entered/exited by sending commands or by
Fuel Gauge self-detection.
The first SOC would be accurate if the battery has been
well relaxed for over 30 minutes. Otherwise, the initial
SOC error occurs. However, the initial SOC error will
be convergent and the SOC will be adjusted gradually
and finally approach to the OCV when battery is
relaxed.
Shutdown Mode
In shutdown mode, the RT9426 will stop all
measurement behaviors and stop to update registers to
keep the minimum power consumption. To enter
shutdown mode, the function should be enabled first.
Then, it could be entered by either sending command
or pulling low I2C bus.
To exit shutdown mode, an exit shutdown command
should be received when it’s entered by command.
Otherwise, the I2C bus should be pulled high when it’s
entered by I2C bus low condition.
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
DS9426-01
October
2019
Quick Sensing
A Quick Sensing operation allows the RT9426 to
restart battery voltage sensing and StateOfCharge
calculation. The operation is used to reduce the initial
StateOfCharge error caused by improper power-on
sequence. A Quick Sensing operation could be
performed by I2C Quick Sensing command (0x4000) to
the Control register.
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11
RT9426
Host can polling the ALERT Flag for a period to monitor
system status or accept the interrupt notice from the
RT9426 ALERT pin. Alert need to be enabled before it
Alert Function
The RT9426 support several kinds of alert to alarm
system there is abnormal condition need to be noticed,
such as over temperature or under voltage. It total
includes over-temperature
in
charge
(OTC),
over-temperature in discharge (OTD), over-voltage
(OV), under-voltage (UV), under-SOC (US) and SOC
change (SC).
1
2
3
works. There are 2 ways to enable alert function. One
is to enable specified bit operation, the other is just to
set a proper value to detection threshold. Please refer
to below diagram and descriptions for detailed.
4
5
6
7
8
OV / UV / OTC / OTD / US
ALERT Condition
ALERT_EN
e.g. OV_DET
ALERT FLAG
e.g. OV
IRQ_EN
e.g. VOL_IRQ_EN
IRQ
ALERT PIN
Host Communication
Figure 1. ALERT Function Timing Diagram
1. ALERT occur but ALERT_EN is disabled, ALERT FLAG have no response.
2. ALERT_EN enable, ALERT FLAG is set when ALERT condition occur.
3. ALERT FLAG is cleared when ALERT condition recover.
4. When ALERT FLAG is already set and IRQ_EN is set, IRQ and ALERT PIN output have no response.
5. IRQ is set and ALERT PIN output low only when IRQ_EN is set and ALERT FLAG state change.
6. IRQ and ALERT PIN are read clear only.
7. Clear IRQ_EN have no effect on IRQ and ALERT PIN output.
8. Disable ALERT_EN will also clear ALERT FLAG.
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is a registered trademark of Richtek Technology Corporation.
DS9426-01
October
2019
RT9426
1
2
3
4
5
6
7
8
SC
ALERT Condition
ALERT_EN
e.g. SC_EN
ALERT FLAG
e.g. SC
IRQ_EN
e.g. SOC_IRQ_EN
IRQ
ALERT PIN
W
Host Communication
W
R
R
Figure 2. SC ALERT Function Timing Diagram
1. ALERT condition occur but ALERT_EN disable, ALERT FLAG have no response
2. ALERT_EN enable, ALERT FLAG is set when ALERT condition occur.
3. ALERT FLAG is cleared when driver write ALERT_FLAG to 0.
4. When ALERT_FLAG is already set and IRQ_EN is set, IRQ and ALERT PIN output have no response.
5. IRQ is set and ALERT PIN output low only when IRQ_EN is set and ALERT FLAG state set.
6. IRQ and ALERT PIN are read clear only, driver read clear IRQ will also clear ALERT FLAG
7. Clear IRQ_EN have no effect on IRQ and ALERT PIN output.
8. Disable ALERT_EN will also clear ALERT_FLAG.
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
DS9426-01
October
2019
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13
RT9426
I2C Interface
The RT9426 I2C slave address = 7’b1010101. I2C interface support fast mode (bit rate up to 400kb/s). The write or
read bit stream is shown below :
Read data from the RT9426
Slave Address
Register Address
S
0
A
R/W
Slave Address
MSB
A Sr
1
Data 2
LSB
A
Assume Address = m
MSB
Data 1
A
Data for Address = m
LSB
A P
Data for Address = m + 1
Write data to the RT9426
Slave Address
Register Address
S
0
R/W
Driven by Master,
A
MSB
Data 1
A
P Stop,
MSB
Data 2
LSB
A
Assume Address = m
Driven by Slave (RT9426),
LSB
Data for Address = m
S Start,
A P
Data for Address = m + 1
Sr Repeat Start
Register Summary Table
Name
Symbol
Address
Unit
Mode
Reset
Control
CNTL
0x00 to 0x01
--
R/W
0x0000
Current
CURR
0x04 to 0x05
mA
R
0x0000
Temperature
TEMP
0x06 to 0x07
0.1°K
R/W
0x0BA6
Voltage
VBAT
0x08 to 0x09
mV
R
0x0ED8
Flag1
FLAG1
0x0A to 0x0B
--
R
0x0000
Flag2
FLAG2
0x0C to 0x0D
--
R
0x0000
RemainingCapacity
RM
0x10 to 0x11
mAh
R
0x03CF
FullChargeCapacity
FCC
0x12 to 0x13
mAh
R
0x07D0
AverageCurrent
AI
0x14 to 0x15
mA
R
0x0000
TimeToEmpty
TTE
0x16 to 0x17
minute
R
0xFFFF
Version
VER
0x20 to 0x21
--
R
0x0001
VGCOMP12
VGCOMP12
0x24 to 0x25
--
R/W
0x3232
VGCOMP34
VGCOMP34
0x26 to 0x27
--
R/W
0x3232
InternalTemerature
INTT
0x28 to 0x29
0.1°K
R
0x0BA6
CycleCount
CYC
0x2A to 0x2B
Counts
R/W
0x0000
StateOfCharge
SOC
0x2C to 0x2D
%
R
0x0032
StateOfHealth
SOH
0x2E to 0x2F
%
R
0x0064
Flag3
FLAG3
0x30 to 0x31
--
R
0x0000
IRQ
IRQ
0x36 to 0x37
--
R
0x0000
DesignCapacity
DC
0x3C to 0x3D
mAh
R
0x07D0
ExtendedControl
EXTDCNTL
0x3E to 0x3F
--
W
0x0000
AverageVoltage
AV
0x64 to 0x65
mV
R
0x0ED8
AverageTemperature
AT
0x66 to 0x67
0.1°K
R
0x0BA6
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
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14
is a registered trademark of Richtek Technology Corporation.
DS9426-01
October
2019
RT9426
Thermal Considerations
absolute maximum junction temperature TJ(MAX), listed
under Absolute Maximum Ratings, to avoid permanent
damage to the device. The maximum allowable power
dissipation depends on the thermal resistance of the IC
package, the PCB layout, the rate of surrounding
airflow, and the difference between the junction and
ambient temperatures. The maximum power
dissipation can be calculated using the following
formula :
PD(MAX) = (TJ(MAX) - TA) / JA
where TJ(MAX) is the maximum junction temperature,
TA is the ambient temperature, and JA is the
junction-to-ambient thermal resistance.
For continuous operation, the maximum operating
junction temperature indicated under Recommended
Operating
Conditions
is
125°C.
The
junction-to-ambient thermal resistance, JA, is highly
package dependent. For a WDFN-12L 2.5x4 package,
the thermal resistance, JA, is 30.7°C/W on a standard
JEDEC 51-7 high effective-thermal-conductivity
four-layer test board. For a WL-CSP-9B 2.29x1.74
(BSC) package, the thermal resistance, JA, is
30.6°C/W on a standard JEDEC 51-7 high
effective-thermal-conductivity four-layer test board. The
maximum power dissipation at TA = 25°C can be
calculated as below :
PD(MAX) = (125°C - 25°C) / (30.7°C/W) = 3.25W for a
WDFN-12L 2.5x4 package.
PD(MAX) = (125°C - 25°C) / (60.3°C/W) = 1.65W for a
Maximum Power Dissipation (W)1
The junction temperature should never exceed the
3.5
Four-Layer PCB
3.0
WDFN-12L 2.5x4
2.5
2.0
1.5
1.0
WL-CSP-9B 2.29x1.74 (BSC)
0.5
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 3. Derating Curve of Maximum Power
Dissipation
Layout Considerations
To ensure the measurement accuracy of the RT9426,
the recommended layout guideline is as below :
▶ The capacitor of VBATS and VDD pins must be put
as close as possible to avoid the noise effect.
▶ The VBATS and VBATG path must be make Kelvin
Sense connection to the P+ and P- to minimize the
IR drop effect on voltage measurement accuracy.
▶ The CSN and CSP path must be make Kelvin
Sense connection to RS to avoid the IR drop effect
on current measurement accuracy.
▶ The NTC should be as close as possible to the
Battery and far away from the thermal area.
▶ There are no special layout requirements for other
pins.
WL-CSP-9B 2.29x1.74 (BSC) package.
The maximum power dissipation depends on the
operating ambient temperature for the fixed TJ(MAX)
and the thermal resistance, JA. The derating curves in
Figure 3 allows the designer to see the effect of rising
ambient temperature on the maximum power
dissipation.
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
DS9426-01
October
2019
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
15
RT9426
Positive Power Bus
P+
Place the chip as close as
possible to the battery
Top Layer
C2
Bottom Layer
C1
ALERT 12
1
NC
2
VBATG
SCL 11
3
VDD
SDA 10
4
VBATS
5
VPTS
CSN 8
6
VSS
CSP 7
TS
C3
NTC
9
Mount the RS as close as
possible to P- and using
kelvin sense layout style to
avoid IR drop
Capacitor must be placed as close
as possible to the input pins
SGND
(System GND)
PRS
Negative Power Bus
Figure 4. PCB Layout Guide for WDFN-12L 2.5x4 Package
Positive Power Bus
P+
Top
Layer
Bottom
Layer
A3
SCL
B3
VPTS
C3
VBAT
A2
SDA
B2
VSS
C2
CSP
A1
ALERT
B1
TS
C1
CSN
Place the capacitor as close as
possible to the pin
C1
Mount the RS as close as possible
to P- and using kelvin sense
layout style to avoid IR drop
Negative Power Bus
SGND
NTC
C2
RS
P-
(System GND)
Figure 5. Low-Side Sensing PCB Layout Guide for WL-CSP-9B 2.29x1.74 (BSC) Package
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
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16
is a registered trademark of Richtek Technology Corporation.
DS9426-01
October
2019
RT9426
RS
Positive Power Bus
P+
Mount the RS as close as possible to P+
and using kelvin sense layout style to
avoid IR drop
Top Layer
Bottom Layer
Place the capacitor as close as
possible to the pin
C1
Negative Power Bus
C3
C2
C1
VBATS
CSP
CSN
B3
B2
B1
VPTS
VSS
TS
A3
A2
A1
SCL
SDA
ALERT
C2
NTC
SGND
P-
(System GND)
Figure 6. High-Side Sensing PCB Layout Guide for WL-CSP-9B 2.29x1.74 (BSC) Package
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
DS9426-01
October
2019
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
17
RT9426
Outline Dimension
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.150
0.250
0.006
0.010
D
2.400
2.600
0.094
0.102
D2
1.950
2.050
0.077
0.081
E
3.900
4.100
0.154
0.161
E2
2.450
2.550
0.096
0.100
e
L
0.400
0.350
0.016
0.450
0.014
0.018
W-Type 12L DFN 2.5x4 Package
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18
is a registered trademark of Richtek Technology Corporation.
DS9426-01
October
2019
RT9426
Dimensions In Millimeters
Symbol
Dimensions In Inches
Min
Max
Min
Max
A
0.525
0.625
0.021
0.025
A1
0.200
0.260
0.008
0.010
b
0.290
0.350
0.011
0.014
D
1.700
1.780
0.067
0.070
D1
1.000
E
2.250
0.039
2.330
0.089
0.092
E1
1.000
0.039
e
0.500
0.020
9B WL-CSP 2.29x1.74 Package (BSC)
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
DS9426-01
October
2019
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
19
RT9426
Footprint Information
Package
V/W/U/XDFN2.5x4-12
Footprint Dimension (mm)
Number of
P
A
B
C
D
Sx
Sy
M
12
0.40
4.80
3.10
0.85
0.20
2.50
2.50
2.20
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
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20
Tolerance
Pin
±0.05
is a registered trademark of Richtek Technology Corporation.
DS9426-01
October
2019
RT9426
Number of
Package
Pin
Type
Footprint Dimension (mm)
e
NSMD
WL-CSP2.29x1.74-9(BSC)
9
SMD
0.500
A
B
0.275
0.375
0.375
0.275
Tolerance
±0.025
Richtek Technology Corporation
14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume
responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and
reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may
result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
DS9426-01
October
2019
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
21