RT9514GQW

RT9514 Linear Single Cell Li-Ion Battery Charger IC General Description Features The RT9514 is a fully integrated low cost single-cell LiIon battery charger IC ideal for portable applications. The RT9514 is capable of being powered up from AC adapter. The RT9514 enters sleep mode when AC adapter is removed. The RT9514 optimizes the charging task by using a control algorithm including preconditioning mode, fast charge mode and constant voltage mode. The charging task is terminated as the charge current drops below the preset 18V Maximum Rating for AC Adapter Internal Integrate P-MOSFETs AC Adapter Power Good Status Indicator Charge Status Indicator Under Voltage Protection Over Voltage Protection Automatic Recharge Feature Small 10-Lead WDFN Package Thermal Feedback Optimizing Charge Rate RoHS Compliant and Halogen Free threshold. The AC adapter charge current can be programmed up to 1A with an external resister. The internal Applications thermal feedback circuitry regulates the die temperature to optimize the charge rate for all ambient temperatures. Digital Cameras Cellular Phones The RT9514 features 18V maximum rating voltages for Personal Data Assistants (PDAs) MP3 Players AC adapter. The other features are under voltage protection, over voltage protection for AC adapter supply. Handheld PCs Pin Configurations Ordering Information (TOP VIEW) RT9514 Package Type QW : WDFN-10L 3x3 (W-Type) ACIN 1 NC 2 Lead Plating System G : Green (Halogen Free and Pb Free) 9 GND CHG_S 3 PGOOD 4 GND 5 Note : Richtek products are : BATT NC 8 EN 7 NC ISETA 10 11 WDFN-10L 3x3 RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. Marking Information Suitable for use in SnPb or Pb-free soldering processes. For marking information, contact our sales representative directly or through a Richtek distributor located in your area. Typical Application Circuit Battery Pack AC Adapter To System To System DS9514-01 April 2011 1 1uF 3 RT9514 10 BATT ACIN CHG_S EN 4 PGOOD 5, Exposed Pad (11) GND ISETA 8 6 Chip Shutdown Chip Enable R SET www.richtek.com 1 RT9514 Functional Pin Description Pin No. Pin Name Pin Function ACIN Wall Adaptor Charge Input Supply. NC No Internal Connection. 3 CHG_S Charge Status Indicator Output (open drain). 4 PGOOD Power Good Indicator Output (open drain). 5 GND Ground. 6 ISETA Wall Adaptor Supply Charge Current Set Point. 8 EN Charge Enable Input (active low). BATT Battery Charge Current Output. 1 2, 7, 9 10 Ground. The exposed pad must be soldered to a large PCB and connected to 11 (Exposed Pad) GND GND for maximum power dissipation. Function Block Diagram ACIN OVP Comparator 2.5V Charge Input Selection GND + - SENSE FET OVP ACIN PFET BATT ISETA Precharge Comparator + VREF 2.5V 2.5V 0.5V Recharge Comparator + 0.25V 2.5V - Precharge Recharge Loop Controller VCC VREF Tcrmination Comparator 0.25V + 0.9V + 125 C Charge Done Charge Disable PGOOD Logic CHG_S 1uA EN www.richtek.com 2 DS9514-01 April 2011 RT9514 Operation State Diagram for Charger function (RT9514) UVLO BATT YES BATT < 4.1V YES BATT > 2.8V YES Fast-CHG State ICHG_F = 500mA @RSET = 1.5k NO NO Power Off State PFET = OFF Pre-CHG State IPCHG NO Any State if VIN < UVLO or VIN > OVP or EN = High or VIN < BATT DS9514-01 April 2011 ICHG < 0.1 x ICHG_F NO = 0.1 x ICHG_F YES Charge Done State ICHG = 0A www.richtek.com 3 RT9514 Absolute Maximum Ratings (Note 1) AC Input Voltage ----------------------------------------------------------------------------------------------------------- n0.3V to 18V EN Input Voltage ----------------------------------------------------------------------------------------------------------- n0.3V to 6V Output Current ------------------------------------------------------------------------------------------------------------- 1.2A Power Dissipation, PD @ TA = 25”C WDFN-10L 3x3 ------------------------------------------------------------------------------------------------------------- 1.667W Package Thermal Resistance (Note 2) WDFN-10L 3x3, JA ------------------------------------------------------------------------------------------------------- 60”C/W WDFN-10L 3x3, JC ------------------------------------------------------------------------------------------------------- 8.2”C/W Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------- 260”C Junction Temperature ---------------------------------------------------------------------------------------------------- 150”C Storage Temperature Range -------------------------------------------------------------------------------------------- n65”C to 150”C ESD Susceptibility (Note 3) HBM (Human Body Mode) ---------------------------------------------------------------------------------------------- 2kV MM (Machine Mode) ------------------------------------------------------------------------------------------------------ 200V Recommended Operating Conditions (Note 4) ACIN Input Voltage Range ----------------------------------------------------------------------------------------------- 4.5V to 6V Junction Temperature Range -------------------------------------------------------------------------------------------- n40”C to 125”C Ambient Temperature Range -------------------------------------------------------------------------------------------- n40”C to 85”C Electrical Characteristics (ACIN = 5V, TA = 25”C, Unless Otherwise specification) Parameter Symbol Test Conditions Min Typ Max Units -- 3 3.5 V Supply Input ACIN U VLO Threshold Voltage VUVLO Rising ACIN UVLO Hysteresis VUVLO_Hys 50 80 120 mV ACIN Standby Current ISTBY V BATT = 4.5V -- 300 500 uA ACIN Shutdown C urrent ISHDN V EN = High -- 50 100 uA ACIN Quiescent Current IQ -- 150 250 uA BATT Sleep Leakage Current ISLEEP V ACIN = 4V, V BATT = 3V V ACIN = 4V, V BATT = 4.5V -- -- 10 uA VREG I BATT = 60mA 4.168 4.21 4.252 V 1 -- +1 % -- 600 -- 2.45 2.5 2.55 V 100 -- 1200 mA -- 500 -- mA Voltage Regulation BATT Regulation Voltage R egulation Voltage Accuracy ACIN MOSFET RDS(ON)_ACIN I BATT = 500mA C urrent Regulation ISETA Set Voltage (Fast Charge Phase) Full Charge Setting Range VISETA ICHG_F AC Charge Current accuracy ICHG_F VBATT = 3.5V VBATT = 3.8V, RISET = 1.5k m To be continued www.richtek.com 4 DS9514-01 April 2011 RT9514 Parameter Symbol Test Conditions Min Typ Max Units 2.6 2.8 3 V 50 100 200 mV 8 10 12 % VBATT 60 100 170 mV ITERM VB ATT = 4.2V -- 10 -- % CHG_S Pull Down Voltage VCHG_S TBD, ICHG_S = 5mA -- 65 -- mV PGOOD Pull Down Voltage VPGOOD TBD, IPGOOD = 5mA -- 220 -- mV 1.5 -- -- V Precharge BAT T Pre-Charge Rising Threshold BATT Pre-Charge Threshold Hysteresis Pre-Charge Current VPRECH V PRE CH IPCHG V BATT = 2V Recharge Threshold BATT Re-Charge Falling Threshold Hysteresis Charge Termination Detection Termination Current Ratio (default) V RECH_ L V REG Logic Input/Output EN Threshold Logic-High Voltage VIH Logic-Low Voltage EN Pin Input Current VIL IEN V EN = 2V -- -- 0.4 V -- -- 2 uA -- 125 -- C -- 6.5 -- V Protection Thermal Regulation OVP SET Internal Default Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. JA is measured in the natural convection at TA = 25”C on a high effective thermal conductivity test board (4 layers, 2S2P) of JEDEC 51-7 thermal measurement standard. The case point of JC is on the expose pad for the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. DS9514-01 April 2011 www.richtek.com 5 RT9514 Typical Operating Characteristics ACIN Power On ACIN Power Off VBATT = 3.7V VBATT = 3.7V VACIN (5V/Div) VACIN (5V/Div) V CHG_S (2V/Div) VCHG_S (2V/Div) VBATT (5V/Div) VBATT (5V/Div) I CHG_S (1A/Div) I CHG_S (1A/Div) Time (250us/Div) Time (250us/Div) ACIN OVP ACIN OVP VACIN (10V/Div) VACIN (10V/Div) VBATT (5V/Div) VBATT (5V/Div) VCHG_S (5V/Div) V CHG_S (5V/Div) I CHG_S (1A/Div) VACIN = 0V to 10V, VBATT = 3.7V Time (1ms/Div) www.richtek.com 6 I CHG_S (1A/Div) VACIN = 5V to 8V to 5V, VBATT = 3.7V Time (1ms/Div) DS9514-01 April 2011 RT9514 Application Information Automatically Power Source Selection Fast-Charge Current Setting The RT9514 is a battery charger IC which is designed for The RT9514 offers ISETA pin to determine the charge Li-ion Battery with 4.21V rated voltage. current from 100mA to 1.2A. The charge current can be calculated as following equation. AC Mode : When the AC input voltage (ACIN) is higher than the UVP voltage level and lower than the OVP protection (3V), the RT9514 will enter AC Mode. In the ICHG_F = K VISETA RSET AC Mode, ACIN P-MOSFET is turned on. The parameter K = 300 ; VISETA = 2.5V (typ.). RSET is the Sleep Mode : The RT9514 will enter Sleep Mode when resistor connected between the ISETA and GND. AC input voltage are removed. This feature provides low leakage current from the battery during the absence of input supply. ACIN Over Voltage Protection The AC input voltage is monitored by an internal OVP comparator. The comparator has an accurate reference of 2.5V from the band-gap reference. The OVP threshold is set by the internal resistive. The protection threshold is set to 6.5V. When the input voltage exceeds the threshold, the comparator outputs a logic signal to turn off the power P-MOSFET to prevent the high input voltage from damaging the electronics in the handheld system. When the input over oltage condition is removed (ACIN < 6V), the comparator re-enables the output by running through the soft-start. Pre- Charge Current Setting During a charge cycle if the battery voltage is below the VPRECH threshold, the RT9514 applies a pre-charge mode to the battery. This feature revives deeply discharged cells and protects battery life. The RT9514 internally determines the pre-charge rate as 10% of the fast-charge current. Battery Voltage Regulation The RT9514 monitors the battery voltage through the BATT pin. Once the battery voltage level closes to the VREG threshold, the RT9514 voltage enters constant phase and the charging current begins to taper down. When battery voltage is over the VREG threshold, the RT9514 will stop charge and keep to monitor the battery voltage. However, when the battery voltage decreases 100mV below the VREG, it will be recharged to keep the battery voltage. 1200 Charge Status Outputs 1000 The open-drain CHG_S and PGOOD outputs indicate various charger operations as shown in the following table. 800 These status pins can be used to drive LEDs or 600 communicate to the host processor. Note that ON indicates the open-drain transistor is turned on and LED 400 is bright. 200 Charge State 0 0.5 1.5 2.5 3.5 4.5 5.5 6.5 7.5 RSET (k ) 8.5 9.5 ACIN CHG_S PGOOD Charge ON ON Charge done OFF ON Figure 1. Charge Current Setting DS9514-01 April 2011 www.richtek.com 7 RT9514 Temperature Regulation test board. The maximum power dissipation at T A = 25”C In order to maximize the charge rate, the RT9514 features a junction temperature regulation loop. If the power can be calculated by following formula : dissipation of the IC results in a junction temperature greater than the thermal regulation threshold (125”C), the WDFN-10L 3x3 packages RT9514 throttles back on the charge current in order to maintain a junction temperature around the thermal regulation threshold (125”C). The RT9514 monitors the junction temperature, TJ, of the die and disconnects the battery from the input if TJ exceeds 125”C. This operation continues until junction temperature falls below thermal regulation threshold (125”C) by the hysteresis level. This feature prevents the chip from damaging. PD(MAX) = (125”C n 25”C) / (60”C/W) = 1.667W for The maximum power dissipation depends on operating ambient temperature for fixed T J(MAX) and thermal resistance JA. For WDFN-10L 3x3 package, the Figure 2 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power allowed. 1.8 Four Layers PCB 1.6 1.4 Selecting the Input and Output Capacitors In most applications, the most important is the highfrequency decoupling capacitor on the input of the RT9514. 1.2 A 1uF ceramic capacitor, placed in close proximity to input pin and GND pin is recommended. In some applications 0.8 depending on the power supply characteristics and cable length, it may be necessary to add an additional 10uF 0.4 ceramic capacitor to the input. The RT9514 requires a small output capacitor for loop stability. A 1uF ceramic capacitor placed between the BATT pin and GND is typically sufficient. WDFN-10L 3x3 1.0 0.6 0.2 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Figure 2. Derating Curves for RT9514 Package Thermal Considerations For continuous operation, do not exceed absolute Layout Considerations maximum operation junction temperature. The maximum power dissipation depends on the thermal resistance of For the best performance of the RT9514, the following IC package, PCB layout, the rate of surroundings airflow Place the input and output capacitors as close as and temperature difference between junction to ambient. The maximum power dissipation can be calculated by possible to the input and output pins respectively for following formula : PD(MAX) = ( TJ(MAX) - TA ) / PCB layout guidelines must be strictly followed. good filtering. Keep the main power traces as wide and short as possible. JA Where T J(MAX) is the maximum operation junction The connection of RSETA should be isolated from other temperature 125”C, TA is the ambient temperature and the noisy traces. The short wire is recommended to prevent JA is the junction to ambient thermal resistance. EMI and noise coupling. For recommended operating conditions specification, where TJ(MAX) is the maximum junction temperature of the Connect the GND and Exposed Pad to a strong ground plane for maximum thermal dissipation and noise die (125”C) and TA is the ambient temperature. The junction protection. to ambient thermal resistance JA is layout dependent. For WDFN-10L 3x3 packages, the thermal resistance JA is 60”C/W on the standard JEDEC 51-7 four layers thermal www.richtek.com 8 DS9514-01 April 2011 RT9514 Input/Output capacitors must be placed as close as possible to the Input/Output pins. GND V ACIN C1 C2 ACIN 1 NC 2 CHG_S 3 PGOOD 4 GND 5 BATT NC 8 EN 7 NC ISETA 10 9 GND 11 V BATT R SETA GND Connect the Exposed Pad to a ground plane. Place the R SETA as close as possible to the ISETA pin. The connection of R SETA should be isolated from other noisy traces. Figure 3. PCB Layout Guide DS9514-01 April 2011 www.richtek.com 9 RT9514 Outline Dimension D2 D L E E2 1 e SEE DETAIL A 2 b 2 1 DETAIL A A A1 1 Pin #1 ID and Tie Bar Mark Options A3 Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.180 0.300 0.007 0.012 D 2.950 3.050 0.116 0.120 D2 2.300 2.650 0.091 0.104 E 2.950 3.050 0.116 0.120 E2 1.500 1.750 0.059 0.069 e L 0.500 0.350 0.020 0.450 0.014 0.018 W-Type 10L DFN 3x3 Package Richtek Technology Corporation Richtek Technology Corporation Headquarter 5F, No. 20, Taiyuen Street, Chupei City Taipei Office (Marketing) 5F, No. 95, Minchiuan Road, Hsintien City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Taipei County, Taiwan, R.O.C. Tel: (8862)86672399 Fax: (8862)86672377 Email: marketing@richtek.com Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek. www.richtek.com 10 DS9514-01 April 2011