RT9515
Linear Single Cell Li-Ion Battery Charger IC
General Description
Features
The RT9515 is a fully integrated low cost single-cell Li-
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18V Maximum Rating for AC Adapter
Ion battery charger IC ideal for portable applications. The
RT9515 is capable of being powered up from AC adapter.
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The RT9515 enters sleep mode when AC adapter is
removed.
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Internal Integrated P-MOSFETs
AC Adapter Power Good Status Indicator
Charge Status Indicator
algorithm including preconditioning mode, fast charge
mode and constant voltage mode. The charging task is
terminated as the charge current drops below the preset
threshold. The AC adapter charge current can be
programmed up to 1A with an external resister. The internal
thermal feedback circuitry regulates the die temperature
to optimize the charge rate for all ambient temperatures.
The RT9515 features 18V maximum rating voltages for
AC adapter. The other features are under voltage
protection, over voltage protection for AC adapter supply
and battery temperature monitoring.
Ordering Information
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Under Voltage Protection
Over Voltage Protection
Automatic Recharge Feature
Battery Temperature Monitoring
Small 10-Lead WDFN Package
Thermal Feedback Optimizing Charge Rate
RoHS Compliant and Halogen Free
Applications
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Digital Cameras
Cellular Phones
Personal Data Assistants (PDAs)
MP3 Players
Handheld PCs
Pin Configurations
RT9515
(TOP VIEW)
Package Type
QW : WDFN-10L 3x3 (W-Type)
ACIN 1
NC 2
Lead Plating System
G : Green (Halogen Free and Pb Free)
CHG_S 3
PGOOD 4
GND 5
Note :
BATT
TS
8 EN
7 NC
ISETA
10
9
GND
11
9
The RT9515 optimizes the charging task by using a control
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Richtek products are :
`
RoHS compliant and compatible with the current require-
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Suitable for use in SnPb or Pb-free soldering processes.
ments of IPC/JEDEC J-STD-020.
WDFN-10L 3x3
Marking Information
For marking information, contact our sales representative
directly or through a Richtek distributor located in your
area.
DS9515-01 April 2011
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RT9515
Typical Application Circuit
Battery Pack
AC
Adapter
1
ACIN
BATT
10
+
RT9515
1uF
To System
3
To System
4 PGOOD
5, Exposed Pad (11)
TS
CHG_S
GND
EN
ISETA
9
8
Chip Shutdown
Chip Enable
0.1uF to 10uF
6
RSET
Pre-Charge Phase
Fast Charge
Phase
Constant Voltage
Phase &
Re-Charge Phase
Standby Phase
Programmed
Charge Current
Battery
Voltage
Charging
Current
4.1V Recharge
Threshold
1/10 Programmed
Charge Current
Charge
Complete
2.8V Precharge
Threshold
Functional Pin Description
Pin No.
Pin Name
Pin Function
ACIN
Wall Adaptor Charge Input Supply.
NC
No Internal Connection.
3
CHG_S
Charge Status Indicator Output (open drain).
4
PGOOD
Power Good Indicator Output (open drain).
5
GND
Ground.
6
ISETA
Wall Adaptor Supply Charge Current Set Point.
8
EN
Charge Enable Input (active low).
9
TS
Temperature Sense Input.
10
BATT
Battery Charge Current Output.
1
2, 7
11 (Exposed Pad) GND
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2
Exposed pad should be soldered to PCB board and connected to GND.
DS9515-01 April 2011
RT9515
Function Block Diagram
ACIN
OVP
Comparator
2.5V
Charge Input Control
GND
SENSE
FET
+
OVP
-
ACIN
PFET
ISETA
BATT
VREF
2.5V
Precharge
Comparator
+
0.5V
2.5V
0.25V
Recharge
Comparator
+
2.5V
Loop Controller
+
0.9V
-
Recharge
VCC
PGOOD
Tcrmination
Comparator
0.25V
-
Precharge
VREF
125 C
Charge Done
Charge
Disable
Logic
Temperature Fault
+
1uA
EN
DS9515-01 April 2011
Temperature
Sense
CHG_S
TS
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RT9515
Operation State Diagram for Charger function (RT9515)
UVLO BATT
YES
BATT < 4.1V
YES
BATT > 2.8V
YES
Fast-CHG State
ICHG_F = 500mA
@RSET = 1.5k:
NO
NO
Power Off State
PFET = OFF
Pre-CHG State
IPCHG
NO
Any State
if VIN < UVLO or
VIN > OVP or
EN = High or
VIN < BATT
ICHG < 0.1 x
ICHG_F
NO
= 0.1 x ICHG_F
YES
Charge Done State
ICHG = 0A
VTS > 2.5V or
VTS < 0.5V
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DS9515-01 April 2011
RT9515
Absolute Maximum Ratings
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(Note 1)
ACIN Input Voltage -------------------------------------------------------------------------------------------------------- −0.3V to 18V
EN Input Voltage ----------------------------------------------------------------------------------------------------------- −0.3V to 6V
Output Current ------------------------------------------------------------------------------------------------------------- 1.2A
Power Dissipation, PD @ TA = 25°C
WDFN-10L 3x3 ------------------------------------------------------------------------------------------------------------- 1.667W
Package Thermal Resistance (Note 2)
WDFN-10L 3x3, θJA ------------------------------------------------------------------------------------------------------- 60°C/W
WDFN-10L 3x3, θJC ------------------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------Junction Temperature ---------------------------------------------------------------------------------------------------Storage Temperature Range --------------------------------------------------------------------------------------------
ESD Susceptibility (Note 3)
HBM (Human Body Mode) ---------------------------------------------------------------------------------------------- 2kV
MM (Machine Mode) ------------------------------------------------------------------------------------------------------ 200V
Recommended Operating Conditions
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8.2°C/W
260°C
150°C
−65°C to 150°C
(Note 4)
ACIN Input Voltage Range ----------------------------------------------------------------------------------------------- 4.5V to 6V
Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(ACIN = 5V, TA = 25°C, Unless Otherwise specification)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
--
3
3.5
V
50
80
120
mV
VBATT = 4.5V
--
300
500
uA
VEN = High
--
50
100
uA
--
150
250
uA
--
2
5
uA
4.168
4.21
4.252
V
1
--
+1
%
--
600
--
m:
2.45
2.5
2.55
V
100
--
1200
mA
--
500
--
mA
Supply Input
ACIN UVLO Threshold Voltage
VUVLO
ACIN UVLO Hysteresis
VUVLO_Hys
ACIN Standby Current
ISTBY
ACIN Shutdown Current
ISHDN
ACIN Quiescent Current
IQ
BAT T Sleep Leakage Current
ISLEEP
Rising
VACIN = 4V, VUSB = 4V,
VBATT = 3V
VACIN = 4V, V USB = 4V,
VBATT = 4.5V
Voltage Regulation
BAT T Regulation Voltage
VREG
IBATT = 60mA
Regulation Voltage Accuracy
ACIN MOSFET
RDS(ON)_ACIN IBATT = 500mA
Current Regulation
ISETA Set Voltage
(Fast Charge Phase)
Full Charge Setting Range
VISETA
ICHG_F
ACIN Charge Current accuracy
ICHG_F
V BATT = 3.5V
V BATT = 3.8V, RISE T = 1.5k:
To be continued
DS9515-01 April 2011
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RT9515
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
Precharge
BATT Pre-Charge Rising Threshold
V PRECH
2.6
2.8
3
V
BATT Pre-Charge Threshold
Hysteresisʳ
'V PRE CH
50
100
200
mV
Pre-Charge Current
I PCHG
V BATT = 2V
8
10
12
%
'V RECH_L
V REG VB ATT
60
100
170
mV
V TE RM
V BATT = 4.2V
225
250
275
mV
I TERM
V BATT = 4.2V
--
10
--
%
CHG_S Pull Down Voltage
V CHG_S
TBD, ICHG _S = 5mA
--
65
--
mV
PGOOD Pull Down Voltage
V PGOOD
TBD, IP GOOD = 5mA
Recharge Threshold
BATT Re-Charge Falling Threshold
Hysteresis
Charge Termination Detection
ISETA Charge Termination Set
Voltage
Termination Current Ratio (default)
Logic Input/Output
EN T hreshold
Logic-High Voltage V IH
Logic-Low Voltage V IL
EN Pin Input Current
I EN
V EN = 2V
--
220
--
mV
1.5
--
--
V
--
--
0.4
V
--
--
2
uA
Battery Temperature Sense
TS Pin Source Current
TS Pin
Threshold
I TS
V TS = 1.5V
96
102
108
uA
Low Voltage
V TS _LOW
Falling
0.485
0.5
0.515
V
High Voltage
V TS _HIGH
Rising
2.45
2.5
2.55
V
--
125
--
qC
--
6.5
--
V
Protection
Thermal Regulation
OVP SET
Internal Default
Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θJA is measured in the natural convection at TA = 25°C on a high effective thermal conductivity test board (4 layers,
2S2P) of JEDEC 51-7 thermal measurement standard. The case point of θJC is on the expose pad for the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
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DS9515-01 April 2011
RT9515
Typical Operating Characteristics
ACIN Power On
ACIN Power Off
VBATT = 3.7V
VBATT = 3.7V
VACIN
(5V/Div)
VACIN
(5V/Div)
V CHG_S
(2V/Div)
V CHG_S
(2V/Div)
VBATT
(5V/Div)
VBATT
(5V/Div)
I CHG_S
(1A/Div)
I CHG_S
(1A/Div)
Time (250us/Div)
Time (250us/Div)
ACIN OVP
ACIN OVP
VACIN
(10V/Div)
VACIN
(10V/Div)
VBATT
(5V/Div)
VBATT
(5V/Div)
V CHG_S
(5V/Div)
V CHG_S
(5V/Div)
I CHG_S
(1A/Div)
VACIN = 0V to 10V, VBATT = 3.7V
Time (1ms/Div)
DS9515-01 April 2011
I CHG_S
(1A/Div)
VACIN = 5V to 8V to 5V, VBATT = 3.7V
Time (1ms/Div)
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RT9515
Application Information
Automatically Power Source Selection
resistor or adding two external resistors. (see Figure 2.)
The RT9515 is a battery charger IC which is designed for
Li-ion Battery with 4.21V rated voltage.
The capacitor should be placed close to TS(Pin 9) and
ACIN Mode : When the ACIN input voltage is higher than
the UVP voltage level (3V) and lower than OVP voltage
level (6.5V), the RT9515 will turn on ACIN P-MOSFET.
connected to the ground plane. The capacitance value
(0.1uF to 10uF) should be selected according to the quality
of PCB layout. It is recommended to use 10uF if the layout
is poor to prevent noise.
Sleep Mode : The RT9515 will enter Sleep Mode when
ACIN input voltage are removed. This feature provides low
V BATT
+
leakage current from the battery during the absence of
input supply.
A
ITS
NTC
ACIN Over Voltage Protection
The ACIN input voltage is monitored by an internal OVP
comparator. The comparator has an accurate reference of
2.5V from the band-gap reference. The OVP threshold is
set by the internal resistive. The protection threshold is
set to 6.5V. When the input voltage exceeds the threshold,
the comparator outputs a logic signal to turn off the power
P-MOSFET to prevent the high input voltage from damaging
the electronics in the handheld system. When the input
over oltage condition is removed (ACIN < 6V), the
Battery
0.1uF to 10uF
VTS = ITS u RNTC
Turn off when VTS t 2.5V or VTS d 0.5V
Figure 1. Temperature Sensing Configuration
V BATT
+
comparator re-enables the output by running through the
soft-start.
A
ITS
Battery Temperature Monitoring
The RT9515 continuously monitors battery temperature
by measuring the voltage between the TS and GND pins.
NTC
RT9515 compares the voltage on the TS pin against the
internal VTS_HIGH and VTS_LOW thresholds to determine
if charging is allowed.
TS
Temperature
Sense
R T1
Battery
R T2
The RT9515 has an internal current source to provide the
bias for the most common 10kΩ negative-temperature
coefficient thermal resistor (NTC) (see Figure 1). The
TS
Temperature
Sense
0.1uF to 10uF
RT2 u (RT1 + RNTC )
RT1 + RT2 + RNTC
Turn off when VTS t 2.5V or VTS d 0.5V
VTS = ITS
Figure 2. Temperature Sensing Circuit
When the temperature outside the VTS_HIGH and
VTS_LOW thresholds is detected, the device will
immediately stop the charge. The RT9515 stops charge
Fast-Charge Current Setting
and keep monitoring the battery temperature when the
The RT9515 offers ISETA pin to determine the ACIN charge
current from 100mA to 1.2A. The charge current can be
temperature sense input voltage is back to the threshold
calculated as following equation.
between VTS_HIGH and VTS_LOW, the charger will be
resumed. Charge is resumed when the temperature returns
to the normal range. However, the user may modify
thresholds by the negative-temperature coefficient thermal
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V
ICHG_F = K ISETA
RSET
DS9515-01 April 2011
RT9515
The parameter K = 300 ; VISETA = 2.5V. RSET is the resistor
connected between the ISETA and GND.
Charge State
ACIN
1200
CHG_S
PGOOD
Charge
ON
ON
Charge done
OFF
ON
Charge Current (mA)
1000
Temperature Regulation and Thermal Protection
800
In order to maximize the charge rate, the RT9515 features
a junction temperature regulation loop. If the power
600
dissipation of the IC results in a junction temperature
400
greater than the thermal regulation threshold (125°C), the
RT9515 throttles back on the charge current in order to
200
0
0.5
1.5
2.5
3.5
4.5
5.5
6.5
7.5
8.5
9.5
(k)
RSET
SETA(kΩ)
Figure 3. Charge Current Setting
maintain a junction temperature around the thermal
regulation threshold (125°C). The RT9515 monitors the
junction temperature, TJ, of the die and disconnects the
battery from the input if TJ exceeds 125°C. This operation
continues until junction temperature falls below thermal
regulation threshold (125°C) by the hysteresis level. This
feature prevents the chip from damaging.
Pre- Charge Current Setting
During a charge cycle if the battery voltage is below the
VPRECH threshold, the RT9515 applies a pre-charge mode
Selecting the Input and Output Capacitors
In most applications, the most important is the high-
to the battery. This feature revives deeply discharged cells
and protects battery life. The RT9515 internally determines
the pre-charge rate as 10% of the fast-charge current.
frequency decoupling capacitor on the input of the RT9515.
A 1uF ceramic capacitor, placed in close proximity to input
pin and GND pin is recommended. In some applications
depending on the power supply characteristics and cable
Battery Voltage Regulation
pin. Once the battery voltage level closes to the VREG
length, it may be necessary to add an additional 10uF
ceramic capacitor to the input. The RT9515 requires a
small output capacitor for loop stability. A 1uF ceramic
threshold, the RT9515 voltage enters constant phase and
capacitor placed between the BATT pin and GND is typically
the charging current begins to taper down. When battery
sufficient.
The RT9515 monitors the battery voltage through the BATT
voltage is over the VREG threshold, the RT9515 will stop
charge and keep to monitor the battery voltage. However,
when the battery voltage decreases 100mV below the
VREG, it will be recharged to keep the battery voltage.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum operation junction temperature. The maximum
power dissipation depends on the thermal resistance of
Charge Status Outputs
The open-drain CHG_S and PGOOD outputs indicate
various charger operations as shown in the following table.
These status pins can be used to drive LEDs or
communicate to the host processor. Note that ON
indicates the open-drain transistor is turned on and LED
is bright.
DS9515-01 April 2011
IC package, PCB layout, the rate of surroundings airflow
and temperature difference between junction to ambient.
The maximum power dissipation can be calculated by
following formula :
PD(MAX) = ( TJ(MAX) - TA ) / θJA
Where T J(MAX) is the maximum operation junction
temperature 125°C, TA is the ambient temperature and the
θJA is the junction to ambient thermal resistance.
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RT9515
For recommended operating conditions specification,
` Connect the GND and Exposed Pad to a strong ground
where TJ(MAX) is the maximum junction temperature of the
die (125°C) and TA is the ambient temperature. The junction
to ambient thermal resistance θJA is layout dependent.
plane for maximum thermal dissipation and noise
For WDFN-10L 3x3 packages, the thermal resistance θJA
is 60°C/W on the standard JEDEC 51-7 four layers thermal
test board. The maximum power dissipation at TA = 25°C
protection.
` The TS's capacitor should be placed close to TS (Pin 9)
and connected to ground plane. If the PCB layout is
poor, it is recommended to use a 10uF at C2 to prevent
noise.
can be calculated by following formula :
The capacitor should be
placed close to IC pin and
connected to ground plane.
PD(MAX) = (125°C − 25°C) / (60°C/W) = 1.667W for
WDFN-10L 3x3 packages
of derating curves allows the designer to see the effect of
rising ambient temperature on the maximum power
allowed.
Maximum Power Dissipation (W)
1.8
Four Layers PCB
1.6
C1
C3
ACIN
1
10
BATT
NC
2
9
TS
CHG_S
3
8
EN
PGOOD
4
7
NC
GND
5
9
The maximum power dissipation depends on operating
ambient temperature for fixed T J(MAX) and thermal
resistance θJA. For WDFN-10L 3x3 package, the Figure 4
ISETA
GND
1.2
The TS's capacitor should be
placed close to TS(Pin 9) and
connected to ground plane.
RSETA
GND
The GND should be connected to a
strong ground plane for heat sinking
and noise protection.
1.4
Battery
C2
The connection of R SET should be
isolated from other noisy traces.
The short wire is recommended to
prevent EMI and noise coupling.
WDFN-10L 3x3
1.0
Figure 5. PCB Layout Guide
0.8
0.6
0.4
0.2
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 4. Derating Curves for RT9515 Package
Layout Considerations
For the best performance of the RT9515, the following
PCB layout guidelines must be strictly followed.
` Place the input and output capacitors as close as
possible to the input and output pins respectively for
good filtering.
` Keep the main power traces as wide and short as
possible.
` The connection of RSETA should be isolated from other
noisy traces. The short wire is recommended to prevent
EMI and noise coupling.
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DS9515-01 April 2011
RT9515
Outline Dimension
D2
D
L
E
E2
1
e
SEE DETAIL A
2
b
2
1
DETAIL A
Pin #1 ID and Tie Bar Mark Options
A
A1
1
A3
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.180
0.300
0.007
0.012
D
2.950
3.050
0.116
0.120
D2
2.300
2.650
0.091
0.104
E
2.950
3.050
0.116
0.120
E2
1.500
1.750
0.059
0.069
e
L
0.500
0.350
0.020
0.450
0.014
0.018
W-Type 10L DFN 3x3 Package
Richtek Technology Corporation
Richtek Technology Corporation
Headquarter
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
5F, No. 95, Minchiuan Road, Hsintien City
Hsinchu, Taiwan, R.O.C.
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)86672399 Fax: (8862)86672377
Email: marketing@richtek.com
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
DS9515-01 April 2011
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