R1213K Series
2.5 A PWM Step-up DC/DC Converter
NO.EA-278-180731
OUTLINE
The R1213K is a low supply current PWM step-up DC/DC converter capable of providing an output current up
to 2.5 A. Internally, the device consists of an Nch MOSFET driver, an oscillator, a PWM comparator, a voltage
reference unit, an error amplifier, a soft-start circuit, an under voltage lockout circuit (UVLO), a thermal
shutdown protection circuit, an overcurrent protection circuit and an latch-type protection circuit.
The R1213K requires minimal external component count. By simply using an inductor, resistors, capacitors
and a diode, a high-efficiency step-up DC/DC converter can be easily configured.
The R1213K can adjust the output voltage, the soft-start time, the phase compensation using the external
resistors and capacitors.
The R1213K has a shutdown control function which can be activated by a protection circuit to turn off the
external Pch MOSFET for breaking the current path between the input and output.
The R1213K provides an overcurrent protection circuit, a latch-type protection circuit, a thermal shutdown
protection circuit and an UVLO circuit. The overcurrent protection circuit limits the LX peak current and a latchtype protection circuit latches the Nch MOSFET off to stop the operation of the DC/DC converter if the output
voltage drop due to overcurrent continues more than the protection delay time.
The R1213K is offered in a 12-pin DFN(PLP)2730-12 package.
FEATURES
•
•
•
•
•
•
•
•
Input Voltage Range (Maximum Rating) ················ 2.3 V to 5.5 V (6.5 V)
Supply Current ················································ Typ. 550 µA (non-switching)
Supply Current ················································ Typ. 3 mA (switching)
Standby Current··············································· Max. 1.5 µA (CE = “L”)
Output Voltage Range ······································· 3.0 V to 15.0 V, Externally Adjustable (VFB = 0.8 V)
Feedback Voltage Accuracy ······························· ±8 mV
Feedback Voltage Temperature Coefficient ············ ±50 ppm/°C
Output Current················································· 1.0 A: VIN = 3.3 V, VOUT = 3.8 V
500 mA: VIN = 2.3 V, VOUT = 5.0 V
250 mA: VIN = 2.7 V, VOUT = 9.6 V
150 mA: VIN = 3.0 V, VOUT = 15 V
•
•
•
•
Nch ON Resistance ·········································· Typ. 0.07 Ω
Shutdown Control Function ································ Activated by the external Pch MOSFET
Thermal Shutdown Circuit ·································· Activated at 150°C (Hys.= 40°C)
Overcurrent Protection Circuit ····························· Activated at Typ. 3.0 A
1
R1213K
NO.EA-278-180731
•
•
•
•
•
•
•
•
Latch-type Protection Circuit ······························· Protection Delay Time: Typ. 32 ms
FLAG Output Function ······································ Activated at ”H”
UVLO Detector Threshold ·································· Typ. 2.0 V
Oscillator Frequency ········································· Typ. 1.0 MHz
Maximum Duty Cycle ········································ Min. 85%, Typ. 90%
Soft-start Time ················································· Set by the SS Pin
Phase Compensation ········································ Set by the AMPOUT Pin
Package ························································· DFN(PLP)2730-12
APPLICATION
•
•
•
•
Flash LEDs
Data Cards
DSCs
LCD Source Bias Supplies
SELECTION GUIDE
The R1213K offers users to select the output voltage type matched to their set output voltage. Selecting
the matched output voltage type can ensure high-speed transient response and stability.
Selection Guide
Product Name
Package
Quantity per Reel
Pb Free
Halogen Free
R1213K001∗-TR
DFN(PLP)2730-12
5,000 pcs
Yes
Yes
∗: Specify the output voltage type.
A: Low Output Voltage Type (VOUT: 3.0 V to 6.0 V)
B: High Output Voltage Type (VOUT: 6.0 V to 15 V)
2
R1213K
NO.EA-278-180731
BLOCK DIAGRAMS
VFB
Thermal
Shutdown
Err. Amp.
+
–
Vref
SS
VIN
AMPOUT
Lx
UVLO
Current
Sense
PWM Comp.
+
–
Switch
Control
Q
R
S
Soft Start
Timer
Oscillator
UVLO
TEST
Current
Protect
Slope Compensation
FLAG
CE
+
CE
FLAG
GND
R1213K Block Diagram
3
R1213K
NO.EA-278-180731
PIN DESCRIPTION
Top View
12 11 10
9
8
Bottom View
7
7
8
9
10 11 12
∗
1
2
3
4
5
6
6
5
4
3
2
1
DFN(PLP)2730-12 Pin Configuration
DFN(PLP)2730-12 Pin Description
Pin No
Symbol
Pin Description
1
AMPOUT
2
VFB
Feedback Voltage Pin
3
CE
Chip Enable Pin, Active-high
4
GND
Ground Pin(1)
5
GND
Ground Pin(1)
6
GND
Ground Pin(1)
7
TEST
TEST Pin(2)
8
LX
Switching Pin(1)
9
LX
Switching Pin(1)
10
VIN
Input Voltage Pin
11
FLAG
12
SS
Amplifier Output Pin
Shutdown Control Pin(3)
Soft-start Pin
∗ The tab on the bottom of the package enhances thermal performance and is electrically connected to GND
(substrate level). It is recommended that the tab be connected to the ground plane on the board, or otherwise
be left floating.
(1)
(2)
(3)
4
The No.4, No.5 and No.6 pins must be connected together. The No.8 and No.9 pins must be connected together.
The TEST pin must be connected to GND or left floating.
The FLAG pin should be left floating when it is not used.
R1213K
NO.EA-278-180731
ABSOLUTE MAXIMAM RATINGS
Absolute Maximum Ratings
(GND = 0 V)
Symbol
VIN
VAMPOUT
Item
Rating
Unit
−0.3 to 6.5
V
−0.3 to VIN + 0.3
V
VIN Pin Voltage
AMPOUT Pin Voltage
VCE
CE Pin Voltage
−0.3 to 6.5
V
VFB
VFB Pin Voltage
−0.3 to 6.5
V
VSS
SS Pin Voltage
−0.3 to VIN + 0.3
V
VFLG
FLAG Pin Voltage
−0.3 to VIN + 0.3
V
VTST
TEST Pin Voltage
−0.3 to VIN + 0.3
V
VLX
LX Pin Voltage
−0.3 to 18.0
V
3100
mW
( 1)
PD
Power Dissipation (DFN(PLP)2730-12, JEDEC STD.
51-7 Test Land Pattern)
Tj
Junction Temperature Range
−40 to 125
°C
Tstg
Storage Temperature Range
−55 to 125
°C
ABSOLUTE MAXIMUM RATINGS
Electronic and mechanical stress momentarily exceeded absolute maximum ratings may cause the permanent
damages and may degrade the life time and safety for both device and system using the device in the field. The
functional operation at or over these absolute maximum ratings are not assured.
■ RECOMMENDED OPERATING CONDITIONS
Symbol
Item
Rating
Unit
VIN
Input Voltage
2.3 to 5.5
V
Ta
Operating Temperature Range
−40 to 85
°C
RECOMMENDED OPERATING CONDITIONS
All of electronic equipment should be designed that the mounted semiconductor devices operate within the
recommended operating conditions. The semiconductor devices cannot operate normally over the recommended
operating conditions, even if when they are used over such ratings by momentary electronic noise or surge. And the
semiconductor devices may receive serious damage when they continue to operate over the recommended operating
conditions.
(1)
Refer to POWER DISSIPATION for detailed information.
5
R1213K
NO.EA-278-180731
ELECTRICAL CHARACTERISTICS
Electrical Characteristics
Symbol
Istandby
Item
Conditions
Min.
Typ.
Max.
Unit
Standby Current
VIN = 5.5 V, VCE = 0 V
0.1
1.5
µA
IDD1
Supply Current 1 (non-switching)
VIN = 5.5 V, VFB = 0.9 V
550
800
µA
IDD2
Supply Current 2
VIN = 5.5 V, VFB = 0 V
3.0
4.5
mA
VUVLO1
UVLO Detector Threshold
VFB = 0 V
2.0
2.1
V
VUVLO2
UVLO Released Voltage
VFB = 0 V
VUVLO1
+0.12
2.25
V
1.9
R1213K001A
3.0
6.0
R1213K001B
6.0
15
VOUT
Output Voltage Range
VFB
Feedback Voltage Accuracy
VIN = 3.6 V
Feedback Voltage Temperature
Coefficient
−40°C ≤ Ta ≤ 85°C
±50
ILXLEAK
LX Leakage Current
VLX = 16 V, VCE = 0 V
0.01
IFBH
VFB ”H” Input Current
VIN = 5.5 V, VFB = 5.5 V
IFBL
VFB ”L” Input Current
VIN = 5.5 V, VFB = 0 V
−0.15
ICEL
VCEL Input Current
VIN = 5.5 V, VCE = 0 V
−0.2
RCE
CE Pull-down Resistance
ISS
Soft-start Current
VIN = 3.6 V
VCEH
CE Input Voltage ”H”
VIN = 5.5 V
VCEL
CE Input Voltage ”L”
VIN = 2.3 V
fosc
Oscillator Frequency
VIN = 3.6 V, VFB = 0 V
0.85
Maxduty
Maximum Duty Cycle
VIN = 3.6 V, VFB = 0 V
85
TTSD
Thermal Shutdown Temperature
Junction Temperature
150
°C
TTSR
Thermal Shutdown Released
Temperature
Junction Temperature
110
°C
gm
Trans-conductance( 1)
VIN = 3.6 V
220
µS
LX Current Limit
VIN = 3.6 V
∆VFB
/∆Ta
ILXLIM
0.792
0.8
0.808
2.0
µA
0.15
µA
µA
0.2
6
µA
1000
kΩ
10
µA
V
0.3
V
1.00
1.15
MHz
90
95
%
3.0
3.8
A
Nch ON Resistance
VIN = 3.6 V
0.07
Ω
tprot
Latch-type Protection Delay Time
VIN = 3.6 V
32
ms
(1)
Inrush Current
(2)
1.5
Guaranteed by design engineering, not mass production tested.
Guaranteed by design engineering when the external Pch MOSFET is connected to the FLAG pin. Refer to the
recommended components at APPLICATION INFORMATION and TECHNICAL NOTES.
(2)
V
ppm
/°C
1.5
2.5
V
RON
IRUSH
(1)
(Ta = 25°C)
A
R1213K
NO.EA-278-180731
■ APPLICATION INFORMATION
Typical Application
External Pch MOSFET is Connected for Breaking the Current Path between VIN – VOUT (VOUT < 13 V)
D1
L1
LX LX
VIN
CIN
EN control
1µF
FLAG
CE
R2
COUT
VOUT
VFB
SS
CSS
AMPOUT
CCOMP RCOMP
GND
GND
GND
R1
TEST
Notes: The GND pins and also the LX pins must be mutually short-circuited right near the ground plane on
the board. The TEST pin must be connected to the ground plane on the board or be left floating.
External Pch MOSFET is NOT Connected for Breaking the Current Path between VIN – VOUT (VOUT < 13 V)
D1
L1
VIN
CIN
EN control
LX LX
FLAG
CE
R2
COUT
VOUT
VFB
SS
GND
CSS
AMPOUT
CCOMP RCOMP
R1
GND
GND
TEST
Notes: The GND pins and also the LX pins must be mutually short-circuited right near the ground plane on
the board. The TEST pin must be connected to the ground plane on the board or be left floating. The
FLAG pin must be left floating.
7
R1213K
NO.EA-278-180731
External Pch MOSFET is Connected for Breaking the Current Path between VIN – VOUT (VOUT ≥ 13 V)
RSNB CSNB
L1
1µF
LX LX
VIN
CIN
EN control
D1
FLAG
CE
R2
COUT
VOUT
VFB
SS
CSS
AMPOUT
CCOMP RCOMP
GND
GND
GND
R1
TEST
Notes: The GND pins and also the LX pins must be mutually short-circuited right near the ground plane on
the board. The TEST pin must be connected to the ground plane on the board or be left floating.
The snubber circuit must be added for preventing spike noise on the LX pin.
External Pch MOSFET is NOT Connected for Breaking the Current Path between VIN – VOUT (VOUT ≥ 13 V)
RSNB CSNB
L1
VIN
CIN
EN control
D1
LX LX
FLAG
CE
R2
COUT
VOUT
VFB
SS
CSS
AMPOUT
CCOMP RCOMP
GND
GND
GND
R1
TEST
Notes: The GND pins and also the LX pins must be mutually short-circuited right near the ground plane on
the board. The TEST pin must be connected to the ground plane on the board or be left floating. The FLAG
pin must be left floating. The snubber circuit must be added for preventing spike noise on the LX pin.
8
R1213K
NO.EA-278-180731
Recommended Components
CIN
COUT
D1
L1(1)
Pch.MOSFET
VIN
Cap.
Spec.
Part Name
Manufacturer
All
10 µF
6.3 V
C2012JB0J106M
TDK
VOUT
Cap.
Spec.
Part Name
Manufacturer
≤5V
10 µF
6.3 V
C2012JB0J106M
TDK
≤ 10 V
10 µF
16 V
C2012X5R1C106K
TDK
all
10 µF
25 V
C3216X5R1E106K
TDK
all
10 µF
25 V
TMK325BJ106MN
Taiyo Yuden
VOUT
Spec.
Part Name
Manufacturer
all
40 V, 3 A
CMS16
TOSHIBA
all
40 V, 3 A
RB056L-40
ROHM
VOUT
Ind.
3.0V ≤ VOUT ≤ 4.5V
2.2
µH
4.5V < VOUT ≤ 12V
4.7
µH
12V < VOUT ≤ 15V
6.8
µH
Spec.
Part Name
Manufacturer
2.2 A
SPM3012T-2R2N
TDK
2.7 A
SPM4012T-2R2N
TDK
3.5 A
NR5040T2R2N
Taiyo Yuden
1.7 A
SPM4012T-4R7N
TDK
3.1 A
NR5040T4R7N
Taiyo Yuden
1.4 A
VLF5014ST-6R8N
TDK
2.8 A
RLF7030T-6R8N
TDK
3.7 A
NR8040T6R8N
Taiyo Yuden
VOUT
Spec. (IDS, VDS, VGS)
Part Name
Manufacturer
all
4.5 A, −30 V, ±20 V
UPA1914
Renesas
(1)
It is recommended that the rated current of the inductor be higher than the LX limit current. Performing the current
limitation outside of the R1213K requires the use of small components.
9
R1213K
NO.EA-278-180731
•
Selection of Resistors and Capacitors for Phase Compensation
The R1213x requires an external phase compensation on the feedback loop for output voltage control to
prevent the large output ripple, the unstable operation and the deterioration of device efficiency. Connect a
resistor (RCOMP) and a capacitor (CCOMP) between the AMPOUT and GND pins.
RCOMP and CCOMP can be calculated as follows:
[R1213K001A]
RCOMP = 90 x VIN x VOUT x COUT / (L x IOUTMAX)
CCOMP = 30 x VOUT x L x IOUTMAX / (VIN 2 x RCOMP)
[R1213K001B]
RCOMP = 45 x VIN x VOUT x COUT / (L x IOUTMAX)
CCOMP = 30 x VOUT x L x IOUTMAX / (VIN 2 x RCOMP)
The appropriate values for RCOMP and CCOMP vary depending on the peripheral components and circuit
board. Determine the appropriate values for RCOMP and CCOMP according to the transient response.
•
VIN (V)
VOUT (V)
IOUTMAX (mA)
CIN (µF)
COUT (µF)
L1 (µH)
D1
RCOMP (kΩ)
CCOMP (nF)
3.3
3.8
1200
10
20
2.2
3A
8.2
3.3
3.3
5
800
10
20
4.7
3A
8.2
6.8
3.3
12
250
10
20
4.7
3A
27
1.8
5.0
15
650
10
20
6.8
3A
15
5.1
Output Voltage Setting
The output voltage can be calculated by the values of resistors (R1 and R2) as follows:
Output Voltage = VFB x (R1 + R2) / R1
(VFB = 0.8 V)
Notes: Set the sum of R1 and R2 to be 200 kΩ or less.
•
Soft-start Time Setting
The soft-start time can be adjusted by a capacitor (CSS) between the SS and GND pins.
The soft-start time can be calculated as follows:
Soft-start time = CSS x VFB / ISS
= 8 x CSS x 104 [sec]
(VFB = 0.8 V, ISS = 10 µA)
10
R1213K
NO.EA-278-180731
•
Operation of Step-Up Dc/Dc Converter and Output Current
IL2
IOUT
Diode
L
VIN
VOUT
IL1
Nch Tr.
CL
GND
Basic Circuit
Current (IL) Flowing Through Inductor (L)
IL
ILmax
IL
ILmax
ILmin
ILmin
topen
t
ton
toff
T=1/fosc
Discontinuous Inductor Current Mode
Iconst
t
ton
toff
T=1/fosc
Continuous Inductor Current Mode
The PWM control type of the step-up DC/DC converter has two operation modes characterized by the
continuity of inductor current: discontinuous inductor current mode and continuous inductor current mode.
When an Nch transistor is in On-state, the voltage to be applied to the inductor (L) is described as VIN. An
increase in the inductor current (IL1) can be written as follows:
IL1 = VIN x ton / L ............................................................................................................................ Formula 1
In the step-up DC/DC converter circuit, the energy accumulated during the On-state is transferred into the
capacitor even in the Off-state. A decrease in the inductor current (IL2) can be written as follows:
IL2 = (VOUT − VIN) x topen / L ............................................................................................................ Formula 2
11
R1213K
NO.EA-278-180731
In the PWM control, IL1 and IL2 become continuous when topen = toff, which is called continuous inductor
current mode.
When the device is in continuous inductor current mode and operates in steady-state conditions, the variations
of IL1 and IL2 are same:
VIN x ton / L = (VOUT - VIN) x toff / L .................................................................................................... Formula 3
Therefore, the duty cycle in continuous inductor current mode is:
duty (%)= ton / (ton + toff) = (VOUT − VIN) / VOUT................................................................................ Formula 4
When topen = toff, the average of IL1 is:
IL1 (Ave.) = VIN x ton / (2 x L) ........................................................................................................... Formula 5
If the input voltage (VIN) is equal to the output voltage (VOUT), the output current (IOUT) is:
IOUT = VIN2 x ton / (2 x L x VOUT)......................................................................................................... Formula 6
If IOUT is larger than Formula 6, the device switches to continuous inductor current mode
The LX peak current flowing through L (ILmax) is:
ILmax = IOUT x VOUT / VIN + VIN x ton / (2 x L ) ................................................................................... Formula 7
ILmax = IOUT x VOUT / VIN + VIN x T x (VOUT − VIN) / (2 x L x VOUT) ...................................................... Formula 8
As a result, ILmax becomes larger compared to IOUT. The overcurrent protection circuit operates if the ILmax
becomes more than the LX current limit. When considering the input and output conditions or selecting the
external components, please pay attention to ILmax.
Notes: The above calculations are based on the ideal operation of the device. They do not include the losses
caused by the external components or Nch transistor. The actual maximum output current will be 50% to 80%
of the above calculation results. Especially, if IL is large or VIN is low, it may cause the switching losses.
12
R1213K
NO.EA-278-180731
TECHNICAL NOTES
The performance of a power source circuit using this device is highly dependent on a peripheral circuit. A
peripheral component or the device mounted on PCB should not exceed a rated voltage, a rated current or a
rated power. When designing a peripheral circuit, please be fully aware of the following points.
•
Ensure that the VIN and GND lines are firmly connected. A large switching current flows through the VIN
and GND lines. If their impedance is too high, noise pickup or unstable operation may result.
•
When an Nch MOSFET driver is turned off, the inductor may generate a spike-shaped high voltage.
Use a high-break-down-voltage capacitor (COUT) and a high-break-down-voltage diode that are 1.5
times or more than the set output voltage.
•
Choose a schottky diode (D1) that has low forward voltage, low reverse current, and is fast in switching
speed.
•
Use an inductor that has a low DC resistance, has an enough tolerable current and is less likely to
cause magnetic saturation.
•
The FLAG pin (Shutdown Control Pin) turns off the external Pch MOSFET to break the current path
between VIN and VOUT during standby, UVLO, thermal shutdown and latch-type protection. Place a
capacitor of 1 µF between the source of the external Pch MOSFET and GND to protect the external
Pch MOSFET from overvoltage caused by the inductor current.
During the soft-start, the FLAG pin turns on or off the external Pch MOSFET synchronizing with the
switching of the Nch MOSFET to prevent the inrush current. Select the external Pch MOSFET with fast
switching speed (Approx. 100 ns) and small gate capacity (3 nF or less).
•
The spike noise of LX should not exceed the absolute maximum rating. The spike noise of LX may
exceed the absolute maximum ratings under VOUT ≥ 13 V. To reduce the spike noise of LX, place a
snubber circuit (RSNB and CSNB are connected in series) parallel to the diode (D1). A snubber circuit may
also be required under VOUT < 13 V if the spike noise of LX is large. It is recommended that a capacitor
(CSNB) be 1100 pF and a resistor (RSNB) be 0.68 Ω. The appropriate values for CSNB and RSNB vary
significantly depending on the circuit board and affect the device efficiency. Actual circuit board testing
is required.
13
R1213K
NO.EA-278-180731
•
Latch-type protection circuit latches the Nch MOSFET off to stop the operation of the DC/DC converter
if the output voltage drop due to overcurrent continues more than the protection delay time. When the
latch-type protection circuit operates, the FLAG pin outputs “H” and turns the external Pch MOSFET off
to break the current path between VIN and VOUT.
The protection delay time is set to typically 32 ms. If the output voltage returns to normal during the
protection delay time, the internal timer will be reset.
To release the latch-type protection, set the CE pin “H” or make the power supply voltage lower than
the UVLO detector threshold.
•
Connect the TEST pin to GND or otherwise leave it floating.
•
Connect the FLAG pin to the external Pch MOSFET gate only.
•
To prevent inrush current, connect the SS pin to a capacitor (CSS) only.
•
The tab on the bottom of the package enhances thermal performance and is electrically connected to
GND (substrate level). It is recommended that the tab be connected to the ground plane on the board,
or otherwise be left floating. To enhance the thermal performance of multilayer circuit board, provide a
thermal via under the tab on the bottom of the package.
•
In Fig. A and Fig. B, the current paths on the boost DC/DC converter are shown. The current paths
when the MOSFET turns on are shown in Fig. A, and the current paths when the MOSFET turns off are
shown in Fig. B. The pointed parts with red arrows in Fig. B are where the current flows only when the
MOSFET turns on, or off. The parasitic impedance, inductance, or parasitic capacitance of these parts
have some impact on the stability of DC/DC converter, and may cause a noise generation. Therefore
the parasitic impedance, capacitance, inductance must be as small as possible. Furthermore, the
current paths shown in Fig. A and Fig. B must be as short as possible and as wide as possible.
Figure A. MOSFET-ON (Boost)
14
Figure B. MOSFET-OFF (Boost)
R1213K
NO.EA-278-180731
•
PCB Layout
R1213K001A/B (PKG: DFN(PLP)2730-12pin)
Typical Board Layout – Top Layer
Typical Board Layout – Back Layer
Note: R2 patterns are the layout for 2 serial resistance chips, RT1 and RT2 to set preferred value easier.
15
R1213K
NO.EA-278-180731
TYPICAL CHARACTERISTICS
Note: Typical Characteristics are intended to be used as reference data; they are not guaranteed.
1) Output Voltage vs. Output Current (Ta = 25°C)
VOUT = 3.0 V
VOUT = 5.0 V
3.03
5.06
VIN=2.3V
VIN=2.7V
VIN=2.3V
VIN=3.0V
VIN=3.3V
VIN=4.0V
VIN=4.5V
5.04
Output Voltage (V)
Output Voltage(V)
3.02
3.01
3.00
2.99
2.98
5.02
5.00
4.98
4.96
2.97
4.94
0
400
800
1200 1600 2000 2400 2800
400
0
800
Output Currnet (mA)
VOUT = 12 V
VOUT = 15 V
15.20
12.12
Output Voltage (V)
12.04
12.00
11.96
11.92
VIN = 2.5V
VIN = 3.3V
VIN = 4.0V
VIN = 5.0V
VIN = 5.5V
15.15
Output Voltage (V)
VIN=3.0V
VIN=3.3V
VIN=4.0V
VIN=5.0V
VIN=5.5V
12.08
15.10
15.05
15.00
14.95
14.90
11.88
0
200
400
600
800
Output Currnet (mA)
16
1200 1600 2000 2400 2800
Output Currnet (mA)
1000
1200
0
200
400
600
Output Current (mA)
800
1000
R1213K
NO.EA-278-180731
VOUT = 5.0 V
100
100
90
90
80
80
70
70
Efficiency (%)
Efficiency (%)
2) Efficiency vs. Output Current (Ta = 25°C)
VOUT = 3.0 V
60
50
40
30
20
40
30
VIN=2.3V
VIN=3.0V
VIN=3.3V
VIN=4.0V
VIN=4.5V
20
VIN=2.3V
10
60
50
10
VIN=2.7V
0
0
10
1
100
1000
10000
1
Output Currnet (mA)
90
80
80
70
70
Efficiency (%)
Efficiency (%)
100
90
60
50
VIN=3.0V
VIN=3.3V
VIN=4.0V
VIN=5.0V
VIN=5.5V
20
10
60
50
VIN = 2.5V
VIN = 3.3V
VIN = 4.0V
VIN = 5.0V
VIN = 5.5V
40
30
20
10
0
0
1
10
100
1000
1
10000
10
Output Currnet (mA)
100
1000
10000
Output Current (mA)
3) Standby Current vs. Temperature
4) Supply Current 1 vs. Temperature
0.5
800
Supply Current 1(uA)
0.4
Standby Current (uA)
10000
VOUT = 15 V
100
30
1000
Output Currnet (mA)
VOUT = 12 V
40
100
10
0.3
0.2
0.1
0
-0.1
700
600
500
400
300
-50
-25
0
25
50
Temperature (ﾟC)
75
100
-50
-25
0
25
50
75
100
Temperature (ﾟC)
17
R1213K
NO.EA-278-180731
5) Supply Current 2 vs. Temperature
6) Frequency vs. Temperature
1150
1100
4.0
Frequency (kHz)
Supply Current 2 (mA)
4.5
3.5
3.0
2.5
1050
1000
950
900
2.0
850
-50
-25
0
25
50
75
100
-50
-25
Temperature (ﾟC)
96
0.809
94
0.806
FB Voltage (V)
Maxduty (%)
50
75
100
75
100
8) FB Voltage vs. Temperature
92
90
88
0.803
0.800
0.797
0.794
86
0.791
84
-50
-25
0
25
50
75
-50
100
-25
0
25
50
Temperature (ﾟC)
Temperature (ﾟC)
9) CE “H” Input Voltage vs. Temperature
10) LX Limit Current vs. Temperature
3.6
1.5
1.3
3.4
Lx Limit Current (A)
CE "H" Voltage (V)
25
Temperature (ﾟC)
7) Maxduty vs. Temperature
1.1
0.9
0.7
3.2
3.0
2.8
0.5
0.3
2.6
-50
-25
0
25
50
Temperature Topt (ﾟC)
18
0
75
100
-50
-25
0
25
50
Temperature (ﾟC)
75
100
R1213K
NO.EA-278-180731
11) Protection Delay Time vs. Temperature
Protection Delay Time (ms)
40
38
36
34
32
30
28
-50
-25
0
25
50
75
100
Temperature (ﾟC)
12) Start-up Waveform (Ta = 25°C, CSS = 0.1 µF, External Pch MOSFET Connected between VIN – VOUT)
・VIN = 3.3 V, VOUT = 5.0 V, IOUT = 10 mA
・VIN = 3.3 V, VOUT = 5.0 V, IOUT = 500 mA
・VIN = 3.3 V, VOUT = 12 V, IOUT = 10 mA
・VIN = 3.3 V, VOUT = 12 V, IOUT = 200 mA
19
R1213K
NO.EA-278-180731
13) Load Transient Response Waveform (Ta = 25°C)
・VIN = 3.3 V, VOUT = 5.0 V, IOUT = 20 ⇔ 500 mA
L = 4.7 µH, COUT = 20 µF, RCOMP = 8.2 kΩ,
CCOMP = 6.8 nF
・VIN = 5.0 V, VOUT = 15.0 V, IOUT = 100 ⇔ 500 mA
L = 6.8 µH, COUT = 20 µF, RCOMP = 15 kΩ,
CCOMP = 5.1 nF
20
・VIN = 3.0 V, VOUT = 12 V, IOUT = 10 ⇔ 200 mA
L = 4.7 µH, COUT = 20 µF, RCOMP = 27 kΩ,
CCOMP = 1.8 nF
R1213K
NO.EA-278-180731
14) Output Voltage Waveform (Ta = 25°C)
・VIN = 3.3 V, VOUT = 5.0 V, IOUT = 500 mA
L = 4.7 µH, COUT = 20 µF
・VIN = 3.3 V, VOUT = 12 V, IOUT = 200 mA
L = 4.7 µH, COUT = 20 µF
・VIN = 5.0 V, VOUT = 15 V, IOUT = 500 mA
L = 6.8 µH, COUT = 20 µF
21
POWER DISSIPATION
DFN(PLP)2730-12
Ver. A
The power dissipation of the package is dependent on PCB material, layout, and environmental conditions.
The following measurement conditions are based on JEDEC STD. 51-7.
Measurement Conditions
Item
Measurement Conditions
Environment
Mounting on Board (Wind Velocity = 0 m/s)
Board Material
Glass Cloth Epoxy Plastic (Four-Layer Board)
Board Dimensions
76.2 mm × 114.3 mm × 0.8 mm
Copper Ratio
Outer Layer (First Layer): Less than 95% of 50 mm Square
Inner Layers (Second and Third Layers): Approx. 100% of 50 mm Square
Outer Layer (Fourth Layer): Approx. 100% of 50 mm Square
Through-holes
0.3 mm × 23 pcs
Measurement Result
Item
(Ta = 25°C, Tjmax = 125°C)
Measurement Result
Power Dissipation
3100 mW
Thermal Resistance (ja)
ja = 32°C/W
Thermal Characterization Parameter (ψjt)
ψjt = 8°C/W
ja: Junction-to-Ambient Thermal Resistance
ψjt: Junction-to-Top Thermal Characterization Parameter
Power Dissipation vs. Ambient Temperature
Measurement Board Pattern
i
PACKAGE DIMENSIONS
DFN(PLP)2730-12
Ver. A
B
7
2.700.05
0.50.05
6
0.250.05
1.700.05
0.575±0.025
INDEX
12
0.250.05
3.000.05
2.700.05
A
C 0.05
1
0.50
0.250.05
0.05 M AB
Bottom View
S
0.05 S
DFN(PLP)2730-12 Package Dimensions (Unit: mm)
*
∗The tab on the bottom of the package shown by blue circle is a substrate potential (GND). It is recommended that this
tab be connected to the ground plane on the board but it is possible to leave the tab floating.
i
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production without notice for reasons such as improvement. Therefore, before deciding to use the products, please
refer to Ricoh sales representatives for the latest information thereon.
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4. The technical information described in this document shows typical characteristics of and example application circuits
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5. The products listed in this document are intended and designed for use as general electronic components in standard
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April 1, 2012.
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