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R1243K001B-TR

R1243K001B-TR

  • 厂商:

    RICOH(理光)

  • 封装:

    DFN10

  • 描述:

    SWITCHING REGULATOR, CURRENT-MOD

  • 数据手册
  • 价格&库存
R1243K001B-TR 数据手册
R1243x Series 30 V Input 2 A Buck DC/DC Converter NO.EA-206-170608 OUTLINE The R1243x is a CMOS-based step-down DC/DC converter with internal Nch high-side Tr. (0.175 Ω), which can provide the maximum 2 A output current. Internally, the R1243x consists of an oscillator, a PWM control circuit, a reference voltage unit, an error amplifier, phase compensation circuits, a slope circuit, a soft-start circuit, protection circuits, internal voltage regulators and a switch for bootstrap circuit. A step-down DC/DC converter can be configured by only adding an inductor, resistors, a diode and capacitors to the R1243x. The R1243x is a current mode operating type DC/DC converter that does not require external current sense resistor. It has high-speed response time and is high efficiency and compatible with ceramic capacitors. The oscillator frequency of the R1243x001A/B/E is fixed to 1000 kHz. The oscillator frequency of the R1243x001C/D is fixed 330 kHz. The R1243x has a cycle-by-cycle peak current limit function, a short protection function, a thermal shutdown function and an UVLO as protection features. The R1243x001A/C/E has a latch protection with 2 ms delay time, the R1243x001B/D has a fold-back protection that keep operating during short condition with lower operating frequency and limiting the LX current. The R1243x has a built-in soft-start time (Typ. 0.4 ms). In addition to this, the soft-start time is adjustable by adding an external capacitor. The R1243x has the FLG pin, which mainly monitors the FB pin voltage and gives a flag output by the Nch open drain if the abnormal condition is detected. The R1243x is offered in 8-pin HSOP-8E and 10-pin DFN(PLP)2527-10 packages that can achieve high density mounting. FEATURES • • • • • • • • • • • • • • • • • • (1) Operating Voltage Range ...................................... 4.5 V to 30 V Standby Current .................................................... Max. 10 µA (VIN = 30 V, CE = L) Supply Current ....................................................... Typ. 0.7 mA (VIN = 30 V, VFB = 1.0 V) Output Voltage Range ........................................... 0.8 V to 18 V, Adjustable with external resistors Feedback Voltage .................................................. 0.5 V with 1.4% accuracy Output Current ....................................................... Max. 2 A(1) Peak Current Limiting ............................................ Typ. 3.8 A Internal Nch MOSFET Driver ................................. Typ. 175 mΩ Maximum Duty Cycle ............................................. Min. 85% Oscillator Frequency .............................................. R1243x001A/B/E: 1000 kHz, R1243x001C/D: 330 kHz Latch Type Protection ............................................ R1243x001A/C: Typ. 2 ms, R1243x001E: 0.08 ms Fold-back Type Protection ..................................... R1243x001B: 250 kHz, R1243x001D: 82.5 kH Internal Soft-start Time .......................................... Typ. 0.4 ms, TSS = Open External Soft-start Time ......................................... Typ. 12 ms, CSS = 0.1 µF Flag Output ............................................................ Typ. 0.25 ms, FLG “OFF” delay time UVLO Released Voltage........................................ Typ. 4.0 V Thermal Shutdown ................................................ Typ. 160°C, Hysteresis = 35°C Package ............................................................... HSOP-8E, DFN(PLP)2527-10 This is an approximate value, because output current depends on conditions and external parts. 1 R1243x NO.EA-206-170608 APPLICATIONS • • • • Digital Home Appliances Hand-held Communication Equipment: Cameras, VCRs, Camcorders Battery-powered Equipment Battery Charger SELECTION GUIDE The package type, the oscillator frequency (Fixed: 1000 kHz, 330 kHz) and the short-circuit protection type (Latch, Fold-back) are user-selectable options. Selection Guide Product Name R1243S001∗-E2-FE R1243K001∗-TR Package HSOP-8E DFN(PLP)2527-10 Quantity per Reel 1,000 pcs 5,000 pcs Pb Free Yes Yes ∗: Specify the oscillator frequency and the short-circuit protection type. (A) Fixed Frequency: 1000 kHz, Latch Type (2 ms) (B) Fixed Frequency: 1000 kHz, Fold-back Type (C) Fixed Frequency: 330 kHz, Latch Type (2 ms) (D) Fixed Frequency: 330 kHz, Fold-back Type (E) Fixed Frequency: 1000 kHz, Latch Type (2 ms), only for HSOP-8E 2 Halogen Free Yes Yes R1243x NO.EA-206-170608 BLOCK DIAGRAM VIN GND Thermal Shutdown UVLO CE 5V Regulator Regulator BST Set Pulse Shutdown Over/Under Voltage Detection O/U VD S Oscillator *1 D Maxduty Pulse FB LX R Reference + Soft Start Circuit TSS + 0.5V SS ("H" during Soft Start) Limit Latch Circuit(2msec/0.08msec) *1 Current Slope Circuit Reset Peak Current Limit Circuit SS Shutdown Shutdown O/U VD 3V + FLG OFF Delay (0.25msec) SS R1243x Block Diagram *1 Version A B C D E Oscillator Frequency 1000 kHz 1000 kHz 330 kHz 330 kHz 1000 kHz Short-circuit Protection Type Latch Type (2 ms) Fold-back Type Latch Type (2 ms) Fold-back Type Latch Type (0.08 ms) 3 R1243x NO.EA-206-170608 PIN DESCRIPTIONS Bottom View Top View 8 7 6 5 5 6 7 Top View 8 10 9 8 7 Bottom View 6 6 7 8 9 ∗ 1 2 3 4 4 3 2 HSOP-8E Pin Configuration ∗ 1 1 2 3 4 5 R1243K001x Pin Description Pin No Symbol 1 LX 2 LX 3 GND 4 FB 5 FLG 6 CE 7 TSS 8 BST 9 VIN 10 VIN (1) 4 5 4 3 2 DFN(PLP)2527-10 Pin Configuration ∗ The tab is substrate level (GND). It must be connected to the GND level. R1243S001x Pin Description Pin No Symbol 1 BST 2 VIN 3 LX 4 GND 5 FB 6 FLG 7 CE 8 TSS 10 Pin Description Bootstrap Pin Power Supply Pin LX Switching Pin Ground Pin Feedback Pin Flag Output Pin Chip Enable Pin, Active with “H” Soft-start Pin Pin Description LX Switching Pin LX Switching Pin Ground Pin Feedback Pin Flag Output Pin(1) Chip Enable Pin, Active with “H” Soft-start Pin Bootstrap Pin Power Supply Pin Power Supply Pin The FLG pin should be connected to GND or should be left floating when it is not used. 1 R1243x NO.EA-206-170608 INTERNAL EQUIVALENT CIRCUIT FOR EACH PIN BST Pin LX Pin Regulator VIN BST LX LX FB Pin FLG Pin Regulator FLG FB CE Pin TSS Pin Regulator VIN TSS CE 5 R1243x NO.EA-206-170608 ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings Symbol VIN (GND = 0 V) Parameter Rating Unit −0.3 V to 32 V V VLX −0.3 V to VLX + 6 V V Input Voltage VBST Boost Pin Voltage VLX LX Pin Voltage −0.3 V to VIN + 0.3 V VCE CE Pin Input Voltage −0.3 V to VIN + 0.3 V VFB VFB Pin Voltage −0.3 V to 6 V V VFLG FLG Pin Voltage −0.3 V to 6 V V VTSS TSS Pin Voltage −0.3 V to 6 V V (HSOP-8E) PD Power Dissipation(1) (DFN(PLP)2527-10) Standard 2900 Standard 910 High Wattage 1400 mW Tj Junction Temperature Range −40 to 125 ºC Tstg Storage Temperature Range −55 to 125 ºC ABSOLUTE MAXIMUM RATINGS Electronic and mechanical stress momentarily exceeded absolute maximum ratings may cause the permanent damages and may degrade the life time and safety for both device and system using the device in the field. The functional operation at or over these absolute maximum ratings are not assured. RECOMMENDED OPERATING CONDITIONS Recommended Operating Conditions Symbol Parameter Rating Unit VIN Operating Input Voltage 4.5 to 30 V Ta Operating Temperature Range −40 to 85 °C RECOMMENDED OPERATING CONDITIONS All of electronic equipment should be designed that the mounted semiconductor devices operate within the recommended operating conditions. The semiconductor devices cannot operate normally over the recommended operating conditions, even if when they are used over such conditions by momentary electronic noise or surge. And the semiconductor devices may receive serious damage when they continue to operate over the recommended operating conditions. (1) 6 Refer to POWER DISSIPATION for detailed information. R1243x NO.EA-206-170608 ELECTRICAL CHARACTERISTICS VIN = 12 V, unless otherwise noted. Electrical Characteristics Symbol Parameter Istandby Standby Current ISS Supply Current VUVLO1 VUVLO2 VUVLOHYS VFB (Ta = 25°C) Test Conditions/Comments Min. VIN = 30 V, VCE = 0 V VIN = 30 V, VFB = 1.0 V UVLO Detector Threshold UVLO Released Voltage UVLO Hysteresis Feedback Voltage Feedback Voltage ∆VFB/∆Ta Temperature Coefficient Oscillator Frequency (R1243x001A/B) fosc Oscillator Frequency (R1243x001C/D) Fold-back Frequency fFLB (R1243x001B/D) Falling Rising VUVLO2 − VUVLO1 Maxduty Oscillator Maximum Duty Cycle VIN = 6 V −40ºC ≤ Ta ≤ 85ºC V V V V ppm /ºC kHz 290 330 370 kHz VFB < 0.35 V, fosc Ratio 25 85 tDLY Latch Protection Delay Time (R1243x001A/C) Latch Protection Delay Time (R1243x001E) VIN = 5.0 V ILXHOFF Highside Switch Leakage Current VIN = 30 V, VCE = 0 V RLXH ILIMLXH VCEH VCEL Highside Switch ON Resistance Highside Switch Limited Current CE “H” Input Voltage CE “L” Input Voltage VBST – VLX = 4.5 V VBST – VLX = 4.5 V VIN = 30 V VIN = 30 V 2.8 1.4 ICEH CE “H” Input Current VIN = 30 V, VCE = 30 V −1.0 ICEL CE “L” Input Current VIN = 30 V, VCE = 0 V IFBH FB “H” Input Current IFBL FB “L” Input Current FLG “OFF” Delay Time Overvoltage Detection Voltage Undervoltage Detection Voltage mA 1100 TSS = open CSS = 0.1 µF FLG “OFF” Current 1.0 1000 VTSS = 0 V tFLGOFF VOVD VUVD Unit 900 Soft-start Time 1 Soft-start Time 2 IFLGOFF µA 0.7 ±100 TSS Pin Current VFLGL 10 3.8 4.0 4.0 4.2 0.2 0.493 0.500 0.507 tSS1 tSS2 Thermal Shutdown Detect Temperature FLG “L” Voltage Max. 0 3.6 3.8 ITSS TTSD Typ. 90 % 95 % 0.8 18 ms ms µA 4.0 0.2 6 0.4 12 2.0 ms 0.08 10 µA 0.4 mΩ A V V 0 1.0 µA −1.0 0 1.0 µA VFB = 2.0 V −1.0 0 1.0 µA VFB = 0 V −1.0 0 1.0 µA 0 Hysteresis 35ºC 175 3.8 160 IFLG = 1 mA 0.4 VFLG = 5.5 V VFB VFB ºC 0.05 0.55 0.35 V 0.0 1.0 µA 0.25 0.60 0.40 0.60 0.65 0.45 ms V V 7 R1243x NO.EA-206-170608 OPERATING DESCRIPTIONS SOFT-START TIME ADJUSTMENT FUNCTION AND FLAG FUNCTION Soft-Start Time Adjustment Function The soft-start time (tSS) of the R1243x is adjustable by adding the soft-start time adjusting capacitor (CSS) to the TSS pin. The soft-start time can be set longer than the internal soft-start time (Typ. 0.4 ms). For example, if the soft-start time adjusting capacitor (CSS) is 0.1µF, the externally adjusted soft-start time will be 12 ms (Typ.). If there is no need of adjusting the soft-start time, leave the TSS pin as open so that the internal soft-start time (Typ. 0.4 ms) will be applied. tSS 12ms 6ms 1.2ms 0.4ms 0 3300pF 0.01μF 0.047μF 0.1μF CSS Fig. 1 CSS vs. tSS (Typ.) Flag Function The R1243x includes a flag output function using Nch open drain. If an abnormal state is detected, the flag output function turns the Nch transistor on and switches the FLG pin low. After recovering from the abnormal state, the flag output function turns the Nch transistor off and switches the FLG pin high after recovering from the low voltage detection (Typ. 0.4 V) and waiting for the delay time (Typ. 0.25 ms). The flag function detects the following conditions as abnormal states.  CE = ”L” (Shutdown)  UVLO (Shutdown)  Thermal Shutdown  VFB Overvoltage Detection (Typ. 0.6 V)  VFB Undervoltage Detection (Typ. 0.4 V)  Active Latch Function (R1243x001A/C/E)  Overvoltage Protection for TSS Pin after the Completion of Soft-start (Typ. 3 V) 8 R1243x NO.EA-206-170608 The flag resistors (RFLG) have to be between 10 kΩ to 100 kΩ. If the flag function is not used, the FLG pin has to be left open or connected to GND. VCE 1.4V< 0.4V> time VFB VOVD 0.60V(Typ.) 0.500V(Typ.) VUVD 0.40V(Typ.) 0.45V(Typ.) time VFLG tSS VFLGIN 0.4V> time tFLGOFF 0.25ms Fig. 2 Flag Function Sequence 9 R1243x NO.EA-206-170608 OPERATION OF STEP-DOWN DC/DC CONVERTER AND OUTPUT CURRENT The step-down DC/DC converter stores energy in the inductor (L) when the LX transistor turns on, and releases energy from L when the LX transistor turns off. This is why it can control with less energy loss and provide a lower output voltage (VOUT) than the input voltage (VIN). The operation of the step-down DC/DC converter is explained in the following figures. IL ILmin i1 VIN ILmax topen VOUT Nch Tr. Diode L i2 COUT GND ton toff t = 1 / fosc Basic Circuit Inductor Current flowing through Inductor Step 1. The Nch transistor turns on and the inductor current (i1) flows, L is charged with energy. At this moment, i1 increases from the minimum inductor current (ILmin), which is 0 A, and reaches the maximum inductor current (ILmax) in proportion to the on-time period (ton) of the Nch transistor. Step 2. When the Nch transistor turns off, L tries to maintain IL at ILmax, so L turns the diode on and the inductor current (i2) flows into L. Step 3. i2 decreases gradually and reaches ILmin after the open-time period (topen) of the Nch transistor, and then the diode turns off. This is called discontinuous current mode. As the output current (IOUT) increases, the off-time period (toff) of the Nch transistor runs out before IL reaches ILmin. The next cycle starts, and the Nch transistor turns on and the diode turns off, which means IL starts increasing from ILmin. This is called continuous current mode. In the case of PWM mode, VOUT is maintained by controlling ton. During PWM mode, the oscillator frequency (fosc) is being maintained constant. 10 R1243x NO.EA-206-170608 APPLICATION INFORMATION TYPICAL APPLICATION CIRCUIT VOUT = 0.8 V, tSS = 0.4 ms R1243x001A/B, R1243S001E VIN 5.0V CBS T 0.47µF BST TSS VIN V CE CE BST TSS IN C IN 10µF LX Lx FLG FLG GND GND FB FB “H”active RCE 47kΩ CSPD 1800pF D C OUT 47µF L 2.2µH RBOT 2.0kΩ RUP 1.2kΩ VOUT 0.8V R1243x001A/B/E Typical Application VOUT = 0.8 V, tSS = 0.4 ms R1243x001C/D VIN 12V CBS T 0.47µF C IN 10µF BST BST TSS TSS VIN VIN CE CE Lx LX FLG FLG GND GND FB FB “H”active RCE 47kΩ CSPD 2700pF D L 4.7µH C OUT 47µFx2 RUP 1.2kΩ RBOT 2.0kΩ VOUT 0.8V R1243x001C/D Typical Application 11 R1243x NO.EA-206-170608 VOUT = 1.8 V, tSS = 0.4 ms R1243x001A/B, R1243S001E VIN 12V CBS T 0.47µF BST BST TSS VIN V CE CE TSS IN C IN 10µF LX Lx FLG FLG GND GND FB FB “H”active RCE 47kΩ CSPD 560pF D VOUT 1.8V C OUT 10µF L 4.7µH RBOT 2.0kΩ RUP 5.2kΩ R1243x001A/B/E Typical Application VOUT = 1.8 V, tSS = 0.4 ms R1243x001C/D VIN 12V CBS T 0.47µF C IN 10µF BST BST TSS TSS VIN V IN CE CE LX Lx FLG FLG GND GND FB FB “H”active RCE 47kΩ CSPD 1000pF D L 4.7µH C OUT 47µF R1243x001C/D Typical Application 12 RUP 5.2kΩ RBOT 2.0kΩ VOUT 1.8V R1243x NO.EA-206-170608 VOUT = 3.3 V, tSS = 0.4 ms R1243x001A/B, R1243S001E VIN 12V CBS T 0.47µF BST BST TSS VIN V CE CE TSS IN C IN 10µF LX Lx FLG FLG GND GND FB FB “H”active RCE 47kΩ CSPD 220pF D C OUT 10µF L 4.7µH RBOT 2.0kΩ RUP 11.2kΩ VOUT 3.3V R1243x001A/B/E Typical Application VOUT = 3.3 V, tSS = 0.4 ms R1243x001C/D VIN 12V CBS T 0.47µF C IN 10µF BST BST TSS TSS VIN V IN CE CE LX Lx FLG FLG GND GND FB FB “H”active RCE 47kΩ CSPD 390pF D L 10µH C OUT 22µF RUP 11.2kΩ RBOT 2.0kΩ VOUT 3.3V R1243x001C/D Typical Application 13 R1243x NO.EA-206-170608 VOUT = 15 V, tSS = 0.4 ms R1243x001A/B, R1243S001E VIN 24V CBS T 0.47µF BST BST TSS VIN V CE CE TSS IN C IN 10µF LX Lx FLG FLG GND GND FB FB “H”active RCE 47kΩ CSPD 47pF D C OUT 10µF L 4.7µH RBOT 2.0kΩ RUP 58kΩ VOUT 15V R1243x001A/B/E Typical Application VOUT = 15 V, tSS = 0.4 ms R1243x001C/D VIN 24V CBS T 0.47µF C IN 10µF BST BST TSS TSS VIN V IN CE CE LX Lx FLG FLG GND GND FB FB “H”active RCE 47kΩ CSPD 100pF D L 10µH C OUT 10µFx2 R1243x001C/D Typical Application 14 RUP 58kΩ RBOT 2.0kΩ VOUT 15V R1243x NO.EA-206-170608 VOUT = 5.0 V, tSS = 0.4 ms, Flag Function Using R1243x001A/B, R1243S001E VIN 24V CBS T 0.47µF BST BST TSS VIN V CE CE IN C IN 10µF VFLGIN TSS LX Lx FLG FLG GND GND FB FB “H”active RCE 47kΩ CSPD 150pF D L 4.7µH RUP 18kΩ C OUT 10µF RFLG 47kΩ VFLG RBOT 2.0kΩ VOUT 5.0V R1243x001A/B/E Typical Application 15 R1243x NO.EA-206-170608 VOUT = 5.0 V, tSS = 12 ms, Flag Function Using R1243x001C/D VIN 24V CBS T 0.47µF BST BST C IN 10µF CSS 0.1µF TSS TSS VIN V IN CE CE LX Lx FLG FLG “H”active RCE 47kΩ VFLGIN 5.0V RFLG 47kΩ FLAG GND GND FB FB CSPD 220pF D L 10µH RUP 18kΩ C OUT 22µF RBOT 2.0kΩ VOUT 5.0V R1243x001C/D Typical Application The R1243x includes a flag output function using Nch open drain. If an abnormal state is detected, the flag output function turns the Nch transistor on and switches the FLG pin low. After recovering from the abnormal state, the flag output function turns the Nch transistor off and switches the FLG pin high after recovering from the low voltage detection (Typ. 0.4 V) and waiting for the delay time (Typ. 0.25 ms). If VOUT is used as VFLGIN, the FLG pin high voltage (VFLGH) will be same voltage level as VOUT even before the completion of soft-start. When using the soft-start time adjustment in the sequential startup circuits, note that VFLGH is dependent on VFLGIN (connecting to VOUT directly or using other voltage source). • CE = “L” (Shutdown) • UVLO (Shutdown) • Thermal Shutdown • VFB Overvoltage Detection (Typ. 0.6 V) • VFB Undervoltage Detection (Typ. 0.4 V) • Active Latch Function (R1243x001A/C/E) • Overvoltage Protection for the TSS pin after the completion of soft-start (Typ. 3 V) 16 R1243x NO.EA-206-170608 SEQUENTIAL START-UP The figure below shows the example of sequential startup circuits using soft-start time adjustment and flag functions. Where: the input voltage is 12 V, the output voltage of the R1243x001A/B/E (DCDC1) is 5.0 V, the output voltage of the R1243x001A/B/E (DCDC2) is 3.3 V, the electrolytic capacitor for the 5.0 V output is 470 µF and the electrolytic capacitor for the 3.3 V output is 100 µF. The DCDC1 circuit starts up first followed by the DCDC2 circuit, so that the output voltage of DCDC1 will not drop below the output voltage of the DCDC2. Soft-start Time and Charging Current During the soft-start, the R1243x generates a charging current (ICHRG) for a capacitor connected to VOUT in addition to the output current (IOUT) for supplying the output load. Therefore, IOUT is given by: IOUT’ = IOUT + ICHRG = IOUT + VOUT x (COUT + CL) / tSS IOUT2’ (DCDC1) and IOUT2’ (DCDC2) are given by: DCDC1: IOUT’ = IOUT + VOUT / (COUT + CL) / tSS = IOUT + 5.0 V x (10 μF + 470 μF) / 26 ms = IOUT + 92 mA DCDC2: IOUT2’ = IOUT2 + VOUT2 / (COUT2 + CL2) / tSS = IOUT + 3.3 V x (10 μF + 100 μF) / 2.6 ms = IOUT2 + 140 mA The output current should not exceed 2.0 A even during soft-start. Using the Output Voltage of DCDC1 as the FLG Pin Voltage of DCDC1 The R1243x includes a flag output function using Nch open drain. If an abnormal condition is detected, the flag output function turns the Nch transistor on and switches the FLG pin low. If an abnormal condition is not detected, the flag output function turns the Nch transistor off and switches the FLG pin high after recovering from the low voltage detection (Min. 0.35 V) and waiting for the delay time (Min. 0.05 ms). If VOUT is used as VFLGIN, the FLG pin high voltage (VFLGH) will be same voltage level as VOUT even before finishing the soft-start. After recovering from the low voltage detection, the lowest VFLGH will be 70% of the set output voltage (VSET). Using the FLG Pin Voltage of DCDC1 as the CE Pin Input Voltage of DCDC2 The lowest CE pin low voltage (VCEL) is 0.4 V, and the highest CE pin high voltage (VCEH) is 1.4 V. The highest flag pin low voltage (VFLGL) is 0.4 V and the lowest VFLGH of DCDC1 is approximately 3.5 V, so the flag pin voltage (VFLG) can be used as the CE pin input voltage (VCE) of DCDC2. Auto-discharge using the FLG Pin The R1243x turns the Nch transistor on and switches the FLG pin low during shutdown. If the FLG pin is switched low, a FLG pin current (IFLG) flows from VFLGIN to the FLG pin resistor (RFLG) and the Nch transistor. Therefore, using VOUT as VFLGIN can discharge the electric charges of a capacitor connected to VOUT during shutdown. The highest IFLG will be VFLGIN divided by RFLG. When determining the RFLG value, ensure that the highest IFLG will be 5 mA or less. Do not directly connect VOUT to the FLG pin. IFLG may become excessive and damage the device. VFLGL is regulated as IFLG = 1 mA. If RFLG is set higher than IFLG = 1 mA, the highest VFLGL of 0.4 V is not guaranteed, hence the flag function itself may be spoiled. 17 R1243x NO.EA-206-170608 Typical Application Circuit with Start-up Sequencing (DCDC1) R1243x001A/B/E: 1000 kHz, VIN = 12 V, VOUT = 5.0 V, tSS = 26 ms (CSS = 0.22 μF) (DCDC2) R1243x001A/B/E: 1000 kHz, VIN = 12 V, VOUT = 3.3 V, tSS = 2.6 ms (CSS = 0.022 μF) R1243x001A/B, R1243S001E CBST 0.47µF V IN 12V CIN 10µF C SS 0.22µF BST BST TSS TSS VIN V IN CE CE LX Lx FLG FLG GND VCE RC E 10kΩ V FLG FB GND FB DCDC1 R BOT 2.0kΩ L 4.7µH RFLG 10kΩ RU P 18kΩ C SPD 150pF VOU T 5.0V IOUT + D C BST2 0.47µF C IN2 10µF COUT 10µF R1243x001A/B, R1243S001E CSS2 0.022µF BST BST TSS TSS VVIN IN CE CE LX Lx FLG FLG GND CL 470µF VFLG 2 IF LG2 FB GND FB RBOT 2 2.0kΩ DCDC2 L2 4.7µH CSPD 2 220pF R FLG2 1.0kΩ RUP2 11.2kΩ VOUT 2 3.3V IOU T2 + D2 18 COU T2 10µF CL2 100µF R1243x NO.EA-206-170608 DCDC1 VCE 1.4V< 0.4V> time DCDC1 VOUT VOVD 6.0V(Typ.) VOUT 5.0V(Typ.) VUVD 4.0V(Typ.) 4.5V(Typ.) time DCDC1 VFLG tSS 26ms(Typ.) VOUT 5.0V(Typ.) 0.4V> time DCDC2 VOUT2 tFLGOFF 0.25ms(Typ.) VOVD 3.96V(Typ.) VOUT2 3.3V(Typ.) VUVD 2.64.V(Typ.) 2.97V(Typ.) time DCDC2 VFLG2 tSS 2.6ms(Typ.) VOUT2 3.3V(Typ.) time DCDC2 IFLG2 tFLGOFF 0.25ms(Typ.) IFLG2 3.3mA(Typ.) time Fig. 3 Start-up/ Shutdown Sequencing 19 R1243x NO.EA-206-170608 THE MINIMUM ON-TIME The minimum On-Time of the R1243 Series is set at 150 ns (Typ.). The minimum On-Time (150 ns) is determined by considering the tolerable delay time and the necessary stability of the current sense circuits. The R1243 Series has adopted the current control mode system, which does not require any sense resistor. By substituting the RON (Nch driver's on-resistance) value into the following equation, the ILX (Inductor current) value can be obtained: VIN - VLX = ILX x RON. ILX can be sensed only while the Nch driver is turned on (LX = High period). If the ILX is sensed during the switching surge immediately after the Nch driver is turned on, the switching surge may cause the malfunction. To avoid the malfunction caused by the switching surge, disable the current sensing function of Nch driver for a while immediately after the Nch driver is turned on. While the current sensing function of the Nch driver is disabled, both the current control mode system and the limited current circuit cannot function normally. Fig. 4 is a graph with the on time on the horizontal axis, and the limit current on the vertical. The graph shows that the delay time is occurred in the limited current circuit within 150 ns because the current sensing is not functioning normally. As a result, the detecting current is increased dramatically. The delay time occurred in the limited circuit current includes the circuit delay time occurred between the current sense circuit and the driver. This could happen in the current control mode system as well. The current control mode system does not function normally under 150 ns but the operation becomes similar operation to the voltage control mode system that is low stable. For the above reasons, the stability and the over-current limit accuracy of the R1243 Series degrades dramatically under 150 ns. In the case of setting the minimum on time equal or less than 150 ns, an adequate stability has to be ensured by the external parts and also the over current protection circuit has to be designed without depending on the current limit circuit of the IC. 5.8 5.6 VIN=5.0V 5.4 VIN=12V ILXLIMIT [A] 5.2 VIN=24V 5.0 4.8 4.6 4.4 4.2 4.0 3.8 100 120 140 160 180 200 220 240 260 280 300 320 340 360 380 400 Ontime [ns] Fig. 4 On-time and Peak Current of LX pin (ILXLIMIT) at Current Limit Detection of LX pin 20 R1243x NO.EA-206-170608 OUTPUT CURRENT AND SELECTION OF EXTERNAL COMPONENTS The following equations explain the relationship between output current and peripheral components. IRP is the ripple current P-P value, RONH is the ON resistance of Highside Tr., RL is the DC resistance of inductor. First, when Highside Tr. is “ON”, the following equation is satisfied. VIN = VOUT + (RONH + RL) × IOUT + L × IRP / ton ................................................................................ Equation 1 Second, when Highside Tr. is "OFF" (Diode is "ON"), the following equation is satisfied. L × IRP / toff = VF + VOUT + RL × IOUT ............................................................................................... Equation 2 Put Equation 2 to Equation 1 to solve ON duty of Highside Tr. (DON = ton / (toff + ton): DON = (VOUT + VF + RL × IOUT) / (VIN + VF - RONH × IOUT) .................................................................. Equation 3 Ripple Current is given by: IRP = (VIN - VOUT - RONH × IOUT - RL × IOUT) × DON / fosc / L .............................................................. Equation 4 Peak current (ILmax) that flows through L, and LX Tr. is given by: ILmax = IOUT + IRP / 2...................................................................................................................... Equation 5 The valley current (ILmin) is given by: ILmin = IOUT - IRP / 2 ....................................................................................................................... Equation 6 If ILmin is smaller than 0 (ILmin < 0), the step-down DC/DC converter operate in discontinuous mode. The step--down DC/DC converter operates in discontinuous mode when: IOUT < IRP / 2.................................................................................................................................... Equation 7 It is important to consider ILmax and ILmin when making the input/output conditions or selecting the external components. The above explanation is based on the ideal operation of continuous mode. 21 R1243x NO.EA-206-170608 Ripple Current and LX Current Limiting The fluctuation in ripple current of inductor can be caused by various reasons. The R1243x has a LX current limiting that sets the upper limitation of the inductor current (LX peak current limit). Note that the LX peak current limit is not the average inductor current (same as output current value). The larger the ripple current is, the larger the LX peak current will be. The R1243x001B/D is using this characteristic in the fold-back current limiting. The fold-back current limiting maintains the LX peak current limiting and reduces the switching frequency to lower the average inductor current. To release the fold-back current limiting, the LX peak current of the R1243x001B (250 kHz) or the R1243x001D (82.5 kHz) should not go beyond the LX peak current limit. Fig. 5 shows the LX current limit sequencing. VOUT VOUT Limit Latch (R1243x001A/C/E) 2ms or 0.08ms open 2msec or 0.08msI t short shutdown OUT shutdown restart (CE="H"→"L"→"H") VOUT VOUT VFB
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