R1270S001A-E2-FE

R1270S Series 3 A, 34 V Input PWM/VFM Step Down DC/DC Converter with PLL Synchronization No. EA-299-200624 OUTLINE The R1270S is CMOS-based Step-down DC/DC converter with internal N-channel high side Tr. The ON resistance of the built-in high-side transistor is 0.10Ω and the R1270S can provide the maximum 3 A output current. Each of the ICs consists of an oscillator, a PWM control circuit, a voltage reference unit, an error amplifier, a phase compensation circuit, a slope compensation circuit, a soft-start circuit, protection circuits, an internal voltage regulator, and a switch for bootstrap circuit. The ICs can make up a step-down DC/DC converter with adding an inductor, resistors, a diode, and capacitors externally. The R1270S is current mode operating type DC/DC converters without an external current sense resistor, and realizes fast response and high efficiency. As an output capacitor, a ceramic type capacitor is usable. The internal oscillator frequency is adjustable over a range of 300 kHz to 2400 kHz by an external resistor, and also can be synchronized externally by PLL. The phase compensation is adjustable by using external resistor and capacitor. Thereby optimizations for the inductor and the capacitor can be done. To improve performance under light load conditions, the R1270S can select automatically between two modes: the VFM mode when the inductor current is discontinuous and the PWM mode when the inductor current is continuous. The ripple voltage at VFM mode is 40 mV (Typ.). As for protection, the R1270S has a current limit function to control an inductor peak current every cycle, a fold-back function to reduce the oscillator frequency under the short circuit, a thermal shutdown function, an under voltage lockout (UVLO) function, and an over voltage lockout (OVLO) function. Furthermore, the R1270S can include a latch protection function to cut off the output when the output current reaches the set current limit for a certain time. That is, the R1270S supports two types of the presence (R1270S001A) or the absence (R1270S001B) of the latch protection function. The current limit, which is fixed at 4.5 A (Typ.), is adjustable by an external resistor. And, the soft start time is fixed at 0.4 ms (Typ.) internally, but is adjustable by an external resistor. The R1270S has the FLG pin to monitor the overvoltage of the FB pin voltage and the 6 V rated pin. When detecting an abnormal voltage, the R1270S outputs a flag. The R1270S is available in HSOP-18 package. 1 R1270S No. EA-299-200624 FEATURES • • • • Operating Voltage (Maximum Rating)·················· 3.6 V to 34 V (36 V) Consumption Current ····································· Typ. 18 µA (V IN = 12 V) Stand-by Current ············································ Typ. 0 µA (V IN = 34 V, CE = 0 V) Output Voltage ··············································· Externally-adjustable at 0.8 V or more (Max. step down ratio 160 ns × fosc) • • • • • • • • Feedback Voltage and Tolerance ······················· 0.8 V±1.0% Output Current ··············································· 3 A(1) Operating Frequency······································· 300 kHz to 2.4 MHz settable by External resistor Minimum Off Time ·········································· Typ. 120 ns Maximum Duty ··············································· Min. 93% (fosc = 300 kHz), Min. 67% (fosc = 2400 kHz) UVLO Function Detection Voltage ······················ Typ. 2.6 V OVLO Function Detection Voltage ···················· Min. 38 V Soft-start Time ··············································· Internal soft-start time (Typ. 0.4 ms), as a lower limit, Externally-adjustable by using capacitor • High-side Switch Current Limit ·························· Typ. 4.5 A, as a upper limit, Externally-adjustable by using resistor • • • • • • Thermal Shutdown Function ····························· Typ. 160°C CE Threshold Voltage ······································ Typ. 1.0 V Latch Protection Delay Time ····························· Typ. 2 ms (R1270S001A) Fold-back Protection ······································· Fold-back for Oscillation frequency V FB Voltage Temperature Tolerance (ΔV FB /ΔTa)· ··· Typ. ±100 ppm/°C (−40°C ≤ Ta ≤ 105°C) Packages ····················································· HSOP-18 APPLICATIONS • • • Power source for digital home appliances such as digital TV, DVD players. Power source for office equipment such as printers and fax machines. Power source for 5 V PSU or 2-cell or more Li-ion battery powered communication equipment, cameras, video instruments such as VCRs, camcorders. • (1) 2 Power source for high voltage battery-powered equipment. The output current depends on external components and conditions. R1270S No. EA-299-200624 SELECTION GUIDE The latch type protection function is user-selectable. Selection Guide Product Name Package Quantity per Reel Pb Free Halogen Free R1270S001∗-E2-FE HSOP-18 1,000 pcs Yes Yes ∗: Select the presence or absence of the latch type protection function. A: with Latch type protection function B: without Latch type protection function BLOCK DIAGRAMS INT VIN Thermal Shutdown 3.0V 3.0V + - VIN CE OVLO - UVLO + VIN Shutdown Regulator 1.0V + + Low:PWM/VFM auto High:Fixed PWM 2.9V - delay 0.8V φ PLLREF Cmp Filter + - 5.0V PLLFLTR + Set Pulse RT Over/Under Voltage Detection FB - Soft Start Circuit BST Maxduty Pulse Shutdown Reset SS VCO OVP UVD S D LX OVP - + R + Shutdown UVD LMTOVP Limit Latch Pin OVD Softstart Reference ER Reset Limit Latch Circuit (2 msec) *1 EC LMT Set LMT OVP PLLFLTR SS ER 3.3V + Peak Current Limit Circuit Pin OVD FLG Reset Shutdown Current Sense Circuit GND Current Slope Circuit R1270S001A/B Block Diagram 1 (1) R1270S001A equips the limit latch circuit. 3 R1270S No. EA-299-200624 PIN DESCRIPTIONS HSOP-18 1 LX 2 LX 3 NC 4 GND TOP VIEW * VIN 18 VIN 17 BST 16 SS 15 5 INT CE 14 6 FB FLG 13 7 ER RT 12 8 EC PLLFLTR 11 9 LMT PLLREF 10 Pin Description Pin No. Symbol Description 1, 2 LX Lx Switching Pin 3 NC No connection 4 GND 5 INT Internal Bias Pin 6 FB Feedback Pin 7 ER Phase Compensation Pin for External Resistor 8 EC Phase Compensation Pin for External Capacitor 9 LMT 10 PLLREF PLL Synchronization Pin 11 PLLFLTR PLL Filter Pin 12 RT 13 FLG Flag Output Pin 14 CE Chip Enable Pin (Active “H”) 15 SS Soft-start Pin 16 BST Bootstrap Pin 17, 18 V IN Power Supply Pin Ground Pin Current Limit adjustment Pin Oscillation adjustment Pin ∗ The tab on the bottom of the package must be electrically connected to GND (substrate level) when mounted on the board. 4 R1270S No. EA-299-200624 Internal Equivalent Circuits for Individual Pins VIN VIN Regulator INT LX L X Pin Internal Equivalent Circuit VIN INT Pin Internal Equivalent Circuit Regulator FB VIN Regulator ER FB Pin Internal Equivalent Circuit VIN ER Pin Internal Equivalent Circuit VIN Regulator Regulator Regulator LMT EC EC Pin Internal Equivalent Circuit LMT Pin Internal Equivalent Circuit 5 R1270S No. EA-299-200624 Regulator VIN VIN PLLREF PLLFLTR PLLREF Pin Internal Equivalent Circuit PLLFLTR Pin Internal Equivalent Circuit Regulator VIN FLG RT RT Pin Internal Equivalent Circuit FLG Pin Internal Equivalent Circuit VIN CE CE Pin Internal Equivalent Circuit 6 VIN Regulator SS SS Pin Internal Equivalent Circuit R1270S No. EA-299-200624 Regulator BST LX BST Pin Internal Equivalent Circuit 7 R1270S No. EA-299-200624 ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings Symbol Item V IN Input Voltage V BST BST Pin Voltage(1) V LX LX Pin Voltage V CE CE Pin Input Voltage V INT INT Pin Voltage V SS Soft-start Pin Voltage V ER ER Pin Voltage V EC EC Pin Voltage V FB Feedback Pin Voltage V FLG *1 Flag Pin Voltage(1) V PLLREF External Oscillation Synchronization Pin Voltage V PLLFLTR PLL Filter Pin Voltage V RT Oscillation adjustment Pin Voltage V LMT Current Limit adjustment Pin Voltage Power Dissipation(2) PD (HSOP-18, JEDEC STD.51) Tj Junction Temperature Range Tstg Storage Temperature Range (GND = 0 V) Rating −0.3 to 36 V LX −0.3 to V LX +6 −0.3 to 36 −0.3 to 36 −0.3 to 36 −0.3 to 6 −0.3 to 6 −0.3 to 6 −0.3 to 6 −0.3 to 24 −0.3 to 36 −0.3 to 6 −0.3 to 6 −0.3 to 6 Unit V V V V V V V V V V V V V V 3100 mW −40 to 125 −55 to 125 °C °C ABSOLUTE MAXIMUM RATINGS Electronic and mechanical stress momentarily exceeded absolute maximum ratings may cause permanent damage and may degrade the life time and safety for both device and system using the device in the field. The functional operation at or over these absolute maximum ratings are not assured. RECOMMENDED OPERATING CONDITIONS Recommended Operating Conditions Symbol V IN Input Voltage Ta Operating Temperature Item Rating Unit 3.6 to 34 V −40 to 105 °C RECOMMENDED OPERATING CONDITIONS All of electronic equipment should be designed that the mounted semiconductor devices operate within the recommended operating conditions. The semiconductor devices cannot operate normally over the recommended operating conditions, even if they are used over such conditions by momentary electronic noise or surge. And the semiconductor devices may receive serious damage when they continue to operate over the recommended operating conditions. (1) (2) 8 The pin voltage except VBST and VFLG must be prevented from exceeding VIN +0.3V. Refer to POWER DISSIPATION for detailed information. R1270S No. EA-299-200624 ELECTRICAL CHARACTERISTICS V IN = 12 V, Ta = 25°C, unless otherwise specified. The specifications surrounded by are guaranteed by design engineering at -40°C ≤ Ta ≤ 105°C. R1270S001A/B Electrical Characteristics Symbol Item V UVLO2 UVLO Released Voltage Conditions V IN = 34 V, V INT = Open, V PLLREF = 34 V, V FB = 1.5 V V IN = 34 V, V INT = Open, V PLLREF = 0, V FB = 0.84 V V IN Rising V UVLO1 UVLO Detect Voltage V IN Falling V OVLO2 OVLO Released Voltage V IN Falling V OVLO1 OVLO Detect Voltage V IN Rising V FB V FB Voltage Tolerance V VFM FB High Detection at VFM mode fosc0 Oscillation Frequency 0 RT = Open 270 fosc1 Oscillation Frequency 1 RT = 62 kΩ fosc2 Oscillation Frequency 2 RT = GND I IN1 V IN Consumption current 1 I IN2 V IN Consumption current 2 toff (Ta = 25°C) Max. Unit Min. Typ. 0.7 1 1.3 mA 13 18 30 µA 2.5 2.6 2.7 V V UVLO2 V UVLO2 V UVLO2 −0.16 −0.15 −0.11 34 V 38 Ta = 25°C 0.792 −40°C ≤ Ta ≤ 105°C 0.784 V V 0.808 V 0.816 V 0.831 V 300 330 kHz 900 1010 1120 kHz 2160 2400 2640 kHz 0.800 120 Minimum Off Time ns D MAX0 Maximum Duty Cycle 0 RT = Open 93 % D MAX0 Maximum Duty Cycle 1 RT = 62 kΩ 83 % D MAX2 Maximum Duty Cycle 2 Oscillation Synchronized Frequency RT = GND 67 % tss1 Soft-start Time 1 tss2 Soft-start Time 2 Itss Soft-start charge current f SYNC tdelay R LXH I LXHOFF I LIMLXH1 I LIMLXH2 Delay Time for Latch Protection Lx High Side Switch ON Resistance Lx High Side Switch Leakage Current Lx High Side Switch Limited Current 1 Lx High Side Switch Limited Current 2 fosc/2 foscx2 kHz SS = Open, V FB = 0.72 V C SS = 0.01 µF, V FB = 0.72 V SS = 0 V 0.3 0.55 ms 3.1 4.5 ms 1.7 2.0 2.35 µA for R1270S001A V BST −V LX = 4.5V, I LX = 0.1A 1.4 2 2.8 ms 0.1 0.15 Ω 0 20 µA f PLLREF = 1000 kHz LMT = 220 kΩ、DC Current 3.0 3.5 4.3 A LMT = 39 kΩ、DC Current 1.25 1.6 2.4 A All test items listed under Electrical Characteristics are done under the pulse load condition (Tj ≈ Ta = 25°C). 9 R1270S No. EA-299-200624 ELECTRICAL CHARACTERISTICS (continued) V IN = 12 V, Ta = 25°C, unless otherwise specified. The specifications surrounded by are guaranteed by design engineering at -40°C ≤ Ta ≤ 105°C. R1270S001A/B Electrical Characteristics Symbol Item Conditions Min. V CEH CE “H” Input Voltage V CEL CE “L” Input Voltage I CEH CE “H” Input Current −1.0 I CEL CE “L” Input Current I FBH FB “H” Input Current I FBL FB “L” Input Current 1.15 V 0 1.0 µA −1.0 0 1.0 µA V FB = 1.5 V −0.1 0 0.1 µA V FB = 0 V −0.1 0 0.1 µA PLLREF “H” Input Voltage V PLLL PLLREF “L” Input Voltage I PLLH PLLREF“H” Input Current −1.0 I PLLL PLLREF“L” Input Current Thermal Shutdown Detect Temperature Thermal Shutdown Release Temperature Standby Current −1.0 V IN = 34 V, V CE = 0 V V FLGL FLAG ”L” Voltage V IN = 2.0 V, I FLG = 1 mA I FLGOFF FLAG ”Off” Current V FLG = 6.0 V T TSR Istandby V 0.85 V PLLH T TSD Typ. (Ta = 25°C) Max. Unit 0.95 V 0.67 V 0 1.0 µA 0 1.0 µA 160 °C 130 °C 0 20 µA 0.25 V 0.0 0.1 µA V OVP FB Pin OVP Detect Voltage 0.91 0.98 1.04 V V UVD FB Pin UVD Detect Voltage 0.59 0.64 0.69 V V FLB 0.59 0.69 V V VOS0 Fold Back Detect Voltage 6V-rated Pin OVP Detect Voltage INT Pin Operation Voltage V VOS1 INT Pin Disable Voltage V POVD 4.0 V ER , V PLLFLTR , V SS V 2.75 3.1 V 2.68 2.8 V All test items listed under Electrical Characteristics are done under the pulse load condition (Tj ≈ Ta = 25°C). 10 R1270S No. EA-299-200624 THEORY OF OPERATION OVLO (Over Voltage Lock Out) Function When the input voltage to V IN pin is higher than OVLO detection voltage, the inside circuit becomes standby to prevent malfunction. If the voltage on the V IN pin becomes lower than the OVLO release voltage, R1270S will restart and the soft-start function will begin. Also, the OVLO protection has a function to prevent the possibility of the malfunction and destruction to the IC. Since the OVLO detection voltage is set higher than the absolute maximum rating for V IN pin, the function itself is not guaranteed. OVP (Over Voltage Protection) Function for FB Pin When the FB pin voltage becomes higher than the OVP detection voltage, the OVP function stops the switching of Lx pin without stopping the function of the internal circuit. When the FB pin voltage becomes lower than the OVP detect voltage, the Lx pin switching returns to normal control. If aberrant conditions around the FB pin circuit occur, the overvoltage of the output voltage may not be decreased because the R1270S indirectly monitors the output voltage via FB pin. Setup for Oscillation Frequency By using R RT between the RT pin and GND, the R1270S can control the oscillation frequency in the range of 300 kHz to 2400 kHz. For example, by using 62 kΩ as R RT , the frequency will be set about 1000 kHz. When setting the frequency at either 300 kHz or 2400 kHz, the frequency depends on whether the RT pin is set to "Open" or "GND", without using RRT. That is, the frequency is set at 300 kHz when the RT pin is “Open”, and is set at 2400 kHz when it is “GND”. The Electrical Characteristics guarantees the oscillation frequency under the conditions stated below for f OCS0 , f OCS1 and f OCS2 . 3000 fOSC [kHz] 2500 2000 1500 1000 500 0 0 50 100 150 200 250 300 RRT[kΩ] R RT [kΩ] = 1 / (1 / (((1 / fosc [kHz] x 1000000 −125) / 292 x 25) − 25) − 1 / 250) R1270S001A/B Oscillation Frequency Setting Resistor (R RT ) vs. Oscillation Frequency (fosc) 11 R1270S No. EA-299-200624 Synchronization of Oscillation Frequency The R1270S can synchronize to an external clock, which is input from the PLLREF pin, with using phaselocked loop. The PWM fixed mode is set during synchronization. The detection threshold of the external clock is 0.8 V (Typ.) and the pulse of 100 ns or more are required. The phase compensation filter is required to stabilize the phase-locked loop. The frequency fluctuation, which is changed from the set frequency to the synchronized frequency, can be achieved smoothly by the constant of this filter. Place 10 kΩ resistor and 220 pF capacitor in series between PLLFTR pin and GND. The oscillation frequency which could be synchronized is 0.5 to 2 times of that stated in the “Setup of Oscillation Frequency”. However the guaranteed oscillation frequency is 270 kHz at the minimum, and 2640 kHz at the maximum. Until the soft-start sequence is over, the R1270S operates at set oscillation frequency and after the soft-start sequence is over the oscillation frequency is synchronized to the external clock. The phase compensation filter is charged with limited impedance, and the filter must be charged when synchronization starts. The time required for the phase compensation filter to be charged is as bellow. POLE PLL : 1/(C PLL *(R PLL +260k)) 95% charged : 3/POLE PLL [sec] 98% charged : 4/POLE PLL [sec] Adjust the soft-start time or the timing of the external clock input as POLE PLL. The following shows the timing chart of self oscillation and external clock input. VOUT VCPLL PLLREF fosc R1270S001A/B PLL Filter Start-up Sequence Phase Compensation Filter Charging Time > Soft-Start Time 12 R1270S No. EA-299-200624 VOUT VCPLL PLLREF fosc R1270S001A/B PLL Filter Start-up Sequence Phase Compensation Filter Charging Time < Soft-Start Time VOUT VCPLL PLLREF fosc R1270S001A/B PLL Filter Start-up Sequence Phase Compensation Filter Charging Time < Synchronous Start Time with Eternal Clock VFM/PWM Alternative Mode and PWM Fixed Mode By applying either the voltage of 0.95 V or more or the external clock to the PLLREF pin, the R1270S operates in PWM fixed mode (Pulse-skip at light load). By applying the voltage of 0.67 V or less to the PLLREF pin, the R1270S operates in VFM/PWM alternative mode. INT Pin Voltage By applying the voltage of 3.1 V (Typ.) or more to the INT pin via the V OUT pin, the R1270S generates 3 V internal power supply from V OUT. Thereby the R1270S can improve the efficiency of the IC in VFM mode. When I IN_VFM is as the 3 V internal current supply, the approximate expression for IC’s consumption current: I IN is V OUT / V IN × I IN_VFM . That is, the consumption current will decrease as V OUT /V IN becomes smaller. But, when the INT pin voltage is lower than 3.1 V, the consumption current will not be reduced since the internal voltage supply becomes V IN . Therefore, this architecture is aimed for applications which the V OUT is 3.3 V or more. If the V OUT is lower than 3.3 V, set the INT pin OPEN (No C INT necessary). 13 R1270S No. EA-299-200624 Minimum ON Time The minimum ON time is 160 ns that is determined by the current sense circuit. The R1270S adopts a resistor free current control mode. By using R ON (Nch driver ON resistor) as a substitute for sense resistor, the R1270S senses I LX (inductor current) according to V IN − V LX = I LX x R ON. The R1270S can sense I LX only during the Nch driver is On (Lx = “High”). However, if sensing it during the occurrence of the surge current right after the driver turns On, a malfunction may occur. To avoid the malfunction, the R1270S maintains a none sensing time for a while after the driver turns On. If the current control mode and the current limit circuit will not function properly at none sensing time, the R1270S may result in a rapid deterioration of stability and current limit accuracy. Please select the output voltage settings and frequency settings so that the output voltage does not become lower than the minimum step down ratio: V IN x 160 ns x f OCS . C SPD Setting The transfer function from feedback resistor of V OUT to FB pin using C SPD is V OUT / FB [s] = (R TOP x R BOT x C SPD x s + R BOT ) / (R TOP x R BOT x C SPD x s + R TOP + R BOT ) From above equation, the zero is R BOT / (R TOP x R BOT x C SPD ) and the pole is (R TOP + R BOT ) / (R TOP x R BOT x C SPD ). At low frequency level below zero V OUT will be multiplication of R BOT / (R TOP + R BOT ) which means feedback by 0.8 / V OUT and when higher frequency level than the pole it will be feedback by 1. At VFM mode the ripple of V OUT is generated by 40 mV (Typ.) higher than that of the reference voltage at PWM mode which is 0.8 V. For all operating frequency range, the ripple of V OUT is feedback by 1 to the FB pin despite the output voltage settings ripple of V OUT will follow reference voltage by setting the C SPD large. The bellow shows the example of setting the C SPD large, where the ripple of V OUT is feedback by 1 to the FB pin, and setting the C SPD small, where the ripple of V OUT is feedback by the multiple of R BOT / (R TOP + R BOT ). FB pin Voltage 40mV 0.8V 40mV x (RTOP + RBOT) /RBOT VOUT (CSPD Small) VOUT (CSPD Large) 40mV 0.8V x (RTOP + RBOT) /RBOT R1270S001A/B VFM Ripple FB vs. V OUT As shown in the above figure, the ripple of V OUT becomes larger when the C SPD is small. 14 R1270S No. EA-299-200624 The recommended C SPD value is selected to minimize the ripple of V OUT . When changing the R BOT value from the recommended value, please make sure the R BOT x C SPD is also in the range of the recommended value and change the C SPD together. Also, changing L, C OUT , R ER , C EC from the recommended value is required to change the C SPD . Furthermore, if the ripple of the VOUT is permissible, improving the loop stability is possible by adjusting the positive bump of the zero and pole. First, measure the voltage drop of the output by the load transient response without C SPD . Then measure the voltage drop again with attachment of small enough C SPD . If the selected C SPD is too small, the amount of the voltage drop will be the same value as the value without C SPD . Repeat the procedure with increasing C SPD value gradually. When the voltage drop begins to improve, suppose that value as C SPD1 . Further try other C SPD value by increasing it gradually, then the voltage drop improvement will stop. Suppose that the C SPD value as Cspd2. The appropriate C SPD value can be calculated as the next formula; C SPD = √ (C SPD1 x C SPD2 ). The zero will be low and pole will be high of the feedback resistor at the whole frequency range, the ripple at VFM mode will be lower than that V OUT (C SPD small) of above diagram FLAG Output Function The R1270S has an Nch open drain FLAG output. When abnormality is detected, the R1270S switches the Nch transistor On, and sets the FLG pin to “Low”. When the abnormality is removed, the R1270S switches the Nch transistor Off and sets the FLG pin to “High” (V FLGIN ). The UVD will function only when V FB < 0.64 V (Typ.) and at max duty detection or V FB < 0.64 V (Typ.) and current limit detection to prevent abnormal output behavior at load transient and input transient response. The following are the abnormal conditions that the IC can detect. • CE = ”L” (Shut down) • UVLO (Shut down) • Thermal Shutdown • during soft-start time (Css < 0.72 V) • VFB Under Voltage Detection (Typ.0.64 V) and maxduty detection • VFB Under Voltage Detection (Typ.0.64 V) and current limit detection • LMT pin Over Voltage Protection (Typ.1.2 V) • Absolute maximum 6V pin (except FB pin, LMT pin, EC pin) Over Voltage Detection (Typ. 3.0 V) • When the latch protection runs (R1270S001A) The FLG pin is designed to keep 0.4 V or less when the current running into the FLG pin is at 1 mA. The recommended values of V FLGIN and R FLG are 6 V or less for V FLGIN and 10 kΩ to 100 kΩ for R FLG . When the FLAG function is not used, set the FLG pin OPEN or connect to GND. 15 R1270S No. EA-299-200624 R1270S FLG RFLG “H” is detected under abnormal condition. VFLGIN V FLG R1270S001A/B FLAG Circuit VCE 1.0 V Time VFB 0.800 V (Typ.) VUVD 0.64 V (Typ.) 0.72 V (Typ.) VFLG Time tss VFLGIN 0.4 V > Time R1270S001A/B FLG Start-up / Shut-down Sequence 16 R1270S No. EA-299-200624 Soft-Start Time Function The soft-start time is between from ”H” level of CE to 90% of FB (0.72 V). The soft-start time for the R1270S could be adjusted by using an external capacitor C SS at the SS pin from minimum of internal soft-start time typical 0.4 ms. The charging current of the external C SS is 2.0 µA (Typ.) and the soft-start time becomes 3.6 ms typically (reaching the set output voltage is 4.0 ms (Typ.)) when C SS is 0.01 µF. If not required to adjust the soft-start time, set the SS pin OPEN. On the condition described in the chapter of “Electrical Characteristics”, the R1270S guarantees each of soft-start time (tss1/tss2) when the SS pin is set to “Open” or when C SS is set to 0.01 µF. C SS [μF] = 2 × tss / 0.72 R1270S001A/B Capacitor for Soft-Start Time Adjustment (C SS ) vs. Soft-Start Time (tss) Also, when C SPD is set large, the rising speed of VOUT may become slower than the soft-start time because of the bypass characteristic of the feedback resistor. Because the R1270S watches the output voltage using the FB pin voltage, the flag detection may be released before the VOUT is fully at set value. VFB 0.8V(Typ.) 0.72V(Typ.) VOUT VSET VFLG VFLGIN tSS R1270S001A/B Start-up / Shutdown Sequence 17 R1270S No. EA-299-200624 L X Current Limit By using external resistor R LMT to the LMT pin, Lx current limit (I LIMLXH ), which is high-side switch current limit, can be adjusted as typical 4.5 A at maximum. When R LMT is 54 kΩ, the Lx current limit is set at 2.0 A typical. If not required to adjust Lx current limit, set LMT pin OPEN so that the Lx current limit will be set at typically 4.5 A. Setting at 1.5 A or less is not recommended. On the condition described in the chapter of “Electrical Characteristics”, the R1270S guarantees each of LX limited current (I LIMLXH1 /I LIMLXH2 ) when connected each of 39 kΩ/220 kΩ resistors to the LMT pin. 500 400 300 200 RLMT [kΩ] 100 0 1.5 2 2.5 3 3.5 4 4.5 ILIMLXH [A] R LMT [kΩ] = (1200 × (I LIMLXH × 0.1033 + 0.13) − 120) / (12 − 20 × (I LIMLXH × 0.1033 + 0.13)) R1270S001A/B L X Current Limit Adjustment Resistor (R LMT ) vs. L X Limit Current (I LIMLXH ) BST Auxiliary Charge Circuit Under the oscillation frequency or conditions of input/output voltage level and load current, the BST capacitor charge may not be sufficient, and hence BST-Lx pin voltage level (Typ. 5.0 V) may not be reached. However, if the output voltage or another power line at 4.5 V to 6.0 V is supplied to the R1270S, a drop of BST pin voltage level can be prevented by connecting BST auxiliary charge circuit with BST pin via a diode. In this case, the voltage of Lx pin must be less than the voltage of the auxiliary charge circuit to charge C BST . Also, make sure not to exceed the maximum rating of 6.0 V for BST-Lx. When selecting the diode, 10 mA current rating is more than enough, but also be aware of the voltage rating, and the characteristic of reverse bias leak current at high temperature. DBST VIN VIN C IN VBSTIN BST CBSTIN CBST R1270S V OUT LX GND D COUT R1270S001A/B BST Charging Circuit 18 R1270S No. EA-299-200624 Sequence Composition By using the soft-start time and the FLAG function (R1270S001A/B), a power up sequence can be composed. The following describes an example application circuit to start up both DC/DC1 and DC/DC2 in a sequence so that the 5.0 V output will not to become lower than the DC/DC2 output 3.3 V under the following conditions: the input voltage is 12 V, two lines of output voltages are 5.0 V (DC/DC1) and 3.3 V (DC/DC2), the capacitor of the 5.0 V output is an electrolytic 470 µF, and the capacitor of the 3.3 V output is electrolytic 100 µF.  Soft-start time and charging current During the soft-start, the R1270S occurs the charging current I CHRG for the capacitor of V OUT besides the output current I OUT . Therefore, the output current I OUTSS will be given by the following equation, I OUTSS = I OUT + I CHRG = I OUT + V OUT x (C OUT + C L ) / t SS For the output current on the example application circuit, (DCDC1) I OUTSS = I OUT + V OUT / (C OUT + C L ) / t SS = I OUT + 5.0 V x (10 μF + 470 μF) / 26 ms = I OUT + 92 mA (DCDC2) I OUT2SS = I OUT2 + V OUT2 / (C OUT2 + CL2) / t SS = I OUT + 3.3 V x (10 μF + 100 μF) / 2.6 ms = I OUT2 + 140 mA Make sure that the output current does not exceed 3.0 A even at soft-start.  Using the output of R1270S as the flag pull-up voltage The R1270S has an Nch open drain FLAG output. When detecting an abnormal condition, the R1270S switches the Nch transistor On and sets the FLG pin to “Low”. If the detected condition is not applicable under the FLAG output function, FLAG output will reset to “High” after the completion of the soft-start. When using the V OUT as the V FLGIN , “High” level of the V FLG becomes the same with V OUT .  Using the FLAG output as CE pin input for another R1270S The minimum V CEL is 0.85 V and the maximum V CEH is 1.15 V. The maximum V FLGL is 0.4 V, and V FLGH for DC/DC1 on the example circuit is 5.0 V. So, V FLG is usable as CE input for DC/DC2.  Using the FLAG output as auto-discharge function When being shut down, the R1270S switches the Nch transistor On and sets the FLG pin to “Low”. And, V FLGIN sends the FLAG current I FLG via R FLG and Nch transistor. Thereby, the capacitor connected to V OUT can be discharged by using V OUT as V FLGIN . The maximum I FLG is that of V FLGIN divided by R FLG . Set R FLG so that maximum I FLG becomes lower than 5 mA. Do not connect V OUT directly to FLG pin because the I FLG may become excessive and may damage the IC. The V FLGL is regulated as I FLG = 1 mA. When the R FLG is set higher than I FLG = 1 mA, the maximum voltage 0.4 V of V FLGL is not guaranteed, hence the FLAG function itself may be spoiled. 19 R1270S No. EA-299-200624 (DCDC1) R1270S001A/B: V IN = 12 V, V OUT = 5.0 V, tss = 40 ms (C SS = 0.1 μF) (DCDC2) R1270S001A/B: V IN = 12 V, V OUT = 3.3 V, tss = 4.0 ms (C SS = 0.01 μF) R1270S001A/B CSS 0.1µF CBST V IN 12V BST TSS VIN CE Lx FLG VCE RCE V FLG CIN GND FB RBOT DCDC1 L RFLG 10kΩ RTOP CSPD VOU T 5.0V IOUT + D R1270S001A/B CSS2 0.01µF C BST2 CIN2 CL 470µF COUT 10µF BST TSS VIN CE Lx FLG GND VFLG2 IF LG2 FB RBOT2 DCDC2 L2 CSPD2 R FLG2 1.0kΩ RTOP2 VOUT 2 3.3V IOU T2 + D2 COU T2 10µF Example Circuit of Sequence Composition 20 CL2 100µF R1270S No. EA-299-200624 Operation of Buck Converter and Output Current The DC/DC converter charges energy in the inductor when the switch turns on, and discharges the energy from the inductor when the switch turns off and controls with less energy loss, so that a lower output voltage than the input voltage is obtained. Refer to the following figures. IL ILmin i1 VIN Switch L Diode i2 topen VOUT COUT GND ton toff t=1/fosc Basic Circuit Current Through Inductor Step 1: The switch turns on and current IL (=i1) flows, and energy is charged into C OUT . At this moment, IL increases from ILmin (=0) to reach ILmax in proportion to the on-time period (ton) of the switch. Step 2: When the switch turns off, the diode turns on in order to maintain IL at ILmax, and current IL (=i2) flows. Step 3: IL (=i2) decreases gradually and reaches IL = ILmin = 0 after a time period of topen, and the diode turns off. This case is called as discontinuous mode. If the output current becomes large, next switching cycle starts before IL becomes 0 and the diode turns off. In this case, IL value increases from ILmin (>0), and this case is called continuous mode. As for the PWM control system, the output voltage is maintained by controlling the on-time period (ton), with the oscillator frequency (fosc) being maintained constant. 21 R1270S No. EA-299-200624 Output Current and Selection of External Components The relation between the output current and external components is as follows: When the switch of LX turns on: (Wherein, the peak to peak value of the ripple current is described as IRP, the ON resistance of the switch is described as R ONH , and the diode forward voltage as V F , and the DC resistance of the inductor is described as R L , and on time of the switch is described as ton) V IN = V OUT + (R ONH + R L ) x I OUT + L x I RP / ton ······························································· Equation 1 When the switch turns off (the diode turns on) as toff: L x I RP / toff = V F + V OUT + R L x I OUT ············································································ Equation 2 Put Equation 2 to Equation 1 and solve for ON duty of the switch, ton / (ton + toff) = D ON , D ON = (V OUT + V F + R L x I OUT ) / (V IN + V F − R ONH x I OUT ) ·················································· Equation 3 Ripple Current is as follows: I RP = (V IN − V OUT − R ONH x I OUT − R L x I OUT ) x D ON / fosc / L ·············································· Equation 4 Then, peak current that flows through L, and the peak current ILmax is as follows: ILmax = I OUT + I RP / 2 ······························································································· Equation 5 As for the valley current ILmin, ILmin = I OUT − I RP / 2 ································································································ Equation 6 If ILmin 0A fosc = 1000kHz / VOUT = 3.3V / VFM PWM VIN = 12V / IOUT = 0A -> 1A 3.7 3.3 3.1 Output Current 2 1 0 0 0.02 0.04 time [ms] 0.06 3.3 2 Output Current 1 0 0 0.08 0.1 0.2 time [s] 0.3 0.4 fosc = 1000kHz / VOUT = 3.3V / VFM PWM VIN = 12V / IOUT = 3A -> 1A fosc = 1000kHz / VOUT = 3.3V / VFM PWM VIN = 12V / IOUT = 1A -> 3A 3.6 3.5 3.4 3.2 Output Current 3 1.5 0 0 0.04 0.08 time [ms] 0.12 0.16 Output Current [A] 3.3 3.5 Output Voltage 3.4 3.3 3 Output Current 1.5 0 0 0.04 0.08 time [ms] 0.12 0.16 41 Output Current [A] Output Voltage Output Voltage [V] 3.6 Output Voltage [V] Output Voltage 3.5 Output Current [A] Output Voltage [V] Output Voltage 3.5 Output Current [A] Output Voltage [V] 3.7 R1270S No. EA-299-200624 fosc = 2000 kHz fosc = 2000kHz / VOUT = 5.0V / VFM PWM VIN = 12V / IOUT = 1A -> 0A fosc = 2000kHz / VOUT = 5.0V / VFM PWM VIN = 12V / IOUT = 0A -> 1A Output Current 1 0 0 0.04 0.08 time [ms] 0.12 Output Voltage [V] 5 Output Current [A] 5.1 5 0 0.16 0 0.3 0.4 5.5 Output Voltage 5.25 4.75 3 Output Current 1.5 0 0 0.02 0.04 time [ms] 0.06 0.08 Output Current [A] 5 Output Voltage [V] 5.5 Output Voltage [V] 0.1 0.2 time [s] fosc = 2000kHz / VOUT = 5.0V / VFM PWM VIN = 12V / IOUT = 3A -> 1A fosc = 2000kHz / VOUT = 5.0V / VFM PWM VIN = 12V / IOUT = 1A -> 3A 42 1 Output Current Output Voltage 5.25 5 3 Output Current 1.5 0 0 0.02 0.04 time [ms] 0.06 0.08 Output Current [A] Output Voltage [V] 5.1 4.9 Output Voltage 5.2 Output Current [A] Output Voltage 5.2 R1270S No. EA-299-200624 21) Output current vs. Output voltage fosc = 300 kHz fosc = 300kHz / VOUT = 3.3V VIN = 12V 3.5 ( Ta = 25°C) Output Voltage [V] 3.45 3.4 3.35 3.3 3.25 12V VFMPWM 3.2 12V PWM 3.15 3.1 0 1000 2000 3000 Output Current [mA] 4000 fosc = 1000 kHz fosc = 1000kHz / VOUT = 3.3V VIN = 12V 3.5 ( Ta = 25°C) Output Voltage [V] 3.45 3.4 3.35 3.3 3.25 12V VFMPWM 3.2 12V PWM 3.15 3.1 0 1000 2000 3000 Output Current [mA] 4000 fosc = 2000 kHz fosc = 2000kHz / VOUT = 5.0V VIN = 12V Output Voltage [V] 5.3 ( Ta = 25°C) 5.2 5.1 5 4.9 12V VFMPWM 4.8 12V PWM 4.7 0 1000 2000 3000 Output Current [mA] 4000 43 R1270S No. EA-299-200624 22) Input transient response fosc = 300 kHz fosc = 300kHz / VOUT = 3.3V / VFM PWM VIN = 8V 16V / IOUT = 0.1A fosc = 300kHz / VOUT = 3.3V / VFM PWM VIN = 8V 16V / IOUT = 1.5A Output Voltage 3.5 3.3 Input Voltage 16 8 0 0 2 4 time [ms] 3.4 3.3 3.25 Input Voltage 3.2 3.15 16 3.1 8 0 3.05 8 6 Output Voltage 3.35 0 2 4 time [ms] 6 Input Voltage [V] 3.7 Output Voltage [V] 3.45 Input Voltage [V] Output Voltage [V] 3.9 8 fosc = 1000 kHz fosc = 1000kHz / VOUT = 3.3V / VFM PWM VIN = 8V 16V / IOUT = 1.5A fosc = 1000kHz / VOUT = 3.3V / VFM PWM VIN = 8V 16V / IOUT = 0.1A 3.45 Output Voltage 3.5 3.3 Input Voltage 16 8 0 0 2 4 time [ms] 6 3.4 Output Voltage 3.35 3.3 3.25 Input Voltage 16 8 0 0 8 2 4 time [ms] 6 Input Voltage [V] Output Voltage [V] 3.7 Input Voltage [V] Output Voltage [V] 3.9 8 fosc = 2000 kHz fosc = 2000kHz / VOUT = 5.0V / VFM PWM VIN = 8V 16V / IOUT = 1.5A fosc = 2000kHz / VOUT = 5.0V / VFM PWM VIN = 8V 16V / IOUT = 0.1A 5.1 Output Voltage [V] 5.4 Output Voltage 5.2 5 5 4.95 8 0 0 2 4 time [ms] 6 8 16 8 0 0 2 4 time [ms] 6 8 Input Voltage [V] 16 44 Output Voltage 5.05 Input Voltage Input Voltage Input Voltage [V] Output Voltage [V] 5.6 R1270S No. EA-299-200624 23) Input voltage vs. Output voltage fosc = 300 kHz fosc = 300kHz / VOUT = 3.3V / VFM PWM fosc = 300kHz / VOUT = 3.3V / PWM 3.4 ( IOUT ) 0mA 1mA 10mA 100mA 1A 3A 3.36 3.34 3.32 3.3 3.28 3.26 ( IOUT ) 3.38 0mA 1mA 10mA 100mA 1A 3A 3.36 Output Voltage [V] 3.38 Output Voltage [V] 3.4 3.34 3.32 3.3 3.28 3.26 3.24 3.24 3.22 3.22 3.2 3.2 0 10 20 Input Voltage [V] 30 0 10 20 Input Voltage [V] 30 fosc = 1000 kHz fosc = 1000kHz / VOUT = 3.3V / VFM PWM fosc = 1000kHz / VOUT = 3.3V / PWM 3.4 3.34 3.32 3.3 3.28 3.26 Output Voltage [V] 0mA 1mA 10mA 100mA 1A 3A 3.36 Output Voltage [V] 3.4 ( IOUT ) 3.38 0mA 3.36 1mA 3.34 10mA 3.32 100mA 3.3 1A 3.28 3A 3.26 3.24 3.24 3.22 3.22 3.2 ( IOUT ) 3.38 3.2 0 10 20 Input Voltage [V] 30 0 10 20 Input Voltage [V] 30 fosc = 2000 kHz fosc = 2000kHz / VOUT = 5.0V / VFM PWM fosc = 2000kHz / VOUT = 5.0V / PWM 5.3 5.1 5 4.9 ( IOUT ) 5.08 0mA 1mA 10mA 100mA 1A 3A 5.06 Output Voltage [V] 0mA 1mA 10mA 100mA 1A 3A 5.2 Output Voltage [V] 5.1 ( IOUT ) 5.04 5.02 5 4.98 4.96 4.94 4.8 4.92 4.7 4.9 5 15 25 Input Voltage [V] 35 5 15 25 Input Voltage [V] 35 45 POWER DISSIPATION HSOP-18 Ver. B The power dissipation of the package is dependent on PCB material, layout, and environmental conditions. The following measurement conditions are based on JEDEC STD. 51-7. Measurement Conditions Item Measurement Conditions Environment Mounting on Board (Wind Velocity = 0 m/s) Board Material Glass Cloth Epoxy Plastic (Four-Layer Board) Board Dimensions 76.2 mm × 114.3 mm × 0.8 mm Copper Ratio Outer Layer (First Layer): Less than 95% of 50 mm Square Inner Layers (Second and Third Layers): Approx. 100% of 50 mm Square Outer Layer (Fourth Layer): Approx. 100% of 50 mm Square Through-holes φ 0.3 mm × 21 pcs Measurement Result (Ta = 25°C, Tjmax = 125°C) Item Measurement Result Power Dissipation 3100 mW Thermal Resistance (θja) θja = 32°C/W Thermal Characterization Parameter (ψjt) ψjt = 8 °C/W θja: Junction-to-Ambient Thermal Resistance ψjt: Junction-to-Top Thermal Characterization Parameter 4000 3900 Power Dissipation PD (mW) 3500 3000 3100 2500 2000 1500 1000 500 0 0 25 50 75 100105 125 150 Ambient Temperature (°C) Power Dissipation vs. Ambient Temperature Measurement Board Pattern The above graph shows the power dissipation of the package at Tjmax = 125°C and Tjmax = 150°C. Operating the device in the hatched range might have a negative influence on its lifetime. The total hours of use and the total years of use must be limited as follows: Total Hours of Use Total Years of Use (4 hours/day) 13,000 hours 9 years i PACKAGE DIMENSIONS HSOP-18 Ver. A ∗ HSOP-18 Package Dimensions i 1. The products and the product specifications described in this document are subject to change or discontinuation of production without notice for reasons such as improvement. Therefore, before deciding to use the products, please refer to Ricoh sales representatives for the latest information thereon. 2. The materials in this document may not be copied or otherwise reproduced in whole or in part without prior written consent of Ricoh. 3. Please be sure to take any necessary formalities under relevant laws or regulations before exporting or otherwise taking out of your country the products or the technical information described herein. 4. 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