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R1271L501A-TR

R1271L501A-TR

  • 厂商:

    RICOH(理光)

  • 封装:

    WFDFN12

  • 描述:

    30V, 1A SYNCHRONOUS PWM STEP-DOW

  • 数据手册
  • 价格&库存
R1271L501A-TR 数据手册
R1271x Series 30 V, 1 A Synchronous PWM Step-down DC/DC Converter No. EA-517-201127 OVERVIEW The R1271x is a synchronous step-down DC/DC converter with a maximum input voltage rating of 42V. This device is suitable for small inductors with the switching frequency of 2 MHz. The external components are only an inductor and several capacitors and a resistance. The tiny DFN package option makes the power circuit compact . KEY BENEFITS ● High efficiency 85% is realized with switching frequency of 2 MHz ● The output voltage is maintained at cranking by reducing a switching frequency to minimum 1/4 of normal frequency. ● EMI noise reduction by using a spread spectrum clock generator. (Diffusion Rate: +10%). TYPICAL APPLICATION KEY SPECIFICATIONS • • • • • • • • • • • • • • • • • • Input Voltage Range (Maximum Ratings): 3.6 V to 30 V (42 V) Start-up Voltage: 4.5 V Standby Current: Typ. 4 µA Operating Temperature Range: -40°C to 105°C Output Voltage Accuracy: ±1.0% (Ta = 25°C) Oscillator Frequency: Typ.2 MHz (Fixed inside the IC) Spread Spectrum Clock Generator (SSCG): Diffusion Rate: Typ. +10% Minimum On-Time: Typ. 70 ns Minimum Off-Time: Typ. 120 ns Duty-over: Oscillation Frequency x 1 ~ 1/4 Soft start function Thermal Shutdown: Typ. Tj = 160°C Undervoltage Lockout (UVLO): VCC = 3.3 V (Typ.) Overvoltage Lockout (OVLO): VIN = 35 V (Typ.) Overvoltage Detection (OVD): Output Voltage (VOUT) +10% LX Current Limit: Typ. 1.8 A (LIMIT Pin Open) High-side MOS FET On Resistance: Typ. 0.4 Ω Low-side MOS FET On Resistance: Typ. 0.2 Ω L CIN CVCC RCE CE Control VIN VCC LIMIT VOUT LX R1271x CSS CE CBST BST GND VOUT COUT PGOOD PCB EXAMPLE 9.1 ㎜ 7.6 ㎜ PACKAGES EV Board (DFN3030-12B) OPTIONAL FUNCTIONS Product Name Set Output Voltage (VSET) R1271x331∗ 3.3 V R1271x501∗ 5.0 V Product Name *Wettable Flanks DFN3030-12B 3.0 x 3.0 x 0.8 (mm) HSOP-18 5.2 x 6.2 x 1.45 (mm) APPLICATIONS ● Digital Electronics: Digital TVs, DVD Players ● R1271xxx1A R1271xxx1B R1271xxx1C R1271xxx1D Overcurrent Protection Hiccup-type Latch-type Hiccup-type Latch-type SSCG Disable Disable Enable Enable Portable Communication Equipment, Cameras, Video Cameras 1 R1271x No. EA-517-201127 SELECTION GUIDE The set Output Voltage, the Optional functions and Quality class can be designated by user’s request. Selection Guide Product Name R1271Lxx1*-TR R1271Sxx1*-E2-FE Package Quantity per Reel Pb Free Halogen Free DFN3030-12B 3,000 pcs Yes Yes HSOP-18 1,000 pcs Yes Yes xx:Select the Set Output Voltage (VSET). xx 33 50 Set Output Voltage (VSET) 3.3 V 5.0 V ∗:Select the optional functions. ∗ A B C D Overcurrent Protection SSCG Hiccup-type Latch-type Hiccup-type Latch-type Disable Disable Enable Enable 2 R1271x No. EA-517-201127 BLOCK DIAGRAM VIN VOUT VOUT Open Detection Soft_Start Over Voltage Detection OVD Under Voltage Detection UVD Open_Det VCC VCC Regulator INT Regulator VCC Int_Reg OVD SHDN OFF_Pulse BST OFF_Pulse HSMOSFET Drive Circuit Int_Reg SSCG_EN VCO S Q LX Set_Pulse 2uA - + CSS + Soft Start Circuit Soft_Start OVD SHDN LSMOSFET R GND Rev Slope Reverse Detection OVD SHDN Reference Hiccup/Latch VIN VOUT CE ILIM Hiccup /Latch 1.2V + UVD Open_Det Peak Current Limit LIMIT Hiccup/Latch Thermal Shutdown VCC UVLO VIN OVLO SHDN Soft_Start SHDN OVD UVD PGOOD R1271x Block Diagram 3 R1271x No. EA-517-201127 PIN DESCRIPTIONS Top View Bottom View R1271L (DFN3030-12B) Pin Configuration ∗ The tab on the bottom of the package is substrate level (GND). The tab must be connected to the ground plane on the board. R1271L (DFN3030-12B) Pin Description Pin No. Pin Name (1) Description 1 VIN 2 NC (1) Power Supply Pin No Connection 3 VCC VCC Output Pin 4 LIMIT Current Limit Adjustment Pin 5 CSS Soft-start Adjustment Pin 6 CE 7 PGOOD Chip Enable Pin, Active-high 8 VOUT Output Voltage Feedback Input Pin 9 NC (1) No Connection 10 GND GND Pin 11 BST Bootstrap Pin 12 LX Switching Pin Power Good Pin It is recommended to set the NC pin left open to prevent failure caused by adjacent pins’ short circuit. 4 R1271x No. EA-517-201127 Top View Bottom View R1271S (HSOP-18) Pin Configuration ∗ The tab on the bottom of the package is substrate level (GND). The tab must be connected to the ground plane on the board. R1271S (HSOP-18) Pin Description Pin No. Pin Name (1) (2) Description 1, 2 VIN (1) Power Supply Pin 3, 4 NC(2) No Connection 5 VCC VCC Output Pin 6 LIMIT Current Limit Adjustment Pin 7 CSS Soft-start Adjustment Pin 8 NC(2) No Connection 9 CE 10 PGOOD Chip Enable Pin, Active-high Power Good Pin 11 VOUT Output Voltage Feedback Input Pin 12 NC(2) No Connection 13, 14, 15 GND(1) 16 BST Bootstrap Pin 17, 18 LX(1) Switching Pin GND Pin The pins with the same name should be tied together except NC pins. It is recommended to set the NC pin left open to prevent failure caused by adjacent pins’ short circuit. 5 R1271x No. EA-517-201127 ● Equivalent Circuits for the Individual Terminals VIN Int_Reg VCC Equivalent Circuit for VCC Pin LIMIT Equivalent Circuit for LIMIT Pin VIN VIN CSS CE Equivalent Circuit for CSS Pin PGOOD Equivalent Circuit for PGOOD Pin VIN Equivalent Circuit for CE Pin VOUT Equivalent Circuit for VOUT Pin VCC BST LX Equivalent Circuit for BST-LX Pin 6 R1271x No. EA-517-201127 ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings Symbol Parameter Rating Unit −0.3 to 42 V −0.3 to VIN+0.3 ≤ 42 V −0.3 ~ 3 V VIN VIN Pin Input Voltage VCE CE Pin Voltage VCSS CSS Pin Voltage VOUT VOUT Pin Voltage −0.3 to 30 V VCC Pin Voltage −0.3 to 6 V Internally Limited mA LX−0.3 to LX+6 V −0.3 to VIN +0.3 ≤ 36 V PGOOD Pin Voltage −0.3 to 16 V VLIMIT LIMIT Pin Voltage −0.3 to 6 V PD Power Dissipation Tj Junction Temperature Range −40 to 125 °C Tstg Storage Temperature Range −55 to 125 °C VCC VCC Pin Output Current VBST BST Pin Voltage VLX LX Pin Voltage VPGOOD Refer to Appendix “POWER DISSIPATION” ABSOLUTE MAXIMUM RATINGS Electronic and mechanical stress momentarily exceeded absolute maximum ratings may cause permanent damage and may degrade the lifetime and safety for both device and system using the device in the field. The functional operation at or over these absolute maximum ratings is not assured. RECOMMENDED OPERATING CONDITIONS Recommended Operating Conditions Symbol Parameter VIN Operating Input Voltage Ta Operating Temperature Range VUP PGOOD Pin Pull-up Voltage Rating 3.6 to 30 −40 to 105 0 to 5.5 Unit V °C V RECOMMENDED OPERATING CONDITIONS All of electronic equipment should be designed that the mounted semiconductor devices operate within the recommended operating conditions. The semiconductor devices cannot operate normally over the recommended operating conditions, even if they are used over such conditions by momentary electronic noise or surge. And the semiconductor devices may receive serious damage when they continue to operate over the recommended operating conditions. 7 R1271x No. EA-517-201127 ELECTRICAL CHARACTERISTICS VIN = 12 V, VCE = VIN, unless otherwise specified. The specifications surrounded by are guaranteed by design engineering at −40°C ≤ Ta ≤ 105°C. R1271x Electrical Characteristics Symbol Parameter Start-up Voltage VSTART VCC Pin Voltage (VCC-GND) VCC ISTANDBY IVIN1 VUVLOF VUVLOR VOVLOR VOVLOF Standby Current VIN Consumption Current 1 at PWM switching stop Undervoltage Lockout (UVLO) Threshold Voltage Overvoltage Lockout (OVLO) Threshold Voltage Output Voltage (R1271x331x) VOUT Output Voltage (R1271x501x) fOSC0 tSS1 tSS2 ITSS VSSEND RDIS_CSS ILXLIMIT VCEH VCEL ICEH ICEL IVOUTH VPGOODOFF IPGOODOFF VOVDR VOVDF VUVDF VUVDR Oscillator Frequency 0 Soft-start Time 1 Soft-start Time 2 Soft-start Pin Charging Current CSS Pin Voltage at soft-start stop CSS Pin Discharge Resistance LX Current Limit (High-side MOS FET) CE ”High” Input Voltage CE ”Low” Input Voltage CE ”High” Input Current CE ”Low” Input Current VOUT ”High” Pin Current PGOOD “Low” Output Voltage PGOOD Pin Leakage Current Overvoltage Detection (OVD) Threshold Voltage Overvoltage Release (OVD) Threshold Voltage Undervoltage Detection (UVD) Threshold Voltage Undervoltage Release (UVD) Threshold Voltage Conditions Min. Typ. VOUT = VSET x 1.05 VCE = 0 V VIN = 30 V, VCE = 0 V 4.75 5 4 30 VOUT = VSET x 1.05 VCC Falling VCC Rising VIN Rising VIN Falling Ta = 25°C −40°C ≤ Ta ≤ 105°C Ta = 25°C −40°C ≤ Ta ≤ 105°C 8 V ≤ VIN ≤ 16 V, IOUT = 0 A CSS = OPEN CSS = 4.7 nF VCSS = 0 V VIN = 4.5 V, VCE = 0 V, VCSS = 3 V DC Current, LIMIT = OPEN DC Current, LIMIT = 0V VIN = VCE = 30 V VIN = 30V, VCE = 0 V 3.10 4.10 33.6 32.0 3.267 3.234 4.950 4.900 1800 0.36 1.4 1.8 VOUT Rising VOUT Falling VOUT Falling VOUT Rising µA 1.0 1.35 mA 3.3 4.3 35 34 3.50 4.49 36.75 36.2 3.333 V V V V 3.3 5.0 2000 0.5 2 3.366 5.050 V 5.100 2200 kHz 0.75 ms 2.0 ms 2.2 µA 0.635 0.64 0.705 V 1.8 3 5 kΩ 1.5 0.75 1.25 1.8 1.0 2.3 1.25 A -0.1 130 1.2 0 VIN = 3.6 V, IPGOOD = 1 mA VIN = 30V, VPGOOD = 6 V (Ta = 25°C) Max. Unit 4.5 V 5.25 V -0.1 VSET x1.06 VSET x1.02 VSET x0.86 VSET x0.88 0 VSET x1.10 VSET x1.07 VSET x0.90 VSET x0.93 1.1 2.45 0.1 390 0.35 0.1 VSET x1.14 VSET x1.12 VSET x0.94 VSET x0.98 V V µA µA µA V µA V V V V All test items listed under Electrical Characteristics are done under the pulse load condition (Tj ≈ Ta = 25°C). 8 R1271x No. EA-517-201127 • TYPICAL APPRICATION CIRCUIT CIN LIMIT R1271x CE RCE CBST GND VOUT VUP RPG VOUT CSS CSS CE Control BST VCC CVCC L LX VIN PGOOD PGOOD COUT R1271x Typical Application Circuit Recommended Ceramic Capacitors Symbol Capacitance Tolerance Voltage resistance CIN COUT CBST CVCC 10 µF 10 µF 0.1 µF 1.0 µF ±10% ±10% ±10% ±20% 50 V 50 V 25 V 16 V Symbol L Inductance 2.2 µH Tolerance ±20% Temperature characteristics X7R X7S X7R X7R Rated current 3.3A It is recommended to set 1 kΩ or higher for RCE and 10 kΩ or higher for RPG 9 R1271x No. EA-517-201127 THEORY OF OPERATION Operation of Step-down DC/DC Converter The basic operation of the step-down DC/DC converter is shown in the following figures. ILMAX IL L VIN LS-MOSFET i1 i1 HS-MOSFET i2 0 VOUT COUT i2 ΔIL IOUT ILMIN tONHS t tOFFHS T=1/fOSC Basic Circuit Step1. Current Through Inductor When the high-side MOSFET turns on, current IL (= i1) flows through the Inductor(L) to charge COUT and provide IOUT. At this moment, IL increases from ILMIN to reach ILMAX in proportion to the on-time period (tON) of the high-side MOSFET. Step2. When the high-side MOSFET turns off, the low-side MOSFET turns on to flow current IL (= i2). Step3. The low-side MOSFET turns on until going to the next cycle. When IOUT is small, the low-side MOS FET must keep “on” to meet IL = ILMIN < 0. In the PWM mode, the output voltage is maintained constant by controlling tONHS with the constant switching frequency (fOSC). 10 R1271x No. EA-517-201127 Calculation of Inductor Current The peak inductor current ILMAX can be estimated by the following equation. ILMAX = IOUT + 1 / 2 × (VIN – VOUT) / L × VOUT / VIN / fOSC Example: ILMAX = 1A + 1/2 × (12V – 5V) / 2.2µH × 5V / 12V / 2MHz = 1.331 A The above can be calculated from the equation with the inductor current in continuous mode of a general step-down DC/DC converter. The P-P value of the inductor ripple current is “ΔIL”. The ΔIL is calculated by Equation 1 when the high side MOS FET is ON. ΔIL = ( VIN – VOUT ) / L × tONHS ··················································································· Equation 1 The ΔIL is calculated by Equation 2 when the high side MOS FET is OFF. ΔIL = VOUT / L × tOFFHS ···························································································· Equation 2 Using Equation 2 to Equation 1, the ON duty of the high side MOS FET tONHS / (tONHS + tOFFHS) = DON is solved by Equation 3. DON = VOUT / VIN ····································································································· Equation 3 And then, the ripple current ΔIL is calculated by substituting tONHS = Don / fOSC into Equation 1. ΔIL = (VIN − VOUT) / L × DON / fosc ·············································································· Equation 4 At this time, ILMAX flowing in the inductor and high side MOS FET is calculated by Equation 5. ILMAX = IOUT + ΔIL / 2 ·································································································· Equation 5 Therefor ILMIN is calculated by Equation 6. ILMIN = IOUT − ΔIL / 2 ·································································································· Equation 6 Note that the input-output conditions and peripheral components should be determined in consideration of ILMAX and ILMIN. The above calculations are based on the ideal operation in continuous mode. 11 R1271x No. EA-517-201127 UVLO (Undervoltage Lockout) When the VCC pin voltage decreases below the UVLO detection threshold voltage due to the input voltage decrease, the R1271x turns the switching off to prevent the malfunction of the device. Due to the switching stop, the output voltage decreases according to the load and COUT. If the VCC pin voltage increases above the UVLO release threshold voltage, the device restarts the operation with soft-start. Input Voltage (VIN) Internal Regulator Voltage (VCC) UVLO Release Voltage (VUVLOR) UVLO Detection Voltage (VUVLOF) LX Voltage (VLX) Output Voltage (VOUT) Soft-start Time (tSS) OVLO (Overvoltage Lockout) When the input voltage rises above the OVLO detection threshold of voltage, the R1271x turns the switching off to prevent malfunctions of the device or damage on the high side MOS FET and low side MOS FET due to overvoltage. Due to the switching stop, the output voltage decreases according to the load and COUT. If the input voltage decreases below the OVLO release threshold voltage, the device restarts the operation with soft start. Note that this function does not guarantee the operation exceeding the absolute maximum ratings. OVLO Detection Voltage (VOVLOR) OVLO Release Voltage (VOVLOF) Input Voltage (VIN) LX Voltage (VLX) Output Voltage (VOUT) Soft-start Time (tSS) 12 R1271x No. EA-517-201127 Duty-over Function When the input voltage is dropped at when the input voltage drops, the R1271x linearly changes the operating frequency to 1/4 of the set oscillator frequency in order to maintain the output voltage. This increases the on duty and reduce the voltage difference between input and output. The duty-over starts operating when it detects the minimum off-time. Input Voltage (VIN) Output Voltage (VOUT) Dashed line: without duty-over function Oscillation Frequency (fOSC) OFFDUTY = TOFF fOSC/4 Frequency modulation by duty over Minimum Off-Time The minimum off time indicates the minimum time that the high side MOS FET can be turned off within the oscillation period. The minimum off time (Typ. 120 ns) of R1271x is determined by the internal circuit, using a NMOS of high side MOS FET by adopting bootstrap method. Charging a voltage to drive the high side MOS FET is needed, and the minimum off time is determined by the time required for charging. When the input voltage is low or sudden load transient occurs, the high-side MOS FET is turned off at least every 4 cycles by the duty over function substantially. The input / output voltage difference is decreased by increasing the maximum duty ratio. Minimum On-Time The minimum on-time indicates the minimum time duration that the R1271x can turn the high-side MOS FET on during the oscillation period. The minimum on-time (Typ. 70 ns) of the device is determined by the internal circuit. The device cannot generate a pulse width that is less than the pulse width of minimum on-time. If the minimum step-down ratio/ the oscillator frequency: [VOUT / VIN x (1 / fOSC)].is less than the minimum on-time, the pulse skipping occurs, which stabilizes the output voltage but increases the ripple of current and voltage. 13 R1271x No. EA-517-201127 Standby Function When the CE pin voltage drops below 1.1V (“Low” threshold voltage), switching is turned off. If the CE pin voltage rises above the 1.25 V (“High” threshold voltage), the R1271x will restart with a soft start. In order for the VIN current to be the standby current (ISTANDBY), the CE pin voltage must be 0.4V or less. Overvoltage Detection (OVD) The OVD function monitors the output voltage. Switching stops even if the internal circuit is active state, when detecting the overvoltage. The OVD detection voltage is Typ.110% of VSET, and the PGOOD pin outputs "Low" when VOUT is over the OVD detection threshold voltage for Typ.15 μs or more. When VOUT is under 107% (Typ.) of VSET, the PGOOD pin outputs “High” after delay time (Typ.120 µs). Then, switching is controlled by normal operation. Under Voltage Detection (UVD) The UVD function monitors the output voltage. The UVD detection voltage is Typ.90% of VSET, and the PGOOD pin outputs "Low" when VOUT is less than the UVD detection threshold voltage for Typ.15 μs or more. When VOUT is over 93% (Typ.) of VSET, the PGOOD pin outputs “High” after delay time (Typ.120 µs.). Then, the overcurrent protection works when detecting a current limit during the UVD detection. Output Voltage (VOUT) VOVDR VOVDF VSET VUVDR VUVDF LX Voltage (VLX) VLX PGOOD Voltage (VPGOOD) VUP Typ. 15μs Typ. 120μs Typ. 15μs Typ. 120μs Overvoltage detection / undervoltage detection sequence 14 R1271x No. EA-517-201127 PGOOD (Power Good) Function The power good function with using a Nch open drain output pin can detect the following states of the R1271x. The NMOS FET turns on and the PGOOD pin becomes “Low” when detecting them. ・VCE
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