RP300x Series
High Accuracy Voltage Detector with Delay Function (Internal Counter Type)
No.EA-306-210329
OUTLINE
The RP300x is a voltage detector (VD) IC with a built-in output delay circuit. The RP300x is available in
internally fixed detector threshold type. When the VDD voltage becomes lower than the preset voltage, the
RP300xxxxA/C generates a “L” reset signal and the RP300xxxxB(1) generates a “H” reset signal. The detector
threshold accuracy is as high as ±1.0% when −VSET(2) < 1.7 V and ±0.8% when 1.7 V ≤ −VSET.
The reset output signal remains asserted for 50 ms, 100 ms(3) or 200 ms after the VDD voltage rises above the
threshold voltage or when manual reset is canceled. The RP300x is designed to ignore fast transients on the
VDD pin. The output delay time accuracy is as high as ±5.0%. The RP300x is available in an Nch open drain
output type or in a CMOS output type. The RP300x is offered in a small DFN(PLP)1010-4B package or in a
SOT-23-5 package.
FEATURES
•
•
•
Operating Voltage Range (Maximum Rating) ········· 0.72 V to 5.50 V (6.0V)
•
•
•
•
•
•
•
Detector Threshold Accuracy ····························· ±1.0% (−VSET < 1.7 V), ±0.8% (1.7 V ≤ −VSET)
Supply Current ··············································· Typ. 0.95 µA (−VSET = 3.08 V, VDD = 3.18 V)
Detector Threshold Range ································ 1.1 V, 2.32 V, 2.63 V, 2.7 V, 2.8 V, 2.93 V, 3.08 V,
4.2 V, 4.38 V, 4.6 V
Detector Threshold Temperature Coefficient ·········· Typ. ±50 ppm/°C
Released Output Delay Time ····························· Typ. 50 ms, 100 ms (Custom IC), 200 ms
Released Output Delay Time Accuracy ················ ±5% (Ta=25°C), ±15% (−40°C ≤ Ta ≤ 85°C)
Output Type ··················································· Nch Open Drain output, CMOS Output
Reset Signal ·················································· Active-low, Active-high (Custom IC)
Package ························································ DFN(PLP)1010-4B ( 1.0 mm x 1.0 mm x 0.6 mm )
SOT-23-5 ( 2.9 mm x 2.8 mm x 1.1 mm )
APPLICATIONS
•
•
(1)
(2)
(3)
Voltage monitoring for handheld communication equipment, camera and VCRs.
Voltage monitoring for battery-powered equipment
RP300xxxxB is a custom IC. For more information about a custom IC, please contact our sales representatives.
−VSET is defined as a preset detector threshold.
Delay time of 100ms is offered as a custom IC.
1
RP300x
No.EA-306-210329
SELECTION GUIDE
With the RP300x, the detector threshold, the package type, the released output delay time and the output type
are user-selectable options.
Package
Quantity per Reel
Pb Free
Halogen Free
DFN(PLP)1010-4B
10,000 pcs
Yes
Yes
SOT-23-5
3,000 pcs
Yes
Yes
Product Name
RP300Kxxy∗(z)-TR
RP300Nxxy∗(z)-TR-FE
xx: Specify −VSET from 1.1 V (11), 2.32 V (23), 2.63 V (26), 2.7 V (27), 2.8 V (28), 2.93 V (29),
3.08 V (30), 4.2 V (42), 4.38 V (43), 4.6 V (46).
z: If −VSET includes the 3rd digit, indicate the digit of 0.01 V.
Ex. If −VSET is 2.63 V, indicate as RP300x26xx3-TR-x.
y: Specify the released output delay time.
(A) 50 ms
(B) 100 ms (custom IC)
(D) 200 ms
∗: Specify the output type.
(A) Nch Open Drain Output
(B) Nch Open Drain Inverting Output (custom IC)
(C) CMOS Output
BLOCK DIAGRAMS
RP300xxxxA/B (Nch Open Drain Output)
RP300xxxxC (CMOS Output)
2
RP300x
No.EA-306-210329
PIN DESCRIPTION
Top View
4
Bottom View
3
3
Top View
5
4
4
(mark side)
1
2
2
1
1
RP300K [DFN(PLP)1010-4B]
2
3
RP300N (SOT- 23-5)
RP300K Pin Description
Pin No.
Symbol
Pin Description
1
OUT
Output Pin
RP300xxxxA/C: asserts an active-low reset signal when a voltage drops
below the detector threshold.
RP300xxxxB: asserts an active-high reset signal when a voltage drops
below the detector threshold. (custom IC)
2
MR
Manual Reset Input Pin: active-low
3
GND
Ground Pin
4
VDD
Power Supply Pin
The tab on the bottom of the package enhances thermal performance and is electrically connected to GND (substarate
level). It is recommended that the tab be connected to the ground plane on the board. If not, the tab can be left open.
RP300N Pin Description
Pin No.
Symbol
1
MR
2
GND
3
NC
Description
Manual Reset Input Pin: active-low
Ground Pin
No Connection
4
OUT
Output Pin
RP300xxxxA/C: asserts an active-low reset signal when a voltage drops
below the detector threshold.
RP300xxxxB: asserts an active-high reset signal when a voltage drops
below the detector threshold. (custom IC)
5
VDD
Power Supply Pin
3
RP300x
No.EA-306-210329
ABSOLUTE MAXIMUM RATINGS
Symbol
VIN
OUT
Parameter
Input Voltage
Output Voltage (Nch Open Drain Output)
Rating
Unit
6.0
V
−0.3 to 6.0
V
Output Voltage (CMOS Output)
−0.3 to VDD +0.3
MR
Manual Reset Pin
−0.3 to VDD +0.3
V
IOUT
Output Current
20
mA
PD
Power Dissipation(1)
DFN(PLP)1010-4B
800
(JEDEC STD. 51-7)
SOT-23-5
660
mW
Tj
Junction Temperature Range
−40 to 125
°C
Tstg
Storage Temperature Range
−55 to 125
°C
ABSOLUTE MAXIMUM RATINGS
Electronic and mechanical stress momentarily exceeded absolute maximum ratings may cause the permanent
damages and may degrade the life time and safety for both device and system using the device in the field.
The functional operation at or over these absolute maximum ratings are not assured.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Rating
Unit
VDD
Operating Voltage
0.72 to 5.5
V
Ta
Operating Temperature Range
−40 to 85
°C
RECOMMENDED OPERATING CONDITIONS
All of electronic equipment should be designed that the mounted semiconductor devices operate within the
recommended operating conditions. The semiconductor devices cannot operate normally over the recommended
operating conditions, even if when they are used over such conditions by momentary electronic noise or surge. And
the semiconductor devices may receive serious damage when they continue to operate over the recommended
operating conditions.
(1)
Refer to POWER DISSIPATION for detailed information.
4
RP300x
No.EA-306-210329
ELECTRICAL CHARACTERISTICS
The specifications surrounded by
are guaranteed by design engineering at −40°C ≤ Ta ≤ 85°C.
RP300x Electrical Characteristics
Symbol
Parameter
−VDET
Threshold(1)
(Ta = 25°C)
Ta = 25°C
Detector
Condition
1.1 V ≤ −VSET < 1.7 V
1.7 V ≤ −VSET
−40°C ≤ Ta 1.1 V ≤ −VSET < 1.7 V
≤ 85°C
1.7 V ≤ −VSET
Min.
×0.99
×0.992
Typ.
Max. Unit
×1.010
V
×1.008
V
×0.982
×1.018
V
×0.984
×1.016
V
ISS1
Supply Current 1
VDD = −VSET −0.1 V, IOUT = 0 A
3.2
µA
ISS2
Supply Current 2
VDD = −VSET +0.1 V, IOUT = 0 A
3.1
VDD
Operating Voltage
Ta = 25°C
0.72
5.5
µA
V
−40°C ≤ Ta ≤ 85°C
0.80
5.5
V
−VSET ≥ 1.1 V
−VSET ≥ 1.6 V
−VSET ≥ 2.7 V
−VSET ≥ 1.1 V
Nch Inverting(2)
VDD = −VSET +0.1 V −VSET ≥ 1.4 V
VDS = 0.3 V
−VSET ≥ 2.5 V
−VSET ≥ 1.1 V
Pch CMOS
VDD = −VSET +0.1 V −VSET ≥ 1.6 V
VDS = −0.3 V
−VSET ≥ 2.7 V
VDD = 5.5 V
RP300xxxxA/C
VDS = 5.5 V
Nch
VDD = −VSET −0.1 V
VDS = 0.3 V
IOUT
Output Current
(Driver Output Pin)
ILEAK
Nch Driver Leakage Current
RMR
MR Pin Pull-up Resistance
VIH
MR Pin Input Voltage “H”
VDD ≥ −VSET +0.1 V
VIL
MR Pin Input Voltage “L”
VDD ≥ −VSET +0.1 V
tDELAY
Released Output Delay
Time(4)
RP300xxxxB(3)
VDD = 0.8 V →
−VSET +1.0 V
Detector Threshold
Temperature Coefficient
−40°C ≤ Ta ≤ 85°C
mA
mA
mA
mA
mA
mA
mA
mA
mA
VDD=−VSET − 0.1 V
VDS = 5.5 V
0.21
−40°C ≤ Ta ≤ 85°C
∆−VDET
/∆Ta
0.45
2.5
4.8
0.45
2.5
4.8
−0.15
−0.45
−0.8
0.45
0.15
µA
0.90
MΩ
0.75
×VDD
RP300xxxAx
RP300xxxBx(5)
RP300xxxDx
47.5
95
190
V
50
100
200
tSET
×0.85
±50
0.4
V
52.5
105
210
ms
tSET
×1.15
%
ppm
/°C
All test items listed under Electrical Characteristics are done under the pulse load condition (Tj ≈ Ta = 25°C) except Detector
Threshold Temperature Coefficient.
(1)
(2)
−VDET is defined as an actual detector threshold and −VSET is defined as a preset detector threshold.
Nch open drain inverting output type is only applicable to the RP300xxxxB which is a custom IC.
The RP300xxxxB is a custom IC.
(4) t
DELAY is defined as an actual released output delay time and tset is defined as a preset released output delay time.
(5) The RP300xxxBx is a custom IC.
(3)
5
RP300x
No.EA-306-210329
Product-specific Electrical Characteristics
The specifications surrounded by
are guaranteed by design engineering at −40°C ≤ Ta ≤ 85°C.
-VDET [V]
Ta = 25°C
Product Name
−40°C ≤ Ta ≤ 85°C
Min.
Typ.
Max.
Min.
Typ.
Max.
RP300x11xx
1.089
1.100
1.111
1.081
1.100
1.119
RP300x23xx2
2.302
2.320
2.338
2.283
2.320
2.357
RP300x26xx3
2.609
2.630
2.651
2.588
2.630
2.672
RP300x27xx
2.679
2.700
2.721
2.657
2.700
2.743
RP300x28xx
2.778
2.800
2.822
2.756
2.800
2.844
RP300x29xx3
2.907
2.930
2.953
2.884
2.930
2.976
RP300x30xx8
3.056
3.080
3.104
3.031
3.080
3.129
RP300x42xx
4.167
4.200
4.233
4.133
4.200
4.267
RP300x43xx8
4.345
4.380
4.415
4.310
4.380
4.450
RP300x46xx
4.564
4.600
4.636
4.527
4.600
4.673
6
RP300x
No.EA-306-210329
THEORY OF OPERATION
Timing Chart
Detector Threshold
= Release Voltage (VDET)
Detector Threshold
= Release Voltage (VDET)
Power Supply
Voltage (VDD)
Min. Operating Voltage
Power Supply
Voltage (VDD)
Min. Operating Voltage
GND
GND
Manual Reset
Manual Reset
GND
GND
VPULLUP
VPULLUP
Output Voltage (VOUT)
Output Voltage (VOUT)
GND
GND
tdelay
tdelay
RP300xxxxA Timing Chart
tdelay
tdelay
RP300xxxxB Timing Chart
Detector Threshold
= Release Voltage (VDET)
Power Supply
Voltage (VDD)
Min. Operating Voltage
GND
Manual Reset
GND
VOUT
Unstable
Area
Output Voltage (VOUT)
GND
tdelay
tdelay
RP300xxxxC Timing Chart
7
RP300x
No.EA-306-210329
Release Output Delay Time (tDELAY)
tDELAY is defined as follows.
1. Nch Open Drain Output
Release output delay time starts after the OUT pin is pulled up to 5.5 V with a 470 kΩ resistor, and the
VDD voltage is shifted from 0.8 V to −VSET + 1.0 V. It ends when the output voltage reaches 1.0 V.
2. Nch Open Drain Inverting Output (custom IC)
Release output delay time starts after the OUT pin is pulled up to 5.5 V with a 470 kΩ resistor, and the
VDD voltage is shifted from 0.8 V to −VSET + 1.0 V. It ends when the output voltage reaches VDD / 2 V.
3. CMOS Output
Release output delay time starts when the VDD voltage is shifted from 0.8 V to −VSET + 1.0 V and ends
when the output voltage reaches VDD / 2 V.
-V S E T +1.0V
-V S E T +1.0V
Power Supply
Voltage (V D D )
Power Supply
Voltage (V D D )
0.8V
0.8V
GND
GND
5.5V
Output
Voltage
(V O U T ) 2 . 7 5 V
1.0V
5.5V
Output
Voltage
(V O U T )
GND
2.75V
GND
trst
tdelay
Nch Open Drain Output
trst
tdelay
Nch Open Drain Inverting Output
-V S E T +1.0V
Power Supply
Voltage (V D D )
0.8V
GND
-V S E T +1.0V
Output
Voltage (-V S E T +1.0V)/2
(V O U T )
GND
trst
tdelay
CMOS Output
8
RP300x
No.EA-306-210329
RP300xxxxA/C Operating
VDD
Ra
Pch
+
Delay
Circuit
-
OUT
Comparator
Vref Rb
Nch
GND
Block Diagram
・ For CMOS Output, the Nch Tr. drain and the Pch Tr. drain are connected to the OUT pin inside the IC.
・ For Nch Open Drain Output, the Nch Tr. drain is connected to the OUT pin inside the IC. Pull up the OUT pin
or VDD pin to the external voltage level.
1
2
3
4
1
5
2
3
A
5
B
B
Power Supply
Voltage (VDD)
4
Detector Threshold (VDET)
Detector Threshold (VDET) Power Supply A
Voltage (VDD)
= Release Voltage
= Release Voltage
Min. Operating Voltage
Min. Operating Voltage
GND
GND
Pull-up Voltage
Output
Voltage
(VOUT)
tdelay
Output
Voltage
(VOUT)
Unstable
Area
GND
GND
Timing Chart (A Ver.)
tdelay
Timing Chart (C Ver.)
1. The output voltage is equalized to the VDD voltage (CMOS Output), or to the pull-up voltage (Nch Open
Drain Output).
2. The VDD voltage drops to the detector threshold (A point) which means
Vref ≥ VDD x Rb / (Ra + Rb). The comparator output shifts from “L” to “H” voltage and the output voltage
will be equalized to the GND voltage.
3. If the VDD voltage is lower than the minimum operating voltage, the output voltage becomes unstable
(CMOS Output). The output voltage is equalized to the pull-up voltage (Nch Open Drain Output).
4. The output voltage is equalized to the GND voltage.
5. The VDD voltage becomes higher than the release voltage (B point) which means
Vref < VDD x Rb / (Ra + Rb), and the comparator output shifts from “H” to “L” voltage, and the output
voltage is equalized to the VDD voltage (CMOS Output) or to the pull-up voltage (Nch Open Drain
Output).
Note: There’s no hysteresis between the VDD voltage and the released voltage.
9
RP300x
No.EA-306-210329
RP300xxxxB Operating
VDD
Ra
+
Delay
Circuit
Vref Rb
OUT
Comparator
Nch
GND
Block Diagram
・ The Nch Tr. drain is connected to the OUT pin inside the IC. Pull up the OUT pin or VDD pin to the external
voltage level.
1
2
3
4
5
B
Power Supply
Voltage (VDD)
Detector Threshold (VDET)
A
= Release Voltage
Min. Operating Voltage
GND
Pull-up Voltage
Output Voltage
(VOUT)
tdelay
GND
Timing Chart
1. The output voltage is equalized to the GND voltage.
2. The VDD voltage drops to the detector threshold (A point) which means Vref ≥ VDD x Rb / (Ra + Rb).
The comparator output shifts from “H” to “L” voltage and the output voltage shifts from the pull-up
voltage to “L” voltage.
3. If the VDD voltage is lower than the minimum operating voltage, the output voltage is equalized to the
pull-up voltage.
4. The output voltage is equalized to the pull-up voltage.
5. The VDD voltage becomes higher than the release voltage (B point) which means Vref < VDD x Rb / (Ra
+ Rb). The comparator output shifts from “L” to “H” voltage, and the output voltage is equalized to the
GND voltage.
Note: There’s no hysteresis between the VDD voltage and the released voltage.
10
RP300x
No.EA-306-210329
Detector Operation vs. Glitch Input Voltage
The RP300x has built-in rejection of fast transients on the VDD pins. The rejection of transients depends on
both the duration and the amplitude of the transient. The amplitude of the transient is measured from the
bottom of the transient to the negative threshold voltage of the RP300x.
グリッジ耐性評価
Glitch Resistance Test
480
440
400
360
320
280
240
200
160
120
80
40
0
Minimum
Pulse Duration at VDD (µs)
検出電圧を横切るパルス幅(μs)
RP300x46xx
RP300x27xx
RP300x11xx
1
10
100
1000
Threshold
Overdrive Voltage at VDD (mV)
検出電圧に対するオーバードライブ量(mV)
Minimum Pulse Duration at VDD vs. Overdrive Voltage at VDD
Pulse Duration
Transient Amplitude (VDET-VDDmin)
VDD Input Waveform
Voltage Transient Measurement
The RP300x does not respond to transients that are fast duration/ low amplitude or long duration/ small
amplitude. The above graph shows the relationship between the transient amplitude and duration needed to
trigger a reset. Any combination of duration and amplitude above the curve generates a reset signal.
11
RP300x
No.EA-306-210329
APPLICATION INFORMATION
Typical Applications
VDD
Pull up
Voltage
OUT
RP300x
VOUT
VIN
MR Control
GND
MR
Note: The CMOS output type does not
require a pull-up resistor.
RP300x Typical Application Circuit
TECHNICAL NOTES
When connecting resistors to the device’s input pin
When connecting a resistor (R1) to an input of this device, the input voltage decreases by [Device’s
Consumption Current] x [Resistance Value] only. And, the cross conduction current(1), which occurs when
changing from the detecting state to the release state, is decreased the input voltage by [Cross Conduction
Current] x [Resistance Value] only. And then, this device will enter the re-detecting state if the input voltage
reduction is larger than the difference between the detector voltage and the released voltage.
When the input resistance value is large and the VDD is gone up at mildly in the vicinity of the released voltage,
repeating the above operation may result in the occurrence of output.
As shown in Figure A/B, set R1 to become 100kΩ or less as a guide, and connect CIN(2) of 0.1μF and more to
between the input pin and GND. Besides, make evaluations including temperature properties under the actual
usage condition, with using the evaluation board like this way. As result, make sure that the cross conduction
current has no problem.
R1
R1
VDD
CIN(2)
Voltage
Detector
VDD
OUT pin
R2
CIN
(2 )
GND
Figure A
(1) In
Voltage
Detector
OUT pin
GND
Figure B
the CMOS output type, a charging current for OUT pin is included.
the bias dependence of capacitors.
(2) Note
12
RP300x
No.EA-306-210329
TYPICAL CHARACTERISTICS
Note: Typical Characteristics are intended to be used as reference data; they are not guaranteed.
1) Supply Current vs. Input Voltage
RP300x11xx
Ta=-40℃
2.5
Ta=85℃
Ta=25℃
2
Ta=85℃
1.5
1.5
1
1
0.5
0.5
0
0
0
1
2
3
4
5
Input Voltage VDD (V)
0
6
RP300x30xx8
3
Ta=-40℃
2.5
6
RP300x46xx
Ta=-40℃
Ta=25℃
Ta=85℃
2.5
Ta=25℃
Ta=85℃
2
1
2
3
4
5
Input Voltage VDD (V)
3
Supply Current ISS (μA)
Supply Current ISS (μA)
Ta=-40℃
2.5
Ta=25℃
2
RP300x23xx2
3
Supply Current ISS (μA)
Supply Current ISS (μA)
3
2
1.5
1.5
1
1
0.5
0.5
0
0
0
1
2
3
4
5
Input Voltage VDD (V)
0
6
1
2
3
4
5
Input Voltage VDD (V)
6
2) Detector Threshold vs. Temperature
RP300x23xx2
1.13
2.35
1.12
2.34
Detector Threshold
-VDET(V)
Detector Threshold
-VDET(V)
RP300x11xx
1.11
1.10
1.09
1.08
2.33
2.32
2.31
2.30
2.29
1.07
-50 -25
0
25
50
75
Temperature Ta(゚C)
100
-50
-25
0
25
50
75
100
Temperature Ta(゚C)
13
RP300x
No.EA-306-210329
RP300x30xx8
RP300x46xx
4.80
4.75
3.10
Detector Threshold
-VDET(V)
Detector Threshold
-VDET(V)
3.11
3.09
3.08
3.07
3.06
3.05
-50
-25
0
25
50
75
4.70
4.65
4.60
4.55
4.50
4.45
4.40
100
-50
-25
Temperature Ta(゚C)
0
25
50
75
100
Temperature Ta(゚C)
3) Nch Driver Output Current vs. Input Voltage
RP300x23xA2/xC2
16
2
Nch Driver Output Current
IOUT (mA)
Nch Driver Output Current
IOUT (mA)
RP300x11xA/xC
-40゚C
1.6
25゚C
85゚C
1.2
-40゚C
12
0.8
0.4
25゚C
85゚C
8
4
0
0
0
0.2 0.4 0.6 0.8
1
Input Voltage VDD (V)
0
1.2
Nch Driver Output Current
IOUT (mA)
Nch Driver Output Current
IOUT (mA)
-40゚C
16
25゚C
85゚C
12
8
4
0
0
0.5 1 1.5 2 2.5 3
Input Voltage VDD (V)
2.5
RP300x46xA/xC
RP300x30xA8/xC8
20
0.5
1
1.5
2
Input Voltage VDD (V)
3.5
20
-40゚C
16
25゚C
85゚C
12
8
4
0
0
1
2
3
4
5
Input Voltage VDD (V)
14
RP300x
No.EA-306-210329
Nch Driver Inverting Output (custom IC)
RP300x23xB2
RP300x11xB
-40゚C
25゚C
12
16
Nch Driver Output Current
IOUT (mA)
Nch Driver Output Current
IOUT (mA)
16
85゚C
8
4
0
-40゚C
12
25゚C
85゚C
8
4
0
0
1
2
3
4
5
0
Input Voltage VDD (V)
4
5
Input Voltage VDD (V)
RP300x30xB8
RP300x46xB
16
16
Nch Driver Output Current
IOUT (mA)
Nch Driver Output Current
IOUT (mA)
3
2
1
-40゚C
12
25゚C
8
4
0
1
25゚C
12
85゚C
0
-40゚C
2
3
4
85゚C
8
4
0
5
0
1
Input Voltage VDD (V)
2
3
4
5
Input Voltage VDD (V)
4) Pch Driver Output Current vs. Input Voltage
RP300x23xC2
RP300x11xC
20
VDS=-2.1V
16
Pch Driver Output Current
IOUT (mA)
Pch Driver Output Current
IOUT (mA)
20
VDS=-1.0V
8
4
0
1
2
3
4
5
Input Voltage VDD (V)
VDS=-1.0V
12
VDS=-0.5V
0
VDS=-1.5V
16
VDS=-1.5V
12
VDS=-2.1V
6
VDS=-0.5V
8
4
0
0
1
2
3
4
5
6
Input Voltage VDD (V)
15
RP300x
No.EA-306-210329
RP300x46xC
20
VDS=-2.1V
16
Pch Driver Output Current
IOUT (mA)
Pch Driver Output Current
IOUT (mA)
RP300x30xC8
VDS=-1.5V
VDS=-1.0V
12
VDS=-0.5V
8
4
20
VDS=-2.1V
16
VDS=-1.5V
VDS=-1.0V
12
VDS=-0.5V
8
4
0
0
0
1
2
3
4
5
6
1
0
Input Voltage VDD (V)
4
3
2
5
6
Input Voltage VDD (V)
5) Nch Driver Output Current vs. VDS
RP300x23xA2/xC2
RP300x11xA/xC
14
Nch Driver Output Current
IOUT (mA)
Nch Driver Output Current
IOUT (mA)
2
12
1.6
10
1.2
0.8
VDD=0.8V
VDD=1.0V
0.4
8
VDD=1.0V
4
VDD=2.0V
2
0
0
0
0.2
0.4
0.6 0.8
VDS (V)
1
0
1.2
0.4
0.8
1.2
1.6
2
VDS (V)
RP300x46xA/xC
RP300x30xA8/xC8
25
25
Nch Driver Output Current
IOUT (mA)
Nch Driver Output Current
IOUT (mA)
VDD=0.8V
6
20
20
15
15
10
10
VDD=1.0V
VDD=2.0V
5
VDD=3.0V
0
0
0.5
1
1.5
VDS (V)
2
2.5
VDD=1.0V
VDD=2.0V
5
VDD=4.0V
0
3
0 0.5
1 1.5
2 2.5
3
3.5
4
VDS (V)
16
RP300x
No.EA-306-210329
Nch Driver Inverting Output (custom IC)
RP300x23xB2
25
Nch Driver Output Current
IOUT (mA)
Nch Driver Output Current
IOUT (mA)
RP300x11xB
20
15
VDD=2.0V
VDD=3.0V
10
VDD=4.0V
5
VDD=5.5V
25
20
15
10
VDD=3.0V
VDD=4.0V
5
VDD=5.5V
0
0
0
1
2
3
4
0
5
2
1
RP300x46xB
RP300x30xB8
25
Nch Driver Output Current
IOUT (mA)
Nch Driver Output Current
IOUT (mA)
5
VDS (V)
VDS (V)
20
15
VDD=4.0V
10
4
3
VDD=5.5V
5
25
20
15
VDD=5.0V
10
VDD=5.5V
5
0
0
0
1
2
3
4
0
5
1
2
3
4
5
VDS (V)
VDS (V)
6) Released Output Delay Time vs. Temperature
RP300x11Ax
RP300x23Ax2
60
Released Output Delay
Time tDELAY (ms)
Released Output Delay
Time tDELAY (ms)
60
56
52
48
44
56
52
48
44
40
40
-50
-25
0
25
50
75
Temperature Ta (℃)
100
-50
-25
0
25 50 75
Temperature Ta (℃)
100
17
RP300x
No.EA-306-210329
RP300x30Ax8
56
52
48
44
55
50
45
40
40
-50
-25
0
25
50 75
Temperature Ta (℃)
-50
100
RP300x11Dx
230
210
190
170
-25
0
25 50 75
Temperature Ta (℃)
100
RP300x23Dx2
250
Released Output Delay
Time tDELAY (ms)
250
Released Output Delay
Time tDELAY (ms)
RP300x46Ax
60
Released Output Delay
Time tDELAY (ms)
Released Output Delay
Time tDELAY (ms)
60
230
210
190
170
150
150
-50
-25
0
25 50 75
Temperature Ta (℃)
-50
100
RP300x30Dx8
Released Output Delay
Time tDELAY (ms)
230
210
190
170
100
RP300x46Dx
250
Released Output Delay
Time tDELAY (ms)
250
-25
0
25 50 75
Temperature Ta (℃)
230
210
190
170
150
150
-50
-25
0
25 50 75
Temperature Ta (℃)
100
-50
-25
0
25 50 75
Temperature Ta (℃)
100
18
POWER DISSIPATION
DFN(PLP)1010-4B
Ver. A
The power dissipation of the package is dependent on PCB material, layout, and environmental conditions.
The following measurement conditions are based on JEDEC STD. 51-7.
Measurement Conditions
Item
Measurement Conditions
Environment
Mounting on Board (Wind Velocity = 0 m/s)
Board Material
Glass Cloth Epoxy Plastic (Four-Layer Board)
Board Dimensions
76.2 mm × 114.3 mm × 0.8 mm
Outer Layer (First Layer): Less than 95% of 50 mm Square
Inner Layers (Second and Third Layers): Approx. 100% of 50 mm Square
Outer Layer (Fourth Layer): Approx. 100% of 50 mm Square
Copper Ratio
φ 0.2 mm × 11 pcs
Through-holes
Measurement Result
(Ta = 25°C, Tjmax = 125°C)
Item
Measurement Result
Power Dissipation
800 mW
Thermal Resistance (θja)
θja = 125°C/W
Thermal Characterization Parameter (ψjt)
ψjt = 58°C/W
θja: Junction-to-Ambient Thermal Resistance
ψjt: Junction-to-Top Thermal Characterization Parameter
1000
900
Power Dissipation PD (mW)
800
700
600
500
400
300
200
100
0
0
25
50
75 85
100
125
Ambient Temperature (°C)
Power Dissipation vs. Ambient Temperature
Measurement Board Pattern
i
PACKAGE DIMENSIONS
DFN(PLP)1010-4B
Ver. A
0.65
B
3
0.25±0.05
1.00
0.05
0.07±0.05
X4
C0.18
0.05±0.05
∗
0.48±0.05
DETAIL : “A”
45°
0.04
“A”
2
1
0.25±0.05
0.48±0.05
0.045
0.05 M S AB
0.03min
0.6max
INDEX
4
C0.10
A
1.00
S
0.05 S
DFN (PLP) 1010-4B Package Dimensions (Unit: mm)
*
∗ The tab on the bottom of the package is a substrate potential (GND). It is recommended that this tab be connected to
the ground plane on the board but it is possible to leave the tab floating.
i
POWER DISSIPATION
SOT-23-5
Ver. A
The power dissipation of the package is dependent on PCB material, layout, and environmental conditions.
The following measurement conditions are based on JEDEC STD. 51-7.
Measurement Conditions
Item
Measurement Conditions
Environment
Mounting on Board (Wind Velocity = 0 m/s)
Board Material
Glass Cloth Epoxy Plastic (Four-Layer Board)
Board Dimensions
76.2 mm × 114.3 mm × 0.8 mm
Copper Ratio
Outer Layer (First Layer): Less than 95% of 50 mm Square
Inner Layers (Second and Third Layers): Approx. 100% of 50 mm Square
Outer Layer (Fourth Layer): Approx. 100% of 50 mm Square
Through-holes
0.3 mm × 7 pcs
Measurement Result
Item
(Ta = 25°C, Tjmax = 125°C)
Measurement Result
Power Dissipation
660 mW
Thermal Resistance (ja)
ja = 150°C/W
Thermal Characterization Parameter (ψjt)
ψjt = 51°C/W
ja: Junction-to-Ambient Thermal Resistance
ψjt: Junction-to-Top Thermal Characterization Parameter
Power Dissipation vs. Ambient Temperature
Measurement Board Pattern
i
SOT-23-5
PACKAGE DIMENSIONS
Ver. A
2.9±0.2
1.1±0.1
1.9±0.2
0.8±0.1
(0.95)
4
1
2
0~0.1
0.2min.
+0.2
1.6-0.1
5
2.8±0.3
(0.95)
3
0.4±0.1
+0.1
0.15-0.05
SOT-23-5 Package Dimensions
i
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