Multimedia ICs
SYNC separator IC with AFC
BA7071F
The BA7071F contains a video synchronization separation circuit, a vertical video synchronization separation circuit,
a horizontal oscillation circuit, and a phase comparator. It separates and outputs the horizontal and vertical synchronization signals (HD and VD), and the composite synchronization signal (Sync-out) from input video or composite
synchronization signals. The phase difference between HD and VD is guaranteed for both the rising and falling
edges of VD.
Applications
•TVs,
VCRs and camcorders
•1)Features
Built in AFC circuit.
4) Horizontal free-run frequency does not require adjustment.
5) Low external parts count.
6) SOP 8-pin package.
2) HD and VD phase difference guaranteed.
3) Wide supply voltage range (3V to 7V).
•Absolute maximum ratings (Ta = 25°C)
Parameter
Power supply voltage
Symbol
Limits
Unit
VCC
8.0
V
mW
Pd
350∗
Operating temperature
Topr
– 20 ~ + 75
°C
Storage temperature
Tstg
– 55 ~ + 125
°C
Power dissipation
∗ Reduced by 3.5mW for each increase in Ta of 1°C over 25°C.
•Recommended operating conditions (Ta = 25°C)
Parameter
Power supply voltage
Symbol
Min.
Typ.
Max.
Unit
VCC
2.85
—
7.5
V
1
Multimedia ICs
BA7071F
•Block diagram
VIN
1
HD - OUT
2
GND
3
PD - OUT
4
SYNC
SEPA
Vsepa
PD
COMP
•Pin descriptions
2
Pin No.
Pin name
1
VIN
Video input
2
HD - OUT
HD output
3
GND
Function
GND
4
PD - OUT
Phase comparator output
5
HOSC - R
Horizontal oscillator resistor
6
VCC
7
VD - OUT
8
Sync - OUT
Power supply (VCC)
VD output
Synchronization signal output
VCO
8
Sync - OUT
7
VD - OUT
6
VCC
5
HOSC - R
Multimedia ICs
BA7071F
•Input / output circuits
VIN
VCC
HOSC - R
HD - OUT
VCC
VCC
1pin
5pin
2pin
VD - OUT
PD - OUT
Sync - OUT
VCC
VCC
VCC
7pin
•Electrical characteristics (unless otherwise noted Ta = 25°C and V
Parameter
Quiescent current
Minimum SYNC separation level
8pin
4pin
CC
= 5.0V)
Symbol Min. Typ. Max. Unit
IQ
3.0
Vsyn-min —
5.8
8.6
0.08 0.15
mA
Conditions
pin 8 open
VP-P pin 1 terminated with 75Ω resistor
Pulse voltage low
Vp-L
—
0.1
0.3
V
pins 2, 7
Pulse voltage high
Vp-H
4.7
5.0
—
V
pins 2, 7
(Horizontal)
free-running frequency
fH.O
13.5 15.7 17.9
kHz No input signal
∆fCAP
2.3
2.7
—
kHz
Lock-in phase
THPH
0.6
1.6
2.6
µs
pin 2
pin – 1
HD, VD phase deviation 1
THVD1 19.0 24.0 29.0
µs
pin 7
pin – 2
(FLD1)
HD, VD phase deviation 2
THVD2 19.0 24.0 29.0
µs
pin 7
pin – 2
(FLD1)
Capture range
—
HD pulse width
THD
9.0
10.0 11.0
µs
pin 2
VD pulse width
TVD
249
254
259
µs
pin 7
VIN, VD phase difference
TINVD
41.0 48.0 55.0
µs
pin 1
pin – 7
3
Multimedia ICs
BA7071F
•Measurement circuit (application example)
VIDEO IN
VCC
R4
20kΩ
1µF
+
1
C1
SYNC
SEPA
SYNC OUT
8
VD OUT
HD OUT
2
7
Vsepa
VCC
6
3
+ C4
C5
0.47µF
4
VCC
+
0.47µ
PD
COMP
0.022µF
5
VCO
R3
VCC = 3V, 10kΩ
VCC = 5V, 18kΩ
+
220kΩ
R2
C3
2200pF
0.47µ
R1
100kΩ
When SYNC SEPA output only is used. HD and VD unused.
VCC
VIDEO IN
+
R4
20kΩ
1µF
1
C1
SYNC
SEPA
SYNC OUT
8
Vsepa
2
7
VCC
3
6
+ C4
0.47µF
4
PD
COMP
VCO
5
R1
Fig. 1
(1) Connect a 100kΩ resistor between pin 5 and ground.
Leave pins 2, 4 and 7 open.
(2) SYNC OUT (pin 8) has positive output.
(3) The SYNC OUT (pin 8) output rise delay times in relation to the VIDEO IN (pin 1)
input signal Sync fall are as follws:
830 ns (reference value) ,when VCC = 5V
880 ns (reference value) ,when VCC = 3V
(4) The SYNC OUT (pin 8) output fall delay times in relation to the VIDEO IN (pin 1)
input signal Sync rise are as follws:
150 ns (reference value) ,when VCC = 5V
220 ns (reference value) ,when VCC = 3V
4
100kΩ
C5
0.022µF
Multimedia ICs
BA7071F
operation
•(1)Circuit
Synchronization separation circuit
Detects the charging current to a externally-connected
capacitor, and performs synchronization separation.
(2) Horizontal oscillation circuit
When a video signal is input, it is synchronized with
Hsync by the PLL. The horizontal free-running frequency is determined by external resistor R1.
fH • O =
(3) Vertical synchronization separation circuit
When a video signal is input, synchronization signal
separation is done over the vertical synchronization
pulse interval.
1.57E6
[kHz]
R1
(4) VIN, HD, and VD timing charts
Vertical synchronization pulse interval
1 / 2H
NTSC signal
Odd field (IN)
VIN, VD phase difference
NTSC signal
Even field (IN)
VD
(OUT)
HD, VD phase difference 1
HD, VD phase difference 2
HD
Odd field (OUT)
HD
Even field (OUT)
1. The rise and fall positions for VD are basically the same for both odd and even fields.
2. HD shifts by 1 / 2H during the odd and even field interval.
3. Only the odd field is given for the specification.
Fig. 2
Attached components
•Resistor
R should have a tolerance of ± 2%, and a
1
temperature coefficient of 100ppm or lower.
5
BA7071F
10
8
6
4
2
0
– 25
0
25
50
75
16.2
250
VCC = 5.0V
200
150
100
50
0
– 25
TEMPERATURE : Ta (°C)
0
25
50
Fig. 3 Quiescent current vs.
temperature
10.0
9.8
9.6
25
50
75
HD · VD PULSE TIMING 2 : THDV2 (µs)
260
250
240
230
– 25
0
25
50
75
TEMPERATURE : T (°C)
Fig. 6 HD pulse width vs.
temperature
Fig. 7 VD pulse width vs.
temperature
NTSC
VCC = 5.0V
28
26
24
22
– 25
0
25
50
75
TEMPERATURE : Ta (°C)
Fig. 9 HD, VD phase difference 2 vs.
temperature
6
270
TEMPERATURE : Ta (°C)
30
20
0
15.6
15.4
15.2
– 25
0
25
50
75
Fig. 5 Horizontal free-running
frequency vs.
temperature
30
NTSC
VCC = 5.0V
VD PULSE WIDTH : TVD (µs)
HD PULSE WIDTH : THD (µs)
10.2
0
15.8
TEMPERATURE : Ta (°C)
280
NTSC
VCC = 5.0V
– 25
16.0
Fig. 4 Minimum synchronization
separation level vs.
temperature
10.4
9.4
75
VCC = 5.0V
TEMPERATURE : Ta (°C)
HD · VD PULSE TIMING 1 : THDV1 (µs)
QUIESCENT CURRENT : IQ (mA)
VCC = 5.0V
HORIZONTAL FREQUENCY : fH.O (kHz)
•Electrical characteristic curves
MINIMUM SYNC - SEPA LEVEL : Vsyn - Min. (VPP)
Multimedia ICs
NTSC
VCC = 5.0V
28
26
24
22
20
0
– 25
0
25
50
75
TEMPERATURE : Ta (°C)
Fig. 8 HD, VD phase difference 1 vs.
temperature
Multimedia ICs
BA7071F
•External dimensions (Units: mm)
1
4
0.11
1.27
0.15 ± 0.1
4.4 ± 0.2
5
1.5 ± 0.1
6.2 ± 0.3
5.0 ± 0.2
8
0.4 ± 0.1
0.3Min.
0.15
SOP8
7
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