BA7182AS

Video ICs 2-channel PRE / REC amplifier with auto-tracking interface BA7182AS The BA7182AS is a PRE / REC amplifier developed for use in video cassette recorders. It has been designed for use in two-head decks and features built-in FB damping, two preamplifiers, a chroma output amplifier, an FM output amplifier (with AGC), an envelope detector, a constant-current BTL-drive REC amplifier (with AGC) and built-in channel and REC / PB switches on a single monolithic IC. •Applications VCRs •Features amplifier has a total gain of 59dB 1) The playback (Typ.), and has a low-noise preamplifier. Designed for VHS-band operation with low external parts count. The IC has 2 circuits for 2-head VCR applications. 2) Two playback output systems (throgh output and AGC output). The AGC output level is 270mV P-P (Typ.) ; suitable for FM brightness signal output. 3) Auto-tracking interface for automated tracking adjustment. An integrate and hold detector is used to reduce the load on the microcontroller. 4) The recording amplifier uses constant-current BLT drive that handles load variations (i.e. headimpedance) well, and gives stable recording characteristics. A single circuit is provided for 2-head VCR use. 5) Built-in recording level AGC means adjustment of FM recording current is not necessary. 6) Head switches for 2-channel PRE / REC system provided. 7) Operates off a single 5V power supply, with low power dissipation. •Absolute maximum ratings (Ta = 25°C) Parameter Applied voltage Power dissipation Operating temperature Storage temperature Symbol VCC Pd Topr Tstg Limits 7.0 1100∗ – 20 ~ + 75 – 55 ~ + 125 Unit V mW °C °C ∗ Reduced by 11mW for each increase in Ta of 1°C over 25°C (free air). •Recommended operating conditions (Ta = 25°C) Parameter Playback / recording Symbol VCC Min. 4.5 Typ. 5.0 Max. 5.5 Unit V Conditions 12pin Not designed for radiation resistance. 1 Video ICs BA7182AS •Block diagram DFF IN 1 22 GND 2 DET FILTER 2 21 EP / SP CTRL S/H HPF DET HOLD FILTER 3 20 AT ENVE HOLD OUT REC DCFB 4 – PRE 19 AT ENVE DET ADJ PRE IN 1 (REC – OUT 1) 5 18 PB RF OUT DET RF GND 1 6 17 PB AGC FILTER AGC PRE HPF PRE IN 2 (REC – OUT 2) 7 16 LOGIC REC IN PRE / REC – REC + OUT 8 15 PB / EE / REC CTRL + 14 AGC 1k REC AGC FILTER 9 PB AGC OUT MUTE DET REC REC LEVEL ADJ 10 13 REC EQ VCC H SYNC IN 11 12 VCC 2 Video ICs BA7182AS CC •Electrical characteristics (unless otherwise noted, Ta = 25°C, V Parameter Symbol Min. Typ. Max. Unit 〈Playback system〉 (Pin 15: H) Quiescent current Voltage gain ch-1 Voltage gain ch-2 Voltage gain differential Frequency characteristic 2nd harmonic distortion 3rd harmonic distortion Maximum output level Crosstalk Output DC offset Input conversion noise AGC output level AGC control sensitivity AGC frequency characteristic PB switch ON resistance PRE ch 2 holding voltage PRE ch 1 holding voltage ENVE output level SP-2 ENVE sensitivity curve Iq (P) = 5.0V and f = 4.0MHz) Conditions Measurement circuit — 56.5 56.5 –1 –6 — — 1.0 — 26 59 59 0 –3 42 61.5 61.5 1 –1 mA dB dB dB dB dBc dBc VP-P dBc mVP-P µVrms mVP-P dB dB Ω V V V No signal Pin 5 input = 0.3mVP-P, pin 1: L, pin 18 output measurement Pin 7 input = 0.3mVP-P, pin 1: H, pin 18 output measurement ∆ GVP = GVP1 – G VP2 Difference in pin 18 output level for f = 8.0 / 1.0MHz, VIN = 0.3mVP-P VIN = 0.3mVP-P, 8.0MHz spurious VIN = 0.3mVP-P, 12.0MHz spurious, guaranteed design value. When pin 18 output 2nd harmonic distortion is – 30dBc Difference in pin 18 output level for pin 1: H / L. Pin 18 output DC offset for pin 1: H / L. Rg = 10Ω, input conversion of pin 18 output noise, guaranteed design value. VIN = 0.3mVP-P Pin 14 output measurement Pin 14 output level difference for VIN = 0.15 and 0.6mVP-P Difference in pin 14 output level for f = 8.0 / 1.0MHz VIN = 0.3mVP-P. Pin 8 impedance Pin 1 DC voltage for ch 2 operation Pin 1 DC voltage for ch 1 operation Pin 20 output measurement when pin 21 = L and pin 18 output = 250mVP-P — Pin 21 = L, Pin 20 output measurement for large signal Pin 21 = L, Pin 20 output measurement for no signal Pin 21 DC voltage for EP mode Pin 21 DC voltage for SP mode Fig.1 Fig.1 Fig.1 Fig.1 Fig.1 Fig.1 Fig.1 Fig.1 Fig.1 Fig.1 Fig.1 Fig.1 Fig.1 Fig.1 Fig.1 Fig.1 Fig.1 Fig.1 Fig.1 Fig.1 Fig.1 Fig.1 Fig.1 GVP1 GVP2 ∆GVP ∆GVf 2HDP 3HDP VOMP CTP – 45 – 35 – 50 – 35 1.5 — – 38 – 33 0 0.25 270 0.3 0.5 5 — — 2.2 200 4.9 0.1 — — 150 1.0 320 2 2 10 VCC 1.2 3.0 250 — 0.4 VCC 1.2 ∆VODC – 150 VNIN VAGC ∆VAGC ∆GVAF RON8 VTH1H VTH1L VEN-S2 PCRV — 220 — –2 — 3.5 0 1.4 150 4.6 — 3.5 0 % V V V V ENVE saturation voltage VEN-MA ENVE residual voltage VEN-MI EP mode holding voltage VTH21H SP mode holding voltage VTH21L 3 Video ICs (unless otherwise noted, Ta = 25°C, VCC = 5.0V, f = 4.0MHz and IOAR = 36mAP-P) Parameter 〈Recording system〉 (Pin 15: L) Quiescent current Recording AGC level AGC control sensitivity AGC frequency characteristic 2nd harmonic distortion 3rd harmonic distortion Cross modulation distortion Maximum output level Recording current load characteristic Mute attenuation ratio Frequency characteristic AGC mode holding voltage AGC mode holding voltage PB mode holding voltage EE mode holding voltage REC mode holding voltage Iq (R) IOAR ∆ IOAR ∆ IOAF 2HDR 3HDR CMDR IOMR ∆ IORL MUR — 30 — –2 — — — 42 –2 — 72 36 0.15 0 – 41 – 50 – 43 50 – 0.35 – 44 – 7.8 — — — — — 108 42 2 2 – 35 – 40 – 38 — — – 38 – 10.3 VCC 1.2 VCC 2.8 1.2 mA mAP-P dB dB dBc dBc dBc mAP-P dB dBc dB V V V V V No signal Symbol Min. Typ. Max. Unit Conditions BA7182AS Measurement circuit Fig.2 Fig.2 Fig.2 Fig.2 Fig.2 Fig.2 Fig.2 Fig.2 Fig.2 Fig.2 Fig.2 Fig.2 Fig.2 Fig.2 Fig.2 Fig.2 Pin 16 input = 400mVP-P, pin 8 output measurement Pin 8 output level difference for f = 4.0MHz, pin 16 input = 225mVP-P to 800mVP-P. Pin 8 output level difference for f = 8.0 / 1.0MHz, pin 16 input = 400mVP-P Pin 16 input = 400mVP-P, 8.0MHz spurious. Pin 16 input = 400mVP-P, 12.0MHz spurious, guaranteed design value. 4.0MHz ± 630kHz spurious, guaranteed design value. When pin 8 output 2nd harmonic distortion is – 30dB Pin 8 output level difference for load L: 8.2 ~ 12µH Pin 8 output level difference for pin 15: M / H. Pin 8 output level difference for f = 8.0 / 1.0MHz, AGC OFF Pin 11 DC voltage to maintain recording AGC operation Pin 11 DC voltage to maintain recording AGC stopped Pin 15 DC voltage for PB mode Pin 15 DC voltage for REC MUTE mode Pin 15 DC voltage for REC mode ∆ IOEQ – 5.3 VTH11H VTH11L VTH15H VTH15M VTH15L 2.7 0 3.8 2.2 0 ∗ Note: dBc: dB below carrier (used to express relative level from carrier reference for convenience sake) 4 Video ICs BA7182AS •Measurement circuits (Playback system) DFF IN 0.1µ 1 22 2 0.1µ S/H HPF DET 21 EP / SP CTRL L: SP 3 0.1µ PRE IN 1 20 AT ENVE HOLD OUT 4 1k 19 2.0V AT ENVE DET ADJ – 0.1µ PRE 5 10 18 0.1µ DET RF PB RF OUT 6 10 17 0.1µ AGC PRE HPF 7 0.1µ 1k 16 0.1µ 33k LOGIC REC IN – PRE / REC PRE IN 2 PB / EE / REC CTRL L: REC MUTE L: REC START 8 0.1µ 15 + 14 AGC 0.1µ 1k 3k MUTE REC 9 0.01µ DET REC LEVEL ADJ 36k 390k H SYNC IN PB AGC OUT 10 13 0.022µ 300 11 12 68p Units: R [Ω] C [F] L [H] VCC + VCC 5V Fig. 1 5 Video ICs (Recording system) BA7182AS DFF IN 0.1µ 1 22 2 0.1µ S/H HPF DET 21 EP / SP CTRL L: SP 3 0.1µ 20 AT ENVE HOLD OUT 4 19 2.0V AT ENVE DET ADJ – 0.1µ PRE 5 8.2µ 18 0.1µ DET RF PB RF OUT 6 8.2µ 17 0.1µ AGC PRE HPF 7 REC OUT 10 0.1µ 16 0.1µ 33k LOGIC REC IN – PRE / REC PB / EE / REC CTRL L: REC MUTE L: REC START 8 0.1µ 15 + 14 AGC 0.1µ 1k 3k MUTE REC 9 0.01µ DET REC LEVEL ADJ 36k 390k H SYNC IN PB AGC OUT 10 13 0.022µ 300 VCC 11 12 68p + VCC 5V Units: R [Ω] C [F] L [H] Fig. 2 6 Video ICs tables •ControlINmode 1) (1) DFF (pin • Playback input selection (head switching) • Playback output envelope detection timing control (integrate and hold one frame) Control pin DFF IN H L Function Selected playback input Ch2 (PRE IN2 7pin) Ch1 (PRE IN1 5pin) Envelope detect Reset on rising edge — Control voltage VCTRL1 [V] 3.5 ~ VCC 0.0 ~ 1.2 BA7182AS (2) H SYNC IN (pin 11) • Controls recording AGC detector block operation. Control pin H SYNC H L Function AGC detect ON OFF Control voltage VCTRL11 [V] 2.7 ~ VCC 0.0 ~ 1.2 (3) PB / EE / REC CTRL (pin 15) • Playback / recording mute / recording mode switching Control pin PB / EE / REC H M L Mode PB REC MUTE REC PRE AMP ON OFF OFF Function AT ENVE REC MUTE REC AMP ON OFF OFF OFF ON OFF OFF ON ON Control voltage VCTRL15 [V] 3.8 ~ VCC 2.2 ~ 2.8 0.0 ~ 1.2 ∗ Pin 15 is pulled up to VCC via a 33kΩ resistor. (4) EP / SP CTRL (pin 21) • Switching for the detector gain of the playback envelope detector. Control pin EP / SP H L Function AT ENVE gain Typ. + 6dB Typ. Control voltage VCTRL21 [V] 3.5 ~ VCC 0.0 ~ 1.2 ∗ Pin 21 is pulled up to VCC via a 50kΩ resistor. 7 Video ICs BA7182AS •Application example DFF IN 0.1µ 2 0.1µ S/H HPF DET 3 0.1µ 4 19 (2.0V) 91k 110k AT ENVE DET ADJ 20 AT ENVE HOLD OUT 21 EP / SP CTRL L: SP 1 22 – 0.1µ PRE 5 HEAD A DET RF 6 HEAD B AGC PRE HPF 7 0.1µ 16 0.01µ 33k 15 17 0.1µ REC IN 18 0.01µ PB RF OUT – PRE / REC PB / EE / REC CTRL L: REC MUTE L: REC START LOGIC 8 0.1µ 9 AGC + 14 0.01µ 1k MUTE REC 13 100p VCC 11 12 PB AGC OUT DET REC LEVEL ADJ 36k 390k H SYNC IN 10 + VCC 5V Units: R [Ω] C [F] L [H] Fig. 3 8 Video ICs BA7182AS •External dimensions (Units: mm) 19.4 ± 0.3 22 12 6.5 ± 0.3 0.51Min. 3.4 ± 0.2 3.95 ± 0.3 1 11 7.62 0.3 ± 0.1 1.778 0.5 ± 0.1 0° ~ 15° SDIP22 9