BD11601NUX

USB Switch ICs DPDT Type (Double Pole Double Throw) BD11600NUX No.11103EAT03 ●Description BD11600NUX is DPDT analog switches handling with USB2.0 high-speed that have both a low resistance and a low capacitance. Moreover, this is widely guaranteed from 2.5V to 5.5V as for the range of the power-supply voltage. This has a low consumption mode by making OE “H” and the multi-selector by making the combination of OE “L” and S. The electrostatic discharge protection circuit is built-in in all terminals. ●Features 1) VCC Operation from 2.5V to 5.5V. 2) 3Ω switches between the input to the output. 3) Low Capacity 2ch Analog SW. 4) 10-Pin SON Package. (3.0mm x 2.0mm, Height=0.6mm, 0.5mm pitch) ●Applications Digital Still Cameras, Digital Video Camcorders, Portable Navigation Devices, TV, Portable DVD Players, Portable Game Systems, Personal computers, PDA, Mobile phones ●Line up matrix Parameter Supply Quiescent Current Input voltage range Switch ON Resistance ( VIN=0 V ) Switch ON Capacitance Configuration Package ●Absolute maximum ratings (Ta=25℃) Parameter Input supply voltage Input supply voltage Power dissipation Operating temperature range Storage temperature range Symbol Vmax Vmax Pd Topr Tstr Ratings -0.5～7.0 -0.3～7.0 1.925 -40～+85 -55～+150 Unit V V W ℃ ℃ Conditions D+,D-,1D+,1D-,2D+,2D- Pins Other Pins *1 DPDT VSON010X3020 3Ω 6 pF DPST VSON008X2020 BD11600NUX 18 µA 2.5～5.5 V 2.5 Ω BD11601NUX *1 When using more than at Ta=25℃, it is reduced 15.4 mW per 1℃. ROHM specification board 70mm×70mm mounting. ●Operating conditions (Ta=-40～+85℃) Parameter Input voltage range (VCC) Symbol VCC Ratings 2.5～5.5 Unit V Conditions * This product does not especially designed to be protected from radioactivity. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 1/10 2011.08 - Rev.A BD11600NUX ●Electrical characteristics (Unless otherwise noted, Ta = 25C, VCC=5.0V) Limits Parameter Symbol Min. Typ. Max. Supply Quiescent Current 1 Supply Quiescent Current 2 Supply Quiescent Current 3 Switch ON Resistance 1 (SW1, 2) Switch ON Resistance 2 (SW1, 2) Off-Leakage Current On-Leakage Current Switch Input Range Switch OFF Capacitance (SW1, 2) Switch ON Capacitance (SW1, 2) Input “L” level (S, OE ) Input “H” level (S, OE ) ICC1 ICC2 ICC3 Ron1 Ron2 Ioff Ion VIN Coff Con VIL VIH -2 -2 -0.5 1.1 1 18 19 3 3.5 0 0 4 6 3 40 40 6 6 2 2 5.5 0.5 - Technical Note Unit µA µA µA Ω Ω µA µA V pF pF V V Conditions SW1, 2=OFF SW1=ON SW2=ON VIN=0V VIN=2.4V SW1, 2=OFF VCC>VIN, SW1, 2=ON SW1, 2=ON www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 2/10 2011.08 - Rev.A BD11600NUX ●Electrical characteristic curves (Reference data) Technical Note Fig.1 Eye Pattern Full Speed 40 Fig.2 Eye Pattern High Speed 3 35 2.5 30 2 25 ICC1 (uA) ICC2 (uA) Ta=105°C Ta=25°C 1.5 20 15 1 10 Ta=105° Ta=-60° Ta=25° 0.5 Ta=-60°C VCC=0V~7V S=L, OE=H 5.5 6 6.5 7 5 VCC=0V~7V S=L, OE=L 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 0 0 0.5 1 1.5 2 2.5 3 0 VCC (V) 3.5 4 4.5 5 VCC (V) Fig.3 ICC vs Input Voltage (SW OFF) Fig.4 ICC vs Input Voltage (SW ON) 7 5 6 4 5 3 RON [Ω ] 4 Ta=105 ℃ Ta=25 ℃ 2 Ta=-60 ℃ 1 VCC=5V,IO(D+)=-10mA, VIN=0~7V,S=L,OE=L 0 0 1 2 3 4 5 6 7 I_1D+ (uA) 3 2 1 Ta=25°C Ta=-60°C Ta=105°C 0 0 1 2 3 1D+ (V) 4 5 6 7 1D+ [V] Fig.5 Ron vs Input Voltage Fig.6 Leak current vs Input Voltage(SW OFF) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 3/10 2011.08 - Rev.A BD11600NUX ●Block diagram and pin configuration Technical Note １D+ 1 10 VCC １D- 2 9S 2D+ 3 8 D+ 2D- 4 7 D- GND 5 6 OE Fig.7 Block diagram Fig.8 Pin configuration ●Package Dimensions BD11 600N LOT No. Fig.9 Package Dimensions www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 4/10 2011.08 - Rev.A BD11600NUX ●Pin Description Pin NO. 1 2 3 4 5 6 7 8 9 10 Terminal circuit A B C D E F G H Pin Name 1D+ 1D2D+ 2DGND OE DD+ S VCC I／O O O O O I I I I Ground Pin. Bus-Switch Analog Pin. Analog SW terminal. Select Input Pin. Power Supply. Analog SW terminal. Function Technical Note ●Truth Table OE H H L L S L H L H SW1 OFF OFF ON OFF SW2 OFF OFF OFF ON Signal Pass ALL OFF ALL OFF 1D+⇔D+, 1D-⇔D2D+⇔D+, 2D-⇔D- ●Equivalent Circuit A,B,C,D F,G PIN PIN E,H VCC PIN www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 5/10 2011.08 - Rev.A BD11600NUX ●How to select parts of application Technical Note VCC SW1 High Speed USB TRANSCEIVER 1D+ 1DSW2 D+ DUSB Connector High Speed USB TRANSCEIVER 2D+ 2D- Control OE S GND Fig.10 Application circuit of multi-USB TRANSCEIVER VCC SW1 High Speed USB TRANSCEIVER D+ DSW2 1D+ 1D2D+ 2DUSB HOST2 USB HOST1 OE S GND Control Fig.11 Application circuit of two communicating with two USB HOST www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 6/10 2011.08 - Rev.A BD11600NUX ●Parameter Measurement Information Technical Note VCC 1D+ D+ 2D+ VIN IIN Control OE S GND Fig.12 SW1 ON-State ICC Fig.13 ON-State Resistance (Ron) Fig.14 OFF-State Leakage current Fig.15 ON-State Leakage current www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 7/10 2011.08 - Rev.A BD11600NUX ●Notes for use (1) Absolute maximum ratings Technical Note If applied voltage (VCC), operating temperature range (Topr), or other absolute maximum ratings are exceeded, there is a risk of damage. Since it is not possible to identify short, open, or other damage modes, if special modes in which absolute maximum ratings are exceeded are assumed, consider applying fuses or other physical safety measures. (2) Recommended operating range This is the range within which it is possible to obtain roughly the expected characteristics. For electrical characteristics, it is those that are guaranteed under the conditions for each parameter. Even when these are within the recommended operating range, voltage and temperature characteristics are indicated. (3) Reverse connection of power supply connector There is a risk of damaging the LSI by reverse connection of the power supply connector. For protection from reverse connection, take measures such as externally placing a diode between the power supply and the power supply pin of the LSI. (4) Power supply lines In the design of the board pattern, make power supply and GND line wiring low impedance. When doing so, although the digital power supply and analog power supply are the same potential, separate the digital power supply pattern and analog power supply pattern to deter digital noise from entering the analog power supply due to the common impedance of the wiring patterns. Similarly take pattern design into account for GND lines as well. Furthermore, for all power supply pins of the LSI, in conjunction with inserting capacitors between power supply and GND pins, when using electrolytic capacitors, determine constants upon adequately confirming that capacitance loss occurring at low temperatures is not a problem for various characteristics of the capacitors used. (5) GND voltage Make the potential of a GND pin such that it will be the lowest potential even if operating below that. In addition, confirm that there are no pins for which the potential becomes less than a GND by actually including transition phenomena. (6) Shorts between pins and misinstallation When installing in the set board, pay adequate attention to orientation and placement discrepancies of the LSI. If it is installed erroneously, there is a risk of LSI damage. There also is a risk of damage if it is shorted by a foreign substance getting between pins or between a pin and a power supply or GND. (7) Operation in strong magnetic fields Be careful when using the LSI in a strong magnetic field, since it may malfunction. (8) Inspection in set board When inspecting the LSI in the set board, since there is a risk of stress to the LSI when capacitors are connected to low impedance LSI pins, be sure to discharge for each process. Moreover, when getting it on and off of a jig in the inspection process, always connect it after turning off the power supply, perform the inspection, and remove it after turning off the power supply. Furthermore, as countermeasures against static electricity, use grounding in the assembly process and take appropriate care in transport and storage. (9) Input pins Parasitic elements inevitably are formed on an LSI structure due to potential relationships. Because parasitic elements operate, they give rise to interference with circuit operation and may be the cause of malfunctions as well as damage. Accordingly, take care not to apply a lower voltage than GND to an input pin or use the LSI in other ways such that parasitic elements operate. Moreover, do not apply a voltage to an input pin when the power supply voltage is not being applied to the LSI. Furthermore, when the power supply voltage is being applied, make each input pin a voltage less than the power supply voltage as well as within the guaranteed values of electrical characteristics. (10) Ground wiring pattern When there is a small signal GND and a large current GND, it is recommended that you separate the large current GND pattern and small signal GND pattern and provide single point grounding at the reference point of the set so that voltage variation due to resistance components of the pattern wiring and large currents do not cause the small signal GND voltage to change. Take care that the GND wiring pattern of externally attached components also does not change. (11) Externally attached capacitors When using ceramic capacitors for externally attached capacitors, determine constants upon taking into account a lowering of the rated capacitance due to DC bias and capacitance change due to factors such as temperature. (12) Thermal design Perform thermal design in which there are adequate margins by taking into account the permissible dissipation (Pd) in actual states of use. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 8/10 2011.08 - Rev.A BD11600NUX ●Power Dissipation Technical Note 2.4 2.2 2 Power dissipation :Pd [W] 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 Ambient temperature :Ta [℃] Fig.16 Power dissipation Pd=1.925W -15.4mW/℃ Ta_max=85℃ www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 9/10 2011.08 - Rev.A BD11600NUX ●Ordering part number Technical Note B D 1 Part No. 1 6 0 0 N U X - E 2 Part No. Package NUX:VSON010X3020 Packaging and forming specification E2: Embossed tape and reel VSON010X3020 3.0±0.1 2.0±0.1 Tape Quantity Direction of feed Embossed carrier tape 4000pcs E2 The direction is the 1pin of product is at the upper left when you hold 1PIN MARK 0.6MAX S +0.03 0.02 −0.02 (0.12) ( reel on the left hand and you pull out the tape on the right hand ) 0.05 S C0.2 1 2.0±0.1 0.5±0.1 5 0.4±0.1 10 6 +0.05 0.25 −0.04 0.64±0.1 2.39±0.1 1pin (Unit : mm) Reel Direction of feed ∗ Order quantity needs to be multiple of the minimum quantity. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 10/10 2011.08 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. 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