Datasheet
Low Consumption Power Class D Amplifier
9W+9W Analog Input
Class D Speaker Amplifier
BD28411MUV
General Description
Key Specifications
BD28411MUV is 9W+9W stereo class D amplifier which
does not require an external heat sink.
This IC is incorporated with a precise oscillator to
generate multiple switching frequencies that can avoid
the AM radio interference. In addition, 2.1Ch audio
system can be realized by master and slave operation
without beat noise caused by interference between two
ICs. Furthermore, this IC realizes lower power
consumption during small power output, so this product
is most suitable for battery equipped speaker systems
such as wireless speakers.
Features
Analog Differential Input
Low Standby Current
Output Feedback Circuitry prevents sound quality
degradation caused by power supply voltage
fluctuation, achieves low noise and low distortion,
eliminates the need of large electrolytic-capacitors
for decoupling.
Power limit function
(Linearly-programmable)
Selectable switching frequency
(AM avoidance function)
Synchronization control is supported
(Selectable Master and Slave operation)
Parallel BTL (PBTL) is supported
Wide voltage range (VCC=4.5V to 13V)
High efficiency and low-heat-generation make the
system smaller, thinner, and more power-saving
Pop noise prevention during power supply ON/OFF
High reliability design by built-in protection circuits
- Overheat protection
- Under voltage protection
- Output short protection
- Output DC voltage protection
Small package (VQFN032V5050) achieves mount
area reduction
Supply Voltage Range:
4.5V to 13V
Speaker Output Power:
9W+9W (Typ)
(VCC=12V, RL=8Ω, PLIMIT=0V)
Total Harmonic Distortion Ratio:
0.03% (Typ) @Po=1W
(VCC=11V, RL=8Ω, PLIMIT=0V)
Crosstalk:
100dB (Typ)
PSRR:
55dB (Typ)
Output Noise Voltage:
-80dBV (Typ)
Standby Current:
0.1µA (Typ)
Operating Current:
16mA (Typ)
(No load or filter, No signal)
Operating Temperature Range:
-25°C to +85°C
W(Typ) x D(Typ) x H(Max)
Package
VQFN032V5050
5.00mm x 5.00mm x 1.00mm
Typical Application Circuit
SP ch1
(Lch)
SP ch2
(Rch)
Audio Source
TEST
OUT2N
GAIN_ BSP2N
MS_SEL
MUTEＸ
PDX
OUT2P
SYNC
FSEL
BSP2P
BSP1N
IN2N
IN2P
IN1N
IN1P
OUT1P
ERROR
BSP1P
MUTEＸ
PLIMIT
Wireless speaker, Small active speaker,
Portable audio equipment, etc.
PDX
OUT1N
Applications
Other
device
Figure 1. Typical Application Circuit
〇Product structure : Silicon monolithic integrated circuit
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〇This product has no designed protection against radioactive rays
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Datasheet
BD28411MUV
Pin Configuration
ERROR
PDX
TEST
NC
NC
VCCA
VCCP1
BSP1P
(TOP VIEW)
32
31
30
29
28
27
26
25
GNDP1
PLIMIT
3
22
OUT1N
GNDA
4
21
BSP1N
REGG
5
20
BSP2P
GAIN_MS_SEL
6
19
OUT2P
IN2P
7
18
GNDP2
IN2N
8
17
OUT2N
10
11
12
13
14
15
16
BSP2N
9
VCCP2
23
NC
2
MUTEX
IN1N
FSEL2
OUT1P
FSEL1
24
FSEL0
1
SYNC
IN1P
Figure 2. Pin Configuration
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Datasheet
BD28411MUV
Pin Description
Pin
No.
Pin Name
IO
1
IN1P
I
Positive input pin for Ch1
2
IN1N
I
Negative input pin for Ch1
3
PLIMIT
I
Power limit level setting pin
4
GNDA
-
GND pin for Analog signal
Function
Internal Equivalent Circuit
Internal power supply pin for Gate driver
Please connect a capacitor.
5
REGG
O
*The REGG terminal of BD28411MUV should not be
used as external supply. Therefore, do not connect
anything except the capacitor for stabilization and the
resistors for setting of GAIN_MS_SEL and PLIMIT.
6
GAIN_MS_SEL
I
Gain and Master/Slave mode Setting pin
7
IN2P
I
Positive input pin for Ch2
8
IN2N
I
Negative input pin for Ch2
9
SYNC
I/O
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Clock input/output pin to synchronize
multiple class D amplifiers
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BD28411MUV
Pin Description – continued
10
10
FSEL0
I
100k
PWM frequency setting pin
4
11
FSEL1
I
PWM frequency setting pin
12
FSEL2
I
PWM frequency setting pin
13
MUTEX
I
Speaker output mute control pin
H: Mute OFF
L: Mute ON
14
NC
-
Non connection
15
VCCP2
-
16
BSP2N
O
17
OUT2N
O
18
GNDP2
-
19
OUT2P
O
20
BSP2P
O
21
BSP1N
O
22
OUT1N
O
23
GNDP1
-
24
OUT1P
O
25
BSP1P
O
26
VCCP1
-
27
VCCA
-
28
NC
-
Output pin of Ch1 positive PWM signal
Please connect to output LPF.
Boot-strap pin of Ch1 positive PWM signal
Please connect a capacitor.
Power supply pin for Ch1 PWM signal
Please connect a capacitor.
Power supply pin for Analog signal
Please connect a capacitor.
Non connection
29
NC
-
Non connection
30
TEST
I
Test pin
Please connect to GND.
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Power supply pin for Ch2 PWM signal
Please connect a capacitor.
Boot-strap pin of Ch2 negative PWM signal
Please connect a capacitor.
Output pin of Ch2 negative PWM signal
Please connect to output LPF.
GND pin for Ch2 PWM signal
Output pin of Ch2 positive PWM signal
Please connect to output LPF.
Boot-strap pin of Ch2 positive PWM signal
Please connect a capacitor.
Boot-strap pin of Ch1 negative PWM signal
Please connect a capacitor.
Output pin of Ch1 negative PWM signal
Please connect to output LPF.
GND pin for Ch1 PWM signal
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BD28411MUV
Pin Description – continued
Power down setting pin
31
PDX
I
H: Active
L: Standby
Error flag pin
Please connect to pull-up resistor.
32
ERROR
O
H: Normal
L: Error detected
*An error flag is outputted when Output Short
Protection, DC Voltage Protection, and High
Temperature Protection are operated. This flag shows
IC condition during operation.
The numerical value of internal equivalent circuit is typical value, not guaranteed value.
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Datasheet
BD28411MUV
NC
NC
29
28
BSP1P
30
VCCP1
31
VCCA
32
TEST
PDX
ERROR
Block Diagram
27
26
25
PROTECT
24
OUT1P
23
GNDP1
22
OUT1N
REGG
CONTROL
I/F
1
21
BSP1N
REGG
IN1P
20
BSP2P
19
OUT2P
18
GNDP2
17
OUT2N
REGG
IN1N
2
DRIVER
FET
PWM
PLIMIT
3
GNDA
4
DRIVER
FET
PLIMIT
GAIN
REGG
GAIN_MS_SEL
5
DRIVER
FET
LDO
DRIVER
FET
6
PWM
IN2P
7
IN2N
8
REGG
OSC
14
15
16
BSP2N
FSEL1
13
VCCP2
FSEL0
12
NC
11
MUTEX
10
FSEL2
9
SYNC
CONTROL I/F
Figure 3. Block Diagram
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BD28411MUV
Absolute Maximum Ratings (Ta = 25°C)
Parameter
Supply Voltage
Symbol
Rating
Unit
VCCMAX
-0.3 to +15.5
V
(Note 1)
(Note 3)
W
(Note 4)
W
3.26
Applied pins and Conditions
VCCA,VCCP1,VCCP2
Power Dissipation(Note 2)
Pd
Input Voltage1(Note 1)
VIN
-0.3 to +VREGG
V
IN1P, IN1N, IN2P, IN2N, PLIMIT, GAIN_MS_SEL,
PLIMIT, SYNC(Note 5), FSEL0, FSEL1, FSEL2,
PDX, MUTEX
Input Voltage2(Note 1)
VERR
-0.3 to +7
V
ERROR
Pin Voltage1
VPIN1
-0.3 to +VCCMAX
V
OUT1P, OUT1N, OUT2P, OUT2N
Operating Temperature
Topr
-25 to +85
°C
Storage Temperature
Tstg
-55 to +150
°C
Junction Temperature
Tjmax
+150
°C
(Note 1) (Note 6)
(Note 1)
(Note 2)
(Note 3)
(Note 4)
(Note 5)
(Note 6)
4.56
Please refer to Power Dissipation for details.
The voltage that can be applied reference to GND (Pin4, 18, 23).
Do not exceed Pd and Tjmax=150°C.
Derate by 26.1mW/℃ for operating above Ta=25°C when mounted on 74.2mm × 74.2mm × 1.6mm, FR4, 4-layer glass epoxy board
(Top and bottom layer back copper foil size: 20.2mm2, 2nd and 3rd layer back copper foil size: 5505mm2). There are thermal vias on the board.
Derate by 36.5mW/℃ for operating above Ta=25°C when mounted on 74.2mm × 74.2mm × 1.6mm, FR4, 4-layer glass epoxy board
(Copper area: 5505mm2). There are thermal vias on the board.
SYNC pin is I/O pin. It is specified for input mode.
Please use under this rating including the AC peak waveform (overshoot) for all conditions.
Only undershoot is allowed at condition of ≦ 15.5V by the VCC reference and ≦ 10nsec (cf. Figure 4)
VCC
Overshoot from GND
15.5V (Max)
Undershoot from VCC
15.5V (Max)
GND
≦ 10nsec
Figure 4. Overshoot and Undershoot
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over
the absolute maximum ratings.
Recommended Operating Conditions (Ta= -25°C to +85°C)
Parameter
Symbol
Min
Typ
Max
Unit
VIN
4.5
-
13
V
VCCA, VCCP1, VCCP2
RL1
5.4
-
-
Ω
BTL
RL2
3.2
-
-
Ω
High Level Input Voltage
VIH
2.0
-
-
V
Low Level Input Voltage
VIL
0
-
0.8
V
Low Level Output Voltage
VOL
-
-
0.8
V
PBTL
FSEL0, FSEL1, FSEL2,
MUTEX, PDX
FSEL0, FSEL1, FSEL2,
MUTEX, PDX
ERROR, IOL=0.5mA
Supply Voltage
Minimum Load Impedance(Note 7)
(Note 7)
Applied pins and Conditions
Pd should not be exceeded.
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BD28411MUV
Electrical Characteristics
(Unless otherwise specified, Ta=25°C, VCC=11V, fPWM=600kHz, fIN=1kHz, RL=8Ω, PDX=3.3V, MUTEX=3.3V, PLIMT=0V,
Gain=26dB, Output LC filter: L=15μH, C=1μF
when VCC>11V, snubber circuit is added: C=680pF, R=5.6Ω)
Parameter
Symbol
Min
Typ
Max
Unit
Quiescent Standby Current
ICC1
-
0.1
25
µA
Quiescent Mute Current
ICC2
-
10
20
mA
Quiescent Operating Current
ICC3
-
16
32
mA
VREGG
4.45
5.55
6.05
V
Input Pull Down Impedance 1
RIN1
70
100
130
kΩ
Input Pull Down Impedance 2
RIN2
140
200
260
kΩ
Regulator Output Voltage
(Note 8)
Output Power
Applied pins and Conditions
No load or filter,
PDX=L, MUTEX=L
No load or filter,
PDX=H, MUTEX=L
No load or filter, No signal,
PDX=H, MUTEX=H
PDX=H, MUTEX=H
MUTEX, PDX,
FSEL0, FSEL1, FSEL2,
SYNC(Slave mode only),
PLIMIT
PO1
-
9
-
W
(Note 8)
Gain 1
GV1
19
20
21
dB
Gain 2(Note 8)
GV2
25
26
27
dB
Gain 3(Note 8)
GV3
31
32
33
dB
Gain 4(Note 8)
GV4
35
36
37
dB
Total Harmonic Distortion(Note 8)
THD
-
0.03
-
%
CT
60
100
-
dB
VCC=12V, THD+N=10%
Po=1W,
GAIN_MS_SEL= 0V
PO=1W ,
GAIN_MS_SEL= 2/9 × VREGG
PO=1W,
GAIN_MS_SEL= 3/9 × VREGG
PO=1W,
GAIN_MS_SEL= 4/9 × VREGG
Po=1W,
BW=20 to 20kHz (AES17)
Po=1W, 1kHz BPF
PSRR
-
55
-
dB
Vripple=0.2 VP-P, f=1kHz
VNO
-
-80
-70
dBV
fPWM1
564
600
636
kHz
fPWM2
470
500
530
kHz
fPWM3
376
400
424
kHz
Crosstalk
(Note 8)
(Note 8)
PSRR
(Note 8)
Output Noise Level
PWM (Pulse Width Modulation)
Frequency
(Note 8)
Po=0W, BW=IHF-A
FSEL2=H,
FSEL1=L,
FSEL0=H
FSEL2=H,
FSEL1=L,
FSEL0=L
FSEL2=L,
FSEL1=H,
FSEL0=H
The value is specified as typical application. Actual value depends on PCB layout and external components.
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BD28411MUV
Typical Performance Curves
(Unless otherwise specified, Ta=25°C, VCC=11V, fPWM=600kHz, fIN=1kHz, RL=8Ω, PDX=3.3V, MUTEX=3.3V, PLIMT=0V,
Gain=26dB, Output LC filter: L=15μH, C=1μF
when VCC>11V, snubber circuit is added: C=680pF, R=5.6Ω)
10
45
Current Consumption : I CC1 [µA]
9
8
Current Consumption : ICC2, ICC3 [mA]
No load or filter
No signal
“PD”
7
6
5
4
3
2
1
0
No load or filter
No signal
“MUTE”
“ACTIVE”
40
35
30
25
ACTIVE
without snubber
20
15
10
MUTE
5
0
4
6
8
10
12
Supply Voltage : VCC [V]
4
14
Figure 5. Circuit Current vs Supply Voltage
(PD)
6
8
10
12
Supply Voltage : VCC [V]
14
Figure 6. Circuit Current vs Supply Voltage
(MUTE, ACTIVE)
100
100
VCC=5V
90
VCC=9V
VCC=12V
VCC=5V
90
80
VCC=9V
VCC=12V
80
70
70
RL=8Ω
60
Efficiency [%]
Efficiency [%]
ACTIVE
with snubber
50
40
30
60
50
40
30
20
20
10
10
0
0
0
2
4
6
8
10
12
14
0
2
4
6
8
10
12
14
Output Power [W/Ch]
Output Power [W/Ch]
Figure 7. Efficiency vs Output Power
(RL=8Ω)
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RL=6Ω
Figure 8. Efficiency vs Output Power
(RL=6Ω)
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Datasheet
BD28411MUV
Typical Performance Curves
(Unless otherwise specified, Ta=25°C, VCC=11V, fPWM=600kHz, fIN=1kHz, RL=8Ω, PDX=3.3V, MUTEX=3.3V, PLIMT=0V,
Gain=26dB, Output LC filter: L=15μH, C=1μF
when VCC>11V, snubber circuit is added: C=680pF, R=5.6Ω)
100
16
VCC=5V
90
VCC=9V
VCC=12V
14
RL=8Ω
80
Efficiency [%]
Output Power [W/Ch]
12
70
PBTL
RL=4Ω
Output LC filter:
L=10μH, C=2.2μF
60
50
40
30
10
THD+N=10%
8
6
THD+N=1%
4
20
2
10
0
0
0
2
4
6
8
10 12
14 16
4
18 20
8
10
12
Output Power [W/Ch]
Supply Voltage : V CC [V]
Figure 9. Efficiency vs Output Power
(PBTL, RL=4Ω)
Figure 10. Output Power vs Supply Voltage
(RL=8Ω)
16
14
24
PBTL
RL=4Ω
Output LC filter:
L=10μH, C=2.2μF
22
14
RL=6Ω
20
12
18
10
Output Power [W/Ch]
Output Power [W/Ch]
6
THD+N=10%
8
6
THD+N=1%
4
16
14
THD+N=10%
12
10
8
THD+N=1%
6
4
2
2
0
0
4
6
8
10
12
14
4
6
8
10
12
Supply Voltage : V CC [V]
Supply Voltage : V CC [V]
Figure 11. Output Power vs Supply Voltage
(RL=6Ω)
Figure 12. Output Power vs Supply Voltage
(PBTL, RL=4Ω)
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Datasheet
BD28411MUV
Typical Performance Curves
(Unless otherwise specified, Ta=25°C, VCC=11V, fPWM=600kHz, fIN=1kHz, RL=8Ω, PDX=3.3V, MUTEX=3.3V, PLIMT=0V,
Gain=26dB, Output LC filter: L=15μH, C=1μF
when VCC>11V, snubber circuit is added: C=680pF, R=5.6Ω)
2.5
2.5
RL=6Ω
2
VCC=12V
Current Comsumption : I CC [A]
Current Consumption : I CC [A]
RL=8Ω
VCC=9V
1.5
1
VCC=5V
0.5
0
2
VCC=9V
VCC=12V
1.5
VCC=5V
1
0.5
0
0
2
4
6
8
10
12
14
0
Output Power [W/Ch]
2
4
6
8
10
12
14
Output Power [W/Ch]
Figure 13. Circuit Current vs Output Power
(RL=8Ω)
Figure 14. Circuit Current vs Output Power
(RL=6Ω)
Current Consumption : I CC [A]
2.5
PBTL
RL=4Ω
Output LC filter:
L=10μH, C=2.2μF
2
VCC=12V
VCC=9V
1.5
1
VCC=5V
0.5
0
0
2
4
6
8
10
12
14
16
18
20
Output Power [W/Ch]
Figure 15. Circuit Current vs Output Power
(PBTL, RL=4Ω)
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Datasheet
BD28411MUV
Typical Performance Curves
(Unless otherwise specified, Ta=25°C, VCC=11V, fPWM=600kHz, fIN=1kHz, RL=8Ω, PDX=3.3V, MUTEX=3.3V, PLIMT=0V,
Gain=26dB, Output LC filter: L=15μH, C=1μF
when VCC>11V, snubber circuit is added: C=680pF, R=5.6Ω)
0
36
OUT1
OUT2
-20
No Signal
RL=8Ω
OUT1
OUT2
31
Voltage Gain [dB]
-40
Noise FFT [dBV]
PO=1W
RL=8Ω
-60
-80
-100
26
21
-120
16
-140
10
100
1k
10k
10
100k
100
10k
100k
Freq [Hz]
Freq [Hz]
Figure 17. Voltage Gain vs Freq.
(RL=8Ω)
Figure 16. FFT of Output Noise Voltage
(RL=8Ω)
10
10
1
0.1
OUT1
OUT2
fIN=6kHz
PO=1W
BW=20 to 20kHz AES17
RL=8Ω
1
THD+N [%]
fIN=1kHz
fIN=100Hz
fIN=6kHz
THD+N [%]
1k
fIN=1kHz
0.01
0.1
0.01
fIN=100Hz
BW=20 to 20kHz AES17
RL=8Ω
0.001
0.01
0.001
0.1
1
10
100
Po [W]
100
1k
10k
100k
Freq [Hz]
Figure 19. THD+N vs Freq.
(RL=8Ω)
Figure 18. THD+N vs Output Power
(RL=8Ω)
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Datasheet
BD28411MUV
Typical Performance Curves
(Unless otherwise specified, Ta=25°C, VCC=11V, fPWM=600kHz, fIN=1kHz, RL=8Ω, PDX=3.3V, MUTEX=3.3V, PLIMT=0V,
Gain=26dB, Output LC filter: L=15μH, C=1μF
when VCC>11V, snubber circuit is added: C=680pF, R=5.6Ω)
0
0
OUT1 to OUT2
OUT2 to OUT1
-20
-20
-40
-60
-80
-100
-60
-80
-100
-120
-120
0.01
0.1
1
10
100
10
100
Po [W]
1k
10k
100k
Freq [Hz]
Figure 20. Crosstalk vs Output Power
(RL=8Ω)
Figure 21. Crosstalk vs Freq.
(RL=8Ω)
36
0
OUT1
OUT2
-20
No Signal
RL=6Ω
OUT1
OUT2
PO=1W
RL=6Ω
31
Voltage Gain [dB]
-40
Noise FFT [dBV]
PO=1W
RL=8Ω
-40
Crosstalk [dB]
Crosstalk [dB]
OUT1 to OUT2
OUT2 to OUT1
RL=8Ω
-60
-80
-100
26
21
-120
-140
16
10
100
1k
10k
100k
Freq [Hz]
100
1k
10k
100k
Freq [Hz]
Figure 22. FFT of Output Noise Voltage
(RL=6Ω)
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Figure 23. Voltage Gain vs Freq.
(RL=6Ω)
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Datasheet
BD28411MUV
Typical Performance Curves
(Unless otherwise specified, Ta=25°C, VCC=11V, fPWM=600kHz, fIN=1kHz, RL=8Ω, PDX=3.3V, MUTEX=3.3V, PLIMT=0V,
Gain=26dB, Output LC filter: L=15μH, C=1μF
when VCC>11V, snubber circuit is added: C=680pF, R=5.6Ω)
10
10
THD+N [%]
1
fIN=6kHz
PO=1W
BW=20 to 20kHz AES17
RL=6Ω
1
fIN=1kHz
0.1
0.01
OUT1
OUT2
THD+N [%]
fIN=1kHz
fIN=100Hz
fIN=6kHz
0.1
0.01
fIN=100Hz
BW=20 to 20kHz AES17
RL=6Ω
0.001
0.001
0.01
0.1
1
10
10
100
100
0
0
OUT1 to OUT2
OUT2 to OUT1
OUT1 to OUT2
OUT2 to OUT1
RL=6Ω
-20
-40
PO=1W
RL=6Ω
-40
Crosstalk [dB]
Crosstalk [dB]
100k
Figure 25. THD+N vs Freq.
(RL=6Ω)
Figure 24. THD+N vs Output Power
(RL=6Ω)
-60
-80
-60
-80
-100
-100
-120
-120
0.01
10k
Freq [Hz]
Po [W]
-20
1k
0.1
1
10
100
Po [W]
100
1k
10k
100k
Freq [Hz]
Figure 27. Crosstalk vs Freq.
(RL=6Ω)
Figure 26. Crosstalk vs Output Power
(RL=6Ω)
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Datasheet
BD28411MUV
Typical Performance Curves
(Unless otherwise specified, Ta=25°C, VCC=11V, fPWM=600kHz, fIN=1kHz, RL=8Ω, PDX=3.3V, MUTEX=3.3V, PLIMT=0V,
Gain=26dB, Output LC filter: L=15μH, C=1μF
when VCC>11V, snubber circuit is added: C=680pF, R=5.6Ω)
0
36
No Signal
PBTL
RL=4Ω
Output LC filter:
L=10μH, C=2.2μF
-20
31
Voltage Gain [dB]
Noise FFT [dBV]
-40
PO=1W
PBTL
RL=4Ω
Output LC filter:
L=10μH, C=2.2μF
-60
-80
-100
26
21
-120
16
-140
10
100
1k
10k
10
100k
100
10
10
fIN=1kHz
fIN=100Hz
fIN=6kHz
1
PO=1W
BW=20 to 20kHz AES17
PBTL
RL=4Ω
Output LC filter:
L=10μH, C=2.2μF
fIN=6kHz
1
THD+N [%]
THD+N [%]
100k
Figure 29. Voltage Gain vs Freq.
(PBTL, RL=4Ω)
Figure 28. FFT of Output Noise Voltage
(PBTL, RL=4Ω)
fIN=1kHz
0.1
fIN=100Hz
0.001
0.01
10k
Freq [Hz]
Freq [Hz]
0.01
1k
0.1
BW=20 to 20kHz AES17
PBTL
RL=4Ω
Output LC filter:
L=10μH, C=2.2μF
1
10
0.01
0.001
100
Po [W]
10
100
1k
10k
100k
Freq [Hz]
Figure 31. THD+N vs Freq.
(PBTL, RL=4Ω)
Figure 30. THD+N vs Output Power
(PBTL, RL=4Ω)
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Datasheet
BD28411MUV
Typical Performance Curves
(Unless otherwise specified, Ta=25°C, VCC=11V, fPWM=600kHz, fIN=1kHz, RL=8Ω, PDX=3.3V, MUTEX=3.3V, PLIMT=0V,
Gain=26dB, Output LC filter: L=15μH, C=1μF
when VCC>11V, snubber circuit is added: C=680pF, R=5.6Ω)
10
10
fIN=1kHz
fIN=100Hz
fIN=6kHz
0.1
0.01
1
fIN=6kHz
fIN=1kHz
THD+N [%]
THD+N [%]
1
OUT1
OUT2
fIN=100Hz
OUT2
0.1
0.01
OUT1
fPWM=400kHz
BW=20 to 20kHz AES17
RL=8Ω
0.001
0.01
fPWM=400kHz
PO=1W
BW=20 to 20kHz AES17
RL=8Ω
0.001
0.1
1
10
100
Po [W]
100
1k
10k
100k
Freq [Hz]
Figure 33. THD+N vs Freq.
(fPWM=400kHz, RL=8Ω)
Figure 32. THD+N vs Output Power
(fPWM=400kHz, RL=8Ω)
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Datasheet
BD28411MUV
Power up / down sequence
① Power up VCCP1, VCCP2, VCCA simultaneously.
⑧ Power down VCCP1, VCCP2, VCCA simultaneously.
VCCP1
VCCP2
VCCA
t
② After VCC rises,
please set PDX to High.
⑦ Set PDX to Low.
PDX
t
REGG
t
④ Input audio signal.
⑤ Stop audio signal.
IN1P
IN1N
IN2P
IN2N
MUTEX
t
More than
50msec
③ After input rises,
please set MUTEX to High.
⑥ After input signal stops,
please set MUTEX to Low.
t
OUT1P
OUT1N
OUT2P
OUT2N
t
Speaker
BTL output
(After LC filter)
t
Figure 34. Power Up / Down Sequence
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Datasheet
BD28411MUV
Function Description
(1)
Power down and Mute setting
PDX
MUTEX
L
L/H
H
L
H
H
Normal
PWM output
(Note 10)
ERROR
OUT1P, 1N, 2P, 2N
(Note 9)
High-Z_Low
H
(Power down)
(Note 9)
High-Z_Low
H
(MUTE_ON)
Active
H
(MUTE_OFF)
ERROR Detection
PWM output
(Note 10)
ERROR
OUT1P, 1N, 2P, 2N
(Note 9)
High-Z_Low
H
(Power down)
(Note 9)
High-Z_Low
L
(MUTE_ON)
(Note 9)
High-Z_Low
L
(MUTE_ON)
(Note 9) All power transistors are OFF and output terminals are pulled down by 40kΩ (Typ).
(Note 10) ERROR pin is pulled up by 10kΩ resistor.
(2)
Gain and Master/Slave setting
Master/slave and gain are set by GAIN_MS_SEL pin voltage.
(Note 11)
REGG
R1
REGG
GAIN_MS_SEL
R2
R1
(to REGG)
R2(Note 11)
(to GND)
Master/Slave
Gain
Input Impedance
18kΩ
18kΩ
33kΩ
51kΩ
68kΩ
68kΩ
68kΩ
open
Open
68kΩ
68kΩ
68kΩ
51kΩ
33kΩ
18kΩ
18kΩ
Slave
Slave
Slave
Slave
Master
Master
Master
Master
36dB
32dB
26dB
20dB
36dB
32dB
26dB
20dB
30kΩ
45.1kΩ
79.3kΩ
127.9kΩ
30kΩ
45.1kΩ
79.3kΩ
127.9kΩ
(Note 11) Please use 1% tolerance resistor.
Figure 35. GAIN_MS_SEL Pin Setting
Setting cannot be changed when IC is active, but it can be set by rebooting (PDX=H to L to H).
Master/Slave Function
This IC has master and slave mode, and it can be synchronized by PWM frequency between two ICs. In master
mode, SYNC pin becomes output pin for synchronization and in slave mode it becomes input pin, so please
connect each SYNC pins. Please set FSEL2/FSEL1/FSEL0 pins to be same each other.
(3)
Parallel BTL Function
Parallel BTL mode can be set by connecting IN2P and IN2N pins to GND.
Please short OUT1P – OUT2P, OUT1N – OUT2N near the IC as much as possible.
Parallel BTL mode cannot be set by connecting IN1P and IN1N pins to GND.
Stereo BTL mode
Parallel BTL mode
Figure 36. Parallel BTL mode
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Datasheet
BD28411MUV
(4)
Power Limit Function
It is possible to limit the maximum output voltage by PLIMIT pin.
12
Po [W]
10
8
6
4
2
0
0
2
4
6
PLIMIT pin voltage [V]
Figure 37. Power Limit
Figure 38. Power Limit Function [VCC=12V, RL=8Ω ] (Typ)
Ex.) If PLIMIT is set by R3A=12kΩ and R3B=20kΩ in “Application Information”, output power is limited to about 6.4W.
If power limit function is not needed, connect PLIMIT pin to GND.
(5)
FSEL2 / FSEL1 / FSEL0 (AM avoidance function)
FSEL2 / FSEL1 / FSEL0 pins are used for PWM frequency setting. PWM frequency is near to AM radio frequency band
therefore this makes interference during AM radio is used, and may negatively affects reception of AM radio wave. This
interference can be reduced by shift of PWM frequency. Below are the recommended settings. For example, receiving AM
radio wave of 1269kHz in Asia / Europe please set PWM frequency to 500kHz.
AM frequency [kHz]
Recommended PWM frequency setting
Americas
Asia / Europe
fPWM=400kHz
FSEL2=L
FSEL1=H
FSEL0=H
540 – 917
917 – 1125
1125 – 1375
1375 – 1547
1547 – 1700
522 – 540
540 – 914
914 – 1122
1122 – 1373
1373 – 1548
1548 – 1701
○
○
○
○
fPWM=500kHz
FSEL2=H
FSEL1=L
FSEL0=L
fPWM=600kHz
FSEL2=H
FSEL1=L
FSEL0=H
○
○
-
○
○
○
○
Do not set following conditions:
FSEL2=FSEL1=FSEL0=H
FSEL2=H, FSEL1=H, FSEL0=L
FSEL2=L, FSEL1=H, FSEL0=L
FSEL2=L, FSEL1=L, FSEL0=H
FSEL2=FSEL1=FSEL0=L
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Datasheet
BD28411MUV
Application Information
(1) Application Circuit Example 1 (Stereo BTL, VCC=4.5 to 11V)
Overshoot of output PWM differs according to the board, and etc. Please check to ensure that it is lower than absolute
maximum ratings. If it exceeds the absolute maximum ratings, snubber circuit need to be added, the circuit example is
shown on the next page.
VCC
3.3V
R32
10kΩ
REGG
R6A GAIN_MS_SEL
R6B
C7
1µF
IN2P
IN2N
BSP1P
VCCP1
NC
VCCA
NC
24
REGG
23
DRIVER
FET
3
GAIN
DRIVER
FET
LDO
DRIVER
FET
6
21
19
7
18
REGG
OSC
12
13
FSEL2
11
FSEL1
FSEL0
10
SYNC
9
C24A
1µF
RL=8Ω/6Ω
C22A
1µF
L22A
C21
0.68µF 15µH
C20
0.68µF
L19A
15µH
OUT2P
C19A
1µF
GNDP2
RL=8Ω/6Ω
C17A
1µF
17 OUT2N
CONTROL I/F
C8
1µF
BSP1N
20 BSP2P
PWM
8
OUT1P
GNDP1
22 OUT1N
DRIVER
FET
PLIMIT
5
C25
0.68µF
25
L24A
15µH
2
4
26
CONTROL
I/F
1
REGG
27
REGG REGG
C5
1µF
28
L17A
15µH
14
VCC
15
C15A
0.1µF
C16
0.68µF
16
BSP2N
REGG
29
VCCP2
PLIMIT
GNDA
Source
PROTECT
30
PWM
R3B
Audio
31
NC
C2
1µF
C26B
10µF
MUTEX
R3A
IN1N
TEST
PDX
ERROR
REGG
IN1P
C26A
0.1µF
C27B
4.7µF
32
C1
1µF
VCC
C27A
0.1µF
C15B
10µF
Figure 39. Application Circuit 1
BOM 1 (Stereo BTL, VCC=4.5 to 11V)
Parts
Qty.
Parts No.
1
R3A
1
R3B
Resistor
1
R6A
1
R6B
1
R32
4
C1, C2, C7, C8
1
C5(Note 12)
3
C15A, C26A, C27A(Note 12)
Capacitor
2
C15B, C26B(Note 12)
4
C16, C20, C21, C25(Note 12)
4
C17A, C19A, C22A, C24A
1
C27B(Note 12)
Inductor
4
L17A, L19A, L22A, L24A
(Note 12)
Description
Ref. Function Description (4)Power Limit Function
Ref. Function Description (2)Gain and Master/Slave setting
100kΩ, 1/16W, J(±5%)
1μF, 16V, B(±10%)
1μF, 16V, B(±10%)
0.1μF, 25V, B(±10%)
10μF, 25V, B(±10%)
0.68μF, 16V, B(±10%)
1μF, 25V, B(±10%)
4.7μF, 25V, B(±10%)
15μH, 2.1A, ±20%
Please place it near pin as much as possible.
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Datasheet
BD28411MUV
(2) Application Circuit Example 2 (Stereo BTL, VCC=11 to 13V)
Please add the snubber circuit at OUT pin when VCC=11 to 13V.
VCC
R32
10kΩ
R6A GAIN_MS_SEL
R6B
C7
1µF
IN2P
IN2N
BSP1P
VCCP1
NC
C25
0.68µF
25
OUT1P
24
REGG
2
23
DRIVER
FET
3
22
DRIVER
FET
PLIMIT
GAIN
5
26
CONTROL
I/F
1
4
27
REGG REGG
REGG
C5
REGG
1µF
VCCA
NC
28
DRIVER
FET
LDO
DRIVER
FET
6
7
18
REGG
OSC
12
13
FSEL2
FSEL0
11
FSEL1
10
SYNC
9
17
CONTROL I/F
C8
1µF
680pF
5.6Ω
R22
C22C
OUT1N
5.6Ω
680pF
BSP2P
OUT2P
19
PWM
8
C24C
R24
GNDP1
21 BSP1N
20
L24A
15µH
C24A
1µF
RL=8Ω/6Ω
C22A
1µF
L22A
C21
0.68µF 15µH
Snubber circuit
C20
0.68µF
L19A
15µH
C19C
R19
GNDP2
680pF
5.6Ω
C19A
1µF
R17
C17C
OUT2N
5.6Ω
680pF
C17A
1µF
RL=8Ω/6Ω
L17A
15µH
14
15
VCC
C16
0.68µF
16
BSP2N
REGG
29
VCCP2
PLIMIT
GNDA
Source
PROTECT
30
PWM
R3B
Audio
31
NC
C2
1µF
C26B
10µF
MUTEX
R3A
IN1N
TEST
PDX
ERROR
REGG
IN1P
C26A
0.1µF
C27B
4.7µF
32
C1
1µF
VCC
C27A
0.1µF
3.3V
C15A
0.1µF
Figure 40. Application Circuit 2
BOM 2 (Stereo BTL, VCC=11to 13V)
Parts
Qty.
Parts No.
1
R3A
1
R3B
1
R6A
Resistor
1
R6B
1
R32
4
R17, R19, R22, R24
4
C1, C2, C7, C8
1
C5(Note 13)
3
C15A, C26A, C27A(Note 13)
2
C15B, C26B(Note 13)
Capacitor
4
C16, C20, C21, C25(Note 13)
4
C17A, C19A, C22A, C24A
C17C, C19C, C22C,
4
C24C(Note 13)
1
C27B(Note 13)
Inductor
4
L17A, L19A, L22A, L24A
(Note 13)
Description
Ref. Function Description (4)Power Limit Function
Ref. Function Description (2)Gain and Master/Slave setting
100kΩ, 1/16W, J(±5%)
5.6Ω, 1/10W, J(±5%)
1μF, 16V, B(±10%)
1μF, 16V, B(±10%)
0.1μF, 25V, B(±10%)
10μF, 25V, B(±10%)
0.68μF, 16V, B(±10%)
1μF, 25V, B(±10%)
680pF, 25V, B(±10%)
4.7μF, 25V, B(±10%)
15μH, 2.1A, ±20%
Please place it near pin as much as possible.
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Datasheet
BD28411MUV
(3) Application Circuit Example 3 (Monaural PBTL, VCC=4.5 to 11V)
Overshoot of output PWM differs according to the board, and etc. Please check to ensure that it is lower than absolute
maximum ratings. If it exceeds the absolute maximum ratings, snubber circuit need to be added, the circuit example is
shown on the next page.
VCC
R32
10kΩ
6
IN2P
7
IN2N
8
VCCP1
NC
VCCA
NC
BSP1P
C24B
2.2µF
REGG
23
DRIVER
FET
3
R6A GAIN_MS_SEL
R6B
L24B
10µH
OUT1P
24
2
GAIN
DRIVER
FET
LDO
DRIVER
FET
GNDP1
RL=4Ω
C22B
2.2µF
22 OUT1N
C21
0.68µF
21 BSP1N
REGG REGG
DRIVER
FET
PLIMIT
5
C25
0.68µF
25
L22B
10µH
20 BSP2P
C20
0.68µF
19
PWM
OUT2P
18 GNDP2
REGG
OSC
FSEL0
10
SYNC
9
11
17 OUT2N
CONTROL I/F
12
13
14
VCC
15
C16
0.68µF
16
BSP2N
REGG
REGG
26
CONTROL
I/F
1
4
27
VCCP2
REGG
28
NC
Source
29
MUTEX
PLIMIT
GNDA
C5
1µF
C26B
10µF
PWM
R3B
Audio
PROTECT
30
FSEL2
C2
1µF
31
FSEL1
R3A
IN1N
TEST
PDX
ERROR
REGG
IN1P
C26A
0.1µF
C27B
4.7µF
32
C1
1µF
VCC
C27A
0.1µF
3.3V
C15A
0.1µF
C15B
10µF
Figure 41. Application Circuit 3
BOM 3 (Monaural PBTL, VCC=4.5 to 11V)
Parts
Qty.
Parts No.
1
R3A
1
R3B
Resistor
1
R6A
1
R6B
1
R32
4
C1, C2, C7, C8
1
C5(Note 14)
3
C15A, C26A, C27A(Note 14)
Capacitor
2
C15B, C26B(Note 14)
4
C16, C20, C21, C25
2
C22B, C24B(Note 14)
1
C27B
Inductor
2
L22B, L24B
(Note 14)
Description
Ref. Function Description (4)Power Limit Function
Ref. Function Description (2)Gain and Master/Slave setting
100kΩ, 1/16W, J(±5%)
1μF, 16V, B(±10%)
1μF, 16V, B(±10%)
0.1μF, 25V, B(±10%)
10μF, 25V, B(±10%)
0.68μF, 16V, B(±10%)
2.2μF, 25V, B(±10%)
4.7μF, 25V, B(±10%)
10μH, 2.6A, ±20%
Please place it near pin as much as possible.
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Datasheet
BD28411MUV
(4) Application Circuit Example 4 (Monaural PBTL, VCC=11 to 13V)
Please add the snubber circuit at OUT pin when VCC=11 to 13V.
VCC
R32
10kΩ
4
R6A GAIN_MS_SEL
R6B
6
IN2P
7
IN2N
8
BSP1P
REGG
OUT1P
23
DRIVER
FET
22
DRIVER
FET
PLIMIT
GAIN
5
VCCP1
NC
L24B
10µH
DRIVER
FET
LDO
DRIVER
FET
GNDP1
OUT1N
C24C 680pF
R24 5.6Ω
C24B
2.2µF
5.6Ω
680pF
C22B
2.2µF
R22
C22C
RL=4Ω
L22B
10µH
C21
0.68µF
21 BSP1N
20 BSP2P
C20
0.68µF
19
PWM
OUT2P
18 GNDP2
REGG
OSC
11
12
13
14
VCC
15
C15A
0.1µF
C16
0.68µF
16
BSP2N
10
VCCP2
SYNC
9
17 OUT2N
CONTROL I/F
NC
REGG
REGG
C25
0.68µF
25
REGG REGG
GNDA
26
24
2
3
27
CONTROL
I/F
1
PLIMIT
VCCA
NC
28
MUTEX
REGG
C5
1µF
29
FSEL2
Audio
C26B
10µF
PWM
R3B
Source
PROTECT
30
FSEL1
C2
1µF
31
FSEL0
R3A
IN1N
TEST
PDX
ERROR
REGG
IN1P
C26A
0.1µF
C27B
4.7µF
32
C1
1µF
VCC
C27A
0.1µF
3.3V
C15B
10µF
Figure 42. Application Circuit 4
BOM 4 (Monaural PBTL, VCC=11 to 13V)
Parts
Qty.
Parts No.
1
R3A
1
R3B
1
R6A
Resistor
1
R6B
1
R32
2
R22, R24(Note 15)
4
C1, C2, C7, C8
1
C5(Note 15)
3
C15A, C26A, C27A(Note 15)
2
C15B, C26B(Note 15)
Capacitor
4
C16, C20, C21, C25(Note 15)
2
C22B, C24B
2
C22C, C24C(Note 15)
1
C27B(Note 15)
Inductor
2
L22B, L24B
(Note 15)
Description
Ref. Function Description (4)Power Limit Function
Ref. Function Description (2)Gain and Master/Slave setting
100kΩ, 1/16W, J(±5%)
5.6Ω, 1/10W, J(±5%)
1μF, 16V, B(±10%)
1μF, 16V, B(±10%)
0.1μF, 25V, B(±10%)
10μF, 25V, B(±10%)
0.68μF, 16V, B(±10%)
2.2μF, 25V, B(±10%)
680pF, 25V, B(±10%)
4.7μF, 25V, B(±10%)
10μH, 2.6A, ±20%
Please place it near pin as much as possible.
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This GAIN_MS_SEL setting is one example,
so another Gain setting can be used.
(5) Application Example 5 (MASTER/SLAVE mode, VCC=4.5 to 11V)
VCC
C27Am
0.1µF
3.3V
VCC
C26Am
0.1µF
C27Bm
4.7µF
R32m
10kΩ
C26Bm
10µF
Master
32
C1m
1µF
IN1P
IN1N
REGG1
R3Am
C2m
1µF
PLIMIT
GNDA
Source
REGG1
REGG1
C5m
REGG
1µF
68kΩ
R6Am
18kΩ
R6Bm
GAIN_MS_SEL
C7m
1µF
PROTECT
30
29
28
C25m
0.68µF
25
L24Am
15µH
REGG
23
DRIVER
FET
3
21 BSP1N
GAIN
DRIVER
FET
20 BSP2P
LDO
DRIVER
FET
6
19
PWM
IN2P
IN2N
7
18
REGG
8
OSC
CONTROL I/F
C8m
1µF
9
OUT1P
10
11
12
13
C24Am
1µF
GNDP1
RL=8Ω/6Ω
C22Am
1µF
22 OUT1N
DRIVER
FET
PLIMIT
5
26
24
2
4
27
CONTROL
I/F
1
PWM
R3Bm
Audio
31
L22Am
C21m
0.68µF 15µH
C20m
0.68µF
L19Am
15µH
OUT2P
C19Am
1µF
GNDP2
C17Am
1µF
17 OUT2N
RL=8Ω/6Ω
L17Am
15µH
14
15
C16m
0.68µF
16
VCC
C15Am
0.1µF
VCC
C27As
0.1µF
3.3V
C15Bm
10µF
VCC
C26As
0.1µF
C27Bs
4.7µF
R32s
10kΩ
C26Bs
10µF
Slave
32
C1s
1µF
IN1P
IN1N
REGG2
R3As
C2s
1µF
PLIMIT
GNDA
Source
REGG2
33kΩ
68kΩ
REGG2
C5s
REGG
1µF
R6As
PROTECT
30
29
28
GAIN_MS_SEL
R6Bs
C25s
0.68µF
25
L24Bs
10µH
23
DRIVER
FET
GAIN
DRIVER
FET
DRIVER
FET
19
PWM
IN2P
7
IN2N
8
RL=4Ω
C22Bs
2.2µF
L22Bs
10µH
20 BSP2P
C20s
0.68µF
LDO
6
GNDP1
22 OUT1N
C21s
0.68µF
BSP1N
21
DRIVER
FET
PLIMIT
C24Bs
2.2µF
OUT1P
REGG
3
5
26
24
2
4
27
CONTROL
I/F
1
PWM
R3Bs
Audio
31
OUT2P
18 GNDP2
REGG
OSC
9
10
11
CONTROL I/F
12
13
14
15
17 OUT2N
C16s
0.68µF
16
VCC
C15As
0.1µF
C15Bs
10µF
Figure 43. Application Circuit 5
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BD28411MUV
About the Protection Function
Protection
Function
Detecting & Releasing Condition
PWM Output
OUT1P, 1N, 2P, 2N
ERROR(Note 16)
Output short
protection
Detecting
condition
Detecting current = 8A (Typ)
High-Z_Low
(Latch)(Note17)
L
(Latch) (Note17)
DC voltage
protection
Detecting
condition
DC voltage is over 3.5V for a period of 0.33sec
to 0.66sec at speaker output
High-Z_Low
(Note17)
(Latch)
L
(Latch) (Note17)
Detecting
condition
Chip temperature to be over 150°C (Typ)
High-Z_Low
Releasing
condition
Chip temperature to be below 120°C (Typ)
Detecting
condition
Power supply voltage to be below 4.0V (Typ)
High-Z_Low
Power supply voltage to be above 4.1V (Typ)
Normal
operation
Overheat
protection
Under voltage
protection
Releasing
condition
Normal
operation
L
H
(Note 16) ERROR pin is pulled up by 10kΩ resistor.
(Note 17) Once an IC is latched, the circuit is not released automatically even after an abnormal status is gone.
The following procedures ① or ② is available for recovery.
① After turning MUTEX terminal to Low (holding time to Low = 10msec (Min)) turn back to High again.
② Restore power supply after dropping to power supply voltage VCC < 3V (10msec (Min) holding) which internal power on reset circuit activates.
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(1)
Output Short Protection (short to the power supply)
This IC has the PWM output short protection circuit that stops the PWM output when the output speaker (after LC-filter) is
short-circuited to the power supply due to abnormality.
Detecting condition -
Releasing method -
It will detect when MUTEX pin is set High and the current that flows into the PWM output pin
becomes 8A(Typ) or more. If detected, the PWM output instantaneously goes to the state of
High-Z_Low and IC is latch.
① After turning MUTEX terminal to Low(holding time to Low = 10msec(Min)) turn back to High
again.
② Restore power supply after the voltage dropped to internal power on reset circuit activating
power supply voltage VCC＜3V (hold for 10msec (Min)).
Short to VCC
Release from short to VCC
OUT1P
OUT1N
OUT2P
OUT2N
t
PWM out
Over-Current
IC latches with High-Z_Low
Released from latch state
8A(Typ)
t
ERROR
t
250nsec(Typ)
MUTEX
Latch release
t
10msec(Min)
Figure 44. Output Short Protection Sequence
(Short to Power Supply)
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BD28411MUV
(2)
Output Short Protection (Short to GND)
This IC has the PWM output short protection circuit that stops the PWM output when the output speaker (after LC-filter) is
short-circuited to GND due to abnormality.
Detecting condition -
Releasing method -
It will detect when MUTEX pin is set High and the current that flows into the PWM output terminal
becomes 8A(Typ) or more. If detected, the PWM output instantaneously goes to the state of
High-Z_Low and IC is latched.
① After turning MUTEX terminal to Low(holding time to Low = 10msec(Min)) turn back to High
again.
② Restore power supply after the voltage dropped to internal power on reset circuit activating
power supply voltage VCC＜3V (hold for 10msec (Min)).
Short to GND
Release from short to GND
OUT1P
OUT1N
OUT2P
OUT2N
t
Released from latch state
PWM out IC latches with High-Z_Low
Over-Current
8A(Typ)
t
ERROR
t
250nsec(Typ)
MUTEX
Latch release
t
10msec(Min)
Figure 45. Sequence of the Output short protection
(Short to GND)
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BD28411MUV
(3)
DC Voltage Protection
This IC is integrated with DC voltage protection circuit. When DC voltage is input to the speaker due to abnormality,
speaker output will MUTE, and this protection will prevent the speaker from destruction.
Detecting condition -
Releasing method -
It will detect when MUTEX pin is set High and speaker output is more than 3.5V(Typ) over 0.33sec
to 0.66sec.
Once detected, The PWM output instantaneously goes to the state of High-Z_Low, and IC will latch.
① After turning MUTEX terminal to Low(holding time to Low = 10msec(Min)) turn back to High
again.
② Restore power supply after the voltage dropped to internal power on reset circuit activating
power supply voltage VCC＜3V (hold for 10msec (Min)).
Abnormal condition
Impress DC voltage to speaker output over 3.5V
OUT1P
OUT1N
OUT2P
OUT2N
Release abnormal condition
PWM out : IC latches with High-Z_Low
t
Released from latch state
3.5V
Speaker
Output
t
-3.5V
Output stops by being inputted DC voltage twice.
Detection time is 0.33sec to 0.66sec.
0.33sec
0.33sec
0.33sec
0.33sec
0.33sec
0.33sec
0.33sec
0.33sec
Output is monitored in the
interval of 0.33sec
ERROR
t
MUTEX
Latch is released
t
10msec(Min)
Figure 46. DC Voltage Protection Sequence
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BD28411MUV
(4)
Overheat Protection
This IC has the overheat protection circuit that prevents thermal runaway under an abnormal state for the chip temperature
exceeded Tjmax=150°C.
Detecting condition -
It will detect when MUTEX pin is set High and the temperature of the chip becomes 150°C (Typ) or
more. Speaker output turns MUTE immediately, when High temperature protection is detected.
Releasing condition - It will release when MUTEX pin is set High and the temperature of the chip becomes 120°C (Typ)
or less. The speaker output is outputted immediately when released. (Auto recovery)
Tj
150°C
120°C
t
OUT1P
OUT1N
OUT2P
OUT2N
High-Z_Low
t
Speaker
Output
t
ERROR
t
Figure 47. Overheat Protection Sequence
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BD28411MUV
(5)
Under Voltage Protection
This IC has the under voltage protection circuit that mutes the output speaker once extreme drop in the power supply
voltage is detected.
Detecting condition -
It will detect when MUTEX pin is set High and the power supply voltage becomes lower than
4V(Typ).Speaker output turn MUTE immediately when under voltage protection is detected.
Releasing condition - It will release when MUTEX pin is set High and the power supply voltage becomes more than
4.1V(Typ).The speaker output is outputted immediately when released. (Auto recovery)
Figure 48. Under Voltage Protection Sequence
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BD28411MUV
Selecting External Components
(1)
Output LC Filter Circuit
An output filter is required to eliminate radio-frequency components exceeding the audio-frequency region supplied to a
load (speaker). Because this IC uses output PWM frequencies any of 400kHz, 500kHz, or 600kHz, the high-frequency
components must be appropriately removed.
This section takes an example of an LC type LPF shown below, in which coil L and capacitor C compose a differential filter
with an attenuation property of -12dB/oct. A large part of switching currents flow to capacitor C, and only a small part of the
currents flow to speaker RL. This filter reduces unwanted emission this way. In addition, coil L and capacitor C compose a
filter against in-phase components, reducing unwanted emission further.
L
OUT*P
The following shows output LC filter constants
and cutoff frequencies fC with typical load impedances.
C
RL
C
OUT*N
4Ω
6Ω, 8Ω
RL
L
10μH
15μH
C
2.2μF
1μF
fC
34kHz
41kHz
L
Figure 49. Output LC Filter
Use inductors with low ESR and with sufficient margin of allowable currents. Power loss will increase if inductors with
high ESR are used.
Select a closed magnetic circuit type product in normal cases to prevent emission noise.
Use capacitors with low equivalent series resistance, and good impedance characteristics at high frequency ranges
(100kHz or higher). Also, select an item with sufficient voltage rating because massive amount of high-frequency
current flow is expected.
(2)
Snubber circuit constant
When overshoot / undershoot of PWM Output exceeds absolute maximum rating, or when overshoot / undershoot of PWM
output negatively affects EMC, snubber circuit is used as shown below. And if VCC>11V, the snubber circuit must be added.
VCCP
Snubber
circuit
LC filter
circuit
The following table shows ROHM recommended value of
“Snubber filter constants” when using ROHM 4 layer board.
PWM
RL
4Ω
6Ω
8Ω
OUT
C
R
GNDP
C
680pF, 25V B(±10%)
680pF, 25V B(±10%)
680pF, 25V B(±10%)
R
5.6Ω, 1/10W J(±5%)
5.6Ω, 1/10W J(±5%)
5.6Ω, 1/10W J(±5%)
Figure 50. Snubber circuit
Caution1: If the impedance characteristics of the speakers at high-frequency range increase rapidly, the IC might not have
stable operation in the resonance frequency range of the LC filter. Therefore, consider adding damping-circuit, etc.,
depending on the impedance of the speaker.
Caution2: Though this IC has a short protection function, when short to VCC or GND after the LC filter, over current occurs
during short protection function operation. Be careful about over/undershoot which exceeds the maximum standard
ratings because back electromotive force of the inductor will occur which sometimes leads to IC destruction.
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BD28411MUV
Power Dissipation
5
PCB② 4.56W
4.5
Package:
VQFN032V5050
4
3.5
PCB① 3.26W
Pd [W]
3
2.5
2
1.5
1
0.5
0
0
25
50
75
100
125
150
Ta [℃]
Figure 51. Power Dissipation vs Temperature
Measuring instrument : TH-156(Kuwano Electrical Instruments Co, Ltd.)
Measuring conditions : Installation on ROHM’s board
Board size : 74.2mm x 74.2mm x 1.6mm(with thermal via on board)
Material : FR4
・The board on exposed heat sink on the back of package are connected by soldering.
2
PCB1 : 4- layer board (Top and bottom layer back copper foil size: 20.2mm , 2nd and 3rd layer
2
θ ja = 38.3°C/W
back copper foil size: 5505mm ) ,
PCB2 : 4-layer board(back copper foil size: 5505mm2),
θ ja = 27.4°C /W
Use a thermal design that allows for a sufficient margin in consideration of power dissipation (Pd) under actual operating
conditions. This IC exposes its frame of the backside of package. Note that this part is assumed to use after providing heat
dissipation treatment to improve heat dissipation efficiency. Try to occupy as wide as possible with heat dissipation pattern
not only on the board surface but also the backside.
Class D speaker amplifier has a high efficiency and low heat generation by comparison with conventional Analog power
amplifier. However, In case it is operated continuously by maximum output power, Power dissipation (Pdiss) may exceed
package dissipation. Please consider about heat design that Power dissipation (Pdiss) does not exceed Package
dissipation (Pd) in average power (Poav).
Package dissipation : Pd(W) = (Tjmax – Ta) / θ ja
Power dissipation
: Pdiss(W) = Poav x (1/η – 1)
Where:
Tjmax is the maximum junction temperature=150°C,
Ta is the peripheral temperature [°C]
θ ja is the thermal resistance of package [°C /W]
Poav is the average power [W]
η is the efficiency
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BD28411MUV
Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply
terminals.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at
all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic
capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Thermal Consideration
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in
deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, increase the board size
and copper area to prevent exceeding the Pd rating.
6.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.
The electrical characteristics are guaranteed under the conditions of each parameter.
7.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.
Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing
of connections.
8.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject
the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should
always be turned off completely before connecting or removing it from the test setup during the inspection process. To
prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and
storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
11. Unused Input Terminals
Input terminals of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance
and extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input terminals should be connected to
the power supply or ground line.
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Operational Notes – continued
12. Regarding Input Pins of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Figure 52. Example of Monolithic IC Structure
13. Ceramic Capacitor
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
14. Thermal Shutdown Circuit (TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always be
within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction
temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls below the
TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from heat
damage.
15. Over Current Protection Circuit (OCP)
This IC has a built-in overcurrent protection circuit that activates when the output is accidentally shorted. However, it is
strongly advised not to subject the IC to prolonged shorting of the output.
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BD28411MUV
Ordering Information
B
D
2
8
1
4
Part Number
1
M
U
V
-
Package
MUV: VQFN032V5050
E2
Packaging and forming specification
E2: Embossed tape and reel
Marking Diagram
VQFN032V5050 (TOP VIEW)
Part Number Marking
D28411
LOT Number
1PIN MARK
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BD28411MUV
Physical Dimension, Tape and Reel Information
Package Name
VQFN032V5050
Tape
Embossed carrier tape
Quantity
2500pcs
Direction
of feed
E2
The direction is the 1pin of product is at the upper left when you hold
( reel on the left hand and you pull out the tape on the right hand
Direction of feed
1pin
Reel
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BD28411MUV
Revision History
Date
Revision
29.Oct.2014
001
Changes
First version
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Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
(Note 1)
intend to use our Products in devices requiring extremely high reliability (such as medical equipment
, transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-GE
© 2013 ROHM Co., Ltd. All rights reserved.
Rev.003
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act,
please consult with ROHM representative in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable
for infringement of any intellectual property rights or other damages arising from use of such information or data.:
2.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the information contained in this document.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-GE
© 2013 ROHM Co., Ltd. All rights reserved.
Rev.003
Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
