BD3504FVM_10

High Performance Regulators for PCs Nch FET Ultra LDO Controllers for PC Chipsets BD3504FVM,BD3500FVM,BD3501FVM,BD3502FVM No.10030EAT29 ●Description The BD3500/01/02/04FVM is an ultra-low dropout linear regulator controller for chipset that can achieve ultra-low voltage input to ultra-low voltage output. By using N-MOSFET for external power transistor, the controller can be used at ultra-low I/O voltage difference up to voltage difference generated by ON resistance. In addition, because best suited power transistor can be chosen in accord with the output current, downsizing and cost reduction of the set can be achieved. Because by reducing the I/O voltage difference, large current output is achieved and conversion loss can be reduced, switching power supply can be replaced. BD3500/01/02/04FVM does not need any choke coil, diode for rectification and power transistor which are required for switching power supply, total cost of the set can be reduced and compact size can be achieved for the set. Using external resistors, optional output from 0.65V to 2.5V can be set. In addition, since voltage output start-up time can be adjusted by using the NRCS terminal, it is possible to flexibly meet the power supply sequence of the set. ●Features 1) Reduced rush current by NRCS 2) Built-in driver for external Nch h transistor 3) Adoption of MSOP8 package: 2.9 x 4.0 x 0.9 (mm) 4) Built-in timer latch short protection circuit 5) Built-in low input maloperation prevention circuit 6) Output voltage variable type 7) Built-in overheat protection circuit ●Applications Mobile PC, desktop PC, digital home appliances ●Line up matrix Parameter Output Voltage NRCS (Soft start) Timer latch short protection circuit VIN UVLO External FET GATE Drive Current BD3500FVM 1.8V (Fix) ○ (Independent Setting) ○ (Independent Setting) Hysterisis +1/-3mA BD3501FVM 1.5V (Fix) ○ (Independent Setting) ○ (Independent Setting) Hysterisis +1/-3mA BD3502FVM 1.2V (Fix) ○ (Independent Setting) ○ (Independent Setting) Hysterisis +1/-3mA BD3504FVM Variable(0.65～2.5V) ○ (Same Timer Latch) ○ (Same NRCS) Detected at start-up only (set by external resistor) +3/-3mA www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 1/16 2010.05 - Rev.A BD3504FVM,BD3500FVM,BD3501FVM,BD3502FVM ●Absolute maximum ratings (Ta=25℃) ◎BD3500/01/02FVM Parameter Input Voltage Drain Voltage (VIN) Enable Input Voltage Power Dissipation Operating Temperature Range Storage Temperature Range Maximum Junction Temperature Symbol VCC VIN Ven Pd Topr Tstg Tjmax Ratings 7 *1 7 7 437.5 *2 -10～+100 -55～+150 +150 Unit V V V mW ℃ ℃ ℃ Technical Note *1 However, not exceeding Pd. *2 Pd derating at 3.5mW/℃ for temperature above Ta=25℃ ◎BD3504FVM Parameter Supply Voltage Drain Voltage Enable Input Voltage Power dissipation Operating temperature range Storage temperature range Maximum Junction Temperature Symbol VCC VD Ven Pd Topr Tstg Tjmax Ratings 7 *3 7 7 437.5 *4 -10～+100 -55～+150 +150 Unit V V V mW ℃ ℃ ℃ *3 However, not exceeding Pd. *4 Pd derating at 3.5mW/℃ for temperature above Ta=25℃ ●Recommended operating conditions ◎BD3500/01/02FVM Parameter Supply Voltage Drain Voltage(VIN) Enable Input Voltage Capacitor on NRCS Terminal Capacitor on SCP Terminal Symbol VCC VIN Ven CNRCS CSCP Ratings MIN 4.5 Vo×1.15 -0.3 0.001 0.001 MAX 5.5 5.5 5.5 1 1 Unit V V V µF µF ★ No radiation-resistant design is adopted for the present product. ◎BD3504FVM Parameter Supply Voltage Drain Voltage Enable Input Voltage Capacitor in NRCS pin Output Voltage Symbol VCC VD Ven CNRCS VOUT Ratings MIN 4.5 0.65 -0.3 0.001 0.65 MAX 5.5 5.5 5.5 1 2.5 Unit V V V µF V ★ No radiation-resistant design is adopted for the present product. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 2/16 2010.05 - Rev.A BD3504FVM,BD3500FVM,BD3501FVM,BD3502FVM ●Electrical characteristics (unless otherwise noted, Ta=25℃ VCC=5V Vin=3.3V Ven=3V) ◎BD3500FVM/BD3501FVM/BD3502FVM Standard Value Parameter Symbol Unit MIN TYP MAX Bias Current Shut Down Mode Current Output Voltage 1 (BD3500FVM) Output Voltage 1 (BD3501FVM) Output Voltage 1 (BD3502FVM) Output Voltage 2 (BD3500FVM) Output Voltage 2 (BD3501FVM) Output Voltage 2 (BD3502FVM) Line Regulation Load Regulation [Enable] High Level Enable Input Voltage Low Level Enable Input Voltage Enable Pin Input Current [NRCS] NRCS Charge Current NRCS Standby Voltage [Voltage Feed Back] VFB Input Bias Current VFB Standby Current [Output MOSFET Driver] MOSFET Driver Source Current MOSFET Driver Sink Current [UVLO] VCC UVLO VCC UVLO Hysteresis VIN UVLO VIN UVLO Hysteresis [SCP] SCP Charge Current SCP Discharge Current SCP Threshold Voltage Short Detect Voltage SCP Stand-by Voltage (※) Design Guarantee Technical Note Condition ICC IST Vo1 Vo1 Vo1 Vo2 Vo2 Vo2 Reg.l Reg.L Enhi Enlow Ien 1.782 1.485 1.188 1.746 1.455 1.164 2 -0.3 - 0.8 0 1.800 1.500 1.200 1.800 1.500 1.200 0.1 0.5 7 1.6 10 1.818 1.515 1.212 1.854 1.545 1.236 0.5 10 Vcc 0.8 10 mA µA V V V V V V %/V mV V V µA Ven=3V Vnrcs=0.5V,VCC=4.5V to 5.5V Ta=-10℃ to 100℃ (※) Ven=0V Ven=3V Ven=0V,VFB=1V VFB=Vo-0.1V,G=Vo+1V VFB=Vo+0.1V,G=Vo+1V Vcc:Sweep up Vcc:Sweep down VIN:Sweep up VIN:Sweep down VSCP=0.5V,VCC=4.5V to 5.5V Ta=-10℃ to 100℃ (※) VSCP=0.5V Ven=0V Io=50mA Io=50mA Io=50mA Vcc=4.5V to 5.5V ,Io=0 to 3A Ta=-10℃ to 100℃(※) Vcc=4.5V to 5.5V ,Io=0 to 3A Ta=-10℃ to 100℃(※) Vcc=4.5V to 5.5V ,Io=0 to 3A Ta=-10℃ to 100℃(※) VCC=4.5V to 5.5V Io=0 to 3A Inrcs Vnrcs IFB FBSTB IGSO IGSI VccUVLO Vcchys VINUVLO VINhys 14 150 0.5 2 4.2 100 Vo×1.05 100 20 0 0.7 1 3 4.35 160 Vo×1.1 160 26 50 1.2 1.5 4 4.5 220 Vo×1.15 220 µA mV mA mA mA mA V mV V mV Iscpch IscpDi Vscpth Vscp VSTB 14 0.5 1.2 Vo×0.6 - 20 1.3 Vo×0.7 0 26 1.4 Vo×0.8 50 µA mA V V mV www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 3/16 2010.05 - Rev.A BD3504FVM,BD3500FVM,BD3501FVM,BD3502FVM Technical Note ●Electrical characteristics (unless otherwise noted, Ta=25℃ VCC=5V VIN=3.3V Ven=3V. R1=R1'=∞Ω, R2=R2'=0Ω) ◎BD3504FVM Standard Value Parameter Symbol Unit Condition MIN TYP MAX Bias Current Shut Down Mode Current Feed Back Voltage 1 Feed Back Voltage 2 Output Voltage Line Regulation Load Regulation [Enable] High Level Enable Input Voltage Low Level Enable Input Voltage Enable pin Input Current [Voltage Feed Back] VFB Input Bias Current [Source Voltage] VS Input Bias Current VS Standby Current [Output MOSFET Driver] MOSFET Driver Source Current MOSFET Driver Sink Current [UVLO] VCC UVLO VCC UVLO Hysterisis VD UVLO [Drain Voltage Sensing] VD Input bias Current [NRCS/SCP] NRCS Charge Current SCP Charge Current SCP Discharge Current SCP Threshold Voltage Short Detect Voltage NRCS Stand-by Voltage (※) Design Guarantee ICC IST VFB1 VFB2 Vo Reg.l Reg.L Enhi Enlow Ien IFB ISBIAS ISSTB IGSO IGSI VccUVLO Vcchys VDUVLO Ivd Inrcs Iscpch IscpDi Vscp Voscp VSTB 0.643 0.630 2 -0.3 150 2 2 4.20 100 Vo×0.6 14 14 0.3 1.2 Vo×0.3 - 0.85 0 0.650 0.650 1.20 0.1 0.5 7 80 1.2 3 3 4.35 160 Vo×0.7 0 20 20 1.3 Vo×0.35 - 1.7 10 0.657 0.670 0.5 10 Vcc 0.8 10 2.4 4 4 4.50 220 Vo×0.8 26 26 1.4 Vo×0.4 50 mA µA V V V %/V mV V V µA nA mA mA mA mA V mV V nA µA µA mA V V mV VNRCS=0.5V VNRCS=0.5V VNRCS=0.5V VS=1V Ven=0V VFB=0.6V,VGATE=2.5V VFB=0.7V,VGATE=2.5V Vcc:Sweep up Vcc:Sweep down VD:Sweep up Ven=3V Ven=0V Io=50mA Vcc=4.5V to 5.5V , Ta=-10℃ to 100℃(※) R1=R1'=3.9kΩ, R2=R2'=3.3KΩ VCC=4.5V to 5.5V Io=0 to 3A www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 4/16 2010.05 - Rev.A BD3504FVM,BD3500FVM,BD3501FVM,BD3502FVM ●Reference Data 1.40 1.20 Technical Note 1.00 1.800 1.795 1.790 Vo(V) 4.7 4.9 5.1 VCC(V) 5.3 5.5 0.80 1.00 ICC(mA) I(uA) 0.80 0.60 0.40 0.20 0.00 -60 0.60 1.785 1.780 0.40 0.20 1.775 1.770 -10 15 40 Ta( ℃) 65 90 -10 40 Ta( ℃) 90 140 0.00 4.5 Fig.1 Ta-ISTB 300 250 200 150 100 50 0 Fig.2 ICC-VCC Fig.3 Ta-Vo 12 11 10 IEN(uA) IS(mA) 21.5 21 20.5 ISCP(uA) 0 0.2 0.4 0.6 0.8 Vout(mV) 1 1.2 9 8 7 6 25 50 75 100 Ta( ℃) 125 150 20 19.5 19 18.5 -60 -10 40 Ta( ℃) 90 140 Fig.4 Ta-IEN Vo(V) 1.26 1.255 1.25 VBG(V) 1.245 1.24 1.235 1.23 -60 Fig.5 VS Discharge Current Fig.6 Ta-ISCP VCC VCC VIN VIN EN VOUT (1.075V 出力) -10 40 Ta( ℃) 90 140 EN VOUT (1.075V 出力) Fig.7 Ta-Vo Fig.8 Input Sequence 1 EN Fig 9. Input Sequence 2 VIN VCC VIN VOUT (1.075V 出力) VIN EN EN VOUT (1.075V 出力) VOUT IOUT (1A/div) Fig.10 Input Sequence 3 Vcc Fig.11 Input Sequence 4 (Only BD3504FVM) Fig.12 Transient Response 0→3A(0.6A/µs)ΔV=30mV www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 5/16 2010.05 - Rev.A BD3504FVM,BD3500FVM,BD3501FVM,BD3502FVM Technical Note VOUT (1.075V 出力) VOUT (BD3502FVM) VOUT (BD3502FVM) IOUT (1A/div) IOUT (1A/div) IOUT (1A/div) Fig.13 Transient Response 3→0A(0.6A/µs)ΔV=20mV Fig.14 Transient Response 0→3A(0.6A/µs)ΔV=21mV Fig.15 Transient Response 3→0A(0.6A/µs) ΔV=17mV VOUT (BD3501FVM) VOUT (BD3501FVM) VOUT (BD3500FVM) IOUT (1A/div) IOUT (1A/div) IOUT (1A/div) Fig.16 Transient Response 0→3A(0.6A/µs) ΔV=42mV Fig.17 Transient Response 3→0A(0.6A/µs) ΔV=27mV Fig.18 Transient Response 0→3A(0.6A/µs) ΔV=44mV VOUT (BD3500FVM) VOUT (1.05V 出力) VOUT (1.05V 出力) IOUT (1A/div) IOUT (1A/div) IOUT Fig.19 Transient Response 3→0A(0.6A/µs) ΔV=26mV Fig.20 Transient Response 0→3A(0.6A/µs) ΔV=44mV Fig.21 Transient Response 3→0A(0.6A/µs) ΔV=23mV www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 6/16 2010.05 - Rev.A BD3504FVM,BD3500FVM,BD3501FVM,BD3502FVM ●Block Diagram ◎BD3500FVM/BD3501FVM/BD3502FVM VCC Technical Note 4 VCC 1 NRCS NRCS Enabe EN 8 Reference Block UVLO1 VIN UVLO2 5 VIN VREF VREF VREF TSD SCP UVLO1 UVLO2 6 7 G VFB Vo Thermal Protection TSD VREF SCP 3 SCP 2 GND ◎BD3504FVM VCC VCC 4 VD UVLO2 R2’ VIN Enable EN 3 UVLO1 Reference Block NRCS 0.65V 0.65V VD UVLO LATCH 8 UVLO1 EN VREF R1’ G 7 TSD SCP UVLO1 UVLO2 EN VS 6 R2 5 SCP VFB R1 Vo Thermal Protection TSD 0.65V SCP NRCS NRCS 1 NRCS 2 GND www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 7/16 2010.05 - Rev.A BD3504FVM,BD3500FVM,BD3501FVM,BD3502FVM ●Pin Configration and Pin Function ◎BD3500FVM/BD3501FVM/BD3502FVM ○Pin Configration NRCS 1 2 3 4 8 7 6 5 EN G VFB VIN Technical Note ○Pin Function Pin Pin No. Name 1 2 3 4 5 6 7 8 NRCS GND SCP VCC VIN VFB G EN Ground pin PIN FUNCTION (Non Rush Current on Start up) time setup Timer latch setup for Short Circuit Protection Power Source Drain Voltage Sense Output Voltage Feedback MOSFET Driver Output Enable GND SCP VCC ◎BD3504FVM ○Pin Configration ○Pin Function Pin Pin No. Name 8 7 6 5 VD G VS VFB PIN FUNCTION NRCS (Non Rush Current on Start up) time setup. Timer latch setup for Short Circuit Protection operating time set up Pin. Ground Pin Enable Pin Power Source Output Voltage Feedback Source Voltage Pin MOSFET Driver Output Drain Voltage Sense NRCS 1 2 3 4 1 2 3 4 5 6 7 8 NRCS GND EN VCC VFB VS G VD GND EN VCC www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 8/16 2010.05 - Rev.A BD3504FVM,BD3500FVM,BD3501FVM,BD3502FVM Technical Note ●Pin Function Descriptions ・VCC BD3500/01/02/04FVM has an independent power input pin for an internal circuit operation of IC. This is used for bias of IC internal circuit and external N-MOSFET. The voltage used of VCC terminal is 5.0V and maximum current is 1.7 mA. It is recommended to connect a bypass capacitor of 0.1 µF or so to VCC pin. ・EN With an input of 2.0 volts or higher, the EN terminal turns to “High” level and VOUT is outputted. At 0.8V or lower, it detects “Low” level and VOUT is turned OFF and simultaneously, the discharge circuit inside the VS terminal is activated and lowers output voltage (150 mA (Min) when VFB//VS=1V and VEN=0V). ・VIN(BD3500/01/02FVM) The VIN terminal is a drain voltage detection terminal of external N-MOSFET. In the event that the VIN terminal is lower than 1.1 times the output set voltage, output is turned OFF to prevent low-input maloperation. ・VD(BD3504FVM only) The VD terminal is a drain voltage detection terminal of external N-MOSFET. In the event that drain voltage (VIN) is low, output voltage is turned OFF to prevent low-input maloperation. The reset voltage (VDUVLO) of drain voltage low-input maloperation prevention circuit is determined by the following equation: R1 ’ In the event that the maloperation prevention set resistance at the time of low-input drain voltage is set to a resistance value same as output voltage set resistor (R1 = R1’, R2 = R2’), low-input maloperation prevention (UVLO) is reset when drain voltage (VIN) reaches 70% of the output voltage. UVLO detects only at the startup of the EN terminal. VDUVLO=VFB×0.7 × R1’+R2 ・VFB(BD3504FVM only) The VFB terminal is a terminal to decide output voltage and is determined by the following equation: R1’+R2 VOUT=VFB × R1’ VFB is controlled to achieve 0.65 V (typ.). ・NRCS terminal he NRCS terminal is a constant current output terminal, and operates as  Soft-Start ... during start-up SCP-Delay ... after start-up (BD3504FVM only). How to set Soft-Start of NRCS terminal The output voltage startup time (TNRCS) is determined by the time when the NRCS terminal reaches VFB (0.65V). During start-up, the NRCS terminal serves as a constant current source (INRCS) of 20 µA (Typ.) output, and charges capacitor (CNRCS) externally connected. By changing over to internal reference voltage (0.65V) when the NRCS terminal reaches 0.65V, output voltage (VOUT) is fixed. How to set NRCS terminal short protection Delay (BD3504FVM only) BD3504FVM has short protection (SCP) activated when output voltage becomes VOUT x 0.35 (typ.) or lower. The time when short protection is activated until latching takes place (TSCP) is determined by the following equation: Tscp = CNRCS × Voscp ÷ Iscp When short protection is activated, the NRCS terminal provides 20 µA (typ.) constant current output (lscp), and charges the capacitor (CNRCS) externally connected. When the NRCS terminal reaches 1.3V (Voscp), latch operation is carried out and output voltage is turned OFF. ・SCP(BD3500/01/02FVM) BD3500/01/02FVM has short protection (SCP) activated when output becomes 70% or lower than the set voltage. The time when short protection is activated until latching takes place (TSCP) is determined by the following equation: Tscp = CNRCS × Voscp ÷ Iscp When short protection is activated, the NRCS terminal provides 20 µA (typ.) constant current output (lscp), and charges the capacitor (CNRCS) externally connected. When the NRCS terminal reaches 1.3V (Voscp), latch operation is carried out and output voltage is turned OFF. ・VFB//VS (BD3500FVM/BD3501FVM/BD3502FVM//BD3504FVM) VFB//VS terminal is a source voltage detection terminal of external N-MOSFET. VFB//VS terminal has the internal discharge circuit activated to lower output voltage when EN becomes a Low level or various protection circuits (TSD, SCP, UVLO) are activated. ・G G terminal is a gate drive terminal of external N-MOSFET. Because the output voltage range of G terminal is up to 5V (VCC), it is necessary to use N-MOSFET whose threshold is lower than “5V-VOUT.” In addition, by incorporating a RC snubber circuit to the G terminal, phase allowance of loop gain can be increased and the terminal can accommodate ceramic capacitors. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 9/16 2010.05 - Rev.A BD3504FVM,BD3500FVM,BD3501FVM,BD3502FVM ●Application circuit Ven 1 C3 2 3 C2 4 Vcc C1 5 7 6 C5 8 C4 Technical Note VIN + R2’ 1 C3 2 3 Ven 4 Vcc C1 5 R1 7 6 R2 C4 + 8 R1’ C2 VIN ●Directions for pattern layout of PCB ・Because a VIN input capacitor causes impedance to drop, mount it as close to the VIN terminal as possible and use thick wiring patterns. In the event that it causes the wire to come in contact with the inner-layer ground plane, use a plurality of through holes. ・Because the NRCS terminal is analog I/O, take care to noise. In particular, high-frequency noise of GND may cause IC maloperation through capacitors. It is recommended to connect GND of NRCS capacitor to IC GND terminal at one point. ・The VFB terminal is an output voltage sense line. Effects of wiring impedance can be ignored by sensing the output voltage from the load side, but increased sense wiring causes VFB to be susceptible to noise, to which care must be taken. ・Because the GND terminal is GND to be used in analog circuit inside BD3501/02/04FVM, connect it at one point to inner-layer GND of substrate by as short pattern as possible. Arrange a bypass capacitor across VCC and GND as close as possible so that a loop can be minimized. ・The G terminal is a terminal for gate drive. If long wiring is inevitable, increase the pattern width and lower impedance. ・Heat generated in the output transistor can be calculated by: (VIN - VOUT) × Io(Max) Design heat generation not to exceed the guarantee temperature of transistor. ・Connect the output capacitor with thick short wiring so that the impedance is lowered. Connect capacitor GND to inner-layer GND plane by a plurality of through holes. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 10/16 2010.05 - Rev.A BD3504FVM,BD3500FVM,BD3501FVM,BD3502FVM ●Evaluation Board (BD3500/01/02FVM) ■BD350XFVM Evaluation Board Circuit VCC U1 BD350XFVM S1 8 3 1 C2 VCC C1 2 GND C3 EN SCP G NRCS VFB 4 VCC 6 C5 VIN 5 C4 7 U2 VOUT VIN Technical Note ■BD350XFVM Evaluation Board Application Components Part No U1 U2 C1 C2 Part No C3 C4 C5 Value NMOS 1µF 0.01µF Value 0.01µF 10µF 220µF Company ROHM ROHM MURATA MURATA Company MURATA MURATA SANYO,etc Parts Name BD3500/01/02FVM RTW060N03 GRM18 series GRM18 series Parts Name GRM18 series GRM21 series 2R5TPE220MF ■ BD350XFVM Evaluation Board Layout Silk Screen TOP Layer Bottom Layer ●Evaluation Board (BD3504FVM) ■BD3504FVM Evaluation Board Circuit U1 BD3504FVM VCC 3 S1 1 C2 VCC C1 4 VD 8 VTTS R2’ C3 VIN GND ■BD3504FVM Evaluation Board Application Components Part No U1 U2 R1 R1’ R2 U2 VOUT Value NMOS 3.9K 3.3K 3.9K Value 3.3K 1µF 0.01µF 10µF 220µF Company ROHM ROHM ROHM ROHM ROHM Company ROHM MURATA MURATA MURATA SANYO,etc Parts Name BD35304FVM RTW060N03 MCR03EZPF3901 MCR03EZPF3301 MCR03EZPF3901 Parts Name MCR03EZPF3301 GRM18 series GRM18 series GRM21 series 2R5TPE220MF EN NRCS G VS VCC VFB 7 6 R1’ Part No R2’ C1 C2 C3 C4 5 R2 C4 2 GND R1 ■ BD3504FVM Evaluation Board Layout Silk Screen TOP Layer Bottom Layer www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 11/16 2010.05 - Rev.A BD3504FVM,BD3500FVM,BD3501FVM,BD3502FVM ●I/O EQUIVALENCE CIRCUIT ◎BD3500FVM/BD3501FVM/BD3502FVM Vcc Vcc Vcc VI Technical Note Vcc Vcc Vcc NRCS SCP Vcc Vcc EN Vcc Vcc VFB GATE ◎BD3504FVM Vcc Vcc Vcc NRCS VD Vs Vcc Vcc EN Vcc GATE VFB www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 12/16 2010.05 - Rev.A BD3504FVM,BD3500FVM,BD3501FVM,BD3502FVM ●Notes for use Technical Note 1. Absolute maximum ratings For the present product, thoroughgoing quality control is carried out, but in the event that applied voltage, working temperature range, and other absolute maximum rating are exceeded, the present product may be destroyed. Because it is unable to identify the short mode, open mode, etc., if any special mode is assumed, which exceeds the absolute maximum rating, physical safety measures are requested to be taken, such as fuses, etc. 2. GND potential Bring the GND terminal potential to the minimum potential in any operating condition. 3. Thermal design Consider allowable loss (Pd) under actual working condition and carry out thermal design with sufficient margin provided. 4. Terminal-to-terminal short-circuit and erroneous mounting When the present IC is mounted to a printed circuit board, take utmost care to direction of IC and displacement. In the event that the IC is mounted erroneously, IC may be destroyed. In the event of short-circuit caused by foreign matter that enters in a clearance between outputs or output and power-GND, the IC may be destroyed. 5. Operation in strong electromagnetic field The use of the present IC in the strong electromagnetic field may result in maloperation, to which care must be taken. 6. Built-in thermal shutdown protection circuit The present IC incorporates a thermal shutdown protection circuit (TSD circuit). The working temperature is 175°C (standard value) and has a -15℃ (standard value) hysteresis width. When the IC chip temperature rises and the TSD circuit operates, the output terminal is brought to the OFF state. The built-in thermal shutdown protection circuit (TSD circuit) is first and foremost intended for interrupt IC from thermal runaway, and is not intended to protect and warrant the IC. Consequently, never attempt to continuously use the IC after this circuit is activated or to use the circuit with the activation of the circuit premised. 7. Capacitor across output and GND In the event a large capacitor is connected across output and GND, when Vcc and VIN are short-circuited with 0V or GND for some kind of reasons, current charged in the capacitor flows into the output and may destroy the IC. Use a capacitor smaller than 1000 µF between output and GND. 8. Inspection by set substrate In the event a capacitor is connected to a pin with low impedance at the time of inspection with a set substrate, there is a fear of applying stress to the IC. Therefore, be sure to discharge electricity for every process. As electrostatic measures, provide grounding in the assembly process, and take utmost care in transportation and storage. Furthermore, when the set substrate is connected to a jig in the inspection process, be sure to turn OFF power supply to connect the jig and be sure to turn OFF power supply to remove the jig. 9. IC terminal input The present IC is a monolithic IC and has a P substrate and P+ isolation between elements. With this P layer and N layer of each element, PN junction is formed, and when the potential relation is GND>terminal A>terminal B, PN junction works as a diode, and terminal B>GND terminal A, PN junction operates as a parasitic transistor. The parasitic element is inevitably formed because of the IC construction. The operation of the parasitic element gives rise to mutual interference between circuits and results in malfunction, and eventually, breakdown. Consequently, take utmost care not to use the IC to operate the parasitic element such as applying voltage lower than GND (P substrate) to the input terminal. Resistor (PIN A) (PIN B) C NPN Transistor Structure (NPN) B E Parasitic diode GND N P+ N N P substrate N Parasitic diode GND Parasitic diode N P substrate GND Nearby other device Parasitic diode P P+ P+ N N C B E GND P P+ (PIN A) GND (PIN B) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 13/16 2010.05 - Rev.A BD3504FVM,BD3500FVM,BD3501FVM,BD3502FVM Technical Note 10. Output capacitor (C5) Connect the output capacitor between Vo1, Vo2 terminals and GND terminal without fail in order to stabilize output voltage. The output capacitor has a role to compensate for the phase of loop gain and to reduce output voltage fluctuation when load is rapidly changed. When there is an insufficient capacity value, there is a possibility to cause oscillation, and when the equivalent serial resistance (ESR) of the capacitors is large, output voltage fluctuation is increased when load is rapidly changed. About 220 µF high-performance electrolytic capacitors are recommended, but this greatly depends on the gate capacity of external MOSFET and mutual conductance (gm), temperature and load conditions. In addition, when only ceramic capacitors with low ESR are used, or various capacitors are connected in series, the total phase allowance of loop gain becomes not sufficient, and oscillation may result. Thoroughgoing confirmation at application temperature and under load range conditions is requested. 11. Input capacitor setting method (C1, C4) The input capacitor plays a part to lower output impedance of a power supply connected to input terminals (Vcc, VIN). When output impedance of this power supply increases, the input voltages (Vcc, VIN) become unstable and there is a possibility of giving rise to oscillation and degraded ripple rejection characteristics. The use of capacitors of about 10 µF with low ESR, which provide less capacity value changes caused by temperature changes, is recommended, but since input capacitor greatly depends on characteristics of the power supply used for input, substrate wiring pattern, and MOSFET gate-drain capacity, thoroughgoing confirmation under the application temperature, load range, and M-MOSFET conditions is requested. 12. NRCS terminal capacitor setting method (C3) To the present IC, there mounted is a function (Non Rush Current on Start-up: NRCS) to prevent rush current from VIN to load and output capacitor via Vo at the output voltage start-up. When the EN terminal is reset from Hi or UVLO, constant current is allowed to flow from the NRCS terminal. By this current, voltage generated at the NRCS terminal becomes the reference voltage and output voltage is started. In order to stabilize the NRCS set time, it is recommended to use a capacitor (B special) with less capacity value change caused by temperature change. 13. SCP terminal capacitor setting method (C2) The present IC incorporates a timer-latch type short-circuit protection circuit in order to prevent MOSFET from being destroyed by abnormal current when output terminal is short-circuited (operates at the time of NRCS, too). When the output terminal voltage drops 30% from output setting voltage, IC judges that the output is short-circuited. In such event, constant current begins to flow. When the voltage generated in the SCP terminal reaches 1.3V (Typ) by this current, the gate terminal is brought to the Low level. In order to stabilize the SCP setting time, a capacitor (B special) with less capacity value change caused by temperature changes is recommended. When the SCP function is not used, short-circuit the SCP terminal to the GND terminal. In addition, when the output terminal is short-circuited, the MOSFET gate voltage reaches the Vcc voltage and the large current that meets MOSFET characteristics flows to the output while the timer latch type protection circuit operates. When the current capacity of VIN terminal power supply lacks, the Vin terminal voltage lowers and the UVLO circuit operates, and the latch operation may not be finished. In such event, connect a limiting resistor across drain terminal and VIN terminal of MOSFET. 14. Input terminals (VCC, VIN, EN) In the present IC, N terminal, VIN terminal, and VCC terminal have an independent construction. In addition, in order to prevent malfunction at the time of low input, the UVLO function is equipped with the VIN terminal and the VCC terminal. They begin to start output voltage when all the terminals reach threshold voltage without depending on the input order of input terminals. 15. Maximum output current (maximum load) The maximum output current capacity of the power supply which is composed by the use of the present IC depends on the external FET. Consequently, confirm the characteristics of the power required for the set to be used, choose the external FET. 16. Operating ranges If it is within the operating ranges, certain circuit functions and operations are warranted in the working ambient temperature range. With respect to characteristic values, it is unable to warrant standard values of electric characteristics but there are no sudden variations in characteristic values within these ranges. 17. Allowable loss Pd With respect to the allowable loss, the thermal derating characteristics are shown in the Exhibit, which we hope would be used as a good-rule-of-thumb. Should the IC be used in such a manner to exceed the allowable loss, reduction of current capacity due to chip temperature rise, and other degraded properties inherent to the IC would result. You are strongly urged to use the IC within the allowable loss. 18. The use in the strong electromagnetic field may sometimes cause malfunction, to which care must be taken. 19.In the event that load containing a large inductance component is connected to the output terminal, and generation of back-EMF at the start-up and when output is turned OFF is assumed, it is requested to insert a protection diode. 20. We are certain that examples of applied circuit diagrams are recommendable, but you are requested to thoroughly confirm the characteristics before using the IC. In addition, when the IC is used with the external circuit changed, decide the IC with sufficient margin provided while consideration is being given not only to static characteristics but also variations of external parts and our IC including transient characteristics. (Example) OUTPUT PIN www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 14/16 2010.05 - Rev.A BD3504FVM,BD3500FVM,BD3501FVM,BD3502FVM ●Power Dissipation 500 Technical Note 437.5mW 400 Power Dissipation : Pd （mW) Without heat sink. θj-a=286℃/W 300 200 100℃ 100 0 0 25 50 75 100 125 150 Temperature Atmosphere : Ta(℃) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 15/16 2010.05 - Rev.A BD3504FVM,BD3500FVM,BD3501FVM,BD3502FVM ●Ordering part number Technical Note B D 3 Part No. 3504 3500 3501 3502 5 0 4 F V M - T R Part No. Package FVM: MSOP8 Packaging and forming specification TR: Embossed tape and reel (MSOP8) MSOP8 2.9±0.1 (MAX 3.25 include BURR) 8765 Tape 0.29±0.15 0.6±0.2 Embossed carrier tape 3000pcs TR The direction is the 1pin of product is at the upper right when you hold +6° 4° −4° Quantity Direction of feed 4.0±0.2 2.8±0.1 ( reel on the left hand and you pull out the tape on the right hand 1pin ) 1 234 1PIN MARK 0.475 0.9MAX +0.05 0.145 −0.03 S 0.75±0.05 0.08±0.05 +0.05 0.22 −0.04 0.08 S 0.65 Direction of feed (Unit : mm) Reel ∗ Order quantity needs to be multiple of the minimum quantity. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 16/16 2010.05 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. 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Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuelcontroller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law. Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us. ROHM Customer Support System http://www.rohm.com/contact/ www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. R1010A