BD35231HFN

Hi-performance Regulator IC Series for PCs Nch FET Ultra LDOs for Desktop PCs BD3523HFN, BD35230HFN, BD35231HFN No.09030EBT01 ●Description The BD3523HFN, BD35230HFN, BD35231HFN ultra low-dropout linear chipset regulator operates from a very low input supply, and offers ideal performance in low input voltage to low output voltage applications. It incorporates a built-in N-MOSFET power transistor to minimize the input-to-output voltage differential to the ON resistance (RON=150mΩ) level. By lowering the dropout voltage in this way, the regulator realizes high current output (Iomax=2.0A) with reduced conversion loss, and thereby obviates the switching regulator and its power transistor, choke coil, and rectifier diode. Thus, the BD3523HFN, BD35230HFN, BD35231HFN designed to enable significant package profile downsizing and cost reduction. In BD3523HFN, an external resistor allows the entire range of output voltage configurations between 0.65 and 2.7V, while the NRCS (soft start) function enables a controlled output voltage ramp-up, which can be programmed to whatever power supply sequence is required. ●Features 1) Internal high-precision reference voltage circuit(0.65V±1%) 2) Internal high-precision output voltage circuit 3) Built-in VCC undervoltage lockout circuit (VCC=3.80V) 4) NRCS (soft start) function reduces the magnitude of in-rush current 5) Internal Nch MOSFET driver offers low ON resistance (100mΩ typ) 6) Built-in short circuit protection (SCP) 7) Built-in current limit circuit (2.0A min) 8) Built-in thermal shutdown (TSD) circuit 9) Variable output (0.65～2.7V) 10) High-power package HSON8 : 2.9mm×3.0mm×0.6mm 11) Tracking function ●Applications Notebook computers, Desktop computers, LCD-TV, DVD, Digital appliances ●Line-up Maximum Output Voltage Adjustable (0.65～2.7V) 1.0V (fixed) 1.2V (fixed) Package HSON8 Product name BD3523HFN BD35230HFN BD35231HFN www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 1/20 2009.04 - Rev.B BD3523HFN, BD35230HFN, BD35231HFN ●Absolute maximum ratings Parameter Input Voltage 1 Input Voltage 2 Maximum Output Current Enable Input Voltage Power Dissipation 1 Power Dissipation 2 Power Dissipation 3 Operating Temperature Range Storage Temperature Range Maximum Junction Temperature Symbol VCC VIN IO VEN Pd1 Pd2 Pd3 Topr Tstg Tjmax Limit BD3523HFN BD35230HFN +6.0 *1 +6.0 2 *1 *1 Technical Note BD35231HFN Unit V V A V W W W ℃ ℃ ℃ -0.3～+6.0 0.63 1.35 1.75 *2 *3 *4 -10～+100 -55～+125 +150 *1 Should not exceed Pd. *2 Reduced by 5.04mW/℃ for each increase in Ta≧25℃ (when mounted on a 70mm×70mm×1.6mm glass-epoxy board, 1-layer, copper foil area : less than 0.2%) *3 Reduced by 10.8mW/℃ for each increase in Ta≧25℃ (when mounted on a 70mm×70mm×1.6mm glass-epoxy board, 1-layer, copper foil area : less than 7.0%) *4 Reduced by 14.0mW/℃ for each increase in Ta≧25℃ (when mounted on a 70mm×70mm×1.6mm glass-epoxy board, 1-layer, copper foil area : less than 65.0%) ●Operating Voltage(Ta=25℃) Parameter Input Voltage 1 Input Voltage 2 Output Voltage Setting Range Enable Input Voltage NRCS Capacity Symbol VCC VIN IO VEN CNRCS BD3522EFV Min. 4.3 0.95 VFB -0.3 0.001 Max. 5.5 VCC-1 *5 2.7 5.5 1 BD35221EFV Min. 4.3 1.3 -0.3 0.001 Max. 5.5 VCC-1 *5 5.5 1 BD35222EFV Min. 4.3 1.5 -0.3 0.001 Max. 5.5 VCC-1 *5 5.5 1 Unit V V V V μF 1.0 (fixed) 1.2 (fixed) *5 VCC and VIN do not have to be implemented in the order listed. *This product is not designed for use in radioactive environments. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 2/20 2009.04 - Rev.B BD3523HFN, BD35230HFN, BD35231HFN ●Electrical Characteristics BD3523HFN (Unless otherwise specified, Ta=25℃, VCC=5V, VEN=3V, VIN=1.7V, R1=3.9kΩ, R2=3.3kΩ) Parameter Bias Current VCC Shutdown Mode Current Output Voltage Feedback Voltage 1 Feedback Voltage 2 Line Regulation 1 Line Regulation 2 Load Regulation Output ON Resistance Standby Discharge Current [ENABLE] Enable Pin Input Voltage High Enable Pin Input Voltage Low Enable Input Bias Current [FEEDBACK] Feedback Pin Bias Current [NRCS] NRCS Charge Current NRCS Standby Voltage [UVLO] VCC Undervoltage Lockout Threshold Voltage VCC Undervoltage Lockout Hysteresis Voltage VINUndervoltage Lockout Threshold Voltage [SCP] SCP Start up Voltage SCP Threshold Voltage INRCS VSTB 12 20 0 28 50 μA mV VEN=0V IFB -100 0 100 nA ENHIGH ENLOW IEN 2 0 7 0.8 10 V V μA VEN=3V Symbol ICC IST IO VFB1 VFB2 Reg.l1 Reg.l2 Reg.L RON IDEN Limit Min. 2.0 0.643 0.637 1 Typ. 0.7 0 0.650 0.650 0.1 0.1 0.5 100 Max. 1.2 10 0.657 0.663 0.5 0.5 10 150 Unit mA μA A V V %/V %/V mV mΩ mA VEN=0V Technical Note Condition Tj=-10 to 100℃ VCC=4.3V to 5.5V VIN=1.2V to 3.3V IO=0 to 2A IO=2A,VIN=1.2V, Tj=-10 to 100℃ VEN=0V, VO=1V VCCUVLO VCChys VINUVLO 3.5 100 0.55 3.8 160 0.65 4.1 220 0.75 V mV V VCC:Sweep-up VCC:Sweep-down VIN:Sweep-up VOSCP TSCP VO×0.3 45 VO×0.4 90 VO×0.5 200 V μsec www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 3/20 2009.04 - Rev.B BD3523HFN, BD35230HFN, BD35231HFN ●Electrical Characteristics BD35230HFN (Unless otherwise specified, Ta=25℃, VCC=5V, VEN=3V, VIN=1.7V) Limit Parameter Symbol Unit Min. Typ. Max. Bias Current VCC Shutdown Mode Current Output Voltage Feedback Voltage 1 Feedback Voltage 2 Line Regulation 1 Line Regulation 2 Load Regulation Output ON Resistance Standby Discharge Current [ENABLE] Enable Pin Input Voltage High Enable Pin Input Voltage Low Enable Input Bias Current [NRCS] NRCS Charge Current NRCS Standby Voltage [UVLO] VCC Undervoltage Lockout Threshold Voltage VCC Undervoltage Lockout Hysteresis Voltage VIN Undervoltage Lockout Threshold Voltage [SCP] SCP Start up Voltage SCP Threshold Voltage INRCS VSTB 12 20 0 28 50 μA mV VEN=0V ENHIGH ENLOW IEN 2 0 7 0.8 10 V V μA VEN=3V ICC IST IO VOS1 VOS2 Reg.l1 Reg.l2 Reg.L RON IDEN 2.0 0.990 0.980 1 0.7 0 1.000 1.000 0.1 0.1 0.5 100 1.2 10 1.010 1.020 0.5 0.5 10 150 mA μA A V V %/V %/V mV mΩ mA VEN=0V Technical Note Condition Tj=-10 to 100℃ VCC=4.3V to 5.5V VIN=1.3V to 3.3V IO=0 to 2A IO=2A,VIN=1.0V, Tj=-10 to 100℃ VEN=0V, VO=1V VCCUVLO VCCHYS VINUVLO 3.5 100 0.60 3.8 160 0.70 4.1 220 0.80 V mV V VCC:Sweep-up VCC:Sweep-down VIN:Sweep-up VOSCP TSCP VO×0.3 45 VO×0.4 90 VO×0.5 200 V μsec www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 4/20 2009.04 - Rev.B BD3523HFN, BD35230HFN, BD35231HFN ●Electrical Characteristics BD35231HFN(Unless otherwise specified, Ta=25℃, VCC=5V, VEN=3V, VIN=1.7V) Limit Parameter Symbol Unit Min. Typ. Max. Bias Current VCC Shutdown Mode Current Output Voltage Feedback Voltage 1 Feedback Voltage 2 Line Regulation 1 Line Regulation 2 Load Regulation Output ON Resistance Standby Discharge Current [ENABLE] Enable PinInput Voltage High Enable PinInput Voltage Low Enable Input Bias Current [NRCS] NRCS Charge Current NRCS Standby Voltage [UVLO] VCC Undervoltage Lockout Threshold Voltage VCC Undervoltage Lockout Hysteresis Voltage VIN Undervoltage Lockout Threshold Voltage [SCP] SCP Start up Voltage SCP Threshold Voltage INRCS VSTB 12 20 0 28 50 μA mV VEN=0V ENHIGH ENLOW IEN 2 0 7 0.8 10 V V μA VEN=3V ICC IST IO VOS1 VOS2 Reg.l1 Reg.l2 Reg.L RON IDEN 2.0 1.188 1.176 1 0.7 0 1.200 1.200 0.1 0.1 0.5 100 1.2 10 1.212 1.224 0.5 0.5 10 150 mA μA A V V %/V %/V mV mΩ mA VEN=0V Technical Note Condition Tj=-10 to 100℃ VCC=4.3V to 5.5V VIN=1.5V to 3.3V IO=0 to 2A IO=2A,VIN=1.2V, Tj=-10 to 100℃ VEN=0V, VO=1V VCCUVLO VCCHYS VINUVLO 3.5 100 0.72 3.8 160 0.84 4.1 220 0.96 V mV V VCC:Sweep-up VCC:Sweep-down VIN:Sweep-up VOSCP TSCP VO×0.3 45 VO×0.4 90 VO×0.5 200 V μsec www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 5/20 2009.04 - Rev.B BD3523HFN, BD35230HFN, BD35231HFN ●Reference Data BD35231HFN Technical Note Vo 50mV/div 66mV Vo 50mV/div 91mV Vo 50mV/div 108mV Io 2A/div 2A Io 2A/div T(10μsec/div) 2A Io 2A/div T(10μsec/div) 2A T(10μsec/div) Fig.1 Transient Response (0A→2A) Co=100μF Cfb=1000pF Fig.2 Transient Response (0A→2A) Co=47μF Cfb=1000pF Fig.3 Transient Response (0A→2A) Co=22μF Cfb=1000pF Vo 50mV/div 51mV Vo 50mV/div 80mV Vo 50mV/div 98mV Io 2A/div 2A Io 2A/div 2A Io 2A/div 2A T(10μsec/div) T(10μsec/div) T(10μsec/div) Fig.4 Transient Response (2A→0A) Co=100μF Cfb=1000pF Fig.5 Transient Response (2A→0A) Co=47 Cfb=1000pF Fig.6 Transient Response (2A→0A) Co=22 Cfb=1000pF VCC Ven Ven Ven VNRCS VNRCS VIN Vo Vo Vo T(200μsec/div) T(200μsec/div) VCC→VIN→Ven Fig.7 Waveform at output start Fig.8 Waveform at output OFF Fig.9 Input sequence VCC VCC VCC Ven Ven Ven VIN VIN VIN Vo VIN→VCC→Ven Vo Ven→VCC→VIN Vo VCC→Ven→VIN Fig.10 Input sequence www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. Fig.11 Input sequence Fig.12 Input sequence 6/20 2009.04 - Rev.B BD3523HFN, BD35230HFN, BD35231HFN ●Reference Data BD35231HFN 1.25 Technical Note VCC VCC 1.23 Vo [V] 1.19 1.17 1.15 Ven Ven 1.21 VIN VIN Vo VIN→Ven→VCC Vo Ven→VIN→VCC -50 -25 0 25 50 Tj [℃] 75 100 125 150 Fig.13 Input sequence 0.9 Fig.14 Input sequence 2.0 3.0 Fig.15 Tj-Vo (Io=0mA) 0.8 1.8 2.5 2.0 ISTB [μA] -50 -25 0 25 50 Tj [℃] 75 100 125 150 0.7 Icc [mA] 1.6 IIN [mA] 1.5 0.6 1.4 1.0 0.5 1.2 0.5 0.4 -50 -25 0 25 50 Tj [℃] 75 100 125 150 1.0 0.0 -50 -25 0 25 50 Tj [℃] 75 100 125 150 Fig.16 Tj-ICC 30 20 19 25 18 17 INRCS [μA] Fig.17 Tj-IIN 10 9 8 7 IEN [ μA] 6 5 4 3 2 1 0 Fig.18 Tj-ICCSTB 20 IINSTB [μA] 16 15 14 13 12 11 15 10 5 0 -50 -25 0 25 50 Tj [℃] 75 100 125 150 10 -50 -25 0 25 50 Tj [℃] 75 100 125 150 -50 -25 0 25 50 Tj [ ℃] 75 100 125 150 Fig.19 Tj-IINSTB 150 135 Fig.20 Tj-NRSC Fig.21 Tj-IEN 130 125 Vo=2.5V 115 RON [mΩ] RON [mΩ] 110 Vo=1.8V 105 Vo=1.5V Vo=1.2V Vo=1.0V 90 95 70 85 50 -50 -25 0 25 50 Tj [℃] 75 100 125 150 75 3 4 5 Tj [℃] 6 7 8 Fig.22 Tj-RON (Vcc=5V/Vo=1.2V) www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. Fig.23 Vcc- RON 7/20 2009.04 - Rev.B BD3523HFN, BD35230HFN, BD35231HFN ●Block Diagram BD3523HFN Technical Note VCC C1 VCC 1 UVLO2 VCC EN UVLO1 UVLO1 VCC VREF1 NRCS CL UVLO1 UVLO2 TSD SCP EN CL VIN UVLOLATCH VCC Current Limit VREF2 EN 2 Reference Block 4 VIN VIN C2 NRCS0.3. VREF1×0.4 FB TSD SCP/TSD LATCH LATCH 5 6 VO VO EN UVLO1 R2 CFB C3 7 FB R1 NRCS CNRCS 3 EN/UVLO NRCS 8 GND BD35230HFN/BD35231HFN VCC C1 VCC 1 UVLO2 VCC EN UVLO1 UVLO1 VCC VREF1 NRCS CL UVLO1 UVLO2 TSD SCP EN R2 CL VIN UVLOLATCH VCC Current Limit VREF2 R2 EN R1 2 Reference Block 4 VIN VIN C2 NRCS0.3. VREF1×0.4 FB TSD SCP/TSD LATCH LATCH 5 6 VO VO EN UVLO1 CFB VOS C3 7 R1 NRCS CNRCS FB 3 EN/UVLO NRCS 8 GND www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 8/20 2009.04 - Rev.B BD3523HFN, BD35230HFN, BD35231HFN ●Pin Layout BD3523HFN BD35230HFN/BD35231HFN Technical Note 6 Vcc 1 8 GND Vcc 1 6 8 GND EN 2 7 FB EN 2 7 FB FIN NRCS 3 6 Vo NRCS 3 FIN 6 Vos VIN 4 5 Vo VIN 4 5 Vo ●Pin Function Table BD3523HFN PIN No. 1 2 3 4 5 6 7 8 PIN name VCC EN NRCS VIN VO VO FB GND FIN PIN Function Power Supply Pin Enable Input Pin In-rush Current Protection (NRCS) Capacitor Connection Pin Input Voltage Pin Output Voltage Pin Output Voltage Pin Reference Voltage Feedback Pin Ground Pin Connected to heatsink and GND BD35230HFN/BD35231HFN PIN No. 1 2 3 4 5 6 7 8 PIN name VCC EN NRCS VIN VO VOS FB GND FIN PIN Function Power Supply Pin Enable Input Pin In-rush Current Protection (NRCS) Capacitor Connection Pin Input Voltage Pin Output Voltage Pin Output Voltage Control Pin Reference Voltage Feedback Pin Ground Pin Connected to heatsink and GND www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 9/20 2009.04 - Rev.B BD3523HFN, BD35230HFN, BD35231HFN Technical Note ●Operation of Each Block ・AMP This is an error amp that compares the reference voltage (0.65V) with VO to drive the output Nch FET (Ron=150mΩ). Frequency optimization helps to realize rapid transient response, and to support the use of ceramic capacitors on the output capacitors. AMP input voltage ranges from GND to 2.7V, while the AMP output ranges from GND to VCC. When EN is OFF, or when UVLO is active, output goes LOW and the output of the NchFET switches OFF. ・EN The EN block controls the regulator’s ON/OFF state via the EN logic input pin. In the OFF position, circuit voltage is maintained at 0μA, thus minimizing current consumption at standby. The FET is switched ON to enable discharge of the NRCS pin VO, thereby draining the excess charge and preventing the IC on the load side from malfunctioning. Since no electrical connection is required (e.g. between the VCC pin and the ESD prevention diode), module operation is independent of the input sequence. ・VCCUVLO To prevent malfunctions that can occur during a momentary decrease in VCC, the UVLO circuit switches the output OFF, and (like the EN block) discharges NRCS and VO. Once the UVLO threshold voltage (TYP3.80V) is reached, the power-on reset is triggered and output continues. ・VINUVLO When VD voltage exceeds the threshold voltage, VDUVLO becomes active. Once active, the status of output voltage remains ON even if VD voltage drops. (When VIN voltage drops, SCP engages and output switches OFF.) Unlike EN and VCC, it is effective at output startup. VDUVLO can be restored either by reconnecting the EN pin or VCC pin. ・CURRENT LIMIT When output is ON, the current limit function monitors the internal IC output current against the parameter value. When current exceeds this level, the current limit module lowers the output current to protect the load IC. When the overcurrent state is eliminated, output voltage is restored to the parameter value. However, when output voltage falls to or below the SCP startup voltage, the SCP function becomes active and the output switches OFF. ・NRCS (Non Rush Current on Start-up) The soft start function enabled by connecting an external capacitor between the NRCS pin and ground. Output ramp-up can be set for any period up to the time the NRCS pin reaches VFB (0.65V). During startup, the NRCS pin serves as a 20μA (TYP) constant current source to charge the external capacitor. Output start time is calculated via the formula below. TNRCS (typ.) = CNRCS×VFB INRCS ・TSD (Thermal Shut down) The shutdown (TSD) circuit automatically is latched OFF when the chip temperature exceeds the threshold temperature after the programmed time period elapses, thus serving to protect the IC against “thermal runaway” and heat damage. Because the TSD circuit is intended to shut down the IC only in the presence of extreme heat, it is crucial that the Tj (max) parameter not be exceeded in the thermal design ,in order to avoid potential problems with the TSD. TTSD (typ.) = CSCP×VSCPTH 20uA ・VIN The VIN line acts as the major current supply line, and is connected to the output NchFET drain. Since no electrical connection (such as between the VCC pin and the ESD protection diode) is necessary, VIN operates independent of the input sequence. However, since an output NchFET body diode exists between VIN and VO, a VIN-VO electric (diode) connection is present. Note, therefore, that when output is switched ON or OFF, reverse current may flow to VIN from VO. ・SCP When output voltage (Vo) drops, the IC assumes that VO pin is shorted to GND and switches the output voltage OFF. After the GND short has been detected and the programmed delay time has elapsed, output is latched OFF. It is also effective during output startup. SCP can be cleared either by reconnecting the EN pin or VCC pin. Delay time is calculated via the formula below. TSCP (typ.) = CSCP×VSCPTH ISCP www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 10/20 2009.04 - Rev.B BD3523HFN, BD35230HFN, BD35231HFN ●Timing Chart EN ON/OFF Technical Note VIN VCC EN 0.65V(typ) NRCS Startup Vo t VCC ON/OFF VIN UVLO Hysteresis VCC EN 0.65V(typ) NRCS Startup Vo t www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 11/20 2009.04 - Rev.B BD3523HFN, BD35230HFN, BD35231HFN ●Timing Chart VIN ON Technical Note VINUVLO VIN VCC EN NRCS Vo SCP OFF VIN VCC EN NRCS Vo SCP startup voltage SCP delay time www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 12/20 2009.04 - Rev.B BD3523HFN, BD35230HFN, BD35231HFN ●Evaluation Board ■ BD3523HFN Evaluation Board Schematic VCC VCC SW1 R8 Technical Note GND_S 1 8 GND VCC C1 GND GND U1 2 R1 C12 GND GND EN BD3523HFN 7 R2 C13 FB 3 C11 GND R4 6 Vo Vo S NRCS VIN_S 4 5 C5 GND GND VIN C4 GND GND C7 GND C3 GND C2 Vo C6 GND C8 R3 C9 GND U2 R5 7568 4 VCC 321 GND R6 GND TP1 R7 TP2 JPF1 GND U3 GND GND GND 2 3 5 4 JPF2 C14 R9 ■ BD3523HFN Evaluation Board List Component Rating Manufacturer U1 C1 C3 C5 C11 1μF 10μF 22μF 0.01μF ROHM MURATA KYOCERA KYOCERA MURATA Product Name BD3523XHFN GRM188B11A105KD CM32X5R226M10A CM32X5R226M10A GRM188B11H103KD Component C13 R1 R2 R4 R8 Rating 1000pF 3.9kΩ 3.3kΩ 0Ω 0Ω Manufacturer MURATA ROHM ROHM - Product Name GRM188B11H102KD MCR03EZPF3301 MCR03EAPF3901 Jumper Jumper ■ BD3523HFN Evaluation Board Layout (2nd layer and 3rd layer are GND line.) Silk Screen TOP Layer Bottom Layer www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 13/20 2009.04 - Rev.B BD3523HFN, BD35230HFN, BD35231HFN ●Evaluation Board ■ BD35230HFN / BD35231HFN Evaluation Board Schematic Technical Note VCC VCC SW1 R8 C12 GND GND GND_S 1 8 GND GND VCC C1 GND U1 2 EN BD35230HFN/ BD35231HFN 7 C13 FB 3 C11 GND R4 6 Vos Vo_S NRCS VIN_S 4 5 C5 VIN C4 GND C7 GND C3 GND C2 GND Vo C6 C8 R3 C9 R5 7568 4 321 GND 5 4 3 R7 GND R6 GND GND GND GND GND VCC TP1 JPF1 U2 TP2 JPF2 U3 GND GND GND 2 C14 R9 ■ BD35230HFN / BD35231HFN Evaluation Board List Component Rating U1 C1 C3 C5 1μF 10μF 22μF Manufacturer ROHM MURATA KYOCERA KYOCERA Product Name BD3523XHFN GRM188B11A105KD CM32X5R226M10A CM32X5R226M10A Component C13 R1 R2 R4 Rating 1000pF 3.9kΩ 3.3kΩ 0Ω Manufacturer MURATA ROHM ROHM Product Name GRM188B11H102KD MCR03EZPF3301 MCR03EAPF3901 Jumper ■ BD35230HFN / BD35231HFN Evaluation Board Layout (2nd layer and 3rd layer are GND line.) Silk Screen TOP Layer Bottom Layer www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 14/20 2009.04 - Rev.B BD3523HFN, BD35230HFN, BD35231HFN ●Recommended Circuit Example (BD3523HFN) Technical Note 1 Vcc C1 Vcc 6 GND 8 GND R1 2 R4 EN EN FB 7 R2 C5 FB 3 C4 NRCS Vo 6 C3 Vo 4 VIN C2 VIN Vo 5 Component Recommended Value 3.3k /3.9k Programming Notes and Precautions IC output voltage can be set with a configuration formula VFB×(R1+R2)/R7 using the values for the internal reference output voltage (VFB) and the output voltage resistors (R6, R7). Select resistance values that will avoid the impact of the FB bias current (±100nA). The recommended total resistance value is 10kΩ. To assure output voltage stability, please be certain the output capacitors are connected between Vo1, Vo2, Vo3 pin and GND. Output capacitors play a role in loop gain phase compensation and in mitigating output fluctuation during rapid changes in load level. Insufficient capacitance may cause oscillation, while high equivalent series reisistance (ESR) will exacerbate output voltage fluctuation under rapid load change conditions. While a 47μF ceramic capacitor is recomended, actual stability is highly dependent on temperature and load conditions. Also, note that connecting different types of capacitors in series may result in insufficient total phase compensation, thus causing oscillation. In light of this information, please confirm operation across a variety of temperature and load conditions. Input capacitors reduce the output impedance of the voltage supply source connected to the input pin (VCC,). If the impedance of this power supply were to increase, input voltage (VCC) could become unstable, leading to oscillation or lowered ripple rejection function. While a low-ESR 1μF capacitor with minimal susceptibility to temperature is recommended, stability is highly dependent on the input power supply characteristics and the substrate wiring pattern. In light of this information, please confirm operation across a variety of temperature and load conditions. The Non Rush Current on Startup (NRCS) function is built into the IC to prevent rush current from going through the load (VIN to VO) and impacting output capacitors at power supply start-up. Constant current comes from the NRCS pin when EN is HIGH or the UVLO function is deactivated. The temporary reference voltage is proportionate to time, due to the current charge of the NRCS pin capacitor, and output voltage start-up is proportionate to this reference voltage. Capacitors with low susceptibility to temperature are recommended, in order to assure a stable soft-start time. This component is employed when the C3 capacitor causes, or may cause, oscillation. It provides more precise internal phase correction. It is recommended that a resistance (several kΩ to several 10kΩ) be put in R4, in case negative voltage is applied in EN pin. R1/R2 C3 22μF C1/ C2 1μF/22μF C4 0.01μF C5 R4 Several kΩ ～several 10kΩ www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 15/20 2009.04 - Rev.B BD3523HFN, BD35230HFN, BD35231HFN ●Recommended Circuit Example (BD35230HFN/BD35231HFN) Technical Note 1 Vcc C1 Vcc 6 GND 8 GND 2 R4 EN EN FB 7 C5 FB 3 C4 NRCS Vo 6 C3 Vo 4 VIN C2 VIN Vo 5 Component Recommended Value Programming Notes and Precautions To assure output voltage stability, please be certain the output capacitors are connected between Vo pin and GND. Output capacitors play a role in loop gain phase compensation and in mitigating output fluctuation during rapid changes in load level. Insufficient capacitance may cause oscillation, while high equivalent series reisistance (ESR) will exacerbate output voltage fluctuation under rapid load change conditions. While a 22μF ceramic capacitor is recomended, actual stability is highly dependent on temperature and load conditions. Also, note that connecting different types of capacitors in series may result in insufficient total phase compensation, thus causing oscillation. In light of this information, please confirm operation across a variety of temperature and load conditions. Input capacitors reduce the output impedance of the voltage supply source connected to the (VCC, VIN) input pins. If the impedance of this power supply were to increase, input voltage (VCC, VIN) could become unstable, leading to oscillation or lowered ripple rejection function. While a low-ESR 1μF/10μF capacitor with minimal susceptibility to temperature is recommended, stability is highly dependent on the input power supply characteristics and the substrate wiring pattern. In light of this information, please confirm operation across a variety of temperature and load conditions. The Non Rush Current on Startup (NRCS) function is built into the IC to prevent rush current from going through the load (VIN to VO) and impacting output capacitors at power supply start-up. Constant current comes from the NRCS pin when EN is HIGH or the UVLO function is deactivated. The temporary reference voltage is proportionate to time, due to the current charge of the NRCS pin capacitor, and output voltage start-up is proportionate to this reference voltage. Capacitors with low susceptibility to temperature are recommended, in order to assure a stable soft-start time. C3 22μF C1/C2 1μF/10μF C4 0.01μF C5 1000pF This component is employed when the C16 capacitor causes, or may cause, oscillation. It provides more precise internal phase correction. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 16/20 2009.04 - Rev.B BD3523HFN, BD35230HFN, BD35231HFN Technical Note ●Input-Output Equivalent Circuit Diagram (BD3523HFN) VCC VCC VIN NRCS 1 kΩ 1 kΩ 1 kΩ 1 kΩ 210kΩ 1 kΩ 1kΩ EN 400kΩ VIN VIN VIN VIN VIN 1 kΩ 90kΩ VCC VCC 10kΩ Vo Vo Vo Vo Vo Vo 50kΩ FB 1kΩ 1kΩ 1kΩ ●Operation Notes 1. Absolute maximum ratings An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses. 2. Connecting the power supply connector backward Connecting of the power supply in reverse polarity can damage IC. Take precautions when connecting the power supply lines. An external direction diode can be added. 3. Power supply lines Design PCB layout pattern to provide low impedance GND and supply lines. To obtain a low noise ground and supply line, separate the ground section and supply lines of the digital and analog blocks. Furthermore, for all power supply terminals to ICs, connect a capacitor between the power supply and the GND terminal. When applying electrolytic capacitors in the circuit, not that capacitance characteristic values are reduced at low temperatures. 4. GND voltage The potential of GND pin must be minimum potential in all operating conditions. 5. Thermal design Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions. 6. Inter-pin shorts and mounting errors Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any connection error or if pins are shorted together. 7. Actions in strong electromagnetic field Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 17/20 2009.04 - Rev.B BD3523HFN, BD35230HFN, BD35231HFN Technical Note 8. ASO When using the IC, set the output transistor so that it does not exceed absolute maximum ratings or ASO. 9. Thermal shutdown circuit The IC incorporates a built-in thermal shutdown circuit (TSD circuit). The thermal shutdown circuit (TSD circuit) is designed only to shut the IC off to prevent thermal runaway. It is not designed to protect the IC or guarantee its operation. Do not continue to use the IC after operating this circuit or use the IC in an environment where the operation of this circuit is assumed. TSD on temperature [°C] (typ.) 175 BD3523HFN/BD35230HFN/BD35231HFN 10. Testing on application boards When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. Always discharge capacitors after each process or step. Always turn the IC's power supply off before connecting it to or removing it from a jig or fixture during the inspection process. Ground the IC during assembly steps as an antistatic measure. Use similar precaution when transporting or storing the IC. 11. Regarding input pin of the IC This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated. P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic diode or transistor. For example, the relation between each potential is as follows: When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode. When GND > Pin B, the P-N junction operates as a parasitic transistor. Parasitic diodes can occur inevitable in the structure of the IC. The operation of parasitic diodes can result in mutual interference among circuits, operational faults, or physical damage. Accordingly, methods by which parasitic diodes operate, such as applying a voltage that is lower than the GND (P substrate) voltage to an input pin, should not be used. Resistor Pin A Pin A P + Transistor (NPN) Pin B C B E B P P + Pin B N P P + N N Parasitic element N P+ N N C E P substrate Parasitic element GND P substrate Parasitic element GND GND GND Parasitic element Other adjacent elements Example of IC structure 12. Ground Wiring Pattern. When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing a single ground point at the ground potential of application so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the GND wiring pattern of any external components, either. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 18/20 2009.04 - Rev.B BD3523HFN, BD35230HFN, BD35231HFN Technical Note ●Heat Loss Thermal design should allow operation within the following conditions. Note that the temperatures listed are the allowed temperature limits, and thermal design should allow sufficient margin from the limits. 1. Ambient temperature Ta can be no higher than 100℃. 2. Chip junction temperature (Tj) can be no higher than 150℃. Chip junction temperature can be determined as follows: ① Calculation based on ambient temperature (Ta) Tj=Ta+θj-a×W ＜Reference values＞ θj-a: HSON8 198.4℃/W 1-layer substrate (copper foil area : below 0.2%) 92.4℃/W 1-layer substrate (copper foil area : 7%) 71.4℃/W 2-layer substrate (copper foil area : 65%) 3 Substrate size: 70×70×1.6mm (substrate with thermal via) It is recommended to layout the VIA for heat radiation in the GND pattern of reverse (of IC) when there is the GND pattern in the inner layer (in using multiplayer substrate). This package is so small (size: 2.9mm×3.0mm) that it is not available to layout the VIA in the bottom of IC. Spreading the pattern and being increased the number of VIA like the figure below enable to get the superior heat radiation characteristic. (This figure is the image. It is recommended that the VIA size and the number is designed suitable for the actual situation.). Most of the heat loss that occurs in the BD3523XHFN is generated from the output Nch FET. Power loss is determined by the total VIN-Vo voltage and output current. Be sure to confirm the system input and output voltage and the output current conditions in relation to the heat dissipation characteristics of the VIN and Vo in the design. Bearing in mind that heat dissipation may vary substantially depending on the substrate employed (due to the power package incorporated in the BD3523XHFN) make certain to factor conditions such as substrate size into the thermal design. Power consumption (W) = Input voltage (VIN)- Output voltage (Vo) ×Io(Ave) Example) Where VIN=1.7V, Vo=1.2V, Io(Ave) = 2A, Power consumption (W) = 1.7(V)-1.2(V) ×2.0(A) = 1.0(W) ●Heat Dissipation Characteristics ◎HSON8 [W] 2.0 (3) 1.75W (1) 1 layer substrate (substrate surface copper foil area: below 0.2%) θj-a=198.4℃/W (2) 2 layer substrate (substrate surface copper foil area:7%) θj-a=92.4℃/W (3) 2 layer substrate (substrate surface copper foil area:65%) θj-a=71.4℃/W Power Dissipation [Pd] 1.5 (2) 1.35W 1.0 (1) 0.63W 0.5 0 0 25 50 75 100 125 150 [℃] Ambient Temperature [Ta] www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 19/20 2009.04 - Rev.B BD3523HFN, BD35230HFN, BD35231HFN ●Ordering part number Technical Note B D 3 Part No. 3523 35230 35231 5 2 3 H F N - T R Part No. Package HFN : HSON8 Packaging and forming specification TR: Embossed tape and reel HSON8 2.9 ± 0.1 (MAX 3.1 include BURR) (0.2) (2.2) (0.05) Tape Quantity Embossed carrier tape 3000pcs TR The direction is the 1pin of product is at the upper right when you hold 0.475 3.0 ± 0.2 2.8 ± 0.1 8 765 (0.15) (0.3) 5678 (0.45) (0.2) (1.8) Direction of feed +0.1 0.13 –0.05 ( reel on the left hand and you pull out the tape on the right hand 1pin ) 1234 4321 1PIN MARK 0.6MAX S +0.03 0.02 –0.02 0.1 0.65 0.32±0.1 S 0.08 M Direction of feed (Unit : mm) Reel ∗ Order quantity needs to be multiple of the minimum quantity. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 20/20 2009.04 - Rev.B Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. 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If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law. Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us. ROHM Customer Support System http://www.rohm.com/contact/ www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. R0039A