Datasheet
0.95V to VCC-1V, 0.5A/1.0A/2.0A 1ch
Ultra Low Dropout Linear Regulators
BD3550HFN BD3551HFN
BD3552HFN
General Description
Key Specifications
BD3550HFN, BD3551HFN and BD3552HFN are ultra
low-dropout linear chipset regulators that operate from
a very low input supply. They offer ideal performance
in low input voltage to low output voltage applications.
The input-to-output voltage difference is minimized by
using a built-in N-Channel power MOSFET with a
maximum
ON-Resistance
of
RON=100mΩ(Typ)
. By lowering the dropout voltage, the
regulator realizes high output current (IOUTMAX=2.0A
) thereby, reducing conversion loss,
making it comparable to a switching regulator and its
power transistor, choke coil, and rectifier diode
constituents.
The
BD3550HFN,
BD3551HFN,
BD3552HFN are available in significantly downsized
package profiles and allow low-cost design. An
external resistor allows the entire range of output
voltage configurations between 0.65V and 2.7V, while
the NRCS (soft start) function enables a controlled
output voltage ramp-up, which can be programmed to
a required power supply sequence.
IN Input Voltage Range:
0.95V to VCC-1V
VCC Input Voltage Range:
4.3V to 5.5V
Output Voltage Range:
0.65V to 2.7V
Standby Current:
0µA (Typ)
Operating Temperature Range: -10°C to +100°C
Package
W(Typ) x D(Typ) x H(Max)
HSON8
2.90mm x 3.00mm x 0.60mm
Features
Internal High-Precision Reference Voltage Circuit
(0.65V±1%)
Built-in VCC Undervoltage Lockout Circuit
NRCS (soft start) Function Reduces the
Magnitude of In-rush Current
Internal N-Channel MOSFET
Built-in Current Limit Circuit
Built-in Thermal Shutdown (TSD) Circuit
Tracking Function
Applications
Notebook computers, Desktop computers, LCD-TV,
DVD, Digital appliances
Lineup
Maximum Output Current
0.5A
1.0A
2.0A
ON-Resistance(Typ)
400mΩ
200mΩ
100mΩ
○Product structure：Silicon monolithic integrated circuit
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Package
HSON8
VCC=5V
BD3550HFN
BD3551HFN
BD3552HFN
○This product has no designed protection against radioactive rays
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BD3550HFN
BD3551HFN
BD3552HFN
Typical Application Circuit, Block Diagram
VCC
VCC
VCC
UVLO
EN
Current
Limit
CL
Reference
Block
IN
IN
VCC
OUT
CL
UVLO
TSD
OUT
EN
FB
Thermal
Shutdown
GATE
NRCS
TSD
NRCS
GND
Pin Descriptions
Pin No.
1
2
3
4
5
6
Pin Name
VCC
EN
GATE
IN
OUT
FB
7
NRCS
8
reverse
GND
FIN
Pin Function
Power supply pin
Enable input pin
Gate pin
Input voltage pin
Output voltage pin
Reference voltage feedback pin
In-rush current protection (NRCS)
capacitor connection pin
Ground pin
Connected to heatsink and GND
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BD3550HFN
BD3551HFN
BD3552HFN
Description of Blocks
1.
AMP
This is an error amp that compares the reference voltage (0.65V) with FB voltage to drive the output N-Channel FET.
Frequency optimization aids in attaining rapid transient response, and to support the use of ceramic capacitors on the
output. AMP output voltage ranges from GND to VCC. When EN is OFF, or when UVLO is active, output goes LOW
and the output of the N-Channel FET switches OFF.
2.
EN
The EN block controls the ON and OFF state of the regulator via the EN logic input pin. During OFF state, circuit
voltage stabilizes at 0µA which minimizes the current consumption during standby mode. The FET is switched ON to
enable discharge of the NRCS and OUT, thereby draining the excess charge and preventing the load side of an IC
from malfunctioning. Since there is no electrical connection required (e.g., between the VCC pin and the ESD
prevention Diode), module operation is independent of the input sequence.
3.
UVLO
To prevent malfunctions that can occur during a sudden decrease in VCC, the UVLO circuit switches the output OFF,
and (like the EN block) discharges NRCS and OUT. Once the UVLO threshold voltage (TYP3.80V) is reached, the
power-ON reset is triggered and output is restored.
4.
CURRENT LIMIT
During ON state, the current limit function monitors the output current of the IC against the current limit value (2.0A or
more: BD3552HFN). When output current exceeds this value, this block lowers the output current to protect the load
IC. When it overcomes the over-current state, output voltage is restored to the normal value.
5.
NRCS (Non Rush Current on Start-up)
The soft start function is enabled by connecting an external capacitor between the NRCS pin and GND. Output
ramp-up can be set for any period up to the time the NRCS pin reaches VFB (0.65V). During startup, the NRCS pin
serves as a 20µA (TYP) constant current source to charge the external capacitor. Output start time is calculated by
formula (1) below.
t C
0.65V
・・・(1)
20A
Tracking sequence is possible by connecting the NRCS output to an external power supply instead of external
capacitor. And then, ratio-metric sequence is also available by changing the resistor divider ratio of external power
supply voltage. (See page 16)
6.
TSD (Thermal Shut down)
The shutdown (TSD) circuit automatically latched OFF when the chip temperature exceeds the threshold temperature
after the programmed time period elapses, thus protecting the IC against “thermal runaway” and heat damage. Since
the TSD circuit is designed only to shut down the IC in the occurrence of extreme heat, it is important that the Tj (max)
parameter should not be exceeded in the thermal design, in order to avoid potential problems with the TSD.
7.
IN
The IN line acts as the major current supply line, and is connected to the output N-channel FET drain. Since there is no
electrical connection (such as between the VCC pin and the ESD protection Diode) required, IN operates independent
of the input sequence. However, since an output N-Channel FET body diode exists between IN and OUT, a VIN-VOUT
electric (Diode) connection is present. Therefore, when output is switched ON or OFF, reverse current may flow from IN
to OUT.
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BD3550HFN
BD3551HFN
BD3552HFN
Absolute Maximum Ratings (Ta=25°C)
Parameter
Limit
Symbol
BD3550HFN
Input Voltage 1
Input Voltage 2
Enable Input Voltage
Power Dissipation 1
Power Dissipation 2
Power Dissipation 3
Operating Temperature Range
Storage Temperature Range
Maximum Junction Temperature
VCC
VIN
VEN
Pd1
Pd2
Pd3
Topr
Tstg
Tjmax
BD3551HFN
+6.0 (Note 1)
+6.0 (Note 1)
-0.3 to +6.0
0.63 (Note 2)
1.35 (Note 3)
1.75 (Note 4)
-10 to +100
-55 to +150
+150
Unit
BD3552HFN
V
V
V
W
W
W
°C
°C
°C
(Note 1) Should not exceed Pd.
(Note 2) Derate by 5.04mW/°C for Ta above 25°C (when mounted on a 70mm x 70mm x 1.6mm glass-epoxy board, 1-layer)
On less than 0.2% (percentage occupied by copper foil.
(Note 3) Derate by 10.8mW/°C for Ta above25°C (when mounted on a 70mm x 70mm x 1.6mm glass-epoxy board, 1-layer)
On less than 7.0% (percentage occupied by copper foil.
(Note 4) Derate by 14.0mW/°C for Ta bove25°C (when mounted on a 70mm x 70mm x 1.6mm glass-epoxy board, 1-layer)
On less than 65.0% (percentage occupied by copper foil.
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over
the absolute maximum ratings.
Recommended Operating Conditions (Ta=25°C)
Parameter
Input Voltage 1
Input Voltage 2
Output Voltage Setting Range
Enable Input Voltage
NRCS Capacity
Symbol
VCC
VIN
VOUT
VEN
CNRCS
Min
4.3
0.95
VFB
0
0.001
Max
5.5
VCC-1 (Note 5)
2.7
5.5
1
Unit
V
V
V
V
µF
(Note 5) VCC and IN do not have to be implemented in the order listed.
Electrical Characteristics
(Unless otherwise specified, Ta=25°C, VCC=5V, VEN=3V, VIN=1.8V, R1=3.9KΩ, R2=3.3KΩ)
Limit
Parameter
Symbol
Unit
Conditions
Min
Typ
Max
Bias Current
ICC
0.5
1.0
mA
VCC Shutdown Mode Current
IST
0
10
µA
VEN=0V
Output Voltage Temperature
Tcvo
0.01
%/°C
Coefficient
Feedback Voltage 1
VFB1
0.643
0.650
0.657
V
Feedback Voltage 2
VFB2
0.637
0.650
0.663
V
Tj=-10°C to +100°C
IOUT=0A to 1A
Load Regulation
Reg.L
0.5
10
mV
(BD3550HFN IOUT=0A to 0.5A)
Line Regulation 1
Reg.l1
0.1
0.5
%/V
VCC=4.3V to 5.5V
Line Regulation 2
Reg.l2
0.1
0.5
%/V
VIN=1.2V to 3.3V
Standby Discharge Current
IDEN
1
mA
VEN=0V, VOUT=1V
[ENABLE]
Enable Pin
VENHI
2
V
Input Voltage High
Enable Pin
VENLOW
0
0.8
V
Input Voltage Low
Enable Input Bias Current
IEN
7
10
µA
VEN=3V
[FEEDBACK]
Feedback Pin Bias Current
IFB
-100
0
+100
nA
[NRCS]
NRCS Charge Current
INRCS
14
20
26
µA
VNRCS=0.5V
NRCS Standby Voltage
VSTB
0
50
mV
VEN=0V
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BD3550HFN
BD3551HFN
BD3552HFN
Electrical Characteristics - continued
(Unless otherwise specified, Ta=25°C, VCC=5V, VEN=3V, VIN=1.8V, R1=3.9KΩ, R2=3.3KΩ)
Limit
Parameter
Symbol
Unit
Conditions
Min
Typ
Max
[UVLO]
VCC Undervoltage Lockout
VCCUVLO
3.5
3.8
4.1
V
VCC: Sweep-up
Threshold Voltage
VCC Undervoltage Lockout
VCCHYS
100
160
220
mV
VCC: Sweep-down
Hysteresis Voltage
[AMP]
Gate Source Current
IGSO
1.6
mA
VFB=0, VGATE=2.5V
Gate Sink Current
IGSI
4.7
mA
VFB=VCC, VGATE=2.5V
BD3550HFN
IOUT
0.5
A
Maximum Output
BD3551HFN
IOUT
1.0
A
Current
BD3552HFN
IOUT
2.0
A
IOUT=0.5A, VIN=1.2V,
BD3550HFN
dVOUT
200
300
mV
Ta=-10°C to +100°C
Minimum
IOUT=1.0A, VIN=1.2V,
BD3551HFN
dVOUT
200
300
mV
Dropout Voltage
Ta=-10°C to +100°C
IOUT=2.0A, VIN=1.2V,
BD3552HFN
dVOUT
200
300
mV
Ta=-10°C to +100°C
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BD3551HFN
BD3552HFN
Typical Waveforms
BD3550HFN
VOUT
50mV/div
VOUT
50mV/div
26mV
22mV
IOUT
0.5A/div
IOUT
0.5A/div
0.5A
IOUT=0A to 1A/μsec
0.5A
t(10μsec/div)
IOUT=0A to 1A/μsec
Figure 1. Transient Response
(0A to 0.5A)
COUT=100μF, CFB=1000pF
t(10μsec/div)
Figure 2. Transient Response
(0A to 0.5A)
COUT=47μF, CFB=1000pF
VOUT
50mV/div
VOUT
50mV/div
14mV
40mV
IOUT
0.5A/div
IOUT
0.5A/div
0.5A
IOUT=0A to 1A/μsec
IOUT=1A to 0A/μsec
t(10μsec/div)
Figure 3. Transient Response
(0A to 0.5A)
COUT=22μF, CFB=1000pF
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0.5A
t(100μsec/div)
Figure 4. Transient Response
(0.5 to 0A)
COUT=100μF, CFB=1000pF
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Typical Waveforms – continued
VOUT
50mV/div
VOUT
50mV/div
33mV
23mV
IOUT
0.5A/div
IOUT
0.5A/div
0.5A
IOUT=1A to 0A/μsec
t(100μsec/div)
0.5A
IOUT=1A to 0A/μsec
t(100μsec/div)
Figure 6. Transient Response
(0.5A to 0A)
COUT=22μF, CFB=1000pF
Figure 5. Transient Response
(0.5A to 0A)
COUT=47μF, CFB=1000pF
BD3551HFN
VOUT
50mV/div
VOUT
50mV/div
35mV
IOUT
1.0A/div
46mV
IOUT
1.0A/div
1.0A
IOUT=0A to 1A/μsec
t(10μsec/div)
IOUT=0A to 1A/μsec
t(10μsec/div)
Figure 8. Transient Response
(0A to 1.0A)
COUT=47μF, CFB=1000pF
Figure 7. Transient Response
(0A to 1.0A)
COUT=100μF, CFB=1000pF
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1.0A
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BD3552HFN
Typical Waveforms – continued
VOUT
50mV/div
VOUT
50mV/div
36mV
55mV
IOUT
1.0A/div
IOUT
1.0A/div
1.0A
IOUT=0A to 1A/μsec
1.0A
IOUT=1A to 0A/μsec
t(10μsec/div)
Figure 10. Transient Response
(1.0A to 0A)
COUT=100μF, CFB=1000pF
Figure 9. Transient Response
(0A to 1.0A)
COUT=22μF, CFB=1000pF
VOUT
50mV/div
IOUT
1.0A/div
VOUT
50mV/div
46mV
IOUT=0A to 1A/μ sec
IOUT=0A to 1A/μ sec
IOUT
1.0A/div
t(100μsec/div)
t(10μ sec/div)
1.0A
IOUT=1A to 0A/μsec
Figure 11. Transient Response
(1.0A to 0A)
COUT=47μF, CFB=1000pF
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56mV
t(10μ sec/div)
1.0A
IOUT=1A to 0A/μsec
t(100μsec/div)
t(100μsec/div)
Figure 12. Transient Response
(1.0A to 0A)
COUT=22μF, CFB=1000pF
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BD3552HFN
Typical Waveforms – continued
BD3552HFN
VOUT
50mV/div
VOUT
50mV/div
26mV
89mV
IOUT
2.0A/div
IOUT
2.0A/div
2.0A
IOUT=0A to 1A/μsec
2.0A
IOUT=0A to 1A/μsec
t(10μsec/div)
t(10μsec/div)
Figure 14. Transient Response
(0A to 2.0A)
COUT=47μF, CFB=1000pF
Figure 13. Transient Response
(0A to 2.0A)
COUT=100μF, CFB=1000pF
VOUT
50mV/div
VOUT
50mV/div
54mV
IOUT
2.0A/div
2.0A
117mV
IOUT
2.0A/div
2.0A
IOUT=0A to 1A/μsec
IOUT=1A to 0A/μsec
t(10μsec/div)
Figure 16. Transient Response
(2.0A to 0A)
COUT=100μF, CFB=1000pF
Figure 15. Transient Response
(0A to 2.0A)
COUT=22μF, CFB=1000pF
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t(100μsec/div)
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BD3552HFN
Typical Waveforms – continued
VOUT
50mV/div
VOUT
50mV/div
83mV
117mV
IOUT
2.0A/div
IOUT
2.0A/div
2.0A
2.0A
IOUT=1A to 0A/μsec
IOUT=1A to 0A/μsec
t(100μsec/div)
t(100μsec/div)
Figure 18. Transient Response
(2.0A to 0A)
COUT=22μF, CFB=1000pF
Figure 17. Transient Response
(2.0A to 0A)
COUT=47μF, CFB=1000pF
BD3551HFN
VEN
2V/div
VEN
2V/div
VNRCS
2V/div
VNRCS
2V/div
VOUT
1V/div
VOUT
1V/div
t(2msec/div)
t(200μ sec/div)
Figure 19. Waveform at Output Start
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Figure 20. Waveform at Output OFF
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BD3552HFN
Typical Waveforms – continued
VCC
VCC
VEN
VEN
VIN
VIN
VOUT
VOUT
VCC to VIN to VEN
VIN to VCC to VEN
Figure 21. Input Sequence
Figure 22. Input Sequence
VCC
VCC
VEN
VEN
VIN
VIN
VOUT
VOUT
VEN to VCC to VIN
VCC to VEN to VIN
Figure 23. Input Sequence
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Figure 24. Input Sequence
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Typical Waveforms – continued
VCC
VCC
VEN
VEN
VIN
VIN
VOUT
VOUT
VIN to VEN to VCC
VEN to VIN to VCC
Figure 25. Input Sequence
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Figure 26. Input Sequence
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BD3552HFN
Typical Performance Curves
1.25
0.80
0.75
Circuit Current
ICC(mA): ICC (mA)
Output Voltage
: VOUT (V)
Vo(V)
1.23
1.21
1.19
1.17
0.70
0.65
0.60
0.55
0.50
0.45
0.40
0.35
0.30
1.15
-10
10
30
50
70
Ta(℃) : Ta (°C)
Temperature
-10
90 100
10
30
50
70
90 100
Ta(℃) : Ta (°C)
Temperature
Figure 28. Circuit Current vs Temperature
Figure 27. Output Voltage vs Temperature
(IOUT=0mA)
1.2
2.0
1.9
1.0
1.8
1.7
1.6
IIN (µA)
ISTB (µA)
0.8
0.6
1.5
1.4
0.4
1.3
1.2
0.2
1.1
0.0
-60
-30
0
30
60
90
120
1.0
150
-10
Temperature : Ta (°C)
30
50
70
90
100
Temperature : Ta (°C)
Figure 29. ISTB vs Temperature
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10
Figure 30. IIN vs Temperature
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特性データ(参考データ) – 続き
25
NRCS Charge Current : INCRS (µA)
30
IINSTB (µA)
25
20
15
10
5
24
23
22
21
20
19
18
17
16
15
0
-60
-30
0
30
60
90
120
-10
150
10
Temperature : Ta (°C)
Figure 31. IINSTB vs Temperature
50
70
90
100
Figure 32. NCRS Charge Current vs Temperature
10
Enable Input Bias Current : IEN (µA)
20
Feedback Pin Bias Current : IFB (nA)
30
Temperature : Ta (°C)
15
10
5
0
-5
-10
-15
-20
9
8
7
6
5
4
3
2
1
0
-10
10
30
50
70
90
-10
100
Figure 33. Feedback Pin Bias Current vs Temperature
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10
30
50
70
90
100
Temperature : Ta (°C)
Temperature : Ta (°C)
14/26
Figure 34. Enable Input Bias Current vs Temperature
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02.Nov.2015 Rev.001
BD3550HFN
BD3551HFN
BD3552HFN
特性データ(参考データ) – 続き
Output ON-Resistance : RON (mΩ)
Output ON-Resistance : RON (mΩ)
150
140
130
120
110
100
90
-10
10
30
50
70
90
100
Input Voltage 1 : VCC (V)
Temperature : Ta (°C)
Figure 36. Output ON-Resistance vs Input Voltage 1
Figure 35. Output ON-Resistance vs Temperature
(VCC=5V/VOUT=1.2V)
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BD3552HFN
Timing Chart
EN ON/OFF
IN
VCC
EN
0.65V(typ)
NRCS
Startup
OUT
t
VCC ON/OFF
IN
UVLO
Hysteresis
VCC
EN
0.65V(typ)
NRCS
Startup
OUT
t
Tracking Sequence
1.8V Output
1.2V Output
DC/DC
(R1=3.9kΩ, R2=3.3kΩ)
NRCS
1.8V
OUT
1.2V
Tracking sequence
OUT
R2
3.3kΩ
R1
1.8V
Output
FB
3.9kΩ
1.2V
Output
Ratio-metric sequence
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BD3550HFN
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Application Information
1. Evaluation Board
■ BD3550HFN,BD3551HFN,BD3552HFN Evaluation Board Schematic
VCC
GND_S
1
8
GND
VCC
VCC
SW1
C1
R8
GND
EN
C12
GND
2
7
NRCS
C10
GND
C11
GND
U1
BD355XHFN
(HSON8)
3
6
GATE
R4
R1 GND
R2
VIN_S
4
FB GND
C13
VO_S
5
GND
VIN
Vo
C4
C7
GND
GND
C2
C3
GND
GND
C6
C5
GND
GND
R3
C8
GND
R5
GND C9
7568
4
U2
GND
VCC
321
TP2
R6
TP1
R7
JPF1
GND
GND
GND
GND
JPF2
5
2
U3
GND
4
3
R9
C14
■ BD3550HFN,BD3551HFN,BD3552HFN Evaluation Board Standard Component List
Component
Rating
Manufacturer
Product Name
Component
Rating
Manufacturer
Product Name
U1
-
ROHM
BD355XHFN
C2
22uF
KYOCERA
CM32X5R226M10A
C1
1µF
MURATA
GRM188B11A105KD
C13
1000pF
MURATA
GRM188B11H102KD
C10
0.01µF
MURATA
GRM188B11H103KD
R1
3.9kΩ
ROHM
MCR03EZPF3301
R8
0Ω
-
Jumper
R2
3.3kΩ
ROHM
MCR03EZPF3901
C5
22µF
KYOCERA
CM32X5R226M10A
■ BD3550HFN,BD3551HFN,BD3552HFN Evaluation Board Layout
(2nd layer and 3rd layer is GND Line.)
Silkscreen
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TOP Layer
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BD3550HFN
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BD3552HFN
2. Recommended Circuit Example
VCC
VEN
C1
R4
1
8
2
7
3
6
GND
C4
R1
FB
4
5
R2
C5
Vo(1.2V)
VIN
Component
R1/R2
C3
C1/ C2
Recommended
Value
3.9kΩ/3.3kΩ
22µF
1µF/22µF
C4
0.01µF
C5
-
R4
Several kΩ
to several 10kΩ
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C3
C2
Programming Notes and Precautions
IC output voltage can be set with a configuration formula using the values for the internal
reference output voltage (VFB) and the output voltage resistors (R1, R2). Select resistance
values that will avoid the impact of the FB current (±100nA). The recommended total
resistance value is 10KΩ.
To assure output voltage stability, make sure the OUT pin and the GND pins are
connected. Output capacitors play a role in loop gain phase compensation and in
minimizing output fluctuation during rapid changes in load level. Insufficient capacitance
may cause oscillation, while high equivalent series resistance (ESR) will exacerbate
output voltage fluctuation under rapid load change conditions. While a 22µF ceramic
capacitor is recomended, actual stability is highly dependent on temperature and load
conditions. Also, note that connecting different types of capacitors in series may result in
insufficient total phase compensation, thus causing oscillation. In light of this information,
please confirm operation across a variety of temperature and load conditions.
Input capacitors reduce the output impedance of the voltage supply source connected to
the (VCC, IN) input pins. If the impedance of this power supply were to increase, input
voltage (VCC, VIN) could become unstable, leading to oscillation or decreased ripple
rejection ability. While a low-ESR 1µF/22µF capacitor with minimal susceptibility to
temperature is recommended, stability is highly dependent on the input power supply
characteristics and the substrate wiring pattern. In light of this information, please confirm
operation across a variety of temperature and load conditions.
The Non Rush Current on Startup (NRCS) function is built into the IC to prevent rush
current from going through the load (IN to OUT) and affecting output capacitors at power
supply start-up. Constant current comes from the NRCS pin when EN is HIGH or the
UVLO function is deactivated. The temporary reference voltage is proportional to time,
due to the current charge of the NRCS pin capacitor, and output voltage start-up is
proportional to this reference voltage. Capacitors with low susceptibility to temperature
are recommended, in order to ensure a stable soft-start time.
This component is employed when the C3 capacitor causes, or may cause, oscillation. It
provides more precise internal phase correction.
It is recommended that a resistance (several kΩ to several 10kΩ) be put in R 4, in case
negative voltage is applied in EN pin.
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BD3550HFN
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BD3552HFN
3. Heat Loss
In thermal design consider the temperature range wherein the IC is guaranteed to operate and apply appropriate
margins. The temperature conditions that need to be considered are listed below:
(1) Ambient temperature Ta can be no higher than 100°C.
(2) Chip junction temperature (Tj) can be no higher than 150°C.
Chip junction temperature can be determined as follows:
① Calculation based on ambient temperature (Ta)
Tj Ta j a W
θj-a:HSON8 198.4°C/W 1-layer substrate (copper foil density 0.2%)
92.4°C/W 1-layer substrate (copper foil density 7%)
71.4°C/W 2-layer substrate (copper foil density 65%)
Substrate size: 70mm x 70mm x 1.6mm3 (substrate with thermal via)
It is recommended to layout the VIA for heat radiation in the GND pattern of reverse (of IC) when there is the GND
pattern in the inner layer (in using multiplayer substrate). This package is so small (size: 2.9mm x 3.0mm) that it is not
available to layout the VIA in the bottom of IC. Spreading the pattern and being increased the number of VIA as shown
in the figure below), enable to achieve superior heat radiation characteristic. (This figure is an image only. It is
recommended that the VIA size and the number is designed suitable for the actual situation.).
Most of the heat loss in BD3550HFN, BD3551HFN, BD3552HFN occurs at the output N-Channel FET. Power loss is
determined by the total IN-OUT voltage and output current. Be sure to confirm the system input and output voltage and
the output current conditions in relation to the heat dissipation characteristics of the IN and OUT in the design. Bearing
in mind that heat dissipation may vary substantially depending on the substrate employed make sure to factor
conditions such as substrate size into the thermal design.
Power consumption (W) =
Input voltage (VIN)- Output voltage (VOUT)
x IOUT(Ave)
Example) Where VIN=1.8V, VOUT=1.2V, IOUT(Ave) = 1A,
Power consumption W 1.8 V 1.2 V 1.0 A
0.6 W
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BD3550HFN
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BD3552HFN
◎HSON8
[W]
Power Dissipation [Pd]
2.0 (3) 1.75W
1.5
(1) Substrate (copper foil density: 0.2%…1-layer)
θj-a=198.4°C/W
(2) Substrate (copper foil density: 7%…1-layer)
θj-a=92.4°C/W
(3) Substrate (copper foil density: 65%…1-layer)
θj-a=71.4°C /W
(2) 1.35W
1.0
(1) 0.63W
0.5
0
0
25
50
75
100
125
Ambient Temperature [Ta]
150
[°C]
4. Reference Landing Pattern
MIE
b2
D3
e
E3
L2
(Unit: mm)
Lead pitch
Lead pitch
landing length
landing pitch
e
0.65
MIE
2.50
≥l2
0.40
b2
0.35
central pad length
central pad pitch
D3
E3
2.90
1.90
(Note) It is recommended to design suitable for the actual application.
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BD3550HFN
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BD3552HFN
I/O Equivalent Circuits
VCC
VCC
1kΩ
NRCS
1kΩ
1kΩ
1kΩ
IN
1kΩ
1kΩ
VCC
VCC
VFB
1kΩ
1kΩ
EN
OUT1
400kΩ
OUT2
50kΩ
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1kΩ
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Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply
terminals.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Thermal Consideration
Should by any chance the power dissipation rating be exceeded, the rise in temperature of the chip may result in
deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when
the IC is mounted on a 70mm x 70mm x 1.6mm glass epoxy board. In case of exceeding this absolute maximum rating,
increase the board size and copper area to prevent exceeding the Pd rating.
6.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.
The electrical characteristics are guaranteed under the conditions of each parameter.
7. Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.
Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing
of connections.
8.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject
the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should
always be turned OFF completely before connecting or removing it from the test setup during the inspection process.
To prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport
and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
11. Unused Input Terminals
Input terminals of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance
and extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input terminals should be connected to
the power supply or ground line.
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BD3550HFN
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BD3552HFN
Operational Notes - continued
12. Regarding Input Pins of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
C
E
Pin A
N
P+
P
N
N
P+
N
Pin B
B
Parasitic
Elements
N
P+
N P
N
P+
B
N
C
E
Parasitic
Elements
P Substrate
P Substrate
GND
GND
Parasitic
Elements
GND
Parasitic
Elements
GND
N Region
close-by
Figure 37. Example of Monolithic IC Structure
13. Area of Safe Operation (ASO)
Operate the IC such that the output voltage, output current, and power dissipation are all within the Area of Safe
Operation (ASO).
14. Thermal Shutdown Circuit (TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always be
within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction
temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls below the
TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from heat
damage.
BD3550HFN,BD3551HFN,BD3552HFN
TSD on temperature [°C]
(typ)
175
Hysteresis temperature [°C]
(typ)
15
15. Output Protection Diode
Please add a protection diode when a large inductance component is connected to the output terminal, and
reverse-polarity power is possible at startup or in output OFF condition.
(Example)
OUTPUT PIN
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BD3550HFN
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BD3552HFN
Ordering Information
B
D
3
5
5
Part Number
3550
3551
3552
x
H
F
N
Package
HFN
: HSON8
TR
Packaging and forming specification
TR: Emboss tape reel opposite draw-out side: 1 pin
Marking Diagrams
BD3550HFN
HSON8 (TOP VIEW)
Part Number Marking
BD3
LOT Number
5 5 0
1PIN MARK
BD3551HFN
HSON8 (TOP VIEW)
Part Number Marking
BD3
LOT Number
5 5 1
1PIN MARK
BD3552HFN
HSON8 (TOP VIEW)
Part Number Marking
BD3
LOT Number
5 5 2
1PIN MARK
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BD3552HFN
Physical Dimension, Tape and Reel Information
Package Name
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HSON8
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BD3550HFN
BD3551HFN
BD3552HFN
Revision History
Date
Revision
02.Nov.2015
001
Changes
New Release
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Datasheet
Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
(Note 1)
, transport
intend to use our Products in devices requiring extremely high reliability (such as medical equipment
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E
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Datasheet
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
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General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
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