Datasheet
Power Management IC for Automotive
Power Management IC for
ADAS Applications
BD39031MUF-C
Key Specifications
General Description
Input Voltage Range:
4.0 V to 28 V
Output Voltage:
BUCK1 Voltage
3.3 V
BUCK2 Voltage
1.2 V
BUCK3 Voltage
0.8 V to 2.5 V
BOOST4 Voltage
5.0 V
Maximum Output Current:
BUCK2, BUCK3
2.5 A
BOOST4
0.5 A
Switching Frequency:
2.2 MHz (Typ)
Standby Current:
0 μA (Typ)
Operating Ambient Temperature
Range:
-40 °C to +125 °C
BD39031MUF-C is a power management IC with Primary
Buck Controller (BUCK1), Dual Secondary Buck
Converter (BUCK2/BUCK3), and Secondary Boost
Converter (BOOST4). This device contains Reset, Power
Good, Watchdog Timer functions, and is suitable for
ADAS application such as radar, camera, and LiDAR. In
addition, this device contributes to ASIL level
improvement of the system by BIST (Built-In Self Test)
function and Mutual Monitoring function.
Features
AEC-Q100 Qualified (Note 1)
Functional Safety Supportive Automotive Products
Primary Buck Controller for 3.3 V Fixed
Secondary Buck Converter for 1.2 V Output Fixed
Secondary Buck Converter for Adjustable Output
Secondary Boost Converter for 5.0 V Output Fixed
Enable Input for Each Output
Two Power Good Functions
Reset Function for BUCK1
Adjustable Window Watchdog Timer
Spread Spectrum
Over Current Protection
Over Voltage Protection
Short Circuit Protection
Thermal Shut Down Protection
Thermal Warning Function
Special Characteristics
Output Voltage Accuracy:
BUCK1 VO1 Voltage
BUCK2 VO2 Voltage
BUCK3 FB Voltage
BOOST4 VO4 Voltage
Package
±1.5 %
±1.5 %
±1.5 %
±2.0 %
W (Typ) x D (Typ) x H (Max)
6.0 mm x 6.0 mm x 1.0 mm
VQFN40FV6060
(Note 1) Grade 1
Close-up
Applications
ADAS Application (Radar Module, Camera Module,
LiDAR Module, etc.)
ADAS ECU
VQFN40FV6060
Wettable Flank Package
Typical Application Circuit
Battery
VCC
BOOT1
EN1
VREG
VGH1
SW1
VO1
VGL1
CSN
VO1
COMP1
PGND1S
PGND1
RT
VREG
VS2
SSCGEN
VO2
VO2
VO3
VO3
VO1
BD39031MUF-C
SW2
SW2
VO2
PGND2
FB3
VS3
VO3S
SW3
SW3
VO3
PGND3
VO4
VO4
SW4
VO4
EN2
EN3
EN4
SYNC
WDEN
WDIN
RTW
〇Product structure : Silicon integrated circuit
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PGND4
XRSTOUT
PGOOD1
PGOOD2
XTWOUT
GND
〇This product has no designed protection against radioactive rays.
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Contents
General Description ................................................................................................................................................................ 1
Features ................................................................................................................................................................................. 1
Applications ............................................................................................................................................................................ 1
Key Specifications................................................................................................................................................................... 1
Package ................................................................................................................................................................................. 1
Typical Application Circuit ........................................................................................................................................................ 1
Pin Configurations................................................................................................................................................................... 3
Pin Descriptions ...................................................................................................................................................................... 4
Block Diagrams....................................................................................................................................................................... 5
Description of Blocks............................................................................................................................................................... 8
Absolute Maximum Ratings ................................................................................................................................................... 17
Thermal Resistance .............................................................................................................................................................. 17
Recommended Operating Conditions .................................................................................................................................... 18
Electrical Characteristics ....................................................................................................................................................... 18
Typical Performance Curves .................................................................................................................................................. 22
Timing Chart ......................................................................................................................................................................... 29
Application Example.............................................................................................................................................................. 34
Selection of Components Externally Connected ..................................................................................................................... 35
Operational Notes ................................................................................................................................................................. 46
Ordering Information ............................................................................................................................................................. 48
Marking Diagrams ................................................................................................................................................................. 48
Physical Dimension and Packing Information ......................................................................................................................... 49
Revision History .................................................................................................................................................................... 50
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Pin Configurations
TOP VIEW
VO2
PGND2
SW2
SW2
VS2
VS3
SW3
SW3
PGND3
FB3
EXP-PAD
30
29
28
27
26
25
24
23
22
21
EXP-PAD
EN2 31
20 VO3S
EN3 32
19 RTW
EN4 33
18 SYNC
WDEN 34
17 GND
WDIN 35
16 COMP1
SSCGEN 36
15 VO1
XRSTOUT 37
14 PGND1
PGOOD1 38
13 PGND1S
EXP-PAD
PGOOD2 39
12 CSN
XTWOUT 40
11 VGL1
EXP-PAD
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Pin Descriptions
Pin No.
Pin Name
Function
1
PGND4
2
SW4
BOOST4 switching node.
3
VO4
4
VREG
BOOST4 feedback pin. Connect to VO4 output voltage.
Internal regulator of 5 V output. Connect output capacitor.
Can’t be used for external power supply.
Switching frequency set pin. Connect resistor between RT and GND.
Power ground of BOOST4 converter.
5
RT
6
VCC
7
EN1
8
BOOT1
9
SW1
BUCK1 switching node. (Floating ground for high side FET)
10
VGH1
BUCK1 gate driver for high side FET.
Power supply.
Enable input for internal reference circuit and BUCK1. Controlled by external microcomputer or
pulled up to VCC.
BUCK1 power supply for high side FET. Connect capacitor between BOOT1 and SW1.
11
VGL1
BUCK1 gate driver for low side FET.
12
CSN
Differential current sense for BUCK1. Connect resistor between CSN and PGND1S.
13
PGND1S
Differential current sense for BUCK1. Connect resistor between CSN and PGND1S.
14
PGND1
15
VO1
16
COMP1
17
GND
18
SYNC
19
RTW
Analog ground.
Synchronization input pin. This pin can be driven by external clock to set desired switching
frequency.
WDT frequency setting pin. Put resistor between the RTW pin and GND.
20
VO3S
BUCK3 input for external sense voltage of VO3.
21
FB3
22
PGND3
23
SW3
BUCK3 switching node.
24
SW3
BUCK3 switching node.
25
VS3
Power supply for BUCK3. Connect to VO1 output voltage.
26
VS2
Power supply for BUCK2. Connect to VO1 output voltage.
27
SW2
BUCK2 switching node.
28
SW2
BUCK2 switching node.
29
PGND2
30
VO2
BUCK2 feedback pin.
31
EN2
Enable pin for BUCK2.
32
EN3
Enable pin for BUCK3.
33
EN4
Enable pin for BOOST4.
34
WDEN
Enable pin for WDT.
35
WDIN
Clock input pin for WDT.
Power ground of BUCK1.
BUCK1 feedback pin.
Error amplifier output for BUCK1 controller.
BUCK3 feedback pin. Input external resistance division between output and GND.
Power ground for BUCK3.
Power ground for BUCK2.
36
SSCGEN
Enable pin for Spread Spectrum function. Connect to VREG or GND.
37
XRSTOUT
Reset Nch open drain output pin.
38
PGOOD1
Power Good Nch open drain output pin for BUCK2.
39
PGOOD2
Power Good Nch open drain output pin for all outputs.
40
XTWOUT
-
EXP-PAD
Thermal warning Nch open drain output pin.
The EXP-PAD of the center of product is connected to PCB ground plane.
The EXP-PADs on the center and corner of the product are shorted inside the package.
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Block Diagrams
VREG
VO4
VCC
VS2
EN1
VREF1
VREF1
UVLO
VREG
VCCUVLO
UVLO
VS2UVLO
VS3
VREF2
VREF2
UVLO
TSD
TSDR /
TSWR
VREGUVLO
UVLO
VS3UVLO
VO4
VO1
VO1RST
VO1RST
UVLO
VO4UVLO
CTL1/CTL2/CTL3/CTL4
VO1
CONTROL
LOGIC
EN2
CLK1/CLK2/CLK3/CLK4
VCCUVLO
VREGUVLO
VO1
VS2UVLO/VS3UVLO/VO4UVLO
EN3
VO1RST
OVDx
UVDx
OVPx
SCPx
OCPx
TSDx/TSWx
VO1
EN4
CLKDET
VO1
BIST
SYNC
RT
VREG
XTWOUT
DCDC
OSC
TW
SSCGEN
XRSTOUT
VO1
RESET
WDIN
VO1
PGOOD1
WDT
WDEN
RTW
PGOOD
WDTOSC
PGOOD2
LOGIC
OSC
VO1
COMP1
BOOT1
VGH1
SW1
VGL1
PGND1
CSN
PGND1S
VO4
SW4
PGND4
CTL1
CLK1
CTL2
BUCK1
CTL4
CLK4
CLK2
BUCK2
CTL3
BOOST4
CLK3
BUCK3
VS2
VO2
SW2
SW2
PGND2
VS3
FB3
VO3S
SW3
SW3
PGND3
GND
Figure 1. Top Block Diagram
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Block Diagrams - continued
DRV
VO1
VREG
CLAMPER
BOOT1
BOOTDRV
GMAMP1
VREF1
GMAMP2
+
+
VC
+
PWMCOMP
VGH1
-
-
DRV
LOGIC
+
VREG
CLK1
SW1
VGL1
OVP1
CLK1
SS
SLOPE
PGND1
COMP1
OCP1
CSN
CUR
SENSE
PGND1S
VO1
VREF2
OVP1
+
OVD1
+
VREF2
-
Discharge
PGND1
VREF2
SCP1
-
UVD1
-
VREF2
+
+
Figure 2. BUCK1 Block Diagram
DRV
CLK2
CUR
SENSE
SLOPE
VO2
VS2
OCPH2
ERRAMP
VREF1
PWMCOMP
+
+
+
DRV
LOGIC
CLK2
PGND2
VS2
OVP2
OCPH2 / OCPL2
SS
SW2
Discharge
PGND2
OCPL2
VREF2
+
OVP2
VREF2
-
+
OVD2
OCPL
TSD
VREF2
-
SCP2
+
VREF2
-
TSD2
TSW2
UVD2
+
Figure 3. BUCK2 Block Diagram
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Block Diagrams - continued
DRV
CLK3
CUR
SENSE
SLOPE
VS3
OCPH3
ERRAMP
FB3
PWMCOMP
+
+
VREF1
+
DRV
LOGIC
CLK3
PGND3
OVP3
OCPH3 / OCPL3
SS
SW3
VS3
Discharge
PGND3
OCPL3
VO3S
VREF2
+
OVP3
+
VREF2
-
OVD3
OCPL
TSD3
TSD
VREF2
SCP3
-
-
VREF2
+
TSW3
UVD3
+
Figure 4. BUCK3 Block Diagram
VO4
DRV
ERRAMP
VREF1
VREG
PWMCOMP
+
+
SW4
+
CLK4
DRV
LOGIC
OVP4
OCP4
PGND4
SS
CLK4
SLOPE
OCP4
VREF2
+
OVP4
VREF2
-
+
CUR
SENSE
OVD4
TSD
VREF2
+
SCP4
VREF2
-
TSD4
TSW4
UVD4
+
Figure 5. BOOST4 Block Diagram
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Description of Blocks
1.
TOP BLOCK
Reference Voltage (VREF1, VREF2)
There are 2 reference voltages; VREF1 and VREF2.
VREF1 is used for each regulator control reference voltage and VREF2 is used for each protection function reference
voltage.
After VCC input, VREF1 and VREF2 will startup when EN1 is turned to high. VREF1 and VREF2 will stop when EN1 is
turned to low.
Internal Regulator (VREG)
VREG is 5 V (Typ) regulator for internal circuit. Needs to connect external capacitor to the VREG pin. After VCC input,
VREG will startup when EN1 is turned to high. VREG will stop when EN1 is turned to low. Do not use VREG for any other
purposes. Also internal regulator will be switched to VO4 after VO4 output becomes more than 4.5 V (Typ) and soft start of
BOOST4 is completed.
Under Voltage Lock-Out (UVLO)
UVLO is under voltage lockout circuit. Prevents internal circuit malfunction when power supply startup or is at lower input
voltage. Monitors VCC, VREG, VS2, VS3, and VO4 voltage and activates when each voltage goes under each threshold
voltage. When VCCUVLO or VREGUVLO is detected, all the outputs will turn off. When VS2UVLO is detected, BUCK2 will
turn off. When VS3UVLO is detected, BUCK3 will turn off. When VO4UVLO is detected, BOOST4 will turn off.
Oscillator (LOGICOSC, WDTOSC, DCDCOSC)
There are 3 types of oscillator. One for Control Logic, the second for Watch Dog Timer and the third for BUCK1, BUCK2,
BUCK3 and BOOST4. BUCK3 clock phase is 180 deg shifted from BUCK1, BUCK2 and BOOST4 to reduce switching
noise. Connect 9.1 kΩ between RT and GND.
Spread Spectrum Clock Generator (SSCG)
OSC block built in spread spectrum clock generator (SSCG) function. This function activates when the SSCGEN pin is
connected to VREG. When the SSCGEN pin is connected to GND, SSCG function is disable. The modulation range of
Spread Spectrum is between +6.2% (Typ) and -6.2% (Typ) from the typical frequency. Also, modulation frequency is set
to 1.075 kHz (Typ). The modulation range and modulation frequency are fixed.
Synchronization mode (SYNC)
Switching frequency can be synchronized to an external clock signal using the SYNC pin. The SYNC pin allows the
operating frequency to be varied above and below the frequency setting. Adjustment range is from +10 % to -10 %. The
RT resistor must always be connected to initialize the operating frequency.
Control Logic (CONTROL LOGIC)
This block controls startup/stop sequence, Reset, Power Good, Watch Dog Timer, mutual monitoring function, Built-In Self
Test (BIST), and each protection. Control Logic will be active when internal power supply VREGUVLO is released. When
VREGUVLO is detected, Control Logic will reset and initialize.
Reset (RESET)
This block informs output voltage for microcomputer which is completely ON by reset signal. Pull up this pin to VO1 or
external power supply using resistor. The XRSTOUT pin goes low when internal circuit is in abnormal conditions. The
XRSTOUT pin goes high when all the following conditions are satisfied.
a) VO1 voltage is higher than 2.6 V (Typ)
b) BIST result are OK
c) Mutual monitoring result are OK
d) No detection of WDT FAST Timeout / SLOW Timeout
XRSTOUT goes High 10 ms (Typ) after all conditions are satisfied.
Power Good (PGOOD)
This block informs whether each regulator output startups normally or not. Power Good have UVD and OVD for each
regulator and asserts it by Power Good pin. Pull up this pin to VO1 or to external power supply using resistor.
This product has 2 Power Good pins. Each pin monitors the following regulator.
・PGOOD1
: Only BUCK2
・PGOOD2
: BUCK1, BUCK2, BUCK3, and BOOST4
PGOOD1, PGOOD2 goes High 10 ms (Typ) after all conditions are satisfied.
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TOP BLOCK - continued
Built-In Self Test (BIST)
When VCCUVLO and VREGUVLO are released, and VO1 voltage is higher than 2.6 V (Typ), BIST is performed and
self-test for each OVD/UVD and RESET comparators are executed to check if each comparator correctly toggles their
high/low output based on input voltage change. Once BIST ends without any error, the XRSTOUT pin becomes high. If
an error is found during BIST, the XRSTOUT pin keeps low and BIST is repeated until it passes.
Clock Mutual Detect (CLKDET)
CLKDET block monitors each clock outputted from each OSC blocks mutually. If any one of their frequency exceeds
range, XRSTOUT goes low.
Thermal Warning (TW)
This block monitors internal temperature and detect when it reaches 135 degree (Typ). Pull up this pin to VO1 or external
power supply using resistor. The XTWOUT pin goes Low when internal temperature is higher than threshold.
The XTWOUT pin goes High when internal temperature is lower than threshold. This block only warns of internal
temperature getting high. Hence, all function works normally even with this function detected. Thermal Warning function
works when VCCUVLO, VREGUVLO, and Reset function are not detected. When it is not working, the XTWOUT pin is
kept at high level.
2.
BUCK1 BLOCK
BUCK1 is Primary Buck Controller. It is necessary to connect external MOSEFT. Output voltage is 3.3 V (Typ) fixed.
・GMAMP1
Error amplifier which have reference voltage VREF1 and VO1 divider input.
Also phase compensation of BUCK1 can be adjust by inserting capacitor and resistor to the COMP1 pin.
・GMAMP2
Error amplifier which have output of GMAMP1 and current sense signal input. This block generates the VC
voltage to control duty.
・SS
Soft Start (SS) function prevent overshoot of output voltage and rush current by gradually increasing ON
duty of switching pulse. Soft start time is fixed internally.
・CLAMPER
CLAMPER limits the maximum and minimum value of coil current and works as over current protection.
When coil current reaches maximum value, it makes duty small and reduces the output voltage. Similarly,
when coil current reaches and minimum value, it increases duty and raise the output voltage.
・CURSENSE
Detects the amount of current flowing through the inductance using resistor which is connected between the
CSN pin and the PGND1S pin, and feedbacks current sense signal to GMAMP2.
・SLOPE
This is the block which makes slope waveform from clock generated at OSC block. This slope waveform is
combined with current sense and sends to PWMCOMP.
・PWMCOMP
This compares slope waveform including current information with GMAMP2 output, and sends output signal
to DRV block.
・DRV
BUCK1 Driver block. Drives external FET which is connect to VGH1 and VGL1 by using signal from
PWMCOMP.
Pulse Skip Function
BUCK1 controller needs on time for low side FET to charge the BOOT1 pin, because high side FET is
driven by boot strap. Therefore, it sets minimum off time, and the output voltage is limited by this in the
condition where the input and output voltage are close
As for this countermeasure, DRV skips off pulse when the voltage difference of the input and output
becomes small, and continuously turns on high side FET and keeps max duty to rise. The off pulse skip
will occer 4 consectutive times as maximum.
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Description of Blocks - continued
3.
BUCK2 BLOCK
BUCK2 is Secondary Buck converter. Output voltage is 1.2 V (Typ) fixed. EN2 = High turns on BUCK2 and EN2 = Low turns
off BUCK2.
・ERRAMP
・SS
・SLOPE
・PWMCOMP
・DRV
4.
Error Amplifier with reference voltage and VO2 divider input.
Controls on duty width of switching pulse by internal COMP2 node which is an ERRAMP output.
Capacitor and resistor for phase compensation are fixed.
Soft Start (SS) function prevent overshoot of output voltage and rush current by gradually increasing on duty
of switching pulse. Soft start time is fixed internally.
This is the block which makes slope waveform from clock generated at OSC block. This slope waveform is
combined with current sense and is sent to PWMCOMP.
This compares slope waveform including current information with ERRAMP output, and sends output signal
to DRV block.
BUCK2 Driver block. Drives internal FET by using signal from PWMCOMP.
BUCK3 BLOCK
BUCK3 is Secondary Buck converter. Output voltage can be set by external resistor. EN3 = High turns on BUCK3 and EN3 =
Low turns off BUCK3.
・ERRAMP
・SS
・SLOPE
・PWMCOMP
・DRV
5.
Error Amplifier with reference voltage and FB3 input.
Controls on duty width of switching pulse by internal COMP3 node which is an ERRAMP output.
Capacitor and resistor for phase compensation are fixed.
Soft Start (SS) function prevent overshoot of output voltage and rush current by gradually increasing on duty
of switching pulse. Soft start time is fixed internally.
This is the block which makes slope waveform from clock generated at OSC block. This slope waveform is
combined with current sense and is sent to PWMCOMP.
This compares slope waveform including current information with ERRAMP output, and sends output signal
to DRV block.
BUCK3 Driver block. Drives internal FET by using signal from PWMCOMP.
BOOST4 BLOCK
BOOST4 is Secondary Boost converter. Output voltage is 5.0 V (Typ) fixed. EN4 = High turns on BOOST4 and EN4 = Low
turns off BOOST4.
・ERRAMP
・SS
・SLOPE
・PWMCOMP
・DRV
Error Amplifier with reference voltage and VO4 divider input.
Controls on duty width of switching pulse by internal COMP4 node which is an ERRAMP output.
Capacitor and resistor for phase compensation are fixed.
Soft Start (SS) function prevent overshoot of output voltage and rush current by gradually increasing on duty
of switching pulse. Soft start time is fixed internally.
This is the block which makes slope waveform from clock generated at OSC block. This slope waveform is
combined with current sense and is sent to PWMCOMP.
After compared with slope waveform which has been combined with current sense and ERRAMP output,
sends signal to DRV block.
BOOST4 Driver block. Drives internal FET by using signal from PWMCOMP.
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Description of Blocks - continued
6.
Detection Function
Over Voltage Detection (OVD)
If output voltage goes higher than threshold voltage, OVD is detected and the PGOOD pin goes down to low. Detection
pins are VO1, VO2, FB3, and VO4. If VO2 detects OVD, PGOOD1 goes down to low and if either VO1, VO2, FB3, or VO4
detects OVD, PGOOD2 goes down to low.
Under Voltage Detection (UVD)
If output voltage goes lower than threshold voltage, UVD is detected and the PGOOD pin goes down to low. Detection pins
are VO1, VO2, FB3 and VO4. If VO2 detects UVD, PGOOD1 goes down to low and if either VO1, VO2, FB3, or VO4
detects UVD, PGOOD2 goes down to low.
7.
Protection Function
Over Voltage Protection (OVP)
If output voltage goes higher than threshold voltage, OVP is detected and switching will turn off. Detection pins are VO1,
VO2, VO3S, and VO4. If OVP is detected for continuous 1ms (Typ), switching will turn off and soft start will discharge. After
that, output continues to stop for 10 ms (Typ) and re-starts automatically by soft start.
Short Circuit Protection (SCP)
When output voltage is shorted to GND (or when output voltage is lower than SCP threshold voltage) for 1 ms (Typ),
switching will turn off and soft start will discharge. After that, output continues to stop for 10 ms (Typ) and re-starts
automatically by soft start. Detection pins are VO1, VO2, VO3S, and VO4.
Before each voltage startups, or are in soft start status, SCP function is masked.
Over Current Protection (OCP)
When over current goes through output FET, over current protection will be detected and output pulse width will be limited.
For BUCK1, over current protection will be detected when the voltage between CSN and PGND1S goes more than 75 mV
(Typ).
For BUCK2 and BUCK3, over current protection will be detected when current goes through more than 3.0 A to integrated
FET. For BOOST4, over current protection will be detected when current goes through more than 1.0 A to integrated FET.
When OCP is detected continuously for more than 1 ms (Typ), switching will turn off and soft start will discharge.
However, time counter is not stated until soft start of each output is completed.
After turn off by OCP, output continues to stop for 10 ms (Typ) and re-starts automatically by soft start.
BUCK1 OCP
BUCK1 contains OCP detection function to protect FET. To prevent destruction between source and drain of high side FET,
when SW1 voltage falls 0.35 V lower than VCC (Typ), high side FET keeps to turn off.
OCPL2/OCPL3
These OCP watches the negative current of low side FET. This is designed to protect lower FET when output is applied
from outside. If OCPL2 or OCPL3 detects, each low side FET will turn off. At the time of BUCK2 and BUCK3 startup,
detection level of OCPL2/OCPL3 is at lower setting than normal operation for stable startup of the system.
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Protection Function - continued
Protection
The value in this list is typical unless otherwise specified.
Block
ALL
BUCK1
Protection
Detect
Release
Detection action
VCCUVLO
VCC < 3.8 V
VCC > 4.2 V
BUCK1, BUCK2, BUCK3, BOOST4 OFF
XRSTOUT = PGOOD1 = PGOOD2 = Low
VREGUVLO
VREG < 3.5 V
VREG > 3.6 V
BUCK1, BUCK2, BUCK3, BOOST4 OFF
Internal OSC OFF
XRSTOUT = PGOOD1 = PGOOD2 = Low
TSD
Tj > 175 °C
-
BUCK1, BUCK2, BUCK3, BOOST4 OFF
After 10 ms, re-startup
BUCK1 VGH = Low, VGL = Low
Detected continuous 1 ms, BUCK1, BUCK2, BUCK3,
BOOST4 OFF
After 10 ms, re-startup
Detected continuous 1 ms, BUCK1, BUCK2, BUCK3,
BOOST4 OFF
After 10 ms, re-startup
Pulse width will be limited
Detected continuous 1 ms, BUCK1, BUCK2, BUCK3,
BOOST4 OFF
After 10 ms, re-startup
OVP1
VVO1 > 4.25 V
VVO1 < 4.0 V
SCP1
VVO1 < 1.65 V
VVO1 > 1.815 V
OCP1
VCSN - VPGND1S
> 75 mV
VCSN - VPGND1S
< 75 mV
VS2UVLO
VS2 < 2.5 V
VS2 > 2.7 V
OVP2
VVO2 > 1.44 V
VVO2 < 1.32 V
SW2 Hiz
Detected continuous 1 ms, BUCK2 OFF,
After 10 ms, re-startup
SCP2
VVO2 < 0.60 V
VVO2 > 0.72 V
Detected continuous 1 ms, BUCK2 OFF,
After 10 ms, re-startup
OCP2
IVS2 > 3.0 A (Min)
IVS2 < 3.0 A (Min)
Pulse width will be limited
Detected continuous 1 ms, BUCK2 OFF,
After 10 ms, re-startup
VS3UVLO
VS3 < 2.5 V
VS3 > 2.7 V
OVP3
VVO3S > 0.96 V
VVO3S < 0.88 V
SW3 Hiz
Detected continuous 1 ms, BUCK3 OFF,
After 10 ms, re-startup
SCP3
VVO3S < 0.40 V
VVO3S > 0.48 V
Detected continuous 1 ms, BUCK3 OFF,
After 10 ms, re-startup
OCP3
IVS3 > 3.0 A (Min)
IVS3 < 3.0 A (Min)
Pulse width will be limited
Detected continuous 1 ms, BUCK3 OFF,
After 10 ms, re-startup
VO4UVLO
VVO4 < 1.8 V
VVO4 > 2.0 V
BOOST4 OFF
OVP4
VVO4 > 6.5 V
VVO4 < 6.25 V
SW4 Hiz
Detected continuous 1 ms, BOOST4 OFF,
After 10 ms, re-startup
SCP4
VVO4 < 2.5 V
VVO4 > 3.0 V
Detected continuous 1 ms, BOOST4 OFF,
After 10 ms, re-startup
OCP4
ISW4 > 1.0 A (Min)
ISW4 < 1.0 A (Min)
Pulse width will be limited
Detected continuous 1 ms, BOOST4 OFF,
After 10 ms, re-startup
BUCK2
BUCK3
BOOST4
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BUCK2 OFF
BUCK3 OFF
TSZ02201-0A2A0AP00440-1-2
05.Mar.2020 Rev.001
BD39031MUF-C
Description of Blocks - continued
8.
Watchdog Timer (WDT)
Watch Dog Timer (WDT) monitors microprocessor's operation by detecting the time between rising edge of WDIN signal.
When both WDEN and XRSTOUT are high, WDT is activated. If BIST result is an error, WDT will not work for XRSTOUT is
kept low.
As long as the period of WDIN clock is kept within "Trigger Open Window" as in Figure 6., WDT will not detect any error and
XRSTOUT will stay at high.
WDT Start from rising edge of WDIN
Detection guaranteed
WDIN
WDT
FAST Timeout
Detection guaranteed
WDT
Trigger open window
WDT
SLOW Timeout
t [ms]
tWF (min)
tWF (max)
tWOK (typ)
tWS (min)
tWS (max)
Figure 6. WDT Window Description
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BD39031MUF-C
Watchdog Timer - continued
WDT FAST Timeout Detection
When WDEN is low, WDT is disabled. During this period WDIN input signal is ignored and XRSTOUT output is not affected.
When both WDEN and XRSTOUT are high, WDT is activated. Just after WDT is active during this first period, only SLOW
Timeout detection works and FAST Timeout doesn't work. The rising edge of WDIN comes within SLOW Timeout, both FAST
Timeout and SLOW Timeout detection start to work. WDT detection monitors the time between this rising edge and the next
rising edge. When it detects WDIN rising edge within FAST Timeout (tWF), XRSTOUT becomes low. XRSTOUT goes back to
high after 10 ms delay. Then, WDT works after 500 ms delay again. This delay time is implemented as a time for
microprocessor to be reset normally and to stabilized. If this time is unnecessary and WDT should be activated as soon as
possible, WDEN may be controlled from low to high.
FAST Timeout
Ignore
Ignore
OK
OK
OK
FAST Timeout
OK
Ignore
OK
OK
OK
Ignore
Ignore
Ignore
WDIN
EN ON
EN OFF EN ON
EN OFF
WDEN
Ignore
O.K.
SLOW
Timeout
SLOW
Timeout
O.K.
O.K.
SLOW
Timeout
tWS
Only SLOW Timeout is monitored for
the first edge right after WDEN=H
FAST
Timeout
FAST
Timeout
SLOW
Timeout
O.K.
O.K.
SLOW
Timeout
FAST
Timeout
O.K.
SLOW
Timeout
tWF
FAST
Timeout
tWS
FAST
Timeout
O.K.
FAST
Timeout
O.K.
SLOW
Timeout
SLOW
Timeout
O.K.
FAST
Timeout
SLOW
Timeout
O.K.
SLOW
Timeout
tRSTL
10ms
tRSTL
10ms
XRSTOUT
500ms
WDT function
Disenable
Enable
Disenable
500ms
Enable
Disenable
Enable
Disenable
Figure 7. WDT FAST Timeout detection
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TSZ02201-0A2A0AP00440-1-2
05.Mar.2020 Rev.001
BD39031MUF-C
Watchdog Timer - continued
WDT SLOW Timeout Detection
When WDEN is low, WDT is disabled. During this period WDIN input signal is ignored and XRSTOUT output is not affected.
When both WDEN and XRSTOUT are high, WDT is activated. Just after WDT is active during this first period, only SLOW
Timeout detection works and FAST Timeout doesn't work. The rising edge of WDIN comes within SLOW Timeout, both FAST
Timeout and SLOW Timeout detection start to work. WDT detection monitors the time between this rising edge and the next
rising edge. When it can't detect WDIN rising edge within SLOW Timeout (tWS), XRSTOUT becomes low. XRSTOUT goes
back to high after 10 ms delay. Then, WDT works after 500 ms delay again. This delay time is implemented as a time for
microprocessor to be reset normally and to stabilized. If this time is unnecessary and WDT should be activated as soon as
possible, WDEN may be controlled from low to high.
Ignore
Ignore
OK
OK
SLOW Timeout
OK
Ignore
SLOW Timeout
OK
Ignore
OK
OK
Ignore
Ignore
Ignore
WDIN
EN ON
EN OFF EN ON
EN OFF
WDEN
Ignore
SLOW
Timeout
O.K.
SLOW
Timeout
O.K.
SLOW
Timeout
O.K.
tWS
Only SLOW Timeout is monitored for
the first edge right after WDEN=H
FAST
Timeout
O.K.
FAST
Timeout
SLOW
Timeout
O.K.
SLOW
Timeout
FAST
Timeout
O.K.
SLOW
Timeout
tWF
FAST
Timeout
tWS
FAST
Timeout
O.K.
FAST
Timeout
O.K.
SLOW
Timeout
SLOW
Timeout
O.K.
SLOW
Timeout
tRSTL
10ms
tRSTL
10ms
XRSTOUT
500ms
WDT function
Disenable
Enable
Disenable
500ms
Enable
Disenable
Enable
Disenable
Figure 8. WDT SLOW Timeout Detection
SLOW Timeout
SLOW Timeout
Ignore
SLOW Timeout
WDIN
SLOW Timeout
WDEN
O.K.
SLOW
Timeout
O.K.
tWS
Enable
Disenable
SLOW
Timeout
O.K.
tRSTL
10ms
500ms
Enable
Disenable
SLOW
Timeout
tWS
tRSTL
10ms
500ms
Disenable
O.K.
tWS
tRSTL
10ms
XRSTOUT
WDT function
SLOW
Timeout
tWS
tRSTL
10ms
500ms
Enable
Disenable
Enable
Disenable
Figure 9. XRSTOUT Behavior with Continuous WDT Timeout Detection
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TSZ02201-0A2A0AP00440-1-2
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BD39031MUF-C
WDT SLOW timeout detection – continued
The window time for detection can be changed by the resistor value between RTW and GND. Following figure shows the
detection time determined by RRTW resistor value. Refer to a table of electric characteristic regarding an accuracy. Customer
can choose the value ranging from 10 kΩ to 47 kΩ according to their clock frequency. The ratio for detection time is fixed and
can be shown like this, FAST Timeout: SLOW Timeout = 1: 4.
RRTW vs Detection Time
250
225
SLOW Timeout Detection
Guaranteed Area
200
Detection Time [ms]
175
SLOW Timeout
Detection Time
150
125
100
WDT OK Area
75
50
FAST Timeout
Detection Time
25
FAST Timeout Detection
Guaranteed Area
0
10
15
20
25
30
35
40
45
RRTW [kΩ]
Figure 10. Detection time vs RRTW resistance
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TSZ02201-0A2A0AP00440-1-2
05.Mar.2020 Rev.001
BD39031MUF-C
Absolute Maximum Ratings
Parameter
Symbol
Rating
Unit
VCC
-0.3 to +42
V
VS2, VS3
-0.3 to +6
V
-0.3 to +42
V
-0.3 to +7
V
VO1 Voltage
VEN1
VEN2, VEN3,
VEN4
VVO1
-0.3 to +7
V
VO2 Voltage
VVO2
-0.3 to VREG +0.3
V
FB3 Voltage
VFB3
-0.3 to VREG +0.3
V
VO3S Voltage
VVO3S
-0.3 to VREG +0.3
V
VO4 Voltage
VVO4
-0.3 to +7
V
VPGND1S, VCSN
-0.3 to +0.3
V
SYNC Voltage
VSYNC
-0.3 to +6
V
WDEN Voltage
VWDEN
-0.3 to +6
V
VCC Voltage
VS2, VS3 Voltage
EN1 Voltage
EN2, EN3, EN4 Voltage
PGND1S, CSN Voltage
WDIN Voltage
SSCGEN Voltage
XRSTOUT, PGOOD1, PGOOD2, XTWOUT Voltage
Maximum Junction Temperature
Storage Temperature Range
VWDIN
-0.3 to +6
V
VSSCGEN
VXRSTOUT
VPGOOD1
VPGOOD2
VXTWOUT
Tjmax
-0.3 to VREG +0.3
V
-0.3 to +7
V
150
°C
Tstg
-55 to +150
°C
Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is
operated over the absolute maximum ratings.
Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the
properties of the chip. In case of exceeding this absolute maximum rating, design a PCB boards with thermal resistance taken into consideration by
increasing board size and copper area so as not to exceed the maximum junction temperature rating.
Thermal Resistance (Note 1)
Parameter
Symbol
Thermal Resistance (Typ)
1s
(Note 3)
2s2p
(Note 4)
Unit
VQFN40FV6060
Junction to Ambient
Junction to Top Characterization Parameter
(Note 2)
θJA
83.7
27.0
°C/W
ΨJT
8.0
4.0
°C/W
(Note 1) Based on JESD51-2A (Still-Air).
(Note 2) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside surface
of the component package.
(Note 3) Using a PCB board based on JESD51-3.
(Note 4) Using a PCB board based on JESD51-5, 7.
Layer Number of
Measurement Board
Single
Material
Board Size
FR-4
114.3 mm x 76.2 mm x 1.57 mmt
Top
Copper Pattern
Thickness
Footprints and Traces
70 μm
Layer Number of
Measurement Board
4 Layers
Material
Board Size
FR-4
114.3 mm x 76.2 mm x 1.6 mmt
Thermal Via(Note 5)
Pitch
Diameter
1.20 mm
Φ0.30 mm
2 Internal Layers
Bottom
Top
Copper Pattern
Thickness
Copper Pattern
Thickness
Copper Pattern
Thickness
Footprints and Traces
70 μm
74.2 mm x 74.2 mm
35 μm
74.2 mm x 74.2 mm
70 μm
(Note 5) This thermal via connects with the copper pattern of all layers.
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05.Mar.2020 Rev.001
BD39031MUF-C
Recommended Operating Conditions
Parameter
Symbol
Min
Typ
Max
Unit
VCC
4
12
28
V
Supply Voltage 2
VS2, VS3
3.0
3.3
5.5
V
VO2/VO3 Output Current
IVO2, IVO3
-
-
2.5 (Note 7)
A
(Note 7)
A
Supply Voltage 1
(Note 6)
SW4 Current
ISW4
-
-
1.0
SYNC Input Frequency
fSYNC
1.9
2.2
2.5
MHz
SYNC Input Duty Cycle
DSYNC
40
50
60
%
WDIN Input Frequency
fWDIN
10
-
50
Hz
WDIN Minimum ON Pulse/OFF Pulse
tWDP
-
-
100
µs
VO3 Output Voltage Range
VVO3
0.8
-
2.5
V
Operating Ambient Temperature
Topr
-40
+25
+125
°C
(Note 6) Initial startup is over 4.5 V.
(Note 7) ASO should not be exceeded
Electrical Characteristics
(Unless otherwise specified VCC = 12 V, VS2 = VS3 = 3.3 V, Tj = -40 °C to +150 °C)
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
Standby Current 1
Ist1
-
0
10
µA
VEN1 = 0 V, Tj = 25 °C
Standby Current 2
Ist2
-
-
50
µA
Circuit Current
IVCC
-
5
-
mA
All
VREG
4.6
5.0
5.4
V
VEN1 = 0 V, Tj = 125 °C
VEN1 = 12 V,
VEN2 = VEN3 = VEN4 = 3.3 V
Non-switching current
IVREG = -10 mA
VCC UVLO Threshold Voltage 1
VUVVCC1
3.6
3.8
4.0
V
VCC voltage sweep down
VCC UVLO Threshold Voltage 2
VUVVCC2
4.0
4.2
4.4
V
VCC voltage sweep up
VCC UVLO Hysteresis
VHYSVCC
-
0.4
-
V
VREG UVLO Threshold Voltage 1
VUVREG1
3.2
3.5
3.8
V
VREG voltage sweep down
VREG UVLO Threshold Voltage 2
VUVREG2
3.3
3.6
3.9
V
VREG voltage sweep up
VREG UVLO Hysteresis
VHYSREG
-
0.1
-
V
VREG Switch Over Voltage 1
VSWREG1
4.15
4.5
4.85
V
VO4 voltage sweep up
VREG Switch Over Voltage 2
VSWREG2
4.05
4.4
4.75
V
VO4 voltage sweep down
VREG Switch Hysteresis
VHYSSW
VUVVS21
VUVVS31
VUVVS22
VUVVS32
VHYSVS2
VHYSVS3
VUVVO41
-
0.1
-
V
2.2
2.5
2.8
V
VS2/VS3 voltage sweep down
2.4
2.7
3.0
V
VS2/VS3 voltage sweep up
-
0.2
-
V
1.6
1.8
2.0
V
VO4 voltage sweep down
VO4 voltage sweep up
VREG Output Voltage
VS2/VS3 UVLO Threshold Voltage 1
VS2/VS3 UVLO Threshold Voltage 2
VS2/VS3 UVLO Hysteresis
VO4 UVLO Threshold Voltage 1
VO4 UVLO Threshold Voltage 2
VUVVO42
1.8
2.0
2.2
V
VO4 UVLO Hysteresis
VHYSVO4
-
0.2
-
V
fOSC
1.9
2.2
2.5
MHz
Switching Frequency
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RRT = 9.1 kΩ
VSSCGEN = 0 V
TSZ02201-0A2A0AP00440-1-2
05.Mar.2020 Rev.001
BD39031MUF-C
Electrical Characteristics – continued
(Unless otherwise specified VCC = 12 V, VS2 = VS3 = 3.3 V, Tj = -40 °C to +150 °C)
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
VO1 Voltage
VVO1
3.250
3.300
3.350
V
Soft Start Time1
tSS1
0.75
-
3.0
ms
VGH1 High Side ON Resistance
RONVGH1H
-
10
20
Ω
IVGH1 = -10 mA
VGH1 Low Side ON Resistance
RONVGH1L
-
1.5
4
Ω
IVGH1 = +10 mA
VGL1 High Side ON Resistance
RONVGL1H
-
10
25
Ω
IVGL1 = -10 mA
VGL1 Low Side ON Resistance
Over Current Protection CSN
Voltage
OVP Detect Voltage 1
RONVGL1L
-
1.5
4
Ω
IVGL1 = +10 mA
VCSN
60
75
90
mV
VCSN – VPGND1S
VOVP11
4.00
4.25
4.50
V
VO1 voltage sweep up
BUCK1 (Primary Buck Controller)
OVP Release Voltage 1
VOVP12
-
4.00
-
V
VO1 voltage sweep down
SCP Detect Voltage 1
VSCP11
1.485
1.650
1.815
V
VO1 voltage sweep down
SCP Release Voltage 1
VSCP12
-
1.815
-
V
VO1 voltage sweep up
OVD Detect Voltage 1
VOVD1
3.365
3.415
3.465
V
VO1 voltage sweep up
UVD Detect Voltage 1
VUVD1
3.135
3.185
3.235
V
VO1 voltage sweep down
OVD/UVD Filter Time 1
tFIL1
50
75
100
µs
VO1 Discharge Resistor
RDIS1
-
-
500
Ω
VVO2
1.182
1.200
1.218
V
Resistance between VO1 and
PGND1
BUCK2 (Secondary Buck)
VO2 Voltage
Soft Start Time 2
tSS2
0.6
-
2.4
ms
SW2 High Side On Resistance
RON2H
-
75
150
mΩ
ISW2 = -50 mA
SW2 Low Side On Resistance
RON2L
-
75
150
mΩ
ISW2 = +50 mA
OVP Detect Voltage 2
VOVP21
1.36
1.44
1.52
V
VO2 voltage sweep up
OVP Release Voltage 2
VOVP22
-
1.32
-
V
VO2 voltage sweep down
SCP Detect Voltage 2
VSCP21
0.54
0.60
0.66
V
VO2 voltage sweep down
SCP Release Voltage 2
VSCP22
-
0.72
-
V
VO2 voltage sweep up
OVD Detect Voltage 2
VOVD2
1.224
1.242
1.260
V
VO2 voltage sweep up
UVD Detect Voltage 2
VO2 voltage sweep down
VUVD2
1.140
1.158
1.176
V
OVD/UVD Filter Time 2
tFIL2
50
75
100
µs
VO2 Discharge Resistor
RDIS2
-
-
100
Ω
FB3 Voltage
VFB3
0.788
0.800
0.812
V
Soft Start Time 3
tSS3
0.6
-
2.4
ms
RON3H
-
75
150
mΩ
ISW3 = -50 mA
ISW3 = +50 mA
Resistance between SW2
and PGND2
BUCK3 (Secondary Buck)
SW3 High Side On Resistance
SW3 Low Side On Resistance
RON3L
-
75
150
mΩ
OVP Detect Voltage 3
VOVP31
0.90
0.96
1.02
V
VO3S voltage sweep up
OVP Release Voltage 3
VOVP32
-
0.88
-
V
VO3S voltage sweep down
SCP Detect Voltage 3
VSCP31
0.36
0.40
0.44
V
VO3S voltage sweep down
SCP Release Voltage 3
VSCP32
-
0.48
-
V
VO3S voltage sweep up
OVD Detect Voltage 3
VOVD3
0.816
0.828
0.840
V
FB3 voltage sweep up
UVD Detect Voltage 3
VUVD3
0.760
0.772
0.784
V
FB3 voltage sweep down
OVD/UVD Filter Time 3
tFIL3
50
75
100
µs
VO3 Discharge Resistor
RDIS3
-
-
100
Ω
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Resistance between SW3
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TSZ02201-0A2A0AP00440-1-2
05.Mar.2020 Rev.001
BD39031MUF-C
Electrical Characteristics - continued
(Unless otherwise specified VCC = 12 V, VS2 = VS3 = 3.3 V, Tj = -40 °C to +150 °C)
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
VO4 Voltage
VVO4
4.90
5.00
5.10
V
Soft Start Time of BOOST 4
tSS4
1
-
4
ms
SW4 On Resistance
RON4
-
200
-
mΩ
OVP Detect Voltage 4
VOVP41
6.0
6.5
7.0
V
VO4 voltage sweep up
OVP Release Voltage 4
VOVP42
-
6.25
-
V
VO4 voltage sweep down
SCP Detect Voltage 4
VSCP41
2.25
2.50
2.75
V
VO4 voltage sweep down
SCP Release Voltage 4
VSCP42
-
3.00
-
V
VO4 voltage sweep up
OVD Detect Voltage 4
VOVD4
5.150
5.325
5.500
V
VO4 voltage sweep up
UVD Detect Voltage 4
VUVD4
4.500
4.675
4.850
V
VO4 voltage sweep down
OVD/UVD Filter Time 4
tFIL4
50
75
100
µs
BOOST4 (Secondary Boost)
ISW4 = 50 mA
Enable
EN1 Low Voltage
VENL1
-
-
0.8
V
EN1 High Voltage
VENH1
2.6
-
-
V
REN1
VENL2,
VENL3,
VENL4
VENH2,
VENH3,
VENH4
REN2/3/4
125
250
375
kΩ
-
-
VVO1
x 0.2
V
VVO1
x 0.8
-
-
V
50
100
150
kΩ
-
-
VVO1
x 0.2
V
EN1 Pull down Resistor
EN2, EN3, EN4 Low Voltage
EN2, EN3, EN4 High Voltage
EN2, EN3, EN4 Pull Down Resistor
VEN1 = 5 V
Synchronous
SYNC Low Voltage
VSYNCL
SYNC High Voltage
VSYNCH
SYNC Pull down Resistor
-
-
V
RSYNC
VVO1
x 0.8
50
100
150
kΩ
SSCGEN Low Voltage
VSSCGENL
-
-
VREG
x 0.2
V
SSCGEN High Voltage
VSSCGENH
SSCGEN Pull up Resistor
SSCGEN
-
-
V
RSSCGEN
VREG
x 0.8
50
100
150
kΩ
Between VREG and SSCGEN
VUVVO11
2.3
2.4
2.5
V
VO1 voltage sweep down
V
VO1 voltage sweep up
RESET
VO1 Power On Reset Threshold
Voltage (Falling)
VO1 Power On Reset Threshold
Voltage (Rising)
VO1 Power On Reset Hysteresis
VUVVO12
2.5
2.6
2.7
VVO1HYS
0.2
-
V
RONRST
-
-
XRSTOUT On Resistance
200
Ω
IRSTOUT = 1 mA
VRSTOUT = 5 V
XRSTOUT Leak Current
ILRST
-
-
10
µA
XRSTOUT Low Hold Time
tRSTL
7
10
13
ms
-
-
200
Ω
Power Good
PGOOD Leak Current
ILPG
-
-
10
µA
Power On Delay Time
tPG
7
10
13
ms
PGOOD1, PGOOD2
IPGOOD1, IPGOOD2 = 1 mA
PGOOD1, PGOOD2
VPGOOD1, VPGOOD2 = 5 V
PGOOD1, PGOOD2
RONTW
-
-
200
Ω
IXTWOUT = 1 mA
ILTW
-
-
10
µA
VXTWOUT = 5 V
PGOOD On Resistance
RONPG
Thermal Warning
XTWOUT On Resistance
XTWOUT Leak Current
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TSZ22111 • 15 • 001
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BD39031MUF-C
Electrical Characteristics - continued
(Unless otherwise specified VCC = 12 V, VS2 = VS3 = 3.3 V, Tj = -40 °C to +150 °C)
Parameter
Symbol
Min
Typ
Max
Unit
VWDENL
-
-
VVO1
x 0.2
V
WDEN High Level Input Voltage
VWDENH
VVO1
x 0.8
-
-
V
WDEN Pull Down Resistor
RWDEN
50
100
150
kΩ
V
V
Conditions
Watch Dog Timer
WDEN Low Level Input Voltage
VWDINL
-
-
VVO1
x 0.2
WDIN High Level Input Voltage
VWDINH
VVO1
x 0.8
-
-
WDIN Pull Up Resistor
RWDIN
50
100
150
kΩ
WDT OK Time 1
tWOK1
12.5
25.5
38.5
ms
RRTW = 10 kΩ
WDT FAST Timeout Detect 1
tWF1
9.6
11.1
12.5
ms
RRTW = 10 kΩ
WDT SLOW Timeout Detect 1
tWS1
38.5
44.3
50.1
ms
RRTW = 10 kΩ
WDT OK Time 2
tWOK2
33.8
68.9
104.1
ms
RRTW = 27 kΩ
WDIN Low Level Input Voltage
WDT FAST Timeout Detect 2
tWF2
26.0
29.9
33.8
ms
RRTW = 27 kΩ
WDT SLOW Timeout Detect 2
tWS2
104.1
119.6
135.2
ms
RRTW = 27 kΩ
WDT OK Time 3
tWOK3
58.8
120.0
181.1
ms
RRTW = 47 kΩ
WDT FAST Timeout Detect 3
tWF3
45.3
52.1
58.8
ms
RRTW = 47 kΩ
WDT SLOW Timeout Detect 3
tWS3
181.1
208.2
235.3
ms
RRTW = 47 kΩ
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Typical Performance Curves
10
1.0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
0.8
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
8
Circuit Current : IVCC [mA]
Standby Current : IST [uA]
0.9
0.7
0.6
0.5
0.4
0.3
0.2
6
4
2
0.1
0.0
0
6
12
18
24
30
VCC Voltage : VCC [V]
36
0
42
0
6
36
42
Figure 12. Circuit Current vs VCC Voltage
Figure 11. Stand-by Current vs VCC Voltage
6.0
3.35
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
3.34
5.0
3.33
VO1 Voltage : VVO1 [V]
VREG Output Voltage : VREG [V]
12
18
24
30
VCC Voltage : VCC [V]
4.0
3.0
2.0
3.31
3.30
3.29
3.28
3.27
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
1.0
3.32
3.26
3.25
0.0
0.0
1.0
2.0
3.0
4.0
EN1 Pin Voltage : VEN1 [V]
5.0
Figure 13. VREG Output Voltage vs the EN1 Pin Voltage
(“EN1 Threshold Voltage”)
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TSZ22111 • 15 • 001
4
10
16
22
28
34
VCC Voltage : VCC [V]
40
Figure 14. Output Voltage VO1 vs VCC Voltage
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Typical Performance Curves - continued
3.35
1.218
3.34
1.212
VO2 Voltage : VVO2 [V]
VO1 Voltage : VVO1[V]
3.33
3.32
3.31
3.30
3.29
3.28
3.27
1.206
1.200
1.194
1.188
3.26
1.182
3.25
-40 -20
-40 -20
0 20 40 60 80 100 120
Temperature : Ta [°C]
0 20 40 60 80 100 120
Temperature : Ta [°C]
Figure 15. Output Voltage VO1 vs Temperature
(VCC = 12 V)
Figure 16. Output Voltage VO2 vs Temperature
0.812
5.10
0.808
5.06
VO4 Voltage : VVO4 [V]
FB3 Feedback Voltage : VFB3 [V]
5.08
0.804
0.800
0.796
5.04
5.02
5.00
4.98
4.96
4.94
0.792
4.92
4.90
0.788
-40 -20
-40 -20
0 20 40 60 80 100 120
Temperature : Ta [°C]
Figure 17. Feedback Voltage FB3 vs Temperature Ta
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TSZ22111 • 15 • 001
0
20 40 60 80 100 120
Temperature : Ta [°C]
Figure 18. Output Voltage VO4 vs Temperature Ta
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Typical Performance Curves - continued
1.236
3.40
3.38
1.224
VO2 Voltage : VVO2[V]
VO1 Voltage : VVO1[V]
3.36
3.34
3.32
3.30
3.28
3.26
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
3.24
3.22
1.0
2.0
3.0
4.0
Output Current : IVO1 [A]
1.200
1.188
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
1.176
3.20
0.0
1.212
1.164
5.0
0.0
0.5
1.0
1.5
2.0
Output Current : IVO2 [A]
2.5
Figure 20. Output Voltage VO2 vs Output Current
(“VO2 Load Regulation”, VS2 = 3.3 V)
Figure 19. Output Voltage VO1 vs Output Current
(“VO1 Load Regulation”, VCC = 12 V)
5.20
1.55
1.54
5.10
VO4 Voltage : VVO4[V]
VO3 Voltage : VVO3[V]
1.53
1.52
1.51
1.50
1.49
1.48
1.47
5.00
4.90
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
1.46
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
1.45
0.0
0.5
1.0
1.5
2.0
Output Current : IVO3 [A]
4.80
2.5
0.0
Figure 21. Output Voltage VO3 vs Output Current
(“VO3 Load Regulation”, VS3 = 3.3 V, VO3 = 1.5 V setting)
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TSZ22111 • 15 • 001
0.1
0.2
0.3
0.4
Output Current : IVO4 [A]
0.5
Figure 22. Output Voltage VO4 vs Output Current
(“VO4 Load Regulation”, VS4 = 3.3 V)
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Typical Performance Curves - continued
1.26
VOVD1
VUVD1
3.45
OVD Detect Voltage 2 : VOVD2 [V]
UVD Detect Voltage 2 : VUVD2 [V]
OVD Detect Voltage 1 : VOVD1 [V]
UVD Detect Voltage 1 : VUVD1 [V]
3.50
3.40
3.35
3.30
3.25
3.20
3.15
3.10
-40 -20
1.24
1.22
VOVD2
VUVD2
1.20
1.18
1.16
1.14
0 20 40 60 80 100 120
Temperature : Ta [°C]
-40 -20
Figure 23. OVD1/UVD1 Detect Voltage vs Temperature
(VCC = 12 V)
0
20 40 60 80 100 120
Temperature : Ta [°C]
Figure 24. OVD2/UVD2 Detect Voltage vs Temperature
(VCC = 12 V)
5.5
0.84
OVD Detect Voltage 4 : VOVD4 [V]
UVD Detect Voltage 4 : VUVD4 [V]
OVD Detect Voltage 3 : VOVD3 [V]
UVD Detect Voltage 3 : VUVD3 [V]
5.4
0.83
0.82
VOVD3
0.81
VUVD3
0.80
0.79
0.78
5.3
5.2
VOVD4
5.1
VUVD4
5.0
4.9
4.8
4.7
0.77
4.6
0.76
-40 -20
4.5
0 20 40 60 80 100 120
Temperature : Ta [°C]
-40 -20
Figure 25. OVD3/UVD3 Detect Voltage vs Temperature
(VCC = 12 V)
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TSZ22111 • 15 • 001
0
20 40 60 80 100 120
Temperature : Ta [°C]
Figure 26. OVD4/UVD4 Detect Voltage vs Temperature
(VCC = 12 V)
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4.4
3.0
VS2 UVLO threshold Voltage 1 : VUVVS21 [V]
VS2 UVLO threshold Voltage 2 : VUVVS22 [V]
VCC UVLO threshold Voltage 1 : VUVVCC1 [V]
VCC UVLO threshold Voltage 2 : VUVVCC2 [V]
Typical Performance Curves - continued
4.3
4.2
4.1
4.0
3.9
3.8
VUVVCC1 (Detect)
3.7
VUVVCC2 (Release)
2.8
2.7
2.6
2.5
2.4
VUVVS21 (Detect)
2.3
VUVVS22 (Release)
2.2
3.6
-40 -20
-40 -20
0 20 40 60 80 100 120
Temperature : Ta [°C]
0
20
40
60
80
100 120
Temperature : Ta [°C]
Figure 27. VCC UVLO Threshold Voltage vs Temperature
(“VCC UVLO Threshold”)
Figure 28. VS2 UVLO Threshold Voltage vs Temperature
(“VS2 UVLO Threshold”, VCC = 12 V)
2.2
VO4 UVLO threshold Voltage 1 : VUVVO41 [V]
VO4 UVLO threshold Voltage 2 : VUVVO42 [V]
3.0
VS3 UVLO threshold Voltage 1 : VUVVS31 [V]
VS3 UVLO threshold Voltage 2 : VUVVS32 [V]
2.9
2.9
2.8
2.7
2.6
2.5
2.4
VUVVS31 (Detect)
VUVVS32 (Release)
2.3
2.2
-40 -20
0
20
40
60
2.0
1.9
1.8
1.7
VUVVO41 (Detect)
VUVVO42 (Release)
1.6
80 100 120
-40
Temperature : Ta [°C]
-20
0
20
40
60
80
100 120
Temperature : Ta [°C]
Figure 29. VS3 UVLO Threshold Voltage vs Temperature
(“VS3 UVLO Threshold”, VCC = 12 V)
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TSZ22111 • 15 • 001
2.1
Figure 30. VO4 UVLO Threshold Voltage vs Temperature
(“VO4 UVLO Threshold”, VCC = 12 V)
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Typical Performance Curves - continued
2.5
2.4
Switching Frequency : fOSC [MHz]
VO1 Power On Reset Threshold Voltage(Falling):VUVVO11 [V]
VO1 Power On Reset Threshold Voltage(Rising):VUVVO12 [V]
2.7
2.6
2.5
2.4
VUVVO11
VUVVO12
2.3
2.2
2.1
2.0
1.9
2.3
-40 -20
-40
0
20 40 60 80 100 120
Temperature : Ta [°C]
Figure 31. VO1 Power On Reset Threshold Voltage
vs Temperature
(“VO1RST Threshold”, VCC = 12 V)
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TSZ22111 • 15 • 001
-20
0
20 40 60 80
Temperature : Ta [°C]
100 120
Figure 32. Switching Frequency vs Temperature
(the SSCGEN pin = 0 V)
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Typical Performance Curves - continued
VCC = 12 V, Ta = +25 °C
VCC = 12 V, Ta = +25 °C
CH1: EN1 (2 V/div)
CH2: VO1 (1 V/div)
CH1: EN2 (2 V/div)
CH2: VO2 (0.5 V/div)
Figure 33. VO1 Power On Waveform
(VCC = 12 V, Ta = +25 °C)
Figure 34. VO2 Power On Waveform
(VCC = 12 V, VS2 = 3.3 V, Ta = +25 °C)
VCC = 12 V, Ta = +25 °C
VCC = 12 V, Ta = +25 °C
CH1 : EN3 (2 V/div)
CH2 : VO3 (0.5 V/div)
CH1 : EN4 (2 V/div)
CH2 : VO4 (2 V/div)
Figure 35. VO3 Power On Waveform
(VCC = 12 V, VS3 = 3.3 V, Ta = +25 °C)
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TSZ22111 • 15 • 001
Figure 36. VO4 Power On Waveform
(VCC = 12 V, Ta = +25 °C)
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Timing Chart
An example of EN1 tied to VCC, and EN2, EN3, and EN4 controlled by microcomputer.
VUVV CC1
VCC
EN1
VE NH 1
Int ernal circuit on
VREG
VUVRE G2
VUVV O12
VO1
tS S1
EN2
VUVD 2
VUVD 2
VO2
tS S2
EN3
VUVD 3
VUVD 3
VO3
tS S3
EN4
VUVD 4
VO4
VUVD 4
tS S4
tRST L
XRSTOUT
tP G1
PGOOD1
tP G2
PGOOD2
Battery
VCC
EN1
VO1
EN2
VO2
EN3
VO3
EN4
VO4
µC
XRSTOUT
PGOOD1
PGOOD2
Figure 37. Timing Chart1
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Timing Chart - continued
An example of EN1 tied to VCC, and EN2, EN3 and EN4 tied to VO1.
VUVV CC1
VCC
EN1
VE NH 1
Int ernal circuit on
VREG
VUVRE G2
VUVV O12
VO1
tS S1
EN2
VUVD 2
VO2
tS S2
EN3
VO3
tS S3
EN4
VUVD 4
VO4
tS S4
tRST L
XRSTOUT
tP G1
PGOOD1
tP G2
PGOOD2
Battery
VCC
EN1
VO1
EN2
VO2
EN3
VO3
EN4
VO4
XRSTOUT
PGOOD1
PGOOD2
Figure 38. Timing Chart2
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Timing Chart - continued
An example of enable signals sequentially controlled.
VCC
EN1
Int ernal circuit on
VREG
VUVRE G2
VUVV O12
VUVV O12
VO1
tS S1
EN2
VUVD 2
VUVD 2
VO2
tS S2
EN3
VUVD 3
VUVD 3
VO3
tS S3
EN4
VUVD 4
VUVD 4
tS S4
VO4
tRST L
XRSTOUT
tP G1
PGOOD1
tP G2
PGOOD2
Battery
VCC
EN1
VO1
EN2
VO2
EN3
VO3
EN4
VO4
XRSTOUT
PGOOD1
PGOOD2
Figure 39. Timing Chart3
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Timing Chart - continued
An example of WDEN controlled by external signal.
VO1
BIST
(internal)
VUVV O11
VUVV O12
tBI ST
BIST OK
tRSTL
XRSTOUT
BIST error
If BIST is error,
XRSTOUT is kept Low level, and WDT is not work.
WDIN
WDEN
WDT start
Pulled-down by controller and
WDT works immediately after rising edge
WDT
function
WDT Disenable
WDT Enable
WDT Disenable
Figure 40. Timing Chart of WDEN controlled by External Signal
An example of WDEN tied to VO1
VO1
BIST
(internal)
VUVVO11
VUVVO12
tBIST
BIST OK
tR STL
XRSTOUT
BIST error
If BIST is error,
XRSTOUT is kept Low level, and WDT is not work.
WDIN
WDEN
VWDENL
500 ms (Typ)
WDT works after 500 ms after XRSTOUT is High
WDT
function
WDT Disenable
WDT Enable
WDT Disenable
Figure 41. Timing Chart of WDEN tied to VO1
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Timing Chart - continued
BUCK1/BUCK3/BOOST4 OVD and UVD
VOVDx
VO1 / FB3
/ VO4
VUVDx
Within
75 µs (Typ)
XRSTOUT
H
PGOOD1
H
PGOOD2
H
Within
75 µs (Typ)
tPG 10 ms
tPG 10 ms
tFILx 75 µs
tFILx 75µs
(x = 1, 3, 4)
BUCK2 OVD and UVD
VO2OVD
1.2 V
VO2
VO2UVD
Within
75 µs (Typ)
XRSTOUT
H
PGOOD1
H
PGOOD2
Within
75 µs (Typ)
tPG 10ms
tPG 10 ms
tFIL2 75 µs
tFIL2 75 µs
tPG 10ms
H
tFIL2 75 µs
tPG 10 ms
tFIL2 75 µs
Figure 42. Timing Chart of OVD/UVD Detect
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TSZ22111 • 15 • 001
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Application Example
VO3
0.8V~2.5V
VO2
1.2V
VO1
CVO2
CVO3
L3
L2
CFB3
RFB3U
RFB3L
GND
CVS2
GND
GND
30
29
28
27
26
25
24
23
22
21
VO2
PGND2
SW2
SW2
VS2
VS3
SW3
SW3
PGND3
FB3
CVS3
RVO3U
RVO3L
31
EN2
VO3S
20
32
EN3
RTW
19
GND
GND
RRTW
33
EN4
34
WDEN
35
WDIN
EXP-PAD
SYNC
18
GND
17
COMP1
16
GND
GND
RC1
CC1
VREG
36
VO1
SSCGEN
VO1
3.3V
15
GND
37
PGND1
XRSTOUT
14
CVO1
38
PGOOD1
PGND1S
13
39
PGOOD2
CSN
12
40
XTWOUT
VGL1
11
VO4
VREG
RT
VCC
EN1
BOOT1
SW1
VGH1
RRST,RPG1,RPG2,RTWO
SW4
VO1
PGND4
RCS
1
2
3
4
5
6
7
8
9
10
M2
L1
CREG
CVO4
RRT
REN1
CB1
D4
M1
L4
GND
GND
GND
CVCC
CVCC2
CVS4
GND
VCC
VO1
GND
VO4
5.0V
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TSZ22111 • 15 • 001
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BD39031MUF-C
Selection of Components Externally Connected
Item
Value
Min
(Note 1)
Typ
Max
unit
Parts No.
Maker
Note
(Note 2)
IC
-
-
-
-
BD39031MUF-C
ROHM
REN1
9.7
10
100
kΩ
MCR01 series
ROHM
EN1 pull up resistor
RC1
32
33
34
kΩ
MCR01 series
ROHM
VO1 compensation resistor
RCS
8.7
9
15
mΩ
PMR18EZPJU9L0
ROHM
RFB3U
1
13
47
kΩ
MCR01 series
ROHM
RFB3L
1
15
47
kΩ
MCR01 series
ROHM
RVO3U
1
13
47
kΩ
MCR01 series
ROHM
VO1 current sense resistor
VO3 feedback resistor
(Upper side)
VO3 feedback resistor
(Lower side)
VO3 sense resistor (Upper side)
RVO3L
1
15
47
kΩ
MCR01 series
ROHM
RRT
8.8
9.1
9.4
kΩ
MCR01 series
ROHM
RRTW
9.7
27
48.5
kΩ
MCR01 series
ROHM
RRST
0.97
10
48.5
kΩ
MCR01 series
ROHM
VO3 sense resistor (Lower side)
Switching frequency setting
resistor
WDT detection time setting
resistor
XRSTOUT pull up resistor
RPG1
0.97
10
48.5
kΩ
MCR01 series
ROHM
PGOOD1 pull up resistor
RPG2
0.97
10
48.5
kΩ
MCR01 series
ROHM
PGOOD2 pull up resistor
RTWO
0.97
10
48.5
kΩ
MCR01 series
ROHM
CVCC
0.7
1
1.5
μF
GCM21BR71H105MA03
Murata
CVCC2
7
10
22
μF
GCM32EC71H106KA03
Murata
CREG
1.54
2.2
2.86
μF
GCM21BR71A225MA37
Murata
CB1
0.07
0.1
0.13
μF
GCM188R71C104MA37
Murata
CC1
840
1200
1560
pF
GCM155R71H122KA37
Murata
CVO1
47 x3
47 x4
47 x8
μF
GCM32ER70J476ME19
Murata
CVS2
1.5
2.2
4.3
μF
GCM188R70J225ME22
Murata
CVO2
32.9
47
122
μF
GCM32ER70J476ME19
Murata
CVS3
1.5
2.2
4.3
μF
GCM188R70J225ME22
Murata
CFB3
154
220
286
pF
GCM155R71H221KA37
Murata
XTWOUT pull up resistor
VCC input capacitor, Range: 50
V
VCC input capacitor, Range: 50
V
VREG5 output capacitor, Range:
10 V
VO1 boot strap capacitor,
Range : 16 V
VO1
phase
compensation
capacitor
VO1 output capacitor, Range:
6.3 V
VO2 input capacitor, Range: 6.3
V
VO2 output capacitor, Range:
6.3 V
VO3 input capacitor, Range: 6.3
V
VO3 feedback capacitor
CVO3
32.9
47
122
μF
GCM32ER70J476ME19
Murata
VO3 output capacitor: 6.3 V
CVS4
1.5
2.2
4.3
μF
GCM188R70J225ME22
Murata
VO4 input capacitor: 6.3 V
CVO4
15.4
22
43
μF
GCM31CR71A226KE02
Murata
VO4 output capacitor: 10 V
L1
1.0
1.5
2.9
μH
CLF10060NIT-1R5N-D
TDK
VO1 output coil
L2
1.5
2.2
4.3
μH
CLF5030NIT-2R2N-D
TDK
VO2 output coil
L3
1.5
2.2
4.3
μH
CLF5030NIT-2R2N-D
TDK
VO3 output coil
L4
1.5
2.2
4.3
μH
CLF5030NIT-2R2N-D
TDK
D4
-
-
-
-
RBR2LAM30ATF
ROHM
VO4 output coil
VO4 SBD, Range: 30 V/2 A, VF
= 0.49 V
M1, M2
-
-
-
-
FDMC9430L-F085
NVMFD5C466NL
ON
Semiconductor
Dual Nch FET, 40 V / 12 A
Dual Nch FET, 40 V / 52 A
(Note 1) Consider torerance, temperature characteristic and DC bias properties not to become less than the minimum.
(Note 2) Consider torerance and temperature characteristic not to become less than the maximum.
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BD39031MUF-C
Selection of Components Externally Connected - continued
1.
Selection of Inductor L Value (BUCK1, BUCK2, BUCK3, BOOST4)
When the switching regulator supplies current continuously to the load, the LC filter is necessary for the smoothness of
the output voltage. The inductor value to use is selectable from the following.
BUCK1: L1
1.5 μH, 2.2 μH
BUCK2: L2
2.2 μH, 3.3 μH
BUCK3: L3
2.2 μH, 3.3 μH
BOOST4: L4
2.2 μH, 3.3 μH
It is necessary for the rating current of the inductor to choose enough margins for the peak current. The inductor peak
current of Buck converter can be approximated by the following equation.
Peak current IPEAKBUCK of BUCK1, BUCK2, BUCK3
(𝑉𝐼𝑁 −𝑉𝑂𝑈𝑇 ) × 𝑉𝑂𝑈𝑇
∆𝐼𝐿𝐵𝑈𝐶𝐾 =
[A]
L × 𝑓𝑆𝑊 × 𝑉𝐼𝑁
1
𝐼𝑃𝐸𝐴𝐾𝐵𝑈𝐶𝐾 = 𝐼𝑂𝑈𝑇 + 2 × ∆𝐼𝐿𝐵𝑈𝐶𝐾
Where:
∆𝐼𝐿𝐵𝑈𝐶𝐾
𝑉𝐼𝑁
𝑉𝑂𝑈𝑇
𝑓𝑆𝑊
𝐿
[A]
is inductor ripple current of buck converter.
is input voltage.
is output voltage.
is switching frequency.
is inductor value.
The inductor peak current of boost converter can be approximated by the following equation.
Peak current IPEAKBOOST of BOOST4
∆𝐼𝐿𝐵𝑂𝑂𝑆𝑇 =
𝐼𝐿𝐴𝑉𝐸 =
𝑉𝐼𝑁
L × 𝑓𝑆𝑊
𝐼𝑂𝑈𝑇 ×𝑉𝑂𝑈𝑇
𝑉𝐼𝑁 × 𝜂
𝑉
× (1 − 𝑉 𝐼𝑁 )
𝑂𝑈𝑇
𝑉
× (1 − 𝑉 𝐼𝑁 )
𝑂𝑈𝑇
1
𝐼𝑃𝐸𝐴𝐾𝐵𝑂𝑂𝑆𝑇 = 𝐼𝐿𝐴𝑉𝐸 + 2 × ∆𝐼𝐿𝐵𝑂𝑂𝑆𝑇
Where:
∆𝐼𝐿𝐵𝑂𝑂𝑆𝑇
𝐼𝐿𝐴𝑉𝐸
𝑉𝐼𝑁
𝑉𝑂𝑈𝑇
𝐼𝑂𝑈𝑇
𝑓𝑆𝑊
𝐿
𝜂
[A]
[A]
[A]
is inductor ripple current of boost converter.
is average current of boost converter.
is input voltage.
is output voltage.
is output current.
is switching frequency.
is inductor value.
is efficiency.
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BD39031MUF-C
Selection of Components Externally Connected – continued
2.
Selection of Output Capacitor Value (CVO1, CVO2, CVO3, CVO4)
The output capacitor is selected on the basis of ESR that is required from the ripple voltage can be reduced by using a
capacitor with a small ESR. The ceramic capacitor is the best option that meets this requirement. The ceramic capacitor
contributes to the size reduction of the application for it has small ESR. Frequency characteristic of ESR should be
confirmed from the datasheet of the manufacturer to choose low ESR value in the switching frequency being used. It
is necessary to consider the ceramic capacitor because the DC biasing characteristic is remarkable. For the voltage
rating of the ceramic capacitor, twice or more the maximum output voltage is usually required. By selecting these high
voltages rating, it is possible to reduce the influence of DC bias characteristics. Moreover, in order to maintain good
temperature characteristics, the one with the characteristic of X7R or more is recommended. Because the voltage rating
of a mass ceramic capacitor is low, the selection becomes difficult in the application with high output voltage. In that case,
it is recommended to connect ceramic capacitors in parallel, or to use hybrid electrolytic capacitor.
The value of output capacitor to use is selectable in the following.
BUCK1: CVO1
47 μF x4 to 47 μF x6
BUCK2: CVO2
47 μF to 94 μF
BUCK3: CVO3
47 μF to 94 μF
BOOST4: CVO4
22 μH to 33 μF
These capacitors are rated in ripple current.
The RMS values of the ripple current that can be obtained from the following equation must not exceed the ripple current
ratings.
𝐼𝐶𝑂𝐵𝑈𝐶𝐾(𝑅𝑀𝑆) =
∆𝐼𝐿𝐵𝑈𝐶𝐾
√12
Where:
𝐼𝐶𝑂𝐵𝑈𝐶𝐾(𝑅𝑀𝑆)
∆𝐼𝐿𝐵𝑈𝐶𝐾
𝐷𝐵𝑂𝑂𝑆𝑇 = (1 −
[A]
is RMS value of the buck converter output ripple current.
is ripple current of buck converter.
𝑉𝐼𝑁
)
𝑉𝑂𝑈𝑇
𝐷
2
𝐼𝐶𝑂𝐵𝑂𝑂𝑆𝑇(𝑅𝑀𝑆) = √(1 − 𝐷𝐵𝑂𝑂𝑆𝑇 ) × (𝐼𝑂𝑈𝑇
× (1−𝐷𝐵𝑂𝑂𝑆𝑇
𝐵𝑂𝑂𝑆𝑇
)2
+
𝛥𝐼𝐿𝐵𝑂𝑂𝑆𝑇 2
3
) [A]
Where:
𝐼𝐶𝑂𝐵𝑂𝑂𝑆𝑇(𝑅𝑀𝑆) is RMS value of the boost converter output ripple current.
𝐷𝐵𝑂𝑂𝑆𝑇
is duty cycle of boost converter.
𝑉𝐼𝑁
is input voltage.
𝑉𝑂𝑈𝑇
is output Voltage.
𝐼𝑂𝑈𝑇
is output current.
∆𝐼𝐿𝐵𝑂𝑂𝑆𝑇
is inductor ripple current of boost converter.
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BD39031MUF-C
Selection of Components Externally Connected – continued
3.
Selection of Input Capacitor (CVCC, CVCC2, CVS2, CVS3, CVS4)
The Input capacitor is required to stabilize ripple voltage of the supplied power supply and is necessary to supply current
in the on time for FET. The ceramic capacitor with low ESR is necessary for input capacitor. The CVCC has to be connected
near the IC for the stabilization of the power supplied to the analog block of the IC.
The value of input capacitor to use is selectable from the following ranges.
VCC : CVCC
1.0 μF
BUCK1 : CVCC2
10 μF
BUCK2 : CVS2
2.2 μF to 3.3μF
BUCK3 : CVS3
2.2 μF to 3.3μF
BOOST4 : CVS4
2.2 μF to 3.3μF
These capacitors are rated in ripple current.
The RMS values of the ripple current that can be obtained in the following equation must not exceed the ripple current
ratings.
The RMS value of the input ripple electric current is obtained in the following equation.
𝐼𝐶𝐶𝐵𝑈𝐶𝐾(𝑅𝑀𝑆) = 𝐼𝑂1(𝑀𝐴𝑋) × √𝐷𝐵𝑈𝐶𝐾 × (1 − 𝐷𝐵𝑈𝐶𝐾 ) [A]
Where:
𝐼𝐶𝐶𝐵𝑈𝐶𝐾(𝑅𝑀𝑆) is RMS value of the VCC input current.
𝐼𝑂1(𝑀𝐴𝑋)
is max output current.
𝐷𝐵𝑈𝐶𝐾
is duty cycle of buck converter.
The RMS value of the input ripple current is obtained in the following equation.
𝐼𝐶𝐶𝐵𝑂𝑂𝑆𝑇(𝑅𝑀𝑆) =
Where:
𝐼𝐶𝐶𝐵𝑂𝑂𝑆𝑇(𝑅𝑀𝑆)
∆𝐼𝐿𝐵𝑂𝑂𝑆𝑇
𝑉𝐼𝑁
𝑉𝑂𝑈𝑇
𝑓𝑆𝑊
∆𝐼𝐿𝐵𝑂𝑂𝑆𝑇
√12
=
1
√
𝑉
× 𝐿× 𝑓𝐼𝑁
12
𝑆𝑊
𝑉
× (1 − 𝑉 𝐼𝑁 )
𝑂𝑈𝑇
[A]
is RMS value of the VCC input ripple electric current.
is ripple current of boost.
is input voltage.
is output Voltage.
is switching frequency.
In addition, in automotive and other applications requiring high reliability, it is recommended by making it into two series
+ two parallel structures to decrease the risk of ceramic capacitor destruction due to short circuit conditions. “Two series
+ two parallel structure in 1 package” lineups are respectively carried out by each capacitor supplier, confirm to each
supplier for details.
When impedance on the input side is high because of long wiring from the power supply to VCC etc., high capacitance
is needed. It is necessary to verify IC operation in actual condition for problem such as output turning off or output
overshooting causes by change in VCC at transient response may occur.
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BD39031MUF-C
Selection of Components Externally Connected - continued
4.
FET (M1, M2)
The selection of MOSFET affects the efficiency of BUCK1. This product recommends the following MOSFET.
Parts No.
Maker
Channel
Pole
VDS
ID
FDMC9430L-F085
ON Semiconductor
Dual
N-Channel
40 V
12 A
NVMFD5C466NL
ON Semiconductor
Dual
N-Channel
40 V
52 A
In the selection of MOSFET, please give enough consideration for following contents.
Drain – Source Rating
Gate – Source Rating
Drain Current
Power Dissipation
Drain – Source Rating
It is recommended to select MOSFET with enough margins to be used for power supply range (VCC).
Gate - Source Rating
It is recommended to use MOSFET with more than 10 V of gate source rating.
Drain Current
Choose FET with more than the setting of either I PEAKBUCK or OCP for drain current.
Power Dissipation
Power consumption is calculated on a true specifications condition, and prevents from exceeding maximum allowable
power consumption. Synchronization can roughly estimate the loss of commutation type MOSFET by the factor shown
below.
(1)
(2)
(3)
(4)
(5)
Loss of MOSFET ON Resistance
Loss of Switching
Loss of Output Capacitor
Loss of Dead Time
Loss of Gate Charge
tr-H
tON
tOFF
tf-H
RON-H×IOUT
VIN
VSW
0
VD
tr-L
tf-L
tDf
RON-L×IOUT
tDr
IP(PEAK)
IL(AVERAGE)
ΔIL
IV(VALLEY)
t
Figure 43. Relation between Switching Waveform and Loss
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BD39031MUF-C
FET (M1, M2) - continued
(1) Loss of MOSFET ON Resistance
The conduction loss of the MOSFET is calculated in A section and B section of Figure 43.
High side MOSFET turns on the A section and turns off low side MOSFET, and it can be roughly estimated by output
current, ON resistance, and on duty cycle.
High side MOSFET turns off the B section and low side MOSFET becomes ON, and it can be roughly estimated
from output current, ON resistance and off duty cycle.
Power loss PON-H and PON-L are calculated by the following formula.
High side MOSFET
2
𝑃𝑂𝑁−𝐻 = [𝐼𝑂𝑈𝑇
+
𝛥𝐼𝐿 2
12
] × 𝑅𝑂𝑁−𝐻 ×
𝑉𝑂𝑈𝑇
[W]
𝑉𝐼𝑁
Low Side MOSFET
2
𝑃𝑂𝑁−𝐿 = [𝐼𝑂𝑈𝑇
+
𝛥𝐼𝐿 =
Where:
(𝑉𝐼𝑁 −𝑉𝑂𝑈𝑇 )
𝑓𝑆𝑊 ×𝐿
𝐼𝑂𝑈𝑇
𝑅𝑂𝑁−𝐻
𝑅𝑂𝑁−𝐿
𝑉𝐼𝑁
𝑉𝑂𝑈𝑇
𝛥𝐼𝐿
𝑓𝑆𝑊
𝐿
𝛥𝐼𝐿 2
12
×
] × 𝑅𝑂𝑁−𝐿 × (1 −
𝑉𝑂𝑈𝑇
𝑉𝐼𝑁
𝑉𝑂𝑈𝑇
𝑉𝐼𝑁
)
[W]
[A]
is output current.
is on resistance of high side MOSFET.
is on resistance of low side MOSFET.
is input voltage.
is output voltage.
is inductor ripple current of inductor.
is switching frequency.
is Inductor value.
(2) Loss of Switching
The switching loss can be calculated by C, D, E, and F section of Figure 43.
When a high side and low side MOSFET switches ON/OFF in turn, a loss occurs during the transition to ON.
Because the formula for two triangular areas resembles a calculating formula of the power attenuation during a
start and fall transition, this calculation can be approximated by a simple figure calculation.
Switching loss PSW-H is demanded by following formula.
High side MOSFET
𝑃𝑆𝑊−𝐻 =
Where:
𝑉𝐼𝑁
𝐼𝑂𝑈𝑇
𝑡𝑟−𝐻
𝑡𝑓−𝐻
𝑓𝑆𝑊
1
2
× 𝑉𝐼𝑁 × 𝐼𝑂𝑈𝑇 × (𝑡𝑟−𝐻 + 𝑡𝑓−𝐻 ) × 𝑓𝑆𝑊
[W]
is input voltage.
is output current.
is rise time of MOSFET.
is fall time of MOSFET.
is switching frequency.
When low side MOSFET turns on by gate voltage which electricity runs through body diode and then turns off by
gate voltage, drain voltage becomes equal to forward direction voltage of body diode and remains as low voltage,
because load current flows in same direction through body diode. Therefore, switching loss PSW-L is very few like in
following formula.
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loss of Switching - continued
Low side MOSFET
1
𝑃𝑆𝑊−𝐿 = 2 × 𝑉𝐷 × 𝐼𝑂𝑈𝑇 × (𝑡𝑟−𝐿 + 𝑡𝑓−𝐿 ) × 𝑓𝑆𝑊
Where:
𝑉𝐷
𝐼𝑂𝑈𝑇
𝑡𝑟−𝐿
𝑡𝑓−𝐿
𝑓𝑆𝑊
[W]
is forward voltage of body diode of low side MOSFET.
is output current.
is rise time of MOSFET.
is fall time of MOSFET.
is switching frequency.
(3) Loss of Output Capacitor
A loss occurs when charging output capacitance COSS of high side and low side MOSFET in each switching cycle.
This loss is demanded by following formula.
1
𝑃𝐶𝑂𝑆𝑆 = 2 × (𝐶𝑂𝑆𝑆−𝐿 + 𝐶𝑂𝑆𝑆−𝐻 ) × 𝑉𝐼𝑁2 × 𝑓𝑆𝑊
𝐶𝑂𝑆𝑆−𝐿 = 𝐶𝐷𝑆−𝐿 + 𝐶𝐺𝐷−𝐿
[F]
𝐶𝑂𝑆𝑆−𝐻 = 𝐶𝐷𝑆−𝐻 + 𝐶𝐺𝐷−𝐻
[F]
Where:
𝐶𝑂𝑆𝑆−𝐿
𝐶𝐷𝑆−𝐿
𝐶𝐺𝐷−𝐿
𝐶𝑂𝑆𝑆−𝐻
𝐶𝐷𝑆−𝐻
𝐶𝐺𝐷−𝐻
𝑉𝐼𝑁
𝑓𝑆𝑊
[W]
is output capacitance of low side MOSFET.
is capacitance between drain and source of low side MOSFET.
is capacitance between gate and drain of low side MOSFET.
is output capacitance of high side MOSFET.
is capacitance between drain and source of high side MOSFET.
is capacitance between gate and drain of high side MOSFET.
is input voltage.
is switching frequency.
CGD-H
VCC
D
High-side MOSFET
RON-H
CDS-H
G
S
CGS-H
Controller
CGD-L
D
CDS-L
G
S
CGS-L
Low-side MOSFET
RON-L
Body-Diode
VD
Figure 44. Synchronized Rectifier type DCDC Converter Circuit Diagram
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FET (M1, M2) - continued
(4)
Loss of Dead Time
When a high side and low side MOSFET are turned on at the same time, VIN-GND interval shorts circuit and a very
big current spike will occur. The dead time which turns off both MOSFET is made to prevent this, but the inductor
electric current flows continuously. This inductor electric current flows in a body diode of low side MOSFET during
dead time. Dead time loss PD is calculated in G section and H section of Figure 43 and is demanded by the following
formula.
𝑃𝐷 = 𝑉𝐷 × 𝐼𝑂𝑈𝑇 × (𝑡𝐷𝑟 + 𝑡𝐷𝑓 ) × 𝑓𝑆𝑊 [W]
Where:
(5)
𝑉𝐷
𝐼𝑂𝑈𝑇
𝑡𝐷𝑟
𝑡𝐷𝑓
𝑓𝑆𝑊
is forward voltage of body diode of low side MOSFET.
is output current.
is dead time at rise.
is dead time at fall.
is switching frequency.
Loss of Gate Charge
A gate charge loss is power attenuation due to the charge of the gate of MOSFET. Depending on quantity of gate
charge of a high side and the low side MOSFET (or gate capacitance), the gate charge loss is demanded by
following formula.
𝑃𝐺 = (𝑄𝑔−𝐻 + 𝑄𝑔−𝐿 ) × 𝑉𝑔𝑠 × 𝑓𝑆𝑊 [W]
or
𝑃𝐺 = (𝐶𝐺𝑆−𝐻 + 𝐶𝐺𝑆−𝐿 ) × 𝑉𝑔𝑠2 × 𝑓𝑆𝑊 [W]
Where:
𝑄𝑔−𝐻
𝑄𝑔−𝐿
𝐶𝐺𝑆−𝐻
𝐶𝐺𝑆−𝐿
𝑉𝑔𝑠
𝑓𝑆𝑊
is gate charge of high side MOSFET.
is gate charge of low side MOSFET.
is capacitance between gate and source of high side MOSFET.
is capacitance between gate and source of low side MOSFET.
is gate drive voltage.
is switching frequency.
All power loss of the MOSFET
Power loss P of the MOSFET is the value that added all these.
𝑃 = 𝑃𝑂𝑁−𝐻 + 𝑃𝑂𝑁−𝐿 + 𝑃𝑆𝑊−𝐻 + 𝑃𝑆𝑊−𝐿 + 𝑃𝐶𝑂𝑆𝑆 + 𝑃𝐷 + 𝑃𝐺 [W]
Where:
𝑃𝑂𝑁−𝐻
𝑃𝑂𝑁−𝐿
𝑃𝑆𝑊−𝐻
𝑃𝑆𝑊−𝐿
𝑃𝐶𝑂𝑆𝑆
𝑃𝐷
𝑃𝐺
is high side MOSFET on resistance loss.
is low side MOSFET on resistance loss.
is high side MOSFET switching loss.
is low side MOSFET switching loss.
is MOSFET output capacitance loss.
is dead time loss.
is gate charge loss.
5.
BOOT1 Capacitor (CB1)
CB1 is a capacitor between BOOT1 and SW1. The voltage between BOOT1 and SW1 will be almost the same as voltage
between VREG and GND. Ceramic capacitor with capacity of 0.1 μF is recommended for capacitor CB1. Moreover, in
order to maintain good temperature characteristics, capacitor with a characteristic of X7R or more is recommended.
6.
VREG Capacitor (CREG)
CREG is a capacitor between VREG and internal block. Ceramic capacitor with capacity of 2.2 μF is recommended for the
VREG pin.
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Selection of Components Externally Connected - continued
7.
Switching Frequency Setting Resistor (RRT)
RRT is a resistor to set switching frequency of BUCK1, BUCK2, BUCK3, and BOOST4. The resistor value is 9.1 kΩ.
8.
WDT Timeout Setting Resistor (RRTW)
RRTW is a resistor to set timeout of Watch Dog Timer.
The range of RRTW is from 10 kΩ to 47 kΩ.
Details for setting RRTW is describe in page 15.
9.
Current Detection Resistor of BUCK1 (RCS)
The RCS resistor sets the level of the over current protection of BUCK1. The level of the over current protection is decided
in an expression below.
𝐼𝑂𝐶𝑃 =
75𝑚𝑉(𝑇𝑦𝑝)
[A]
𝑅𝐶𝑆
Because high current flows in RCS, the resistor with enough margin must be selected for rating current and allowable
power. It is recommended to use resistor of PMR series for current detection resistor.
10. Pull-up Resistor for Open Drain Output (RRST, RPG1, RPG2, RTWO)
The XRSTOUT, PGOOD1, PGOOD2, and XTWOUT pins are the N-channel open drain output.
These pins are used to pull-up resistor to VO1 or to other power supplies. The range of resistor value is 1 kΩ to 47 kΩ.
11. Selection of Schottky Barrier Diode (SBD) (D4)
It is necessary to use Schottky barrier diode to realize high efficiency.
Please select suitable Schottky barrier diode considering the following contents enough.
The maximum rating of reverse voltage must have enough margin against maximum output voltage of VO4.
In additional, current rating of SBD is necessary for peak forward current I DPEAK.
Peak forward current IDPEAK is defined by following expression.
𝐼
𝐼𝐷𝑃𝐸𝐴𝐾 = (1−𝐷𝑂𝑈𝑇
𝐵𝑂𝑂𝑆𝑇 )
Where:
𝐼𝑂𝑈𝑇
𝐷𝐵𝑂𝑂𝑆𝑇
𝛥𝐼𝐿𝐵𝑂𝑂𝑆𝑇
𝑉𝐼𝑁
𝑉𝑂𝑈𝑇
+
∆𝐼𝐿𝐵𝑂𝑂𝑆𝑇
2
=
𝐼𝑂𝑈𝑇
(1−𝐷𝐵𝑂𝑂𝑆𝑇 )
+
1
2
𝑉
× [L × 𝐼𝑁
𝑓
𝑆𝑊
𝑉
× (1 − 𝑉 𝐼𝑁 )] [A]
𝑂𝑈𝑇
is output current.
is duty cycle of boost converter.
is inductor ripple current.
is input voltage. (= VO1 voltage)
is output voltage.
The forward average rectify current is equal to output current IOUT
The power loss of SBD can be approximated by the following equation.
𝑃𝐷𝐼𝑂𝐷𝐸 = 𝐼𝑂𝑈𝑇 × 𝑉𝐹 ×
Where:
𝑃𝐷𝐼𝑂𝐷𝐸
𝐼𝑂𝑈𝑇
𝑉𝐹
𝑉𝐼𝑁
𝑉𝑂𝑈𝑇
𝑉𝐼𝑁
𝑉𝑂𝑈𝑇
[W]
is power loss of SBD.
is output current.
is forward voltage of SBD.
is input voltage. (= VO1 voltage)
is output voltage.
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Selection of Components Externally Connected - continued
12. Phase Compensation (BUCK1)
High response characteristic can be achieved by setting total gain zero cross frequency f C (Gain 0 dB frequency) high.
However, give consideration that responsiveness and the stability are in relation of trade-off. Switching regulator
application are sampled by switching frequency. In order to sustain gain at switching frequency, zero cross frequency
should be set lower than 1/2 to 1/10 of the switching frequency. In general, the characteristics which application design
must target are;
150˚ or less (phase margin 30˚ or more) phase delay at Gain 1 (0 dB)
Zero cross frequency to be lower than 1/2 to 1/10 of the switching frequency.
To increase the response characteristic, zero cross frequency must be higher.
BUCK1 phase compensation is set by capacitor and resistor between the COMP1 pin and Ground. (BUCK2, BUCK3,
and BOOST4 have phase compensation network of built-in COMP pins. No need for adjustment.)
Following values are the recommend value of phase compensation of BUCK1.
RC1
33 kΩ
CC1
1200 pF
Actual behavior will vary by several factors such as PCB layout, wiring, components, and usage condition (temp). It is
necessary to verify the stability and response characteristic on the actual application. For frequency characteristic
confirmation, gain phase analyzer or FRA will be used. Measurement method shall be checked with measurement
equipment manufacturer.
13. VO3 Output Voltage Setting (BUCK3)
Output of VO3 can be calculated by following equation.
𝑉𝑂3 = 0.8 𝑉 (𝑇𝑦𝑝) ×
𝑅𝐹𝐵3𝑈 +𝑅𝐹𝐵3𝑈
𝑅𝐹𝐵3𝐿
[V]
Output of VO1, VO2 and VO4 are fixed voltage.
VO3
CFB3
RFB3U
FB3
RFB3L
VREF
Figure 45. FB3 Feedback Circuit
Feedback resistor RFB3L shall be set to 47 kΩ or less. Also low RFB3U+ RFB3L reduces efficiency, therefore set values that
current through feedback resistor will be sufficiently lower than output current IOUT.
The resistor recommended for output voltage setting must have high accuracy resistor of less than 1 %.
The resistor is connected near this IC, and is located so it is not affected by the noise of the SW1 pin.
Also, CFB3 is connected 220 pF to stabilize control system.
RVO3U and RVO3L resistor connected to the VO3S pin sets the overvoltage detection level of BUCK3. The reason of
separating pin is to protect IC with overvoltage detection from an error which may occur when the FB3 pin shorts GND.
The resistor value of RVO3U, RVO3L are the same as RFB3U, RFB3L.
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Selection of Components Externally Connected - continued
14. Selection of EN1 Resistor
When an alien substance causes short between pins, the EN1 pin may short-circuit with the VCC pin. In this case, the
external components may exceed rating. When a countermeasure is necessary for above mentioned cases, insert
resistance in the EN pin as shown in the following figure. The resistance value is 400 kΩ or less.
VCC
CVCC1
EN1
control
6
VCC
7
EN1
short
Figure 46. The EN1 Pin Resistor
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Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply
pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at
all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic
capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
Except for pins the output and the input of which were designed to go below ground, ensure that no pins are at a
voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Recommended Operating Conditions
The function and operation of the IC are guaranteed within the range specified by the recommended operating
conditions. The characteristic values are guaranteed only under the conditions of each item specified by the electrical
characteristics.
6.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.
Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing
of connections.
7.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject
the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should
always be turned off completely before connecting or removing it from the test setup during the inspection process. To
prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and
storage.
8.
Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
9.
Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge
acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause
unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power
supply or ground line.
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Operational Notes - continued
10. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
C
E
Pin A
N
P+
P
N
N
P+
N
Pin B
B
Parasitic
Elements
N
P+
N P
N
P+
B
N
C
E
Parasitic
Elements
P Substrate
P Substrate
GND
GND
Parasitic
Elements
GND
Parasitic
Elements
GND
N Region
close-by
Figure 47. Example of Monolithic IC Structure
11. Ceramic Capacitor
When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
12. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the
junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF power output pins. When the Tj
falls below the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from heat
damage.
13. Over Current Protection Circuit (OCP)
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This
protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should
not be used in applications characterized by continuous operation or transitioning of the protection circuit.
14. Functional Safety
“ISO 26262 Process Compliant to Support ASIL-*”
A product that has been developed based on an ISO 26262 design process compliant to the ASIL level described in
the datasheet.
“Safety Mechanism is Implemented to Support Functional Safety (ASIL-*)”
A product that has implemented safety mechanism to meet ASIL level requirements described in the datasheet.
“Functional Safety Supportive Automotive Products”
A product that has been developed for automotive use and is capable of supporting safety analysis with regard to the
functional safety.
Note: “ASIL-*” is stands for the ratings of “ASIL-A”, “-B”, “-C” or “-D” specified by each product's datasheet.
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BD39031MUF-C
Ordering Information
B
D
3
9
0
3
Part Number
1
M
U
F
-
Package
MUF: VQFN40FV6060
CE 2
Product Rank
C: for Automotive
Packaging and forming specification
E2: Embossed tape and reel
Marking Diagrams
VQFN40FV6060 (TOP VIEW)
Part Number Marking
BD39031
LOT Number
Pin 1 Mark
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Physical Dimension and Packing Information
Package Name
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BD39031MUF-C
Revision History
Date
Revision
05.Mar.2020
001
Changes
New Release
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Notice
Precaution on using ROHM Products
1.
If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1),
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.
However, recommend sufficiently about the residue.); or Washing our Products by using water or water-soluble
cleaning agents for cleaning residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PAA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.004
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl 2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PAA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.004
Datasheet
General Precaution
1. Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
3.
The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001